microsoft/FStarDataSet-V2 · Datasets at Hugging Face

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_quick_Fmul

val va_quick_Fmul (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul ()))

let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 29, "end_line": 165, "start_col": 0, "start_line": 159 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> inB_b: Vale.X64.Memory.buffer64 -> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.Curve25519.X64.FastWide.va_code_Fmul ())

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Memory.buffer64", "Vale.X64.QuickCode.va_QProc", "Prims.unit", "Vale.Curve25519.X64.FastWide.va_code_Fmul", "Prims.Cons", "Vale.X64.QuickCode.mod_t", "Vale.X64.QuickCode.va_Mod_mem_layout", "Vale.X64.QuickCode.va_Mod_mem_heaplet", "Vale.X64.QuickCode.va_Mod_flags", "Vale.X64.QuickCode.va_Mod_reg64", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRax", "Vale.X64.QuickCode.va_Mod_mem", "Prims.Nil", "Vale.Curve25519.X64.FastWide.va_wp_Fmul", "Vale.Curve25519.X64.FastWide.va_wpProof_Fmul", "Vale.X64.QuickCode.va_quickCode" ]

[]

false

let va_quick_Fmul (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul ())) =

(va_QProc (va_code_Fmul ()) ([ va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem ]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_req_Fmul_stdcall

val va_req_Fmul_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) : prop

let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 46, "end_line": 190, "start_col": 0, "start_line": 172 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

va_b0: Vale.X64.Decls.va_code -> va_s0: Vale.X64.Decls.va_state -> win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> inB_b: Vale.X64.Memory.buffer64 -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Decls.va_code", "Vale.X64.Decls.va_state", "Prims.bool", "Vale.X64.Memory.buffer64", "Prims.l_and", "Vale.X64.Decls.va_require_total", "Vale.Curve25519.X64.FastWide.va_code_Fmul_stdcall", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Prims.eq2", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rRsp", "Vale.X64.Stack_i.init_rsp", "Vale.X64.Decls.va_get_stack", "Vale.X64.Memory.is_initial_heap", "Vale.X64.Decls.va_get_mem_layout", "Vale.X64.Decls.va_get_mem", "Vale.X64.CPU_Features_s.adx_enabled", "Vale.X64.CPU_Features_s.bmi2_enabled", "Prims.l_or", "Vale.X64.Decls.buffers_disjoint", "Vale.X64.Decls.validDstAddrs64", "Vale.Arch.HeapTypes_s.Secret", "Vale.X64.Decls.validSrcAddrs64", "Vale.X64.Decls.va_int_range", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdi", "Prims.prop" ]

[]

false

true

let va_req_Fmul_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) : prop =

(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let tmp_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let inB_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_ens_Fmul_stdcall

val va_ens_Fmul_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) (va_sM: va_state) (va_fM: va_fuel) : prop

let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 38, "end_line": 231, "start_col": 0, "start_line": 191 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

va_b0: Vale.X64.Decls.va_code -> va_s0: Vale.X64.Decls.va_state -> win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> inB_b: Vale.X64.Memory.buffer64 -> va_sM: Vale.X64.Decls.va_state -> va_fM: Vale.X64.Decls.va_fuel -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Decls.va_code", "Vale.X64.Decls.va_state", "Prims.bool", "Vale.X64.Memory.buffer64", "Vale.X64.Decls.va_fuel", "Prims.l_and", "Vale.Curve25519.X64.FastWide.va_req_Fmul_stdcall", "Vale.X64.Decls.va_ensure_total", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Prims.eq2", "Prims.int", "Prims.op_Modulus", "Vale.Curve25519.Fast_defs.prime", "Vale.X64.Decls.va_mul_nat", "Vale.X64.Decls.modifies_buffer_2", "Vale.X64.Decls.va_get_mem", "Prims.l_imp", "Vale.Def.Types_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRbp", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRsp", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR15", "Prims.l_not", "Prims.nat", "Vale.Curve25519.Fast_defs.pow2_four", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.buffer64_read", "Vale.X64.Decls.va_int_range", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRdx", "Vale.X64.Decls.va_state_eq", "Vale.X64.Decls.va_update_stackTaint", "Vale.X64.Decls.va_update_stack", "Vale.X64.Decls.va_update_mem_layout", "Vale.X64.Decls.va_update_mem_heaplet", "Vale.X64.Decls.va_update_flags", "Vale.X64.Decls.va_update_reg64", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rRax", "Vale.X64.Decls.va_update_ok", "Vale.X64.Decls.va_update_mem", "Prims.prop" ]

[]

false

true

let va_ens_Fmul_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) (va_sM: va_state) (va_fM: va_fuel) : prop =

(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let tmp_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let inB_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == (va_mul_nat a b) `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))) ))))))))))))))))))))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_quick_Fmul2

val va_quick_Fmul2 (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul2 ()))

let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 47, "end_line": 565, "start_col": 0, "start_line": 559 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> inB_b: Vale.X64.Memory.buffer64 -> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.Curve25519.X64.FastWide.va_code_Fmul2 ())

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Memory.buffer64", "Vale.X64.QuickCode.va_QProc", "Prims.unit", "Vale.Curve25519.X64.FastWide.va_code_Fmul2", "Prims.Cons", "Vale.X64.QuickCode.mod_t", "Vale.X64.QuickCode.va_Mod_mem_layout", "Vale.X64.QuickCode.va_Mod_mem_heaplet", "Vale.X64.QuickCode.va_Mod_flags", "Vale.X64.QuickCode.va_Mod_reg64", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRax", "Vale.X64.QuickCode.va_Mod_mem", "Prims.Nil", "Vale.Curve25519.X64.FastWide.va_wp_Fmul2", "Vale.Curve25519.X64.FastWide.va_wpProof_Fmul2", "Vale.X64.QuickCode.va_quickCode" ]

[]

false

let va_quick_Fmul2 (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul2 ())) =

(va_QProc (va_code_Fmul2 ()) ([ va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem ]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_quick_Fmul_stdcall

val va_quick_Fmul_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win))

let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 65, "end_line": 375, "start_col": 0, "start_line": 368 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> inB_b: Vale.X64.Memory.buffer64 -> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.Curve25519.X64.FastWide.va_code_Fmul_stdcall win)

Prims.Tot

[ "total" ]

[]

[ "Prims.bool", "Vale.X64.Memory.buffer64", "Vale.X64.QuickCode.va_QProc", "Prims.unit", "Vale.Curve25519.X64.FastWide.va_code_Fmul_stdcall", "Prims.Cons", "Vale.X64.QuickCode.mod_t", "Vale.X64.QuickCode.va_Mod_stackTaint", "Vale.X64.QuickCode.va_Mod_stack", "Vale.X64.QuickCode.va_Mod_mem_layout", "Vale.X64.QuickCode.va_Mod_mem_heaplet", "Vale.X64.QuickCode.va_Mod_flags", "Vale.X64.QuickCode.va_Mod_reg64", "Vale.X64.Machine_s.rR15", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRsp", "Vale.X64.Machine_s.rRbp", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRax", "Vale.X64.QuickCode.va_Mod_mem", "Prims.Nil", "Vale.Curve25519.X64.FastWide.va_wp_Fmul_stdcall", "Vale.Curve25519.X64.FastWide.va_wpProof_Fmul_stdcall", "Vale.X64.QuickCode.va_quickCode" ]

[]

false

let va_quick_Fmul_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =

(va_QProc (va_code_Fmul_stdcall win) ([ va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem ]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))

false

Vale.AES.X64.AESGCM.fst

Vale.AES.X64.AESGCM.va_qcode_AES_GCM_encrypt_6mult

val va_qcode_AES_GCM_encrypt_6mult (va_mods: va_mods_t) (alg: algorithm) (h_LE: quad32) (iv_b in_b out_b scratch_b: buffer128) (key_words: (seq nat32)) (round_keys: (seq quad32)) (keys_b hkeys_b: buffer128) : (va_quickCode unit (va_code_AES_GCM_encrypt_6mult alg))

let va_qcode_AES_GCM_encrypt_6mult (va_mods:va_mods_t) (alg:algorithm) (h_LE:quad32) (iv_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) : (va_quickCode unit (va_code_AES_GCM_encrypt_6mult alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2176 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_eq (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2178 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2179 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 1) 32 Secret scratch_b 2) (fun (va_s:va_state) _ -> let (va_arg104:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg103:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg102:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (va_arg101:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b in let (va_arg100:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2180 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_init va_arg100 va_arg101 va_arg102 va_arg103 va_arg104) (va_QEmpty (())))))) (qblock va_mods (fun (va_s:va_state) -> let (plain_quads:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b in let (y_orig:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s) in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2187 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 32 Secret scratch_b 2) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2189 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Add64 (va_op_dst_opr64_reg64 rRcx) (va_const_opr64 128)) (fun (va_s:va_state) _ -> let (ctr_BE:quad32) = va_get_xmm 1 va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2195 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Pextrq (va_op_dst_opr64_reg64 rRbx) (va_op_xmm_xmm 1) 0) (fun (va_s:va_state) _ -> let (full_counter:nat64) = va_get_reg64 rRbx va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2197 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_And64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 255)) (fun (va_s:va_state) _ -> let (va_arg136:Vale.Def.Types_s.nat64) = va_get_reg64 rRbx va_s in let (va_arg135:Vale.Def.Types_s.nat64) = full_counter in let (va_arg134:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2198 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.lemma_counter_init va_arg134 va_arg135 va_arg136) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2200 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2203 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AddLea64 (va_op_dst_opr64_reg64 rR14) (va_op_opr64_reg64 rRsi) (va_const_opr64 96)) (fun (va_s:va_state) _ -> let (va_arg133:Vale.Def.Types_s.quad32) = ctr_BE in let (va_arg132:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg131:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (va_arg130:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b in let (va_arg129:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2205 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_init va_arg129 va_arg130 va_arg131 va_arg132 va_arg133) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2206 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x alg 0 in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2208 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 8) (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2209 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 2) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2210 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 112 Secret scratch_b 7) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2211 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 4) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2212 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 2) 96 Secret scratch_b 6) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2213 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 5) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2214 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 80 Secret scratch_b 5) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2215 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2216 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 5) 64 Secret scratch_b 4) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2217 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 7) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2218 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 6) 48 Secret scratch_b 3) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2220 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x alg 1 in_b out_b plain_quads key_words round_keys keys_b (Vale.AES.GCTR_s.inc32 ctr_BE 6) ctr_BE) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2221 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 12)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2223 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 8) (va_op_reg_opr64_reg64 rRbp) 32 Secret scratch_b 2) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2226 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b (Vale.AES.GCTR_s.inc32 ctr_BE 12)) (fun (va_s:va_state) _ -> let (mid_len:nat64) = va_get_reg64 rRdx va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2233 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Math.Poly2.Words.lemma_quad32_zero ()) (let (va_arg128:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2234 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Math.Poly2.lemma_add_zero va_arg128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 2235 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) == add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 2236 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) == va_get_xmm 8 va_s) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2237 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_loop alg h_LE (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s)) (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s)) 2 iv_b out_b in_b out_b scratch_b (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b) key_words round_keys keys_b hkeys_b ctr_BE (Vale.AES.GCTR_s.inc32 ctr_BE 12)) (fun (va_s:va_state) (y_new:quad32) -> let (out_snapshot:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2240 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret scratch_b 2) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2243 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 1) 32 Secret scratch_b 2) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2246 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_ZeroXmm (va_op_xmm_xmm 4)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2247 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret scratch_b 1) (fun (va_s:va_state) _ -> let (va_arg127:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2248 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Math.Poly2.lemma_add_zero va_arg127) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2250 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s - 12 >= 0 /\ va_get_reg64 rRdx va_old_s - 6 >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) (va_get_reg64 rRdx va_old_s - 12) (va_get_reg64 rRdx va_old_s - 6)) (fun _ -> let (data:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) (va_get_reg64 rRdx va_old_s - 12) (va_get_reg64 rRdx va_old_s - 6) in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2251 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_GhashUnroll6x hkeys_b scratch_b h_LE y_new data) (fun (va_s:va_state) _ -> let (y_new':Vale.Def.Types_s.quad32) = Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2253 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s - 12 >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 12)) (fun _ -> let (va_arg126:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = data in let (va_arg125:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 12) in let (va_arg124:Vale.Def.Types_s.quad32) = y_new in let (va_arg123:Vale.Def.Types_s.quad32) = h_LE in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2253 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GHash.lemma_ghash_incremental0_append va_arg123 y_orig va_arg124 y_new' va_arg125 va_arg126) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2255 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s - 12 >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 12) /\ va_get_reg64 rRdx va_old_s - 6 >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 2255 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #Vale.X64.Decls.quad32 (FStar.Seq.Base.append #Vale.X64.Decls.quad32 (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 12)) data) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 6))) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2260 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_InitPshufbMask (va_op_xmm_xmm 0) (va_op_reg_opr64_reg64 rR12)) (fun (va_s:va_state) _ -> va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2267 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s `op_Division` 6 - 1 >= 0) (fun _ -> let (offset_in:nat) = va_get_reg64 rRdx va_old_s `op_Division` 6 - 1 in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2268 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Encrypt_save_and_shuffle_output offset_in out_b) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2271 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_UpdateScratch scratch_b) (fun (va_s:va_state) _ -> va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2273 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s - 6 >= 0 /\ va_get_reg64 rRdx va_old_s >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) (va_get_reg64 rRdx va_old_s - 6) (va_get_reg64 rRdx va_old_s)) (fun _ -> let data = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) (va_get_reg64 rRdx va_old_s - 6) (va_get_reg64 rRdx va_old_s) in let (va_arg122:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2274 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Math.Poly2.lemma_add_zero va_arg122) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2275 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_GhashUnroll6x hkeys_b scratch_b h_LE y_new' data) (fun (va_s:va_state) _ -> let (y_new'':Vale.Def.Types_s.quad32) = Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2278 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s - 6 >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 6)) (fun _ -> let (va_arg121:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = data in let (va_arg120:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 6) in let (va_arg119:Vale.Def.Types_s.quad32) = h_LE in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2278 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GHash.lemma_ghash_incremental0_append va_arg119 y_orig y_new' y_new'' va_arg120 va_arg121) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2280 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s - 6 >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 2280 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #Vale.X64.Decls.quad32 (FStar.Seq.Base.append #Vale.X64.Decls.quad32 (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 6)) data) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b)) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2286 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (12 + mid_len - 6 >= 0 /\ 12 + mid_len - 6 <= 4294967295) (fun _ -> let (va_arg118:Vale.Def.Types_s.quad32) = ctr_BE in let (va_arg117:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg116:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (va_arg115:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = out_snapshot in let (va_arg114:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b in let (va_arg113:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b in let (va_arg112:Vale.Def.Types_s.nat32) = 12 + mid_len - 6 in let (va_arg111:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2286 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_ignores_postfix va_arg111 va_arg112 va_arg113 va_arg114 va_arg115 va_arg116 va_arg117 va_arg118) (let (va_arg110:Vale.Def.Types_s.quad32) = ctr_BE in let (va_arg109:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg108:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (va_arg107:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b in let (va_arg106:Prims.nat) = 12 + mid_len - 6 in let (va_arg105:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2287 column 29 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_extend6 va_arg105 va_arg106 va_arg107 va_arg108 va_arg109 va_arg110) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2289 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rRcx) (va_const_opr64 128)) (va_QEmpty (()))))))))))))))))))))))))))))))))))))))))))))))))))))))))))) (fun (va_s:va_state) va_g -> va_QEmpty (()))))

{ "file_name": "obj/Vale.AES.X64.AESGCM.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 21, "end_line": 7539, "start_col": 0, "start_line": 7283 }

module Vale.AES.X64.AESGCM open FStar.Mul open Vale.Def.Prop_s open Vale.Def.Opaque_s open Vale.Def.Words_s open Vale.Def.Types_s open FStar.Seq open Vale.AES.AES_s open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsVector open Vale.X64.InsAes open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Arch.Types open Vale.AES.AES_helpers //open Vale.Poly1305.Math // For lemma_poly_bits64() open Vale.AES.GCM_helpers open Vale.AES.GCTR_s open Vale.AES.GCTR open Vale.Arch.TypesNative open Vale.X64.CPU_Features_s open Vale.AES.X64.PolyOps open Vale.Math.Poly2_s open Vale.Math.Poly2 open Vale.Math.Poly2.Bits_s open Vale.Math.Poly2.Bits open Vale.Math.Poly2.Lemmas open Vale.AES.GF128_s open Vale.AES.GF128 open Vale.AES.GHash open Vale.AES.X64.AESopt open Vale.AES.X64.AESopt2 unfold let lo(x:poly):poly = mask x 64 unfold let hi(x:poly):poly = shift x (-64) //let scratch_reqs (scratch_b:buffer128) (count:nat) (heap3:vale_heap) (s:seq quad32) (z3:quad32) : prop0 = // count * 6 + 6 <= length s /\ // (let data = slice s (count * 6) (count * 6 + 6) in // z3 == reverse_bytes_quad32 (index data 5) /\ // buffer128_read scratch_b 3 heap3 == reverse_bytes_quad32 (index data 4) /\ // buffer128_read scratch_b 4 heap3 == reverse_bytes_quad32 (index data 3) /\ // buffer128_read scratch_b 5 heap3 == reverse_bytes_quad32 (index data 2) /\ // buffer128_read scratch_b 6 heap3 == reverse_bytes_quad32 (index data 1) /\ // buffer128_read scratch_b 7 heap3 == reverse_bytes_quad32 (index data 0)) let scratch_reqs_simple (scratch_b:buffer128) (heap3:vale_heap) (data:seq quad32) (z3:quad32) : prop0 = length data == 6 /\ z3 == reverse_bytes_quad32 (index data 5) /\ buffer128_read scratch_b 3 heap3 == reverse_bytes_quad32 (index data 4) /\ buffer128_read scratch_b 4 heap3 == reverse_bytes_quad32 (index data 3) /\ buffer128_read scratch_b 5 heap3 == reverse_bytes_quad32 (index data 2) /\ buffer128_read scratch_b 6 heap3 == reverse_bytes_quad32 (index data 1) /\ buffer128_read scratch_b 7 heap3 == reverse_bytes_quad32 (index data 0) //-- finish_aes_encrypt_le val finish_aes_encrypt_le : alg:algorithm -> input_LE:quad32 -> key:(seq nat32) -> Lemma (requires (Vale.AES.AES_s.is_aes_key_LE alg key)) (ensures (Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key))) let finish_aes_encrypt_le alg input_LE key = Vale.AES.AES_s.aes_encrypt_LE_reveal (); Vale.AES.AES_s.eval_cipher_reveal (); () //-- let va_subscript_FStar__Seq__Base__seq = Seq.index #reset-options "--z3rlimit 30" //-- Load_one_msb val va_code_Load_one_msb : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Load_one_msb () = (va_Block (va_CCons (va_code_ZeroXmm (va_op_xmm_xmm 2)) (va_CCons (va_code_PinsrqImm (va_op_xmm_xmm 2) 72057594037927936 1 (va_op_reg_opr64_reg64 rR11)) (va_CNil ())))) val va_codegen_success_Load_one_msb : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Load_one_msb () = (va_pbool_and (va_codegen_success_ZeroXmm (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_PinsrqImm (va_op_xmm_xmm 2) 72057594037927936 1 (va_op_reg_opr64_reg64 rR11)) (va_ttrue ()))) [@ "opaque_to_smt" va_qattr] let va_qcode_Load_one_msb (va_mods:va_mods_t) : (va_quickCode unit (va_code_Load_one_msb ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 145 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_ZeroXmm (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 146 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Arch.Types.two_to_nat32 (Vale.Def.Words_s.Mktwo #Vale.Def.Words_s.nat32 0 16777216) == 72057594037927936) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 147 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_PinsrqImm (va_op_xmm_xmm 2) 72057594037927936 1 (va_op_reg_opr64_reg64 rR11)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 148 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Def.Types_s.insert_nat64_reveal ()) (va_QEmpty (()))))))) val va_lemma_Load_one_msb : va_b0:va_code -> va_s0:va_state -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load_one_msb ()) va_s0 /\ va_get_ok va_s0 /\ sse_enabled)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 2 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0)))))) [@"opaque_to_smt"] let va_lemma_Load_one_msb va_b0 va_s0 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11; va_Mod_ok] in let va_qc = va_qcode_Load_one_msb va_mods in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Load_one_msb ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 138 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 143 column 46 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216)) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Load_one_msb (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ sse_enabled /\ (forall (va_x_r11:nat64) (va_x_xmm2:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 2 va_x_xmm2 (va_upd_reg64 rR11 va_x_r11 va_s0)) in va_get_ok va_sM /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 ==> va_k va_sM (()))) val va_wpProof_Load_one_msb : va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load_one_msb va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load_one_msb ()) ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Load_one_msb va_s0 va_k = let (va_sM, va_f0) = va_lemma_Load_one_msb (va_code_Load_one_msb ()) va_s0 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 2 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Load_one_msb () : (va_quickCode unit (va_code_Load_one_msb ())) = (va_QProc (va_code_Load_one_msb ()) ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11]) va_wp_Load_one_msb va_wpProof_Load_one_msb) //-- //-- Ctr32_ghash_6_prelude val va_code_Ctr32_ghash_6_prelude : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Ctr32_ghash_6_prelude alg = (va_Block (va_CCons (va_code_Load_one_msb ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 4) (va_op_opr128_xmm 4)) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 15)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_CNil ())))))))))))) val va_codegen_success_Ctr32_ghash_6_prelude : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Ctr32_ghash_6_prelude alg = (va_pbool_and (va_codegen_success_Load_one_msb ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 4) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 15)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_ttrue ()))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Ctr32_ghash_6_prelude (va_mods:va_mods_t) (alg:algorithm) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) : (va_quickCode unit (va_code_Ctr32_ghash_6_prelude alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 211 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_one_msb ()) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 212 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 4) (va_op_opr128_xmm 4)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 213 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Arch.Types.lemma_quad32_xor ()) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 214 column 19 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret keys_b 0) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 215 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg44:Vale.Def.Types_s.quad32) = va_get_xmm 10 va_s in let (va_arg43:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg42:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 215 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg42 va_arg43 va_arg44 1) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 216 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg41:Vale.Def.Types_s.quad32) = va_get_xmm 11 va_s in let (va_arg40:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg39:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 216 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg39 va_arg40 va_arg41 2) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 217 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg38:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_s in let (va_arg37:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg36:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 217 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg36 va_arg37 va_arg38 3) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 218 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg35:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_s in let (va_arg34:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg33:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 218 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg33 va_arg34 va_arg35 4) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 219 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg32:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_s in let (va_arg31:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg30:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 219 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg30 va_arg31 va_arg32 5) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 220 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 221 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret scratch_b 1) (va_QEmpty (()))))))))))))))))))) val va_lemma_Ctr32_ghash_6_prelude : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> scratch_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_orig:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Ctr32_ghash_6_prelude alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 8 (va_get_mem_layout va_s0) Secret /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 1 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (va_get_xmm 15 va_sM) /\ (let counter = Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 in (counter + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) /\ (counter + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) /\ (counter + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) /\ (counter + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) /\ (counter + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) /\ Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_reg64 rR11 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 4 va_sM (va_update_xmm 2 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))) [@"opaque_to_smt"] let va_lemma_Ctr32_ghash_6_prelude va_b0 va_s0 alg scratch_b key_words round_keys keys_b ctr_orig = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Ctr32_ghash_6_prelude va_mods alg scratch_b key_words round_keys keys_b ctr_orig in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Ctr32_ghash_6_prelude alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 151 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 194 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 1) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 196 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 197 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 199 column 83 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 200 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (let counter = Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 in label va_range1 "***** POSTCONDITION NOT MET AT line 201 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 202 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 203 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 204 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 205 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 207 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 208 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_ok; va_Mod_mem]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Ctr32_ghash_6_prelude (alg:algorithm) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 8 (va_get_mem_layout va_s0) Secret /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) /\ (forall (va_x_mem:vale_heap) (va_x_xmm2:quad32) (va_x_xmm4:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_r11:nat64) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_reg64 rR11 va_x_r11 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 2 va_x_xmm2 (va_upd_mem va_x_mem va_s0)))))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 1 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (va_get_xmm 15 va_sM) /\ (let counter = Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 in (counter + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) /\ (counter + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) /\ (counter + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) /\ (counter + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) /\ (counter + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) /\ Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) ==> va_k va_sM (()))) val va_wpProof_Ctr32_ghash_6_prelude : alg:algorithm -> scratch_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_orig:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Ctr32_ghash_6_prelude alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig va_s0 va_k = let (va_sM, va_f0) = va_lemma_Ctr32_ghash_6_prelude (va_code_Ctr32_ghash_6_prelude alg) va_s0 alg scratch_b key_words round_keys keys_b ctr_orig in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_reg64 rR11 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 4 va_sM (va_update_xmm 2 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_mem]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Ctr32_ghash_6_prelude (alg:algorithm) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) : (va_quickCode unit (va_code_Ctr32_ghash_6_prelude alg)) = (va_QProc (va_code_Ctr32_ghash_6_prelude alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_mem]) (va_wp_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig) (va_wpProof_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig)) //-- //-- Handle_ctr32_2 val va_code_Handle_ctr32_2 : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Handle_ctr32_2 () = (va_Block (va_CCons (va_code_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_CCons (va_code_Load_one_lsb (va_op_xmm_xmm 5)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_CCons (va_code_Load_two_lsb (va_op_xmm_xmm 5)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 11) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_CNil ())))))))))))))))))))))) val va_codegen_success_Handle_ctr32_2 : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Handle_ctr32_2 () = (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Load_one_lsb (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_Load_two_lsb (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 11) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_ttrue ()))))))))))))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Handle_ctr32_2 (va_mods:va_mods_t) (ctr_BE:quad32) : (va_quickCode unit (va_code_Handle_ctr32_2 ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 253 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 258 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_one_lsb (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 260 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 262 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_two_lsb (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 263 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 265 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 266 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 267 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 11) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 268 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 269 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 270 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 271 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 272 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 273 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 274 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 275 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 276 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 277 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 278 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 279 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_QEmpty (()))))))))))))))))))))))) val va_lemma_Handle_ctr32_2 : va_b0:va_code -> va_s0:va_state -> ctr_BE:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Handle_ctr32_2 ()) va_s0 /\ va_get_ok va_s0 /\ (avx_enabled /\ sse_enabled /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 ctr_BE))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (va_get_xmm 4 va_sM) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (va_get_xmm 4 va_sM) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (va_get_xmm 4 va_sM) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (va_get_xmm 4 va_sM) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (va_get_xmm 4 va_sM) /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0)))))))))))))) [@"opaque_to_smt"] let va_lemma_Handle_ctr32_2 va_b0 va_s0 ctr_BE = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11; va_Mod_ok] in let va_qc = va_qcode_Handle_ctr32_2 va_mods ctr_BE in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Handle_ctr32_2 ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 224 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 246 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 247 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 248 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 249 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 250 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 251 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Handle_ctr32_2 (ctr_BE:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (avx_enabled /\ sse_enabled /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 ctr_BE) /\ (forall (va_x_r11:nat64) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rR11 va_x_r11 va_s0)))))))))) in va_get_ok va_sM /\ (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (va_get_xmm 4 va_sM) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (va_get_xmm 4 va_sM) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (va_get_xmm 4 va_sM) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (va_get_xmm 4 va_sM) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (va_get_xmm 4 va_sM) /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) ==> va_k va_sM (()))) val va_wpProof_Handle_ctr32_2 : ctr_BE:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Handle_ctr32_2 ctr_BE va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Handle_ctr32_2 ()) ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Handle_ctr32_2 ctr_BE va_s0 va_k = let (va_sM, va_f0) = va_lemma_Handle_ctr32_2 (va_code_Handle_ctr32_2 ()) va_s0 ctr_BE in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Handle_ctr32_2 (ctr_BE:quad32) : (va_quickCode unit (va_code_Handle_ctr32_2 ())) = (va_QProc (va_code_Handle_ctr32_2 ()) ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11]) (va_wp_Handle_ctr32_2 ctr_BE) (va_wpProof_Handle_ctr32_2 ctr_BE)) //-- //-- Loop6x_decrypt #push-options "--z3rlimit 300" val va_code_Loop6x_decrypt : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_decrypt alg = (va_Block (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_Loop6x_partial alg) (va_CCons (va_code_Loop6x_final alg) (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 6)) (va_CCons (va_IfElse (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 6)) (va_Block (va_CCons (va_code_Add64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_CNil ()))) (va_Block (va_CNil ()))) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_IfElse (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (va_Block (va_CCons (va_code_Loop6x_save_output ()) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_CCons (va_Block (va_CNil ())) (va_CNil ()))))) (va_Block (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret)) (va_CCons (va_code_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_op_opr128_xmm 4)) (va_CNil ())))))) (va_CNil ())))))))))))))) val va_codegen_success_Loop6x_decrypt : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_decrypt alg = (va_pbool_and (va_codegen_success_Loop6x_partial alg) (va_pbool_and (va_codegen_success_Loop6x_final alg) (va_pbool_and (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 6)) (va_pbool_and (va_codegen_success_Add64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_pbool_and (va_pbool_and (va_codegen_success_Loop6x_save_output ()) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret)) (va_codegen_success_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_op_opr128_xmm 4)))))) (va_ttrue ())))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_decrypt (va_mods:va_mods_t) (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode (quad32) (va_code_Loop6x_decrypt alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (prev:Vale.Math.Poly2_s.poly) = add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s))) in let (y_prev:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 prev) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 449 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (fun _ -> let (data:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 450 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 450 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #Vale.X64.Decls.quad32 data (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6))) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 451 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 451 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #Vale.X64.Decls.quad32 (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (FStar.Seq.Base.slice #quad32 plain_quads (count `op_Multiply` 6) (count `op_Multiply` 6 + 6))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 453 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) < 128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 454 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s)) < 128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 455 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s))) < 128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 456 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree prev < 128) (va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 457 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Math.Poly2.Bits.lemma_of_to_quad32 prev) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 459 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_partial alg h_LE y_prev data count (va_if (va_get_reg64 rRdx va_s > 6) (fun _ -> count + 1) (fun _ -> count)) iv_b in0_b in_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE) (fun (va_s:va_state) (init:quad32_6) -> let (eventual_Xi:Vale.Math.Poly2_s.poly) = add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)))) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s)) in va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 463 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (eventual_Xi == Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))) (let (ctrs:(six_of Vale.Def.Types_s.quad32)) = make_six_of #Vale.Def.Types_s.quad32 (fun (i:(va_int_range 0 5)) -> Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE i)) in let (plains:(six_of Vale.X64.Decls.quad32)) = make_six_of #Vale.X64.Decls.quad32 (fun (i:(va_int_range 0 5)) -> Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + i) (va_get_mem_heaplet 6 va_s)) in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 468 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_final alg iv_b scratch_b key_words round_keys keys_b (Vale.AES.GCTR.inc32lite ctr_BE 6) init ctrs plains (Vale.X64.Decls.buffer128_read in0_b (va_if (va_get_reg64 rRdx va_s > 6) (fun _ -> count + 1) (fun _ -> count) `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s))) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 471 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 6)) (fun (va_s:va_state) _ -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 472 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 6)) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 474 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Add64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_QEmpty (())))) (qblock va_mods (fun (va_s:va_state) -> va_QEmpty (())))) (fun (va_s:va_state) va_g -> let (y_new:quad32) = Vale.AES.GHash.ghash_incremental0 h_LE y_prev data in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 479 column 36 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 (count `op_Multiply` 6)) (fun _ -> let (va_arg104:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = data in let (va_arg103:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6) in let (va_arg102:Vale.Def.Types_s.quad32) = y_new in let (va_arg101:Vale.Def.Types_s.quad32) = y_orig in let (va_arg100:Vale.Def.Types_s.quad32) = h_LE in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 479 column 36 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GHash.lemma_ghash_incremental0_append va_arg100 va_arg101 y_prev va_arg102 va_arg103 va_arg104) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 480 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 (count `op_Multiply` 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 480 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.append #quad32 (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) data)) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 481 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 (count `op_Multiply` 6) /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 481 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #quad32 (FStar.Seq.Base.append #quad32 (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) data) (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6))) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 483 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 483 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6))) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 486 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 488 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_save_output count out_b) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 492 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret scratch_b 2) (fun (va_s:va_state) _ -> let (plain:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b in let (cipher:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (bound:(va_int_at_least 0)) = count `op_Multiply` 6 in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 497 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (bound >= 0 /\ bound <= 4294967295) (fun _ -> let (va_arg99:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg98:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg97:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = cipher in let (va_arg96:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) out_b in let (va_arg95:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg94:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg93:Vale.Def.Types_s.nat32) = bound in let (va_arg92:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 497 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_ignores_postfix va_arg92 va_arg93 va_arg94 va_arg95 va_arg96 va_arg97 va_arg98 va_arg99) (let (va_arg91:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg90:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg89:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = cipher in let (va_arg88:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg87:Prims.nat) = bound in let (va_arg86:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 499 column 29 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_extend6 va_arg86 va_arg87 va_arg88 va_arg89 va_arg90 va_arg91) (let (va_arg85:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s) in let (va_arg84:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)) in let (va_arg83:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 501 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GHash.lemma_add_manip va_arg83 va_arg84 va_arg85) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 507 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))))) (va_QEmpty (())))))))))) (qblock va_mods (fun (va_s:va_state) -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 511 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (eventual_Xi == Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 512 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret scratch_b 1) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 512 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 513 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_op_opr128_xmm 4)) (fun (va_s:va_state) _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 514 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) == Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 515 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) == Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data)))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 516 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 8 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data)) (va_QEmpty (()))))))))))) (fun (va_s:va_state) va_g -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 518 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_registers_reveal ()) (va_QEmpty ((y_new))))))))))))))))))))))))))))) val va_lemma_Loop6x_decrypt : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> count:nat -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> Ghost (va_state & va_fuel & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_decrypt alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ va_get_reg64 rRdx va_s0 >= 6 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b ((count + 1) `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 96 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b count (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig))) (ensures (fun (va_sM, va_fM, y_new) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ ((va_get_reg64 rRdx va_sM == 0 ==> va_get_mem_heaplet 6 va_sM == va_get_mem_heaplet 6 va_s0) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in_b) ((count + 1) `op_Multiply` 6) ((count + 1) `op_Multiply` 6)) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 6 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96 /\ va_get_reg64 rR14 va_sM == (if (va_get_reg64 rRdx va_sM > 6) then (va_get_reg64 rR14 va_s0 + 96) else va_get_reg64 rR14 va_s0) /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 0 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 7)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 5 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 8)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 6 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 9)) /\ (va_get_reg64 rRdx va_sM == 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 7 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 3 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 11)) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) plain_quads alg key_words ctr_BE_orig count) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 10 va_sM == va_get_xmm 0 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 11 va_sM == va_get_xmm 5 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 12 va_sM == va_get_xmm 6 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 14 va_sM == va_get_xmm 3 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 0))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs scratch_b (count + 1) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_sM))) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_decrypt va_b0 va_s0 alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Loop6x_decrypt va_mods alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_decrypt alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let y_new = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 290 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 388 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_mem_heaplet 6 va_sM == va_get_mem_heaplet 6 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 389 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 390 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 391 column 70 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 392 column 100 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in_b) ((count + 1) `op_Multiply` 6) ((count + 1) `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 397 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 398 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 399 column 64 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rR14 va_sM == va_if (va_get_reg64 rRdx va_sM > 6) (fun _ -> va_get_reg64 rR14 va_s0 + 96) (fun _ -> va_get_reg64 rR14 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 400 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 402 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 405 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 407 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 408 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 0 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 7)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 409 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 5 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 8)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 410 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 6 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 9)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 411 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 7 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 412 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 3 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 11)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 414 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 418 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) plain_quads alg key_words ctr_BE_orig count) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 420 column 93 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 421 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 10 va_sM == va_get_xmm 0 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 422 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 11 va_sM == va_get_xmm 5 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 423 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 12 va_sM == va_get_xmm 6 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 424 column 98 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 425 column 35 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 14 va_sM == va_get_xmm 3 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 427 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 0))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 428 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 429 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 430 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 431 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 432 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 435 column 108 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 438 column 90 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 440 column 103 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 441 column 55 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 443 column 89 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs scratch_b (count + 1) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_sM)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem]) va_sM va_s0; let y_new = va_g in (va_sM, va_fM, y_new) [@ va_qattr] let va_wp_Loop6x_decrypt (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) (va_s0:va_state) (va_k:(va_state -> quad32 -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ va_get_reg64 rRdx va_s0 >= 6 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b ((count + 1) `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 96 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b count (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig) /\ (forall (va_x_mem:vale_heap) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_rdx:nat64) (va_x_rbx:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_heap6:vale_heap) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) (y_new:quad32) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_mem va_x_mem va_s0)))))))))))))))))))))))))))) in va_get_ok va_sM /\ ((va_get_reg64 rRdx va_sM == 0 ==> va_get_mem_heaplet 6 va_sM == va_get_mem_heaplet 6 va_s0) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in_b) ((count + 1) `op_Multiply` 6) ((count + 1) `op_Multiply` 6)) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 6 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96 /\ va_get_reg64 rR14 va_sM == va_if (va_get_reg64 rRdx va_sM > 6) (fun _ -> va_get_reg64 rR14 va_s0 + 96) (fun _ -> va_get_reg64 rR14 va_s0) /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 0 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 7)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 5 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 8)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 6 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 9)) /\ (va_get_reg64 rRdx va_sM == 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 7 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 3 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 11)) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) plain_quads alg key_words ctr_BE_orig count) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 10 va_sM == va_get_xmm 0 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 11 va_sM == va_get_xmm 5 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 12 va_sM == va_get_xmm 6 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 14 va_sM == va_get_xmm 3 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 0))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs scratch_b (count + 1) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_sM))) ==> va_k va_sM ((y_new)))) val va_wpProof_Loop6x_decrypt : alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> count:nat -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> va_s0:va_state -> va_k:(va_state -> quad32 -> Type0) -> Ghost (va_state & va_fuel & quad32) (requires (va_t_require va_s0 /\ va_wp_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_decrypt alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k = let (va_sM, va_f0, y_new) = va_lemma_Loop6x_decrypt (va_code_Loop6x_decrypt alg) va_s0 alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_sM va_s0; let va_g = (y_new) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_decrypt (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode quad32 (va_code_Loop6x_decrypt alg)) = (va_QProc (va_code_Loop6x_decrypt alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) (va_wp_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE) (va_wpProof_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE)) #pop-options //-- //-- Loop6x_loop_decrypt_body0 #push-options "--z3rlimit 700" val va_code_Loop6x_loop_decrypt_body0 : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop_decrypt_body0 alg = (va_Block (va_CCons (va_code_Loop6x_decrypt alg) (va_CCons (va_Block (va_CNil ())) (va_CNil ())))) val va_codegen_success_Loop6x_loop_decrypt_body0 : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop_decrypt_body0 alg = (va_pbool_and (va_codegen_success_Loop6x_decrypt alg) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop_decrypt_body0 (va_mods:va_mods_t) (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_decrypt_body0 alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (ctr_BE_orig:quad32) = va_in_ctr_BE_orig in let (h_LE:quad32) = va_in_h_LE in let (hkeys_b:buffer128) = va_in_hkeys_b in let (in0_b:buffer128) = va_in_in0_b in let (in_b:buffer128) = va_in_in_b in let (iv_b:buffer128) = va_in_iv_b in let (key_words:(seq nat32)) = va_in_key_words in let (keys_b:buffer128) = va_in_keys_b in let (out_b:buffer128) = va_in_out_b in let (plain_quads:(seq quad32)) = va_in_plain_quads in let (round_keys:(seq quad32)) = va_in_round_keys in let (scratch_b:buffer128) = va_in_scratch_b in let (y_orig:quad32) = va_in_y_orig in let (ctr:quad32) = va_in_ctr in let (iter:nat) = va_in_iter in let (y_cur:quad32) = va_in_y_cur in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 733 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_decrypt alg h_LE y_orig y_cur iter iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr) (fun (va_s:va_state) (y_cur:quad32) -> va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 735 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter + 1 >= 0) (fun _ -> let (iter:nat) = iter + 1 in let (ctr:quad32) = Vale.AES.GCTR_s.inc32 ctr 6 in va_QEmpty ((ctr, iter, y_cur)))))) val va_lemma_Loop6x_loop_decrypt_body0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> Ghost (va_state & va_fuel & quad32 & nat & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_decrypt_body0 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ va_get_reg64 rRdx va_s0 > 0)) (ensures (fun (va_sM, va_fM, ctr, iter, y_cur) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_loop_decrypt_body0 va_b0 va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur = let va_old = va_expand_state va_old in let (va_mods:va_mods_t) = [va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags] in let va_qc = va_qcode_Loop6x_loop_decrypt_body0 va_mods va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop_decrypt_body0 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let (ctr, iter, y_cur) = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 653 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (sse_enabled /\ movbe_enabled) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 655 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 658 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 659 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 661 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 664 column 69 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 666 column 121 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 669 column 114 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 671 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 672 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 674 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 675 column 79 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 676 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 677 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_in0_b == va_in_in_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 679 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 680 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 681 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 682 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 683 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 685 column 76 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 686 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 687 column 117 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 688 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 691 column 87 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 692 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 695 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" pclmulqdq_enabled /\ label va_range1 "***** POSTCONDITION NOT MET AT line 696 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 697 column 78 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 698 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 699 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 701 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 702 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 705 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 706 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 707 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 708 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 709 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 710 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 711 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 712 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 713 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 715 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 717 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 718 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 719 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 720 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 721 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 724 column 90 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 727 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 728 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 729 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let (ctr, iter, y_cur) = va_g in (va_sM, va_fM, ctr, iter, y_cur) [@ va_qattr] let va_wp_Loop6x_loop_decrypt_body0 (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) (va_s0:va_state) (va_k:(va_state -> (quad32 & nat & quad32) -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ va_get_reg64 rRdx va_s0 > 0 /\ (forall (va_x_efl:Vale.X64.Flags.t) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_heap6:vale_heap) (va_x_mem:vale_heap) (va_x_ok:bool) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_rbx:nat64) (va_x_rdi:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (ctr:quad32) (iter:nat) (y_cur:quad32) . let va_sM = va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_ok va_x_ok (va_upd_mem va_x_mem (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_flags va_x_efl va_s0))))))))))))))))))))))))))))) in va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) ==> va_k va_sM ((ctr, iter, y_cur)))) val va_wpProof_Loop6x_loop_decrypt_body0 : va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> va_s0:va_state -> va_k:(va_state -> (quad32 & nat & quad32) -> Type0) -> Ghost (va_state & va_fuel & (quad32 & nat & quad32)) (requires (va_t_require va_s0 /\ va_wp_Loop6x_loop_decrypt_body0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_loop_decrypt_body0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_loop_decrypt_body0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k = let (va_sM, va_f0, ctr, iter, y_cur) = va_lemma_Loop6x_loop_decrypt_body0 (va_code_Loop6x_loop_decrypt_body0 alg) va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let va_g = (ctr, iter, y_cur) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_loop_decrypt_body0 (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_decrypt_body0 alg)) = (va_QProc (va_code_Loop6x_loop_decrypt_body0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) (va_wp_Loop6x_loop_decrypt_body0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur) (va_wpProof_Loop6x_loop_decrypt_body0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur)) #pop-options //-- //-- Loop6x_loop_decrypt_while0 #push-options "--z3rlimit 700" val va_code_Loop6x_loop_decrypt_while0 : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop_decrypt_while0 alg = (va_Block (va_CCons (va_While (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (va_Block (va_CCons (va_code_Loop6x_loop_decrypt_body0 alg) (va_CNil ())))) (va_CNil ()))) val va_codegen_success_Loop6x_loop_decrypt_while0 : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop_decrypt_while0 alg = (va_pbool_and (va_codegen_success_Loop6x_loop_decrypt_body0 alg) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop_decrypt_while0 (va_mods:va_mods_t) (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_decrypt_while0 alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (ctr_BE_orig:quad32) = va_in_ctr_BE_orig in let (h_LE:quad32) = va_in_h_LE in let (hkeys_b:buffer128) = va_in_hkeys_b in let (in0_b:buffer128) = va_in_in0_b in let (in_b:buffer128) = va_in_in_b in let (iv_b:buffer128) = va_in_iv_b in let (key_words:(seq nat32)) = va_in_key_words in let (keys_b:buffer128) = va_in_keys_b in let (out_b:buffer128) = va_in_out_b in let (plain_quads:(seq quad32)) = va_in_plain_quads in let (round_keys:(seq quad32)) = va_in_round_keys in let (scratch_b:buffer128) = va_in_scratch_b in let (y_orig:quad32) = va_in_y_orig in let (ctr:quad32) = va_in_ctr in let (iter:nat) = va_in_iter in let (y_cur:quad32) = va_in_y_cur in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qWhile va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (fun va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in qblock va_mods (fun (va_s:va_state) -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_loop_decrypt_body0 va_old alg ctr_BE_orig h_LE hkeys_b in0_b in_b iv_b key_words keys_b out_b plain_quads round_keys scratch_b y_orig ctr iter y_cur) (fun (va_s:va_state) va_g -> let (ctr, iter, y_cur) = va_g in va_QEmpty ((ctr, iter, y_cur))))) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in va_get_ok va_s /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_s == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_s == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_s == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s) (va_get_reg64 rR8 va_s) iv_b 1 (va_get_mem_layout va_s) Public /\ (va_get_reg64 rRdx va_s > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rR14 va_s) in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_s) Secret) /\ (va_get_reg64 rRdx va_s == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rR14 va_s) in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_s) Secret) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rRdi va_s) in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_s) Secret) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rRsi va_s) out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_s) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s) (va_get_reg64 rRbp va_s) scratch_b 9 (va_get_mem_layout va_s) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s) (va_get_reg64 rR9 va_s - 32) hkeys_b 8 (va_get_mem_layout va_s) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) in_b) >= 6 /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) in_b))) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRdi va_s + 16 `op_Multiply` va_get_reg64 rRdx va_s < pow2_64) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rR14 va_s + 16 `op_Multiply` (va_get_reg64 rRdx va_s - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRsi va_s + 16 `op_Multiply` va_get_reg64 rRdx va_s < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s) 0 0 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s) (va_get_mem_heaplet 0 va_s) (va_get_mem_layout va_s) /\ va_get_xmm 15 va_s == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ (va_get_reg64 rRdx va_s > 0 ==> scratch_reqs scratch_b iter (va_get_mem_heaplet 3 va_s) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (va_get_xmm 7 va_s)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)))))) /\ (va_get_reg64 rRdx va_s == 0 ==> va_get_xmm 8 va_s == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_s `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRdx va_s >= 6) /\ ctr == Vale.AES.GCTR.inc32lite ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_s == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_s == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_xmm 9 va_s == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_s)) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 10 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 11 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 12 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 13 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 14 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_s == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s) (va_get_xmm 10 va_s) (va_get_xmm 11 va_s) (va_get_xmm 12 va_s) (va_get_xmm 13 va_s) (va_get_xmm 14 va_s) plain_quads alg key_words ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) key_words ctr_BE_orig) /\ (va_get_reg64 rRdx va_s == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) key_words ctr_BE_orig)) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in va_get_reg64 rRdx va_s) ((ctr, iter, y_cur))) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in let va_g = (ctr, iter, y_cur) in let ((ctr:quad32), (iter:nat), (y_cur:quad32)) = va_g in va_QEmpty ((ctr, iter, y_cur))))) val va_lemma_Loop6x_loop_decrypt_while0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> Ghost (va_state & va_fuel & quad32 & nat & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_decrypt_while0 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig))) (ensures (fun (va_sM, va_fM, ctr, iter, y_cur) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ ~(va_get_reg64 rRdx va_sM > 0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_loop_decrypt_while0 va_b0 va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur = let va_old = va_expand_state va_old in let (va_mods:va_mods_t) = [va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags] in let va_qc = va_qcode_Loop6x_loop_decrypt_while0 va_mods va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop_decrypt_while0 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let (ctr, iter, y_cur) = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 653 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (sse_enabled /\ movbe_enabled) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 655 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 658 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 659 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 661 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 664 column 69 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 666 column 121 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 669 column 114 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 671 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 672 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 674 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 675 column 79 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 676 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 677 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_in0_b == va_in_in_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 679 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 680 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 681 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 682 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 683 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 685 column 76 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 686 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 687 column 117 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 688 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 691 column 87 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 692 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 695 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" pclmulqdq_enabled /\ label va_range1 "***** POSTCONDITION NOT MET AT line 696 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 697 column 78 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 698 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 699 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 701 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 702 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 705 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 706 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 707 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 708 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 709 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 710 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 711 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 712 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 713 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 715 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 717 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 718 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 719 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 720 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 721 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 724 column 90 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 727 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 728 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (~(va_get_reg64 rRdx va_sM > 0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let (ctr, iter, y_cur) = va_g in (va_sM, va_fM, ctr, iter, y_cur) [@ va_qattr] let va_wp_Loop6x_loop_decrypt_while0 (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) (va_s0:va_state) (va_k:(va_state -> (quad32 & nat & quad32) -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (forall (va_x_efl:Vale.X64.Flags.t) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_heap6:vale_heap) (va_x_mem:vale_heap) (va_x_ok:bool) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_rbx:nat64) (va_x_rdi:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (ctr:quad32) (iter:nat) (y_cur:quad32) . let va_sM = va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_ok va_x_ok (va_upd_mem va_x_mem (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_flags va_x_efl va_s0))))))))))))))))))))))))))))) in va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ ~(va_get_reg64 rRdx va_sM > 0) ==> va_k va_sM ((ctr, iter, y_cur)))) val va_wpProof_Loop6x_loop_decrypt_while0 : va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> va_s0:va_state -> va_k:(va_state -> (quad32 & nat & quad32) -> Type0) -> Ghost (va_state & va_fuel & (quad32 & nat & quad32)) (requires (va_t_require va_s0 /\ va_wp_Loop6x_loop_decrypt_while0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_loop_decrypt_while0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_loop_decrypt_while0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k = let (va_sM, va_f0, ctr, iter, y_cur) = va_lemma_Loop6x_loop_decrypt_while0 (va_code_Loop6x_loop_decrypt_while0 alg) va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let va_g = (ctr, iter, y_cur) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_loop_decrypt_while0 (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_decrypt_while0 alg)) = (va_QProc (va_code_Loop6x_loop_decrypt_while0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) (va_wp_Loop6x_loop_decrypt_while0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur) (va_wpProof_Loop6x_loop_decrypt_while0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur)) #pop-options //-- //-- Loop6x_loop_decrypt #push-options "--z3rlimit 700" val va_code_Loop6x_loop_decrypt : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop_decrypt alg = (va_Block (va_CCons (va_IfElse (va_cmp_eq (va_op_cmp_reg64 rRdx) (va_const_cmp 6)) (va_Block (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_CNil ()))) (va_Block (va_CNil ()))) (va_CCons (va_code_Loop6x_loop_decrypt_while0 alg) (va_CNil ())))) val va_codegen_success_Loop6x_loop_decrypt : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop_decrypt alg = (va_pbool_and (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_pbool_and (va_codegen_success_Loop6x_loop_decrypt_while0 alg) (va_ttrue ()))) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop_decrypt (va_mods:va_mods_t) (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode (quad32) (va_code_Loop6x_loop_decrypt alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (iter:nat) = 0 in let (ctr:quad32) = ctr_BE in let (y_cur:quad32) = y_prev in let (plain_quads:(seq quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b in let (va_arg44:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg43:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg42:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (va_arg41:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg40:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 645 column 29 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_init va_arg40 va_arg41 va_arg42 va_arg43 va_arg44) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 648 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_eq (va_op_cmp_reg64 rRdx) (va_const_cmp 6)) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 649 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_QEmpty (())))) (qblock va_mods (fun (va_s:va_state) -> va_QEmpty (())))) (fun (va_s:va_state) va_g -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 651 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_loop_decrypt_while0 va_old_s alg ctr_BE_orig h_LE hkeys_b in0_b in_b iv_b key_words keys_b out_b plain_quads round_keys scratch_b y_orig ctr iter y_cur) (fun (va_s:va_state) va_g -> let (ctr, iter, y_cur) = va_g in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 738 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_registers_reveal ()) (let (y_new:quad32) = y_cur in va_QEmpty ((y_new)))))))) val va_lemma_Loop6x_loop_decrypt : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> Ghost (va_state & va_fuel & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_decrypt alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ (6 <= va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdx va_s0 + 6 < pow2_32) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b 6 (va_get_reg64 rRdx va_s0 - 6) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b 0 (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b 0 (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64 /\ va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b 0 (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == y_orig /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig 0 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5))))) (ensures (fun (va_sM, va_fM, y_new) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ l_and (va_get_reg64 rRdx va_s0 - 1 > 0) (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_s0 - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ l_and (va_get_reg64 rRdx va_s0 - 6 >= 0) (Vale.AES.GCTR.gctr_partial alg (va_get_reg64 rRdx va_s0 - 6) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6))) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 1))) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 2))) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 3))) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 4))) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 5))) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) 0 (va_get_reg64 rRdx va_s0)) /\ va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE (va_get_reg64 rRdx va_s0))) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_loop_decrypt va_b0 va_s0 alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Loop6x_loop_decrypt va_mods alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop_decrypt alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let y_new = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 614 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 615 column 103 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (l_and (va_get_reg64 rRdx va_s0 - 1 > 0) (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_s0 - 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 616 column 67 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 621 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 622 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 625 column 135 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (l_and (va_get_reg64 rRdx va_s0 - 6 >= 0) (Vale.AES.GCTR.gctr_partial alg (va_get_reg64 rRdx va_s0 - 6) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 627 column 149 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 628 column 153 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 1)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 629 column 153 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 2)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 630 column 153 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 3)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 631 column 153 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 4)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 632 column 153 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 5)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 635 column 89 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) 0 (va_get_reg64 rRdx va_s0))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 636 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 639 column 64 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE (va_get_reg64 rRdx va_s0))))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem]) va_sM va_s0; let y_new = va_g in (va_sM, va_fM, y_new) [@ va_qattr] let va_wp_Loop6x_loop_decrypt (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) (va_s0:va_state) (va_k:(va_state -> quad32 -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ (6 <= va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdx va_s0 + 6 < pow2_32) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b 6 (va_get_reg64 rRdx va_s0 - 6) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b 0 (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b 0 (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64 /\ va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b 0 (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == y_orig /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig 0 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ (forall (va_x_mem:vale_heap) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_rdx:nat64) (va_x_rbx:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_heap6:vale_heap) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) (y_new:quad32) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_mem va_x_mem va_s0)))))))))))))))))))))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ l_and (va_get_reg64 rRdx va_s0 - 1 > 0) (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_s0 - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ l_and (va_get_reg64 rRdx va_s0 - 6 >= 0) (Vale.AES.GCTR.gctr_partial alg (va_get_reg64 rRdx va_s0 - 6) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6))) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 1))) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 2))) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 3))) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 4))) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 5))) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) 0 (va_get_reg64 rRdx va_s0)) /\ va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE (va_get_reg64 rRdx va_s0))) ==> va_k va_sM ((y_new)))) val va_wpProof_Loop6x_loop_decrypt : alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> va_s0:va_state -> va_k:(va_state -> quad32 -> Type0) -> Ghost (va_state & va_fuel & quad32) (requires (va_t_require va_s0 /\ va_wp_Loop6x_loop_decrypt alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_loop_decrypt alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_loop_decrypt alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k = let (va_sM, va_f0, y_new) = va_lemma_Loop6x_loop_decrypt (va_code_Loop6x_loop_decrypt alg) va_s0 alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_sM va_s0; let va_g = (y_new) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_loop_decrypt (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode quad32 (va_code_Loop6x_loop_decrypt alg)) = (va_QProc (va_code_Loop6x_loop_decrypt alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) (va_wp_Loop6x_loop_decrypt alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE) (va_wpProof_Loop6x_loop_decrypt alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE)) #pop-options //-- //-- Loop6x_loop_body0 #push-options "--z3rlimit 750" val va_code_Loop6x_loop_body0 : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop_body0 alg = (va_Block (va_CCons (va_code_Loop6x alg) (va_CCons (va_Block (va_CNil ())) (va_CNil ())))) val va_codegen_success_Loop6x_loop_body0 : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop_body0 alg = (va_pbool_and (va_codegen_success_Loop6x alg) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop_body0 (va_mods:va_mods_t) (va_old:va_state) (alg:algorithm) (va_in_count:nat) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_body0 alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (count:nat) = va_in_count in let (ctr_BE_orig:quad32) = va_in_ctr_BE_orig in let (h_LE:quad32) = va_in_h_LE in let (hkeys_b:buffer128) = va_in_hkeys_b in let (in0_b:buffer128) = va_in_in0_b in let (in_b:buffer128) = va_in_in_b in let (iv_b:buffer128) = va_in_iv_b in let (key_words:(seq nat32)) = va_in_key_words in let (keys_b:buffer128) = va_in_keys_b in let (out_b:buffer128) = va_in_out_b in let (plain_quads:(seq quad32)) = va_in_plain_quads in let (round_keys:(seq quad32)) = va_in_round_keys in let (scratch_b:buffer128) = va_in_scratch_b in let (y_orig:quad32) = va_in_y_orig in let (ctr:quad32) = va_in_ctr in let (iter:nat) = va_in_iter in let (y_cur:quad32) = va_in_y_cur in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 959 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x alg h_LE y_orig y_cur (count + iter) iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr) (fun (va_s:va_state) (y_cur:quad32) -> va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 961 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter + 1 >= 0) (fun _ -> let (iter:nat) = iter + 1 in let (ctr:quad32) = Vale.AES.GCTR_s.inc32 ctr 6 in va_QEmpty ((ctr, iter, y_cur)))))) val va_lemma_Loop6x_loop_body0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state -> alg:algorithm -> va_in_count:nat -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> Ghost (va_state & va_fuel & quad32 & nat & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_body0 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rR14 va_s0 == va_get_reg64 rR14 va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + va_in_iter - 2 >= 0 /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_get_reg64 rRdx va_s0 == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_s0))) /\ va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) 0 ((va_in_count + va_in_iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ va_get_reg64 rRdx va_s0 > 0)) (ensures (fun (va_sM, va_fM, ctr, iter, y_cur) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + iter - 2 >= 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (va_get_reg64 rRdx va_sM == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) 0 ((va_in_count + iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_loop_body0 va_b0 va_s0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur = let va_old = va_expand_state va_old in let (va_mods:va_mods_t) = [va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags] in let va_qc = va_qcode_Loop6x_loop_body0 va_mods va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop_body0 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let (ctr, iter, y_cur) = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 742 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 878 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (sse_enabled /\ movbe_enabled) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 880 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 882 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 883 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 884 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 886 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 889 column 69 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 891 column 127 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 892 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 893 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 895 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 896 column 79 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 897 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 898 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_in0_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 900 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 901 column 128 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 902 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 903 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 904 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 906 column 76 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 907 column 95 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 908 column 131 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 909 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 912 column 87 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 913 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 916 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" pclmulqdq_enabled /\ label va_range1 "***** POSTCONDITION NOT MET AT line 917 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 918 column 78 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 920 column 34 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_count + iter - 2 >= 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 921 column 103 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 922 column 137 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 924 column 112 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) 0 ((va_in_count + iter - 2) `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 926 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 927 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 930 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (2 <= va_in_count) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 931 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 932 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 933 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 934 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 935 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 936 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + iter `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 937 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 938 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 939 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 941 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 943 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 944 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 945 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 946 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 947 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 950 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + iter - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 953 column 117 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 954 column 128 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 955 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let (ctr, iter, y_cur) = va_g in (va_sM, va_fM, ctr, iter, y_cur) [@ va_qattr] let va_wp_Loop6x_loop_body0 (va_old:va_state) (alg:algorithm) (va_in_count:nat) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) (va_s0:va_state) (va_k:(va_state -> (quad32 & nat & quad32) -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rR14 va_s0 == va_get_reg64 rR14 va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + va_in_iter - 2 >= 0 /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_get_reg64 rRdx va_s0 == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_s0))) /\ va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) 0 ((va_in_count + va_in_iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ va_get_reg64 rRdx va_s0 > 0 /\ (forall (va_x_efl:Vale.X64.Flags.t) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_heap6:vale_heap) (va_x_mem:vale_heap) (va_x_ok:bool) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_rbx:nat64) (va_x_rdi:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (ctr:quad32) (iter:nat) (y_cur:quad32) . let va_sM = va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_ok va_x_ok (va_upd_mem va_x_mem (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_flags va_x_efl va_s0))))))))))))))))))))))))))))) in va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + iter - 2 >= 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (va_get_reg64 rRdx va_sM == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) 0 ((va_in_count + iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) ==> va_k va_sM ((ctr, iter, y_cur)))) val va_wpProof_Loop6x_loop_body0 : va_old:va_state -> alg:algorithm -> va_in_count:nat -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> va_s0:va_state -> va_k:(va_state -> (quad32 & nat & quad32) -> Type0) -> Ghost (va_state & va_fuel & (quad32 & nat & quad32)) (requires (va_t_require va_s0 /\ va_wp_Loop6x_loop_body0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_loop_body0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_loop_body0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k = let (va_sM, va_f0, ctr, iter, y_cur) = va_lemma_Loop6x_loop_body0 (va_code_Loop6x_loop_body0 alg) va_s0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let va_g = (ctr, iter, y_cur) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_loop_body0 (va_old:va_state) (alg:algorithm) (va_in_count:nat) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_body0 alg)) = (va_QProc (va_code_Loop6x_loop_body0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) (va_wp_Loop6x_loop_body0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur) (va_wpProof_Loop6x_loop_body0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur)) #pop-options //-- //-- Loop6x_loop_while0 #push-options "--z3rlimit 750" val va_code_Loop6x_loop_while0 : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop_while0 alg = (va_Block (va_CCons (va_While (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (va_Block (va_CCons (va_code_Loop6x_loop_body0 alg) (va_CNil ())))) (va_CNil ()))) val va_codegen_success_Loop6x_loop_while0 : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop_while0 alg = (va_pbool_and (va_codegen_success_Loop6x_loop_body0 alg) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop_while0 (va_mods:va_mods_t) (va_old:va_state) (alg:algorithm) (va_in_count:nat) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_while0 alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (count:nat) = va_in_count in let (ctr_BE_orig:quad32) = va_in_ctr_BE_orig in let (h_LE:quad32) = va_in_h_LE in let (hkeys_b:buffer128) = va_in_hkeys_b in let (in0_b:buffer128) = va_in_in0_b in let (in_b:buffer128) = va_in_in_b in let (iv_b:buffer128) = va_in_iv_b in let (key_words:(seq nat32)) = va_in_key_words in let (keys_b:buffer128) = va_in_keys_b in let (out_b:buffer128) = va_in_out_b in let (plain_quads:(seq quad32)) = va_in_plain_quads in let (round_keys:(seq quad32)) = va_in_round_keys in let (scratch_b:buffer128) = va_in_scratch_b in let (y_orig:quad32) = va_in_y_orig in let (ctr:quad32) = va_in_ctr in let (iter:nat) = va_in_iter in let (y_cur:quad32) = va_in_y_cur in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 742 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qWhile va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (fun va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in qblock va_mods (fun (va_s:va_state) -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 742 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_loop_body0 va_old alg count ctr_BE_orig h_LE hkeys_b in0_b in_b iv_b key_words keys_b out_b plain_quads round_keys scratch_b y_orig ctr iter y_cur) (fun (va_s:va_state) va_g -> let (ctr, iter, y_cur) = va_g in va_QEmpty ((ctr, iter, y_cur))))) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in va_get_ok va_s /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rR14 va_s == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRdi va_s == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_s == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_s == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s) (va_get_reg64 rR8 va_s) iv_b 1 (va_get_mem_layout va_s) Public /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rR14 va_s) in0_b ((count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_s) Secret) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rRdi va_s) in_b (count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_s) Secret) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rRsi va_s) out_b (count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_s) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s) (va_get_reg64 rRbp va_s) scratch_b 9 (va_get_mem_layout va_s) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s) (va_get_reg64 rR9 va_s - 32) hkeys_b 8 (va_get_mem_layout va_s) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) in_b) >= 6 /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (6 `op_Multiply` count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) in_b))) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRdi va_s + 16 `op_Multiply` va_get_reg64 rRdx va_s < pow2_64) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rR14 va_s + 16 `op_Multiply` va_get_reg64 rRdx va_s < pow2_64) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRsi va_s + 16 `op_Multiply` va_get_reg64 rRdx va_s < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s) (count `op_Multiply` 6) (count `op_Multiply` 6 + iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s) (count `op_Multiply` 6) (count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s) 0 0 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s) (va_get_mem_heaplet 0 va_s) (va_get_mem_layout va_s) /\ va_get_xmm 15 va_s == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ count + iter - 2 >= 0 /\ (va_get_reg64 rRdx va_s > 0 ==> scratch_reqs scratch_b (count + iter - 2) (va_get_mem_heaplet 3 va_s) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (va_get_xmm 7 va_s)) /\ (va_get_reg64 rRdx va_s == 0 ==> scratch_reqs scratch_b (count + iter - 2) (va_get_mem_heaplet 3 va_s) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_s))) /\ y_cur == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) 0 ((count + iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_s > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)))))) /\ (va_get_reg64 rRdx va_s == 0 ==> va_get_xmm 8 va_s == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ 2 <= count /\ va_get_reg64 rRdx va_s `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRdx va_s >= 6) /\ ctr == Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + iter `op_Multiply` 6) /\ va_get_xmm 2 va_s == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_s == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_xmm 9 va_s == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_s)) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 10 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 11 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 12 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 13 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 14 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_s == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s) (va_get_xmm 10 va_s) (va_get_xmm 11 va_s) (va_get_xmm 12 va_s) (va_get_xmm 13 va_s) (va_get_xmm 14 va_s) plain_quads alg key_words ctr_BE_orig (count + iter - 1)) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count + 6 `op_Multiply` iter) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) key_words ctr_BE_orig) /\ (va_get_reg64 rRdx va_s == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count + 6 `op_Multiply` (iter - 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) key_words ctr_BE_orig)) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in va_get_reg64 rRdx va_s) ((ctr, iter, y_cur))) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in let va_g = (ctr, iter, y_cur) in let ((ctr:quad32), (iter:nat), (y_cur:quad32)) = va_g in va_QEmpty ((ctr, iter, y_cur))))) val va_lemma_Loop6x_loop_while0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state -> alg:algorithm -> va_in_count:nat -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> Ghost (va_state & va_fuel & quad32 & nat & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_while0 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rR14 va_s0 == va_get_reg64 rR14 va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + va_in_iter - 2 >= 0 /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_get_reg64 rRdx va_s0 == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_s0))) /\ va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) 0 ((va_in_count + va_in_iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig))) (ensures (fun (va_sM, va_fM, ctr, iter, y_cur) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + iter - 2 >= 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (va_get_reg64 rRdx va_sM == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) 0 ((va_in_count + iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ ~(va_get_reg64 rRdx va_sM > 0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_loop_while0 va_b0 va_s0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur = let va_old = va_expand_state va_old in let (va_mods:va_mods_t) = [va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags] in let va_qc = va_qcode_Loop6x_loop_while0 va_mods va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop_while0 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let (ctr, iter, y_cur) = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 742 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 878 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (sse_enabled /\ movbe_enabled) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 880 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 882 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 883 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 884 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 886 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 889 column 69 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 891 column 127 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 892 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 893 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 895 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 896 column 79 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 897 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 898 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_in0_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 900 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 901 column 128 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 902 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 903 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 904 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 906 column 76 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 907 column 95 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 908 column 131 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 909 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 912 column 87 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 913 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 916 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" pclmulqdq_enabled /\ label va_range1 "***** POSTCONDITION NOT MET AT line 917 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 918 column 78 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 920 column 34 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_count + iter - 2 >= 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 921 column 103 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 922 column 137 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 924 column 112 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) 0 ((va_in_count + iter - 2) `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 926 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 927 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 930 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (2 <= va_in_count) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 931 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 932 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 933 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 934 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 935 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 936 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + iter `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 937 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 938 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 939 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 941 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 943 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 944 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 945 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 946 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 947 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 950 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + iter - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 953 column 117 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 954 column 128 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 742 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (~(va_get_reg64 rRdx va_sM > 0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let (ctr, iter, y_cur) = va_g in (va_sM, va_fM, ctr, iter, y_cur) [@ va_qattr] let va_wp_Loop6x_loop_while0 (va_old:va_state) (alg:algorithm) (va_in_count:nat) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) (va_s0:va_state) (va_k:(va_state -> (quad32 & nat & quad32) -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rR14 va_s0 == va_get_reg64 rR14 va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + va_in_iter - 2 >= 0 /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_get_reg64 rRdx va_s0 == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_s0))) /\ va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) 0 ((va_in_count + va_in_iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (forall (va_x_efl:Vale.X64.Flags.t) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_heap6:vale_heap) (va_x_mem:vale_heap) (va_x_ok:bool) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_rbx:nat64) (va_x_rdi:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (ctr:quad32) (iter:nat) (y_cur:quad32) . let va_sM = va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_ok va_x_ok (va_upd_mem va_x_mem (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_flags va_x_efl va_s0))))))))))))))))))))))))))))) in va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + iter - 2 >= 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (va_get_reg64 rRdx va_sM == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) 0 ((va_in_count + iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ ~(va_get_reg64 rRdx va_sM > 0) ==> va_k va_sM ((ctr, iter, y_cur)))) val va_wpProof_Loop6x_loop_while0 : va_old:va_state -> alg:algorithm -> va_in_count:nat -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> va_s0:va_state -> va_k:(va_state -> (quad32 & nat & quad32) -> Type0) -> Ghost (va_state & va_fuel & (quad32 & nat & quad32)) (requires (va_t_require va_s0 /\ va_wp_Loop6x_loop_while0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_loop_while0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_loop_while0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k = let (va_sM, va_f0, ctr, iter, y_cur) = va_lemma_Loop6x_loop_while0 (va_code_Loop6x_loop_while0 alg) va_s0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let va_g = (ctr, iter, y_cur) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_loop_while0 (va_old:va_state) (alg:algorithm) (va_in_count:nat) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_while0 alg)) = (va_QProc (va_code_Loop6x_loop_while0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) (va_wp_Loop6x_loop_while0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur) (va_wpProof_Loop6x_loop_while0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur)) #pop-options //-- //-- Loop6x_loop #push-options "--z3rlimit 750" val va_code_Loop6x_loop : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop alg = (va_Block (va_CCons (va_code_Loop6x_loop_while0 alg) (va_CNil ()))) val va_codegen_success_Loop6x_loop : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop alg = (va_pbool_and (va_codegen_success_Loop6x_loop_while0 alg) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop (va_mods:va_mods_t) (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode (quad32) (va_code_Loop6x_loop alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (iter:nat) = 0 in let (ctr:quad32) = ctr_BE in let (y_cur:quad32) = y_prev in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 876 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_loop_while0 va_old_s alg count ctr_BE_orig h_LE hkeys_b in0_b in_b iv_b key_words keys_b out_b plain_quads round_keys scratch_b y_orig ctr iter y_cur) (fun (va_s:va_state) va_g -> let (ctr, iter, y_cur) = va_g in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 964 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_registers_reveal ()) (let (y_new:quad32) = y_cur in va_QEmpty ((y_new)))))) val va_lemma_Loop6x_loop : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> count:nat -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> Ghost (va_state & va_fuel & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ count >= 2 /\ (6 <= va_get_reg64 rRdx va_s0 /\ count `op_Multiply` 6 + va_get_reg64 rRdx va_s0 + 6 < pow2_32) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b ((count - 1) `op_Multiply` 6) (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == out_b /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b)) /\ va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b (count - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) 0 ((count - 2) `op_Multiply` 6)) /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig))) (ensures (fun (va_sM, va_fM, y_new) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6) (count `op_Multiply` 6 + va_get_reg64 rRdx va_s0 - 1) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6))) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 1))) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 2))) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 3))) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 4))) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 5))) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in0_b) 0 (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 12)) /\ va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new /\ scratch_reqs_simple scratch_b (va_get_mem_heaplet 3 va_sM) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in0_b) (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 12) (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6)) (Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM)) /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE (va_get_reg64 rRdx va_s0))) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_loop va_b0 va_s0 alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Loop6x_loop va_mods alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let y_new = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 742 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 842 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 843 column 97 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6) (count `op_Multiply` 6 + va_get_reg64 rRdx va_s0 - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 844 column 70 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 849 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 850 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 851 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 854 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 856 column 167 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 857 column 171 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 1)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 858 column 171 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 2)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 859 column 171 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 3)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 860 column 171 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 4)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 861 column 171 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 5)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 864 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in0_b) 0 (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 12))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 865 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 867 column 163 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (scratch_reqs_simple scratch_b (va_get_mem_heaplet 3 va_sM) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in0_b) (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 12) (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6)) (Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 870 column 64 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE (va_get_reg64 rRdx va_s0))))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem]) va_sM va_s0; let y_new = va_g in (va_sM, va_fM, y_new) [@ va_qattr] let va_wp_Loop6x_loop (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) (va_s0:va_state) (va_k:(va_state -> quad32 -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ count >= 2 /\ (6 <= va_get_reg64 rRdx va_s0 /\ count `op_Multiply` 6 + va_get_reg64 rRdx va_s0 + 6 < pow2_32) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b ((count - 1) `op_Multiply` 6) (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == out_b /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b)) /\ va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b (count - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) 0 ((count - 2) `op_Multiply` 6)) /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig) /\ (forall (va_x_mem:vale_heap) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_rdx:nat64) (va_x_rbx:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_heap6:vale_heap) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) (y_new:quad32) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_mem va_x_mem va_s0)))))))))))))))))))))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6) (count `op_Multiply` 6 + va_get_reg64 rRdx va_s0 - 1) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6))) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 1))) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 2))) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 3))) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 4))) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 5))) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in0_b) 0 (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 12)) /\ va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new /\ scratch_reqs_simple scratch_b (va_get_mem_heaplet 3 va_sM) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in0_b) (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 12) (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6)) (Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM)) /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE (va_get_reg64 rRdx va_s0))) ==> va_k va_sM ((y_new)))) val va_wpProof_Loop6x_loop : alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> count:nat -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> va_s0:va_state -> va_k:(va_state -> quad32 -> Type0) -> Ghost (va_state & va_fuel & quad32) (requires (va_t_require va_s0 /\ va_wp_Loop6x_loop alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_loop alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_loop alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k = let (va_sM, va_f0, y_new) = va_lemma_Loop6x_loop (va_code_Loop6x_loop alg) va_s0 alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_sM va_s0; let va_g = (y_new) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_loop (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode quad32 (va_code_Loop6x_loop alg)) = (va_QProc (va_code_Loop6x_loop alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) (va_wp_Loop6x_loop alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE) (va_wpProof_Loop6x_loop alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE)) #pop-options //-- //-- AESNI_ctr32_6x_preamble #push-options "--z3rlimit 80" #restart-solver val va_code_AESNI_ctr32_6x_preamble : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_AESNI_ctr32_6x_preamble alg = (va_Block (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret) (va_CCons (va_code_Load_one_msb ()) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (16 - 128) Secret) (va_CCons (va_code_Mov64 (va_op_dst_opr64_reg64 rR12) (va_op_opr64_reg64 rRcx)) (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rR12) (va_const_opr64 96)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 4)) (va_CCons (va_code_Add64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 6)) (va_CCons (va_IfElse (va_cmp_lt (va_op_cmp_reg64 rRbx) (va_const_cmp 256)) (va_Block (va_CCons (va_code_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 14) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_CNil ()))))))))))))) (va_Block (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 256)) (va_CCons (va_code_Handle_ctr32_2 ()) (va_CNil ()))))) (va_CNil ())))))))))) val va_codegen_success_AESNI_ctr32_6x_preamble : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_AESNI_ctr32_6x_preamble alg = (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret) (va_pbool_and (va_codegen_success_Load_one_msb ()) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (16 - 128) Secret) (va_pbool_and (va_codegen_success_Mov64 (va_op_dst_opr64_reg64 rR12) (va_op_opr64_reg64 rRcx)) (va_pbool_and (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rR12) (va_const_opr64 96)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_Add64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 6)) (va_pbool_and (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 14) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 256)) (va_codegen_success_Handle_ctr32_2 ()))))))))))))) (va_ttrue ()))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_AESNI_ctr32_6x_preamble (va_mods:va_mods_t) (alg:algorithm) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_preamble alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1024 column 19 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret keys_b 0) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1025 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_one_msb ()) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1026 column 19 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (16 - 128) Secret keys_b 1) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1029 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mov64 (va_op_dst_opr64_reg64 rR12) (va_op_opr64_reg64 rRcx)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1030 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rR12) (va_const_opr64 96)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1032 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 4)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1034 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Add64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 6)) (fun (va_s:va_state) _ -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1035 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_lt (va_op_cmp_reg64 rRbx) (va_const_cmp 256)) (qblock va_mods (fun (va_s:va_state) -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1036 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg83:Vale.Def.Types_s.quad32) = va_get_xmm 10 va_s in let (va_arg82:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg81:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1037 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg81 va_arg82 va_arg83 1) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1038 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg80:Vale.Def.Types_s.quad32) = va_get_xmm 11 va_s in let (va_arg79:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg78:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1039 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg78 va_arg79 va_arg80 2) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1040 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1041 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg77:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_s in let (va_arg76:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg75:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1042 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg75 va_arg76 va_arg77 3) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1043 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1044 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg74:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_s in let (va_arg73:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg72:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1045 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg72 va_arg73 va_arg74 4) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1046 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1047 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg71:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_s in let (va_arg70:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg69:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1048 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg69 va_arg70 va_arg71 5) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1049 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1050 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 14) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg68:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_s in let (va_arg67:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg66:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1051 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg66 va_arg67 va_arg68 6) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1052 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_QEmpty (())))))))))))))))))))) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1054 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 256)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1055 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Handle_ctr32_2 ctr_orig) (va_QEmpty (())))))) (fun (va_s:va_state) va_g -> let (va_arg65:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg64:Vale.Def.Types_s.quad32) = va_get_xmm 9 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1058 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg64 va_arg65) (let (va_arg63:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg62:Vale.Def.Types_s.quad32) = va_get_xmm 10 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1059 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg62 va_arg63) (let (va_arg61:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg60:Vale.Def.Types_s.quad32) = va_get_xmm 11 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1060 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg60 va_arg61) (let (va_arg59:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg58:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1061 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg58 va_arg59) (let (va_arg57:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg56:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1062 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg56 va_arg57) (let (va_arg55:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg54:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1063 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg54 va_arg55) (va_QEmpty (()))))))))))))))))) val va_lemma_AESNI_ctr32_6x_preamble : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_orig:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_AESNI_ctr32_6x_preamble alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_reg64 rRcx va_s0 - 96 >= 0 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (0 <= va_get_reg64 rRbx va_sM /\ va_get_reg64 rRbx va_sM < 256 /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_orig 6) `op_Modulus` 256 /\ va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 6) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 1) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_ok va_sM va_s0))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_AESNI_ctr32_6x_preamble va_b0 va_s0 alg key_words round_keys keys_b ctr_orig = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_ok] in let va_qc = va_qcode_AESNI_ctr32_6x_preamble va_mods alg key_words round_keys keys_b ctr_orig in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_AESNI_ctr32_6x_preamble alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 968 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1010 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (0 <= va_get_reg64 rRbx va_sM /\ va_get_reg64 rRbx va_sM < 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1011 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_orig 6) `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1013 column 125 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1014 column 125 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1015 column 125 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1016 column 125 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1017 column 125 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1018 column 125 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1020 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1022 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 1))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_AESNI_ctr32_6x_preamble (alg:algorithm) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_reg64 rRcx va_s0 - 96 >= 0 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051) /\ (forall (va_x_rbx:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rRbx va_x_rbx va_s0))))))))))))))) in va_get_ok va_sM /\ (0 <= va_get_reg64 rRbx va_sM /\ va_get_reg64 rRbx va_sM < 256 /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_orig 6) `op_Modulus` 256 /\ va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 6) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 1) ==> va_k va_sM (()))) val va_wpProof_AESNI_ctr32_6x_preamble : alg:algorithm -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_orig:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_AESNI_ctr32_6x_preamble alg key_words round_keys keys_b ctr_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AESNI_ctr32_6x_preamble alg) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_AESNI_ctr32_6x_preamble alg key_words round_keys keys_b ctr_orig va_s0 va_k = let (va_sM, va_f0) = va_lemma_AESNI_ctr32_6x_preamble (va_code_AESNI_ctr32_6x_preamble alg) va_s0 alg key_words round_keys keys_b ctr_orig in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_ok va_sM va_s0)))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_AESNI_ctr32_6x_preamble (alg:algorithm) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_preamble alg)) = (va_QProc (va_code_AESNI_ctr32_6x_preamble alg) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx]) (va_wp_AESNI_ctr32_6x_preamble alg key_words round_keys keys_b ctr_orig) (va_wpProof_AESNI_ctr32_6x_preamble alg key_words round_keys keys_b ctr_orig)) #pop-options //-- //-- AESNI_ctr32_6x_loop_body val va_code_AESNI_ctr32_6x_loop_body : alg:algorithm -> rnd:nat -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_AESNI_ctr32_6x_loop_body alg rnd = (va_Block (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 15)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 15)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 15)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 15)) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (16 `op_Multiply` (rnd + 2) - 128) Secret) (va_CNil ()))))))))) val va_codegen_success_AESNI_ctr32_6x_loop_body : alg:algorithm -> rnd:nat -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_AESNI_ctr32_6x_loop_body alg rnd = (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (16 `op_Multiply` (rnd + 2) - 128) Secret) (va_ttrue ())))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_AESNI_ctr32_6x_loop_body (va_mods:va_mods_t) (alg:algorithm) (rnd:nat) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_loop_body alg rnd)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1118 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1119 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1120 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1121 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1122 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 15)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1123 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 15)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1125 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_s.eval_rounds_reveal ()) (va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1126 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.commute_sub_bytes_shift_rows_forall ()) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1127 column 19 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (16 `op_Multiply` (rnd + 2) - 128) Secret keys_b (rnd + 2)) (va_QEmpty (())))))))))))) val va_lemma_AESNI_ctr32_6x_loop_body : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> rnd:nat -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_AESNI_ctr32_6x_loop_body alg rnd) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ rnd + 2 < FStar.Seq.Base.length #quad32 round_keys /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys (rnd + 1) /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys rnd /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys rnd /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys rnd /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys rnd /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys rnd /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys rnd))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (rnd + 1) /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (rnd + 1) /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (rnd + 1) /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (rnd + 1) /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (rnd + 1) /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (rnd + 1) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys (rnd + 2)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_ok va_sM va_s0))))))))))) [@"opaque_to_smt"] let va_lemma_AESNI_ctr32_6x_loop_body va_b0 va_s0 alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_ok] in let va_qc = va_qcode_AESNI_ctr32_6x_loop_body va_mods alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_AESNI_ctr32_6x_loop_body alg rnd) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 1066 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1109 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (rnd + 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1110 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (rnd + 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1111 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (rnd + 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1112 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (rnd + 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1113 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (rnd + 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1114 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (rnd + 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1116 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys (rnd + 2)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_AESNI_ctr32_6x_loop_body (alg:algorithm) (rnd:nat) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ rnd + 2 < FStar.Seq.Base.length #quad32 round_keys /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys (rnd + 1) /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys rnd /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys rnd /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys rnd /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys rnd /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys rnd /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys rnd) /\ (forall (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 va_s0))))))) in va_get_ok va_sM /\ (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (rnd + 1) /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (rnd + 1) /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (rnd + 1) /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (rnd + 1) /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (rnd + 1) /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (rnd + 1) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys (rnd + 2)) ==> va_k va_sM (()))) val va_wpProof_AESNI_ctr32_6x_loop_body : alg:algorithm -> rnd:nat -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_AESNI_ctr32_6x_loop_body alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AESNI_ctr32_6x_loop_body alg rnd) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_AESNI_ctr32_6x_loop_body alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 va_s0 va_k = let (va_sM, va_f0) = va_lemma_AESNI_ctr32_6x_loop_body (va_code_AESNI_ctr32_6x_loop_body alg rnd) va_s0 alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_ok va_sM va_s0)))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_AESNI_ctr32_6x_loop_body (alg:algorithm) (rnd:nat) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_loop_body alg rnd)) = (va_QProc (va_code_AESNI_ctr32_6x_loop_body alg rnd) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9]) (va_wp_AESNI_ctr32_6x_loop_body alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5) (va_wpProof_AESNI_ctr32_6x_loop_body alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5)) //-- //-- AESNI_ctr32_6x_loop_recursive val va_code_AESNI_ctr32_6x_loop_recursive : alg:algorithm -> rnd:nat -> Tot va_code(decreases %[alg;rnd]) [@ "opaque_to_smt"] let rec va_code_AESNI_ctr32_6x_loop_recursive alg rnd = (va_Block (va_CCons (if (rnd > 0) then va_Block (va_CCons (va_code_AESNI_ctr32_6x_loop_recursive alg (rnd - 1)) (va_CNil ())) else va_Block (va_CNil ())) (va_CCons (va_code_AESNI_ctr32_6x_loop_body alg rnd) (va_CNil ())))) val va_codegen_success_AESNI_ctr32_6x_loop_recursive : alg:algorithm -> rnd:nat -> Tot va_pbool(decreases %[alg;rnd]) [@ "opaque_to_smt"] let rec va_codegen_success_AESNI_ctr32_6x_loop_recursive alg rnd = (va_pbool_and (if (rnd > 0) then va_pbool_and (va_codegen_success_AESNI_ctr32_6x_loop_recursive alg (rnd - 1)) (va_ttrue ()) else va_ttrue ()) (va_pbool_and (va_codegen_success_AESNI_ctr32_6x_loop_body alg rnd) (va_ttrue ()))) val va_lemma_AESNI_ctr32_6x_loop_recursive : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> rnd:nat -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> Ghost (va_state & va_fuel)(decreases %[va_b0;va_s0;alg;rnd;key_words;round_keys;keys_b;init0;init1;init2;init3;init4;init5]) (requires (va_require_total va_b0 (va_code_AESNI_ctr32_6x_loop_recursive alg rnd) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ rnd + 2 < FStar.Seq.Base.length #quad32 round_keys /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 1 /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys 0 /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys 0 /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys 0 /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys 0 /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys 0 /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (rnd + 1) /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (rnd + 1) /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (rnd + 1) /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (rnd + 1) /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (rnd + 1) /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (rnd + 1) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys (rnd + 2)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_ok va_sM va_s0))))))))))) [@"opaque_to_smt"] let rec va_lemma_AESNI_ctr32_6x_loop_recursive va_b0 va_s0 alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 = va_reveal_opaque (`%va_code_AESNI_ctr32_6x_loop_recursive) (va_code_AESNI_ctr32_6x_loop_recursive alg rnd); let (va_old_s:va_state) = va_s0 in let (va_b1:va_codes) = va_get_block va_b0 in let va_b10 = va_tl va_b1 in let va_c10 = va_hd va_b1 in let (va_fc10, va_s10) = ( if (rnd > 0) then ( let va_b11 = va_get_block va_c10 in let (va_s12, va_fc12) = va_lemma_AESNI_ctr32_6x_loop_recursive (va_hd va_b11) va_s0 alg (rnd - 1) key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in let va_b12 = va_tl va_b11 in let (va_s10, va_f12) = va_lemma_empty_total va_s12 va_b12 in let va_fc10 = va_lemma_merge_total va_b11 va_s0 va_fc12 va_s12 va_f12 va_s10 in (va_fc10, va_s10) ) else ( let va_b13 = va_get_block va_c10 in let (va_s10, va_fc10) = va_lemma_empty_total va_s0 va_b13 in (va_fc10, va_s10) ) ) in let (va_s14, va_fc14) = va_lemma_AESNI_ctr32_6x_loop_body (va_hd va_b10) va_s10 alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in let va_b14 = va_tl va_b10 in let (va_sM, va_f14) = va_lemma_empty_total va_s14 va_b14 in let va_f10 = va_lemma_merge_total va_b10 va_s10 va_fc14 va_s14 va_f14 va_sM in let va_fM = va_lemma_merge_total va_b1 va_s0 va_fc10 va_s10 va_f10 va_sM in (va_sM, va_fM) [@ va_qattr] let va_wp_AESNI_ctr32_6x_loop_recursive (alg:algorithm) (rnd:nat) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ rnd + 2 < FStar.Seq.Base.length #quad32 round_keys /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 1 /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys 0 /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys 0 /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys 0 /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys 0 /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys 0 /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys 0) /\ (forall (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 va_s0))))))) in va_get_ok va_sM /\ (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (rnd + 1) /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (rnd + 1) /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (rnd + 1) /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (rnd + 1) /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (rnd + 1) /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (rnd + 1) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys (rnd + 2)) ==> va_k va_sM (()))) val va_wpProof_AESNI_ctr32_6x_loop_recursive : alg:algorithm -> rnd:nat -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_AESNI_ctr32_6x_loop_recursive alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AESNI_ctr32_6x_loop_recursive alg rnd) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_AESNI_ctr32_6x_loop_recursive alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 va_s0 va_k = let (va_sM, va_f0) = va_lemma_AESNI_ctr32_6x_loop_recursive (va_code_AESNI_ctr32_6x_loop_recursive alg rnd) va_s0 alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_ok va_sM va_s0)))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_AESNI_ctr32_6x_loop_recursive (alg:algorithm) (rnd:nat) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_loop_recursive alg rnd)) = (va_QProc (va_code_AESNI_ctr32_6x_loop_recursive alg rnd) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9]) (va_wp_AESNI_ctr32_6x_loop_recursive alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5) (va_wpProof_AESNI_ctr32_6x_loop_recursive alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5)) //-- //-- AESNI_ctr32_6x_round9 #push-options "--z3rlimit 100" val va_code_AESNI_ctr32_6x_round9 : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_AESNI_ctr32_6x_round9 alg = (va_Block (va_CCons (if (alg = AES_128) then va_Block (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rRcx) (160 - 128) Secret) (va_CNil ())) else va_Block (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rRcx) (224 - 128) Secret) (va_CNil ()))) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 0 Secret)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 5) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 16 Secret)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 15)) (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 6) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 32 Secret)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 15)) (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 8) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 48 Secret)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 15)) (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 2) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 64 Secret)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 15)) (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 3) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 80 Secret)) (va_CCons (va_code_AddLea64 (va_op_dst_opr64_reg64 rRdi) (va_op_opr64_reg64 rRdi) (va_const_opr64 96)) (va_CNil ())))))))))))))))))))))) val va_codegen_success_AESNI_ctr32_6x_round9 : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_AESNI_ctr32_6x_round9 alg = (va_pbool_and (if (alg = AES_128) then va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rRcx) (160 - 128) Secret) (va_ttrue ()) else va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rRcx) (224 - 128) Secret) (va_ttrue ())) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 0 Secret)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 5) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 16 Secret)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 6) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 32 Secret)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 8) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 48 Secret)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 2) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 64 Secret)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 3) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 80 Secret)) (va_pbool_and (va_codegen_success_AddLea64 (va_op_dst_opr64_reg64 rRdi) (va_op_opr64_reg64 rRdi) (va_const_opr64 96)) (va_ttrue ()))))))))))))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_AESNI_ctr32_6x_round9 (va_mods:va_mods_t) (alg:algorithm) (count:nat) (in_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_round9 alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1260 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qInlineIf va_mods (alg = AES_128) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1261 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rRcx) (160 - 128) Secret keys_b 10) (va_QEmpty (())))) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1263 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rRcx) (224 - 128) Secret keys_b 14) (va_QEmpty (()))))) (fun (va_s:va_state) va_g -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1266 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1267 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 0 Secret in_b (count `op_Multiply` 6 + 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1267 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 0 Secret)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1268 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1269 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 16 Secret in_b (count `op_Multiply` 6 + 1)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1269 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 5) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 16 Secret)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1270 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1271 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 32 Secret in_b (count `op_Multiply` 6 + 2)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1271 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 6) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 32 Secret)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1272 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1273 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 48 Secret in_b (count `op_Multiply` 6 + 3)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1273 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 8) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 48 Secret)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1274 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1275 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 64 Secret in_b (count `op_Multiply` 6 + 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1275 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 2) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 64 Secret)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1276 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1277 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 80 Secret in_b (count `op_Multiply` 6 + 5)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1277 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 3) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 80 Secret)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1279 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_s.eval_rounds_reveal ()) (va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1280 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.commute_sub_bytes_shift_rows_forall ()) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1282 column 13 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AddLea64 (va_op_dst_opr64_reg64 rRdi) (va_op_opr64_reg64 rRdi) (va_const_opr64 96)) (va_QEmpty (()))))))))))))))))))))))))) val va_lemma_AESNI_ctr32_6x_round9 : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> count:nat -> in_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_AESNI_ctr32_6x_round9 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 2)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ (let rk = FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg) in va_get_xmm 4 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 5 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 6 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 8 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 2 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 3 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM)) /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM va_s0)))))))))))))))))) [@"opaque_to_smt"] let va_lemma_AESNI_ctr32_6x_round9 va_b0 va_s0 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRdi; va_Mod_ok] in let va_qc = va_qcode_AESNI_ctr32_6x_round9 va_mods alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_AESNI_ctr32_6x_round9 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 1191 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1243 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1244 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1245 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1246 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1247 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1248 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1250 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (let rk = FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg) in label va_range1 "***** POSTCONDITION NOT MET AT line 1251 column 73 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 4 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1252 column 73 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 5 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1253 column 73 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 6 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1254 column 73 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 8 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1255 column 73 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1256 column 73 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 3 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1258 column 31 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRdi; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_AESNI_ctr32_6x_round9 (alg:algorithm) (count:nat) (in_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 2)) /\ (forall (va_x_rdi:nat64) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_reg64 rRdi va_x_rdi va_s0)))))))))))))) in va_get_ok va_sM /\ (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ (let rk = FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg) in va_get_xmm 4 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 5 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 6 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 8 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 2 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 3 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM)) /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96)) ==> va_k va_sM (()))) val va_wpProof_AESNI_ctr32_6x_round9 : alg:algorithm -> count:nat -> in_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_AESNI_ctr32_6x_round9 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AESNI_ctr32_6x_round9 alg) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRdi]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_AESNI_ctr32_6x_round9 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 va_s0 va_k = let (va_sM, va_f0) = va_lemma_AESNI_ctr32_6x_round9 (va_code_AESNI_ctr32_6x_round9 alg) va_s0 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM va_s0))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRdi]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_AESNI_ctr32_6x_round9 (alg:algorithm) (count:nat) (in_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_round9 alg)) = (va_QProc (va_code_AESNI_ctr32_6x_round9 alg) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRdi]) (va_wp_AESNI_ctr32_6x_round9 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5) (va_wpProof_AESNI_ctr32_6x_round9 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5)) #pop-options //-- //-- AESNI_ctr32_6x_final val va_code_AESNI_ctr32_6x_final : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_AESNI_ctr32_6x_final alg = (va_Block (va_CCons (va_code_VAESNI_enc_last (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 4)) (va_CCons (va_code_VAESNI_enc_last (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_CCons (va_code_VAESNI_enc_last (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 6)) (va_CCons (va_code_VAESNI_enc_last (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 8)) (va_CCons (va_code_VAESNI_enc_last (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_CCons (va_code_VAESNI_enc_last (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 3)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 9) 0 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 10) 16 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 11) 32 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 12) 48 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 13) 64 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 14) 80 Secret) (va_CCons (va_code_AddLea64 (va_op_dst_opr64_reg64 rRsi) (va_op_opr64_reg64 rRsi) (va_const_opr64 96)) (va_CNil ()))))))))))))))) val va_codegen_success_AESNI_ctr32_6x_final : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_AESNI_ctr32_6x_final alg = (va_pbool_and (va_codegen_success_VAESNI_enc_last (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 4)) (va_pbool_and (va_codegen_success_VAESNI_enc_last (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VAESNI_enc_last (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 6)) (va_pbool_and (va_codegen_success_VAESNI_enc_last (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 8)) (va_pbool_and (va_codegen_success_VAESNI_enc_last (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VAESNI_enc_last (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 3)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 9) 0 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 10) 16 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 11) 32 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 12) 48 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 13) 64 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 14) 80 Secret) (va_pbool_and (va_codegen_success_AddLea64 (va_op_dst_opr64_reg64 rRsi) (va_op_opr64_reg64 rRsi) (va_const_opr64 96)) (va_ttrue ())))))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_AESNI_ctr32_6x_final (va_mods:va_mods_t) (alg:algorithm) (count:nat) (out_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) (ctr0:quad32) (ctr1:quad32) (ctr2:quad32) (ctr3:quad32) (ctr4:quad32) (ctr5:quad32) (plain0:quad32) (plain1:quad32) (plain2:quad32) (plain3:quad32) (plain4:quad32) (plain5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_final alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1381 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc_last (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1382 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc_last (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1383 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc_last (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 6)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1384 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc_last (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 8)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1385 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc_last (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1386 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc_last (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 3)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1388 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 9) 0 Secret out_b (count `op_Multiply` 6 + 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1389 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 10) 16 Secret out_b (count `op_Multiply` 6 + 1)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1390 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 11) 32 Secret out_b (count `op_Multiply` 6 + 2)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1391 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 12) 48 Secret out_b (count `op_Multiply` 6 + 3)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1392 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 13) 64 Secret out_b (count `op_Multiply` 6 + 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1393 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 14) 80 Secret out_b (count `op_Multiply` 6 + 5)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1395 column 13 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AddLea64 (va_op_dst_opr64_reg64 rRsi) (va_op_opr64_reg64 rRsi) (va_const_opr64 96)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1397 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Arch.TypesNative.lemma_quad32_xor_commutes_forall ()) (let (va_arg84:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg83:Vale.Def.Types_s.quad32) = va_get_xmm 9 va_s in let (va_arg82:Vale.Def.Types_s.quad32) = va_get_xmm 9 va_old_s in let (va_arg81:Vale.Def.Types_s.quad32) = init0 in let (va_arg80:Vale.Def.Types_s.quad32) = plain0 in let (va_arg79:Vale.Def.Types_s.quad32) = ctr0 in let (va_arg78:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1398 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher_opt va_arg78 va_arg79 va_arg80 va_arg81 va_arg82 va_arg83 va_arg84) (let (va_arg77:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg76:Vale.Def.Types_s.quad32) = va_get_xmm 10 va_s in let (va_arg75:Vale.Def.Types_s.quad32) = va_get_xmm 10 va_old_s in let (va_arg74:Vale.Def.Types_s.quad32) = init1 in let (va_arg73:Vale.Def.Types_s.quad32) = plain1 in let (va_arg72:Vale.Def.Types_s.quad32) = ctr1 in let (va_arg71:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1399 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher_opt va_arg71 va_arg72 va_arg73 va_arg74 va_arg75 va_arg76 va_arg77) (let (va_arg70:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg69:Vale.Def.Types_s.quad32) = va_get_xmm 11 va_s in let (va_arg68:Vale.Def.Types_s.quad32) = va_get_xmm 11 va_old_s in let (va_arg67:Vale.Def.Types_s.quad32) = init2 in let (va_arg66:Vale.Def.Types_s.quad32) = plain2 in let (va_arg65:Vale.Def.Types_s.quad32) = ctr2 in let (va_arg64:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1400 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher_opt va_arg64 va_arg65 va_arg66 va_arg67 va_arg68 va_arg69 va_arg70) (let (va_arg63:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg62:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_s in let (va_arg61:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_old_s in let (va_arg60:Vale.Def.Types_s.quad32) = init3 in let (va_arg59:Vale.Def.Types_s.quad32) = plain3 in let (va_arg58:Vale.Def.Types_s.quad32) = ctr3 in let (va_arg57:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1401 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher_opt va_arg57 va_arg58 va_arg59 va_arg60 va_arg61 va_arg62 va_arg63) (let (va_arg56:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg55:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_s in let (va_arg54:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_old_s in let (va_arg53:Vale.Def.Types_s.quad32) = init4 in let (va_arg52:Vale.Def.Types_s.quad32) = plain4 in let (va_arg51:Vale.Def.Types_s.quad32) = ctr4 in let (va_arg50:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1402 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher_opt va_arg50 va_arg51 va_arg52 va_arg53 va_arg54 va_arg55 va_arg56) (let (va_arg49:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg48:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_s in let (va_arg47:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_old_s in let (va_arg46:Vale.Def.Types_s.quad32) = init5 in let (va_arg45:Vale.Def.Types_s.quad32) = plain5 in let (va_arg44:Vale.Def.Types_s.quad32) = ctr5 in let (va_arg43:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1403 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher_opt va_arg43 va_arg44 va_arg45 va_arg46 va_arg47 va_arg48 va_arg49) (va_QLemma va_range1 "***** PRECONDITION NOT MET AT line 1404 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg key) alg ctr0 key_words) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg ctr0 key_words) (fun (_:unit) -> finish_aes_encrypt_le alg ctr0 key_words) (va_QLemma va_range1 "***** PRECONDITION NOT MET AT line 1405 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg key) alg ctr1 key_words) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg ctr1 key_words) (fun (_:unit) -> finish_aes_encrypt_le alg ctr1 key_words) (va_QLemma va_range1 "***** PRECONDITION NOT MET AT line 1406 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg key) alg ctr2 key_words) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg ctr2 key_words) (fun (_:unit) -> finish_aes_encrypt_le alg ctr2 key_words) (va_QLemma va_range1 "***** PRECONDITION NOT MET AT line 1407 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg key) alg ctr3 key_words) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg ctr3 key_words) (fun (_:unit) -> finish_aes_encrypt_le alg ctr3 key_words) (va_QLemma va_range1 "***** PRECONDITION NOT MET AT line 1408 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg key) alg ctr4 key_words) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg ctr4 key_words) (fun (_:unit) -> finish_aes_encrypt_le alg ctr4 key_words) (va_QLemma va_range1 "***** PRECONDITION NOT MET AT line 1409 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg key) alg ctr5 key_words) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg ctr5 key_words) (fun (_:unit) -> finish_aes_encrypt_le alg ctr5 key_words) (va_QEmpty (()))))))))))))))))))))))))))))) val va_lemma_AESNI_ctr32_6x_final : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> count:nat -> out_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> ctr0:quad32 -> ctr1:quad32 -> ctr2:quad32 -> ctr3:quad32 -> ctr4:quad32 -> ctr5:quad32 -> plain0:quad32 -> plain1:quad32 -> plain2:quad32 -> plain3:quad32 -> plain4:quad32 -> plain5:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_AESNI_ctr32_6x_final alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ init0 == Vale.Def.Types_s.quad32_xor ctr0 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init1 == Vale.Def.Types_s.quad32_xor ctr1 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init2 == Vale.Def.Types_s.quad32_xor ctr2 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init3 == Vale.Def.Types_s.quad32_xor ctr3 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init4 == Vale.Def.Types_s.quad32_xor ctr4 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init5 == Vale.Def.Types_s.quad32_xor ctr5 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ (let rk = FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg) in va_get_xmm 4 va_s0 == Vale.Def.Types_s.quad32_xor rk plain0 /\ va_get_xmm 5 va_s0 == Vale.Def.Types_s.quad32_xor rk plain1 /\ va_get_xmm 6 va_s0 == Vale.Def.Types_s.quad32_xor rk plain2 /\ va_get_xmm 8 va_s0 == Vale.Def.Types_s.quad32_xor rk plain3 /\ va_get_xmm 2 va_s0 == Vale.Def.Types_s.quad32_xor rk plain4 /\ va_get_xmm 3 va_s0 == Vale.Def.Types_s.quad32_xor rk plain5)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count) /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_sM /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor plain0 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr0) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor plain1 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr1) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor plain2 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr2) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor plain3 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr3) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor plain4 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr4) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor plain5 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr5)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_reg64 rRsi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_AESNI_ctr32_6x_final va_b0 va_s0 alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRsi; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_AESNI_ctr32_6x_final va_mods alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5 in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_AESNI_ctr32_6x_final alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 1285 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1362 column 84 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1363 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1364 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1366 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1367 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1368 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1369 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1370 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1371 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1373 column 75 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor plain0 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1374 column 75 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor plain1 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1375 column 75 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor plain2 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr2)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1376 column 75 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor plain3 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr3)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1377 column 75 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor plain4 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr4)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1378 column 75 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor plain5 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr5)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRsi; va_Mod_ok; va_Mod_mem]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_AESNI_ctr32_6x_final (alg:algorithm) (count:nat) (out_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) (ctr0:quad32) (ctr1:quad32) (ctr2:quad32) (ctr3:quad32) (ctr4:quad32) (ctr5:quad32) (plain0:quad32) (plain1:quad32) (plain2:quad32) (plain3:quad32) (plain4:quad32) (plain5:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ init0 == Vale.Def.Types_s.quad32_xor ctr0 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init1 == Vale.Def.Types_s.quad32_xor ctr1 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init2 == Vale.Def.Types_s.quad32_xor ctr2 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init3 == Vale.Def.Types_s.quad32_xor ctr3 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init4 == Vale.Def.Types_s.quad32_xor ctr4 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init5 == Vale.Def.Types_s.quad32_xor ctr5 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ (let rk = FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg) in va_get_xmm 4 va_s0 == Vale.Def.Types_s.quad32_xor rk plain0 /\ va_get_xmm 5 va_s0 == Vale.Def.Types_s.quad32_xor rk plain1 /\ va_get_xmm 6 va_s0 == Vale.Def.Types_s.quad32_xor rk plain2 /\ va_get_xmm 8 va_s0 == Vale.Def.Types_s.quad32_xor rk plain3 /\ va_get_xmm 2 va_s0 == Vale.Def.Types_s.quad32_xor rk plain4 /\ va_get_xmm 3 va_s0 == Vale.Def.Types_s.quad32_xor rk plain5)) /\ (forall (va_x_mem:vale_heap) (va_x_rsi:nat64) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_heap6:vale_heap) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_reg64 rRsi va_x_rsi (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count) /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_sM /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor plain0 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr0) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor plain1 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr1) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor plain2 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr2) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor plain3 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr3) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor plain4 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr4) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor plain5 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr5)) ==> va_k va_sM (()))) val va_wpProof_AESNI_ctr32_6x_final : alg:algorithm -> count:nat -> out_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> ctr0:quad32 -> ctr1:quad32 -> ctr2:quad32 -> ctr3:quad32 -> ctr4:quad32 -> ctr5:quad32 -> plain0:quad32 -> plain1:quad32 -> plain2:quad32 -> plain3:quad32 -> plain4:quad32 -> plain5:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_AESNI_ctr32_6x_final alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AESNI_ctr32_6x_final alg) ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRsi; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_AESNI_ctr32_6x_final alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5 va_s0 va_k = let (va_sM, va_f0) = va_lemma_AESNI_ctr32_6x_final (va_code_AESNI_ctr32_6x_final alg) va_s0 alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_reg64 rRsi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRsi; va_Mod_mem]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_AESNI_ctr32_6x_final (alg:algorithm) (count:nat) (out_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) (ctr0:quad32) (ctr1:quad32) (ctr2:quad32) (ctr3:quad32) (ctr4:quad32) (ctr5:quad32) (plain0:quad32) (plain1:quad32) (plain2:quad32) (plain3:quad32) (plain4:quad32) (plain5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_final alg)) = (va_QProc (va_code_AESNI_ctr32_6x_final alg) ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRsi; va_Mod_mem]) (va_wp_AESNI_ctr32_6x_final alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5) (va_wpProof_AESNI_ctr32_6x_final alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5)) //-- //-- AESNI_ctr32_6x val va_code_AESNI_ctr32_6x : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_AESNI_ctr32_6x alg = (va_Block (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_AESNI_ctr32_6x_preamble alg) (va_CCons (if (alg = AES_128) then va_Block (va_CCons (va_code_AESNI_ctr32_6x_loop_recursive alg 7) (va_CNil ())) else va_Block (va_CCons (va_code_AESNI_ctr32_6x_loop_recursive alg 11) (va_CNil ()))) (va_CCons (va_code_AESNI_ctr32_6x_round9 alg) (va_CCons (va_code_AESNI_ctr32_6x_final alg) (va_CCons (va_Block (va_CNil ())) (va_CNil ()))))))))))))) val va_codegen_success_AESNI_ctr32_6x : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_AESNI_ctr32_6x alg = (va_pbool_and (va_codegen_success_AESNI_ctr32_6x_preamble alg) (va_pbool_and (if (alg = AES_128) then va_pbool_and (va_codegen_success_AESNI_ctr32_6x_loop_recursive alg 7) (va_ttrue ()) else va_pbool_and (va_codegen_success_AESNI_ctr32_6x_loop_recursive alg 11) (va_ttrue ())) (va_pbool_and (va_codegen_success_AESNI_ctr32_6x_round9 alg) (va_pbool_and (va_codegen_success_AESNI_ctr32_6x_final alg) (va_ttrue ()))))) [@ "opaque_to_smt" va_qattr] let va_qcode_AESNI_ctr32_6x (va_mods:va_mods_t) (alg:algorithm) (count:nat) (in_b:buffer128) (out_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_BE:quad32) (ctr_BE_orig:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1492 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_539 (s_540:(FStar.Seq.Base.seq a_539)) (i_541:Prims.nat) -> let (i_515:Prims.nat) = i_541 in Prims.b2t (Prims.op_LessThan i_515 (FStar.Seq.Base.length #a_539 s_540))) Vale.Def.Types_s.quad32 round_keys 0) (fun _ -> let (init0:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1493 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_539 (s_540:(FStar.Seq.Base.seq a_539)) (i_541:Prims.nat) -> let (i_515:Prims.nat) = i_541 in Prims.b2t (Prims.op_LessThan i_515 (FStar.Seq.Base.length #a_539 s_540))) Vale.Def.Types_s.quad32 round_keys 0) (fun _ -> let (init1:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1494 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_539 (s_540:(FStar.Seq.Base.seq a_539)) (i_541:Prims.nat) -> let (i_515:Prims.nat) = i_541 in Prims.b2t (Prims.op_LessThan i_515 (FStar.Seq.Base.length #a_539 s_540))) Vale.Def.Types_s.quad32 round_keys 0) (fun _ -> let (init2:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1495 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_539 (s_540:(FStar.Seq.Base.seq a_539)) (i_541:Prims.nat) -> let (i_515:Prims.nat) = i_541 in Prims.b2t (Prims.op_LessThan i_515 (FStar.Seq.Base.length #a_539 s_540))) Vale.Def.Types_s.quad32 round_keys 0) (fun _ -> let (init3:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1496 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_539 (s_540:(FStar.Seq.Base.seq a_539)) (i_541:Prims.nat) -> let (i_515:Prims.nat) = i_541 in Prims.b2t (Prims.op_LessThan i_515 (FStar.Seq.Base.length #a_539 s_540))) Vale.Def.Types_s.quad32 round_keys 0) (fun _ -> let (init4:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1497 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_539 (s_540:(FStar.Seq.Base.seq a_539)) (i_541:Prims.nat) -> let (i_515:Prims.nat) = i_541 in Prims.b2t (Prims.op_LessThan i_515 (FStar.Seq.Base.length #a_539 s_540))) Vale.Def.Types_s.quad32 round_keys 0) (fun _ -> let (init5:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1499 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x_preamble alg key_words round_keys keys_b ctr_BE) (fun (va_s:va_state) _ -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1500 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qInlineIf va_mods (alg = AES_128) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1501 column 36 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x_loop_recursive alg 7 key_words round_keys keys_b init0 init1 init2 init3 init4 init5) (va_QEmpty (())))) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1503 column 36 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x_loop_recursive alg 11 key_words round_keys keys_b init0 init1 init2 init3 init4 init5) (va_QEmpty (()))))) (fun (va_s:va_state) va_g -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1505 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x_round9 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5) (fun (va_s:va_state) _ -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1506 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x_final alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s)) (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s)) (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s)) (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s)) (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s)) (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s))) (fun (va_s:va_state) _ -> let (plain:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b in let (cipher:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (bound:(va_int_at_least 0)) = count `op_Multiply` 6 in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1523 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (bound >= 0 /\ bound <= 4294967295) (fun _ -> let (va_arg61:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg60:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg59:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = cipher in let (va_arg58:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) out_b in let (va_arg57:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg56:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg55:Vale.Def.Types_s.nat32) = bound in let (va_arg54:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1523 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_ignores_postfix va_arg54 va_arg55 va_arg56 va_arg57 va_arg58 va_arg59 va_arg60 va_arg61) (let (va_arg53:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg52:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg51:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = cipher in let (va_arg50:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg49:Prims.nat) = bound in let (va_arg48:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1525 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_extend6 va_arg48 va_arg49 va_arg50 va_arg51 va_arg52 va_arg53) (va_QEmpty (())))))))))))))))) val va_lemma_AESNI_ctr32_6x : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> count:nat -> in_b:buffer128 -> out_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_BE:quad32 -> ctr_BE_orig:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_AESNI_ctr32_6x alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_reg64 rRcx va_s0 - 96 >= 0 /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count) /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96 /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6) /\ (0 <= va_get_reg64 rRbx va_sM /\ va_get_reg64 rRbx va_sM < 256) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_sM /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_AESNI_ctr32_6x va_b0 va_s0 alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_AESNI_ctr32_6x va_mods alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_AESNI_ctr32_6x alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 1412 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1473 column 84 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1474 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1475 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1476 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1478 column 57 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1479 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (0 <= va_get_reg64 rRbx va_sM /\ va_get_reg64 rRbx va_sM < 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1480 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1482 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1483 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1484 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1485 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1486 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1487 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1490 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_AESNI_ctr32_6x (alg:algorithm) (count:nat) (in_b:buffer128) (out_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_BE:quad32) (ctr_BE_orig:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_reg64 rRcx va_s0 - 96 >= 0 /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig) /\ (forall (va_x_mem:vale_heap) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_rbx:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_heap6:vale_heap) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count) /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96 /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6) /\ (0 <= va_get_reg64 rRbx va_sM /\ va_get_reg64 rRbx va_sM < 256) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_sM /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) ==> va_k va_sM (()))) val va_wpProof_AESNI_ctr32_6x : alg:algorithm -> count:nat -> in_b:buffer128 -> out_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_BE:quad32 -> ctr_BE_orig:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_AESNI_ctr32_6x alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AESNI_ctr32_6x alg) ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_AESNI_ctr32_6x alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig va_s0 va_k = let (va_sM, va_f0) = va_lemma_AESNI_ctr32_6x (va_code_AESNI_ctr32_6x alg) va_s0 alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_AESNI_ctr32_6x (alg:algorithm) (count:nat) (in_b:buffer128) (out_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_BE:quad32) (ctr_BE_orig:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x alg)) = (va_QProc (va_code_AESNI_ctr32_6x alg) ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) (va_wp_AESNI_ctr32_6x alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig) (va_wpProof_AESNI_ctr32_6x alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig)) //-- //-- Encrypt_save_and_shuffle_output val va_code_Encrypt_save_and_shuffle_output : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Encrypt_save_and_shuffle_output () = (va_Block (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 9) (0 - 96) Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_opr128_xmm 7)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 10) (0 - 80) Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 11) (0 - 64) Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 12) (0 - 48) Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 13) (0 - 32) Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 14) (0 - 16) Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_CNil ()))))))))))))))) val va_codegen_success_Encrypt_save_and_shuffle_output : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Encrypt_save_and_shuffle_output () = (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 9) (0 - 96) Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_opr128_xmm 7)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 10) (0 - 80) Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 11) (0 - 64) Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 12) (0 - 48) Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 13) (0 - 32) Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 14) (0 - 16) Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_ttrue ())))))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Encrypt_save_and_shuffle_output (va_mods:va_mods_t) (count:nat) (out_b:buffer128) : (va_quickCode unit (va_code_Encrypt_save_and_shuffle_output ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1573 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 9) (0 - 96) Secret out_b (count `op_Multiply` 6 + 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1574 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1575 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_opr128_xmm 7)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1576 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 10) (0 - 80) Secret out_b (count `op_Multiply` 6 + 1)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1577 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1578 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 11) (0 - 64) Secret out_b (count `op_Multiply` 6 + 2)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1579 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1580 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 12) (0 - 48) Secret out_b (count `op_Multiply` 6 + 3)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1581 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1582 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 13) (0 - 32) Secret out_b (count `op_Multiply` 6 + 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1583 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1584 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 14) (0 - 16) Secret out_b (count `op_Multiply` 6 + 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1585 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_QEmpty (())))))))))))))))) val va_lemma_Encrypt_save_and_shuffle_output : va_b0:va_code -> va_s0:va_state -> count:nat -> out_b:buffer128 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Encrypt_save_and_shuffle_output ()) va_s0 /\ va_get_ok va_s0 /\ (avx_enabled /\ sse_enabled /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0 - 96) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count) /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_s0 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.quad32_xor (va_get_xmm 1 va_s0) (va_get_xmm 7 va_sM) /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 9 va_s0) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 10 va_s0) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11 va_s0) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 12 va_s0) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 13 va_s0) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 14 va_s0)) /\ va_state_eq va_sM (va_update_mem_heaplet 6 va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))) [@"opaque_to_smt"] let va_lemma_Encrypt_save_and_shuffle_output va_b0 va_s0 count out_b = let (va_mods:va_mods_t) = [va_Mod_mem_heaplet 6; va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 1; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Encrypt_save_and_shuffle_output va_mods count out_b in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Encrypt_save_and_shuffle_output ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 1528 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1554 column 84 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1555 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1557 column 65 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1558 column 65 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1559 column 65 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1560 column 65 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1561 column 65 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1562 column 65 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1564 column 38 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.quad32_xor (va_get_xmm 1 va_s0) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1565 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 9 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1566 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 10 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1567 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1568 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 12 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1569 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 13 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1570 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 14 va_s0)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_mem_heaplet 6; va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 1; va_Mod_ok; va_Mod_mem]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Encrypt_save_and_shuffle_output (count:nat) (out_b:buffer128) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (avx_enabled /\ sse_enabled /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0 - 96) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051) /\ (forall (va_x_mem:vale_heap) (va_x_xmm1:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_efl:Vale.X64.Flags.t) (va_x_heap6:vale_heap) . let va_sM = va_upd_mem_heaplet 6 va_x_heap6 (va_upd_flags va_x_efl (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 1 va_x_xmm1 (va_upd_mem va_x_mem va_s0))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count) /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_s0 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.quad32_xor (va_get_xmm 1 va_s0) (va_get_xmm 7 va_sM) /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 9 va_s0) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 10 va_s0) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11 va_s0) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 12 va_s0) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 13 va_s0) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 14 va_s0)) ==> va_k va_sM (()))) val va_wpProof_Encrypt_save_and_shuffle_output : count:nat -> out_b:buffer128 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Encrypt_save_and_shuffle_output count out_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Encrypt_save_and_shuffle_output ()) ([va_Mod_mem_heaplet 6; va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 1; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Encrypt_save_and_shuffle_output count out_b va_s0 va_k = let (va_sM, va_f0) = va_lemma_Encrypt_save_and_shuffle_output (va_code_Encrypt_save_and_shuffle_output ()) va_s0 count out_b in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_mem_heaplet 6 va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))); va_lemma_norm_mods ([va_Mod_mem_heaplet 6; va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 1; va_Mod_mem]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Encrypt_save_and_shuffle_output (count:nat) (out_b:buffer128) : (va_quickCode unit (va_code_Encrypt_save_and_shuffle_output ())) = (va_QProc (va_code_Encrypt_save_and_shuffle_output ()) ([va_Mod_mem_heaplet 6; va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 1; va_Mod_mem]) (va_wp_Encrypt_save_and_shuffle_output count out_b) (va_wpProof_Encrypt_save_and_shuffle_output count out_b)) //-- //-- UpdateScratch val va_code_UpdateScratch : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_UpdateScratch () = (va_Block (va_CCons (va_code_ZeroXmm (va_op_xmm_xmm 4)) (va_CCons (va_code_Mov128 (va_op_xmm_xmm 7) (va_op_xmm_xmm 14)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 13) 48 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 12) 64 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 11) 80 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 10) 96 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 9) 112 Secret) (va_CNil ())))))))))) val va_codegen_success_UpdateScratch : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_UpdateScratch () = (va_pbool_and (va_codegen_success_ZeroXmm (va_op_xmm_xmm 4)) (va_pbool_and (va_codegen_success_Mov128 (va_op_xmm_xmm 7) (va_op_xmm_xmm 14)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 13) 48 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 12) 64 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 11) 80 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 10) 96 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 9) 112 Secret) (va_ttrue ()))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_UpdateScratch (va_mods:va_mods_t) (scratch_b:buffer128) : (va_quickCode unit (va_code_UpdateScratch ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1623 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_ZeroXmm (va_op_xmm_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1624 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mov128 (va_op_xmm_xmm 7) (va_op_xmm_xmm 14)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1625 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret scratch_b 1) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1626 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 13) 48 Secret scratch_b 3) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1627 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 12) 64 Secret scratch_b 4) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1628 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 11) 80 Secret scratch_b 5) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1629 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 10) 96 Secret scratch_b 6) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1630 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 9) 112 Secret scratch_b 7) (va_QEmpty (()))))))))))) val va_lemma_UpdateScratch : va_b0:va_code -> va_s0:va_state -> scratch_b:buffer128 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_UpdateScratch ()) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) /\ Vale.X64.Decls.buffer_modifies_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 7 /\ Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_s0) == Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM) /\ Vale.X64.Decls.buffer128_read scratch_b 3 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 13 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 4 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 12 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 5 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 11 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 6 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 10 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 7 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 9 va_sM /\ va_get_xmm 7 va_sM == va_get_xmm 14 va_sM /\ va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_xmm 7 va_sM (va_update_xmm 4 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))) [@"opaque_to_smt"] let va_lemma_UpdateScratch va_b0 va_s0 scratch_b = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_xmm 7; va_Mod_xmm 4; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_UpdateScratch va_mods scratch_b in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_UpdateScratch ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 1588 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1610 column 57 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1611 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer_modifies_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 7) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1613 column 63 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1614 column 88 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_s0) == Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1615 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 3 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 13 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1616 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 4 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 12 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1617 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 5 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 11 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1618 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 6 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 10 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1619 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 7 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 9 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1620 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 7 va_sM == va_get_xmm 14 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1621 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_xmm 7; va_Mod_xmm 4; va_Mod_ok; va_Mod_mem]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_UpdateScratch (scratch_b:buffer128) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_xmm4:quad32) (va_x_xmm7:quad32) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 4 va_x_xmm4 (va_upd_mem va_x_mem va_s0)))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) /\ Vale.X64.Decls.buffer_modifies_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 7 /\ Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_s0) == Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM) /\ Vale.X64.Decls.buffer128_read scratch_b 3 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 13 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 4 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 12 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 5 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 11 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 6 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 10 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 7 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 9 va_sM /\ va_get_xmm 7 va_sM == va_get_xmm 14 va_sM /\ va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) ==> va_k va_sM (()))) val va_wpProof_UpdateScratch : scratch_b:buffer128 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_UpdateScratch scratch_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_UpdateScratch ()) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_xmm 7; va_Mod_xmm 4; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_UpdateScratch scratch_b va_s0 va_k = let (va_sM, va_f0) = va_lemma_UpdateScratch (va_code_UpdateScratch ()) va_s0 scratch_b in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_xmm 7 va_sM (va_update_xmm 4 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_xmm 7; va_Mod_xmm 4; va_Mod_mem]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_UpdateScratch (scratch_b:buffer128) : (va_quickCode unit (va_code_UpdateScratch ())) = (va_QProc (va_code_UpdateScratch ()) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_xmm 7; va_Mod_xmm 4; va_Mod_mem]) (va_wp_UpdateScratch scratch_b) (va_wpProof_UpdateScratch scratch_b)) //-- //-- AES_GCM_encrypt_6mult #push-options "--z3rlimit 40000 --z3refresh --max_ifuel 0 --z3seed 7" #restart-solver [@ "opaque_to_smt" va_qattr] let va_code_AES_GCM_encrypt_6mult alg = (va_Block (va_CCons (va_IfElse (va_cmp_eq (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (va_Block (va_CCons (va_code_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 1) 32 Secret) (va_CNil ())))) (va_Block (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 32 Secret) (va_CCons (va_code_Add64 (va_op_dst_opr64_reg64 rRcx) (va_const_opr64 128)) (va_CCons (va_code_Pextrq (va_op_dst_opr64_reg64 rRbx) (va_op_xmm_xmm 1) 0) (va_CCons (va_code_And64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 255)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_CCons (va_code_AddLea64 (va_op_dst_opr64_reg64 rR14) (va_op_opr64_reg64 rRsi) (va_const_opr64 96)) (va_CCons (va_code_AESNI_ctr32_6x alg) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 8) (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 2) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 112 Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 4) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 2) 96 Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 5) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 80 Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 5) 64 Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 7) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 6) 48 Secret) (va_CCons (va_code_AESNI_ctr32_6x alg) (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 12)) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 8) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_CCons (va_code_Ctr32_ghash_6_prelude alg) (va_CCons (va_code_Loop6x_loop alg) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 1) 32 Secret) (va_CCons (va_code_ZeroXmm (va_op_xmm_xmm 4)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_GhashUnroll6x ()) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_InitPshufbMask (va_op_xmm_xmm 0) (va_op_reg_opr64_reg64 rR12)) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_Encrypt_save_and_shuffle_output ()) (va_CCons (va_code_UpdateScratch ()) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_GhashUnroll6x ()) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rRcx) (va_const_opr64 128)) (va_CNil ())))))))))))))))))))))))))))))))))))))))))))) (va_CNil ()))) [@ "opaque_to_smt" va_qattr] let va_codegen_success_AES_GCM_encrypt_6mult alg = (va_pbool_and (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 1) 32 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 32 Secret) (va_pbool_and (va_codegen_success_Add64 (va_op_dst_opr64_reg64 rRcx) (va_const_opr64 128)) (va_pbool_and (va_codegen_success_Pextrq (va_op_dst_opr64_reg64 rRbx) (va_op_xmm_xmm 1) 0) (va_pbool_and (va_codegen_success_And64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 255)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_AddLea64 (va_op_dst_opr64_reg64 rR14) (va_op_opr64_reg64 rRsi) (va_const_opr64 96)) (va_pbool_and (va_codegen_success_AESNI_ctr32_6x alg) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 8) (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 2) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 112 Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 4) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 2) 96 Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 5) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 80 Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 5) 64 Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 7) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 6) 48 Secret) (va_pbool_and (va_codegen_success_AESNI_ctr32_6x alg) (va_pbool_and (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 12)) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 8) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_pbool_and (va_codegen_success_Ctr32_ghash_6_prelude alg) (va_pbool_and (va_codegen_success_Loop6x_loop alg) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 1) 32 Secret) (va_pbool_and (va_codegen_success_ZeroXmm (va_op_xmm_xmm 4)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_pbool_and (va_codegen_success_GhashUnroll6x ()) (va_pbool_and (va_codegen_success_InitPshufbMask (va_op_xmm_xmm 0) (va_op_reg_opr64_reg64 rR12)) (va_pbool_and (va_codegen_success_Encrypt_save_and_shuffle_output ()) (va_pbool_and (va_codegen_success_UpdateScratch ()) (va_pbool_and (va_codegen_success_GhashUnroll6x ()) (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rRcx) (va_const_opr64 128)))))))))))))))))))))))))))))))))))) (va_ttrue ()))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsVector.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.InsAes.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Words.fsti.checked", "Vale.Math.Poly2.Lemmas.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Math.Poly2.Bits.fsti.checked", "Vale.Math.Poly2.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Prop_s.fst.checked", "Vale.Def.Opaque_s.fsti.checked", "Vale.Arch.TypesNative.fsti.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.X64.PolyOps.fsti.checked", "Vale.AES.X64.AESopt2.fsti.checked", "Vale.AES.X64.AESopt.fsti.checked", "Vale.AES.GHash.fsti.checked", "Vale.AES.GF128_s.fsti.checked", "Vale.AES.GF128.fsti.checked", "Vale.AES.GCTR_s.fst.checked", "Vale.AES.GCTR.fsti.checked", "Vale.AES.GCM_helpers.fsti.checked", "Vale.AES.AES_s.fst.checked", "Vale.AES.AES_helpers.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": true, "source_file": "Vale.AES.X64.AESGCM.fst" }

[ { "abbrev": false, "full_module": "Vale.AES.X64.AESopt2", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.AESopt", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Lemmas", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.PolyOps", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.TypesNative", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Prop_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.AESopt2", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.AESopt", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Lemmas", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.PolyOps", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.TypesNative", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Prop_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": true, "z3rlimit": 40000, "z3rlimit_factor": 1, "z3seed": 7, "z3smtopt": [], "z3version": "4.8.5" }

false

va_mods: Vale.X64.QuickCode.va_mods_t -> alg: Vale.AES.AES_common_s.algorithm -> h_LE: Vale.X64.Decls.quad32 -> iv_b: Vale.X64.Memory.buffer128 -> in_b: Vale.X64.Memory.buffer128 -> out_b: Vale.X64.Memory.buffer128 -> scratch_b: Vale.X64.Memory.buffer128 -> key_words: FStar.Seq.Base.seq Vale.X64.Memory.nat32 -> round_keys: FStar.Seq.Base.seq Vale.X64.Decls.quad32 -> keys_b: Vale.X64.Memory.buffer128 -> hkeys_b: Vale.X64.Memory.buffer128 -> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.AES.X64.AESGCM.va_code_AES_GCM_encrypt_6mult alg)

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.QuickCode.va_mods_t", "Vale.AES.AES_common_s.algorithm", "Vale.X64.Decls.quad32", "Vale.X64.Memory.buffer128", "FStar.Seq.Base.seq", "Vale.X64.Memory.nat32", "Vale.X64.QuickCodes.qblock", "Prims.unit", "Prims.Cons", "Vale.X64.Decls.va_code", "Vale.X64.Machine_s.IfElse", "Vale.X64.Decls.ins", "Vale.X64.Decls.ocmp", "Vale.X64.QuickCodes.cmp_to_ocmp", "Vale.X64.QuickCodes.Cmp_eq", "Vale.X64.Decls.va_op_cmp_reg64", "Vale.X64.Machine_s.rRdx", "Vale.X64.Decls.va_const_cmp", "Vale.X64.QuickCodes.block", "Vale.X64.InsVector.va_code_VPshufb", "Vale.X64.Decls.va_op_xmm_xmm", "Vale.X64.InsVector.va_code_Store128_buffer", "Vale.X64.Decls.va_op_heaplet_mem_heaplet", "Vale.X64.Decls.va_op_reg_opr64_reg64", "Vale.X64.Machine_s.rRbp", "Vale.Arch.HeapTypes_s.Secret", "Prims.Nil", "Vale.X64.Machine_s.precode", "Vale.X64.InsBasic.va_code_Add64", "Vale.X64.Decls.va_op_dst_opr64_reg64", "Vale.X64.Machine_s.rRcx", "Vale.X64.Decls.va_const_opr64", "Vale.X64.InsVector.va_code_Pextrq", "Vale.X64.Machine_s.rRbx", "Vale.X64.InsBasic.va_code_And64", "Vale.X64.InsBasic.va_code_AddLea64", "Vale.X64.Machine_s.rR14", "Vale.X64.Decls.va_op_opr64_reg64", "Vale.X64.Machine_s.rRsi", "Vale.AES.X64.AESGCM.va_code_AESNI_ctr32_6x", "Vale.X64.InsBasic.va_code_Sub64", "Vale.X64.InsVector.va_code_Load128_buffer", "Vale.AES.X64.AESGCM.va_code_Ctr32_ghash_6_prelude", "Vale.AES.X64.AESGCM.va_code_Loop6x_loop", "Vale.X64.InsVector.va_code_ZeroXmm", "Vale.X64.Machine_s.Block", "Vale.AES.X64.AESopt2.va_code_GhashUnroll6x", "Vale.X64.InsVector.va_code_InitPshufbMask", "Vale.X64.Machine_s.rR12", "Vale.AES.X64.AESGCM.va_code_Encrypt_save_and_shuffle_output", "Vale.AES.X64.AESGCM.va_code_UpdateScratch", "Vale.X64.Decls.va_state", "Vale.X64.QuickCodes.va_QBind", "Vale.X64.QuickCodes.va_range1", "Vale.X64.QuickCodes.va_qIf", "Vale.X64.QuickCodes.va_QSeq", "Vale.X64.InsVector.va_quick_VPshufb", "Vale.X64.InsVector.va_quick_Store128_buffer", "Vale.X64.QuickCodes.va_qPURE", "Prims.pure_post", "Prims.l_and", "Vale.AES.AES_s.is_aes_key_LE", "Prims.l_Forall", "Prims.l_imp", "Vale.AES.GCTR.gctr_partial", "Vale.AES.GCTR.gctr_partial_opaque_init", "Vale.X64.QuickCodes.va_QEmpty", "Vale.Def.Types_s.quad32", "Vale.X64.Decls.s128", "Vale.X64.Decls.va_get_mem_heaplet", "Vale.Def.Words_s.nat32", "Vale.X64.Decls.va_get_xmm", "Vale.X64.QuickCodes.quickCodes", "Vale.X64.InsBasic.va_quick_Add64", "Vale.X64.InsVector.va_quick_Pextrq", "Vale.X64.InsBasic.va_quick_And64", "Prims.eq2", "Vale.Def.Words_s.nat64", "Vale.Arch.Types.lo64", "Vale.Def.Types_s.iand", "Prims.int", "Prims.op_Modulus", "Vale.Def.Words_s.__proj__Mkfour__item__lo0", "Vale.AES.GCTR.lemma_counter_init", "Vale.X64.InsBasic.va_quick_AddLea64", "Vale.AES.X64.AESGCM.va_quick_AESNI_ctr32_6x", "Vale.AES.GCTR_s.inc32", "Vale.X64.InsBasic.va_quick_Sub64", "Vale.X64.InsVector.va_quick_Load128_buffer", "Vale.AES.X64.AESGCM.va_quick_Ctr32_ghash_6_prelude", "Prims.l_True", "Vale.Math.Poly2_s.poly", "Vale.Math.Poly2.Bits_s.of_quad32", "Vale.Def.Words_s.Mkfour", "Vale.Math.Poly2_s.zero", "Vale.Def.Words_s.four", "Vale.Math.Poly2.Bits_s.to_quad32", "Vale.Math.Poly2.Words.lemma_quad32_zero", "Vale.Math.Poly2_s.add", "Vale.Math.Poly2.lemma_add_zero", "Vale.X64.QuickCodes.va_qAssert", "Vale.X64.Decls.buffer128_read", "Vale.AES.X64.AESGCM.va_quick_Loop6x_loop", "Vale.Def.Types_s.reverse_bytes_quad32", "Vale.X64.InsVector.va_quick_ZeroXmm", "Vale.X64.QuickCodes.va_qAssertSquash", "Prims.b2t", "Prims.op_GreaterThanOrEqual", "Prims.op_Subtraction", "Vale.X64.Decls.va_get_reg64", "Prims.op_AmpAmp", "Prims.op_LessThanOrEqual", "FStar.Seq.Base.length", "Prims.nat", "Prims.squash", "Vale.AES.X64.AESopt2.va_quick_GhashUnroll6x", "Prims.op_Equality", "Vale.AES.GHash.ghash_incremental0", "FStar.Seq.Base.op_At_Bar", "Vale.AES.GHash.lemma_ghash_incremental0_append", "FStar.Seq.Base.equal", "FStar.Seq.Base.append", "FStar.Seq.Base.slice", "Vale.X64.InsVector.va_quick_InitPshufbMask", "Prims.op_Division", "Vale.AES.X64.AESGCM.va_quick_Encrypt_save_and_shuffle_output", "Vale.AES.X64.AESGCM.va_quick_UpdateScratch", "Prims.op_Addition", "Prims.l_iff", "Vale.AES.GCTR.gctr_partial_opaque_ignores_postfix", "Prims.op_LessThan", "FStar.Seq.Base.index", "Vale.Def.Types_s.quad32_xor", "Vale.AES.GCTR.aes_encrypt_BE", "Vale.AES.GCTR.inc32lite", "Vale.AES.GCTR.gctr_partial_extend6", "Vale.X64.State.vale_state", "Vale.X64.QuickCode.va_quickCode", "Vale.AES.X64.AESGCM.va_code_AES_GCM_encrypt_6mult" ]

[]

false

let va_qcode_AES_GCM_encrypt_6mult (va_mods: va_mods_t) (alg: algorithm) (h_LE: quad32) (iv_b in_b out_b scratch_b: buffer128) (key_words: (seq nat32)) (round_keys: (seq quad32)) (keys_b hkeys_b: buffer128) : (va_quickCode unit (va_code_AES_GCM_encrypt_6mult alg)) =

(qblock va_mods (fun (va_s: va_state) -> let va_old_s:va_state = va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2176 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_eq (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (qblock va_mods (fun (va_s: va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2178 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2179 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 1) 32 Secret scratch_b 2) (fun (va_s: va_state) _ -> let va_arg104:Vale.Def.Types_s.quad32 = va_get_xmm 1 va_old_s in let va_arg103:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32) = key_words in let va_arg102:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let va_arg101:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b in let va_arg100:Vale.AES.AES_common_s.algorithm = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2180 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_: unit) -> Vale.AES.GCTR.gctr_partial_opaque_init va_arg100 va_arg101 va_arg102 va_arg103 va_arg104) (va_QEmpty (())))))) (qblock va_mods (fun (va_s: va_state) -> let plain_quads:(FStar.Seq.Base.seq Vale.X64.Decls.quad32) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b in let y_orig:Vale.Def.Types_s.quad32 = Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s) in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2187 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 32 Secret scratch_b 2) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2189 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Add64 (va_op_dst_opr64_reg64 rRcx) (va_const_opr64 128)) (fun (va_s: va_state) _ -> let ctr_BE:quad32 = va_get_xmm 1 va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2195 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Pextrq (va_op_dst_opr64_reg64 rRbx) (va_op_xmm_xmm 1) 0) (fun (va_s: va_state) _ -> let full_counter:nat64 = va_get_reg64 rRbx va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2197 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_And64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 255)) (fun (va_s: va_state) _ -> let va_arg136:Vale.Def.Types_s.nat64 = va_get_reg64 rRbx va_s in let va_arg135:Vale.Def.Types_s.nat64 = full_counter in let va_arg134:Vale.Def.Types_s.quad32 = va_get_xmm 1 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2198 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_: unit) -> Vale.AES.GCTR.lemma_counter_init va_arg134 va_arg135 va_arg136) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2200 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2203 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AddLea64 (va_op_dst_opr64_reg64 rR14 ) (va_op_opr64_reg64 rRsi) (va_const_opr64 96)) (fun (va_s: va_state) _ -> let va_arg133:Vale.Def.Types_s.quad32 = ctr_BE in let va_arg132:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32 ) = key_words in let va_arg131:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32 ) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let va_arg130:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32 ) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b in let va_arg129:Vale.AES.AES_common_s.algorithm = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2205 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_: unit) -> Vale.AES.GCTR.gctr_partial_opaque_init va_arg129 va_arg130 va_arg131 va_arg132 va_arg133) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2206 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x alg 0 in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2208 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 8) (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2209 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 2) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2210 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 112 Secret scratch_b 7) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2211 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 4) (va_op_xmm_xmm 11 ) (va_op_xmm_xmm 0 )) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2212 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 2) 96 Secret scratch_b 6) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2213 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 5) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2214 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3 ) (va_op_reg_opr64_reg64 rRbp ) (va_op_xmm_xmm 4 ) 80 Secret scratch_b 5) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2215 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb ( va_op_xmm_xmm 6 ) ( va_op_xmm_xmm 13 ) ( va_op_xmm_xmm 0 ) ) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2216 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_Store128_buffer ( va_op_heaplet_mem_heaplet 3 ) ( va_op_reg_opr64_reg64 rRbp ) ( va_op_xmm_xmm 5 ) 64 Secret scratch_b 4 ) ( va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2217 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_VPshufb ( va_op_xmm_xmm 7 ) ( va_op_xmm_xmm 14 ) ( va_op_xmm_xmm 0 ) ) ( va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2218 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_Store128_buffer ( va_op_heaplet_mem_heaplet 3 ) ( va_op_reg_opr64_reg64 rRbp ) ( va_op_xmm_xmm 6 ) 48 Secret scratch_b 3 ) ( va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2220 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_AESNI_ctr32_6x alg 1 in_b out_b plain_quads key_words round_keys keys_b ( Vale.AES.GCTR_s.inc32 ctr_BE 6 ) ctr_BE ) ( va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2221 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_Sub64 ( va_op_dst_opr64_reg64 rRdx ) ( va_const_opr64 12 ) ) ( va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2223 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_Load128_buffer ( va_op_heaplet_mem_heaplet 3 ) ( va_op_xmm_xmm 8 ) ( va_op_reg_opr64_reg64 rRbp ) 32 Secret scratch_b 2 ) ( va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2226 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ( Vale.AES.GCTR_s.inc32 ctr_BE 12 ) ) ( fun ( va_s: va_state ) _ -> let mid_len:nat64 = va_get_reg64 rRdx va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2233 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( fun ( _: unit ) -> Vale.Math.Poly2.Words.lemma_quad32_zero () ) ( let va_arg128:Vale.Math.Poly2_s.poly = Vale.Math.Poly2.Bits_s.of_quad32 ( va_get_xmm 8 va_s ) in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2234 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( fun ( _: unit ) -> Vale.Math.Poly2.lemma_add_zero va_arg128 ) ( va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 2235 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( Vale.Math.Poly2.Bits_s.of_quad32 ( va_get_xmm 8 va_s ) == add ( add ( Vale.Math.Poly2.Bits_s.of_quad32 ( va_get_xmm 8 va_s ) ) ( Vale.Math.Poly2.Bits_s.of_quad32 ( va_get_xmm 4 va_s ) ) ) ( Vale.Math.Poly2.Bits_s.of_quad32 ( Vale.X64.Decls.buffer128_read scratch_b 1 ( va_get_mem_heaplet 3 va_s ) ) ) ) ( va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 2236 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( Vale.Math.Poly2.Bits_s.to_quad32 ( Vale.Math.Poly2.Bits_s.of_quad32 ( va_get_xmm 8 va_s ) ) == va_get_xmm 8 va_s ) ( va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2237 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_Loop6x_loop alg h_LE ( Vale.Def.Types_s.reverse_bytes_quad32 ( va_get_xmm 8 va_s ) ) ( Vale.Def.Types_s.reverse_bytes_quad32 ( va_get_xmm 8 va_s ) ) 2 iv_b out_b in_b out_b scratch_b ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_old_s ) in_b ) key_words round_keys keys_b hkeys_b ctr_BE ( Vale.AES.GCTR_s.inc32 ctr_BE 12 ) ) ( fun ( va_s: va_state ) ( y_new: quad32 ) -> let out_snapshot:( FStar.Seq.Base.seq Vale.X64.Decls.quad32 ) = Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2240 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_Load128_buffer ( va_op_heaplet_mem_heaplet 3 ) ( va_op_xmm_xmm 7 ) ( va_op_reg_opr64_reg64 rRbp ) 32 Secret scratch_b 2 ) ( va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2243 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_Store128_buffer ( va_op_heaplet_mem_heaplet 3 ) ( va_op_reg_opr64_reg64 rRbp ) ( va_op_xmm_xmm 1 ) 32 Secret scratch_b 2 ) ( va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2246 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_ZeroXmm ( va_op_xmm_xmm 4 ) ) ( va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2247 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_Store128_buffer ( va_op_heaplet_mem_heaplet 3 ) ( va_op_reg_opr64_reg64 rRbp ) ( va_op_xmm_xmm 4 ) 16 Secret scratch_b 1 ) ( fun ( va_s: va_state ) _ -> let va_arg127:Vale.Math.Poly2_s.poly = Vale.Math.Poly2.Bits_s.of_quad32 ( va_get_xmm 8 va_s ) in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2248 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( fun ( _: unit ) -> Vale.Math.Poly2.lemma_add_zero va_arg127 ) ( va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2250 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_get_reg64 rRdx va_old_s - 12 >= 0 /\ va_get_reg64 rRdx va_old_s - 6 >= 0 /\ ( fun a_1906 ( s_1907: ( FStar.Seq.Base.seq a_1906 ) ) ( i_1908: Prims.nat ) ( j_1909: Prims.nat ) -> let j_1869:Prims.nat = j_1909 in Prims.b2t ( Prims.op_AmpAmp ( Prims.op_LessThanOrEqual i_1908 j_1869 ) ( Prims.op_LessThanOrEqual j_1869 ( FStar.Seq.Base.length #a_1906 s_1907 ) ) ) ) Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) ( va_get_reg64 rRdx va_old_s - 12 ) ( va_get_reg64 rRdx va_old_s - 6 ) ) ( fun _ -> let data:( FStar.Seq.Base.seq Vale.X64.Decls.quad32 ) = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) ( va_get_reg64 rRdx va_old_s - 12 ) ( va_get_reg64 rRdx va_old_s - 6 ) in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2251 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_GhashUnroll6x hkeys_b scratch_b h_LE y_new data ) ( fun ( va_s: va_state ) _ -> let y_new':Vale.Def.Types_s.quad32 = Vale.Def.Types_s.reverse_bytes_quad32 ( va_get_xmm 8 va_s ) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2253 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_get_reg64 rRdx va_old_s - 12 >= 0 /\ ( fun a_1906 ( s_1907: ( FStar.Seq.Base.seq a_1906 ) ) ( i_1908: Prims.nat ) ( j_1909: Prims.nat ) -> let j_1869:Prims.nat = j_1909 in Prims.b2t ( Prims.op_AmpAmp ( Prims.op_LessThanOrEqual i_1908 j_1869 ) ( Prims.op_LessThanOrEqual j_1869 ( FStar.Seq.Base.length #a_1906 s_1907 ) ) ) ) Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) 0 ( va_get_reg64 rRdx va_old_s - 12 ) ) ( fun _ -> let va_arg126:( FStar.Seq.Base.seq Vale.Def.Types_s.quad32 ) = data in let va_arg125:( FStar.Seq.Base.seq Vale.Def.Types_s.quad32 ) = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) 0 ( va_get_reg64 rRdx va_old_s - 12 ) in let va_arg124:Vale.Def.Types_s.quad32 = y_new in let va_arg123:Vale.Def.Types_s.quad32 = h_LE in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2253 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( fun ( _: unit ) -> Vale.AES.GHash.lemma_ghash_incremental0_append va_arg123 y_orig va_arg124 y_new' va_arg125 va_arg126 ) ( va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2255 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_get_reg64 rRdx va_old_s - 12 >= 0 /\ ( fun a_1906 ( s_1907: ( FStar.Seq.Base.seq a_1906 ) ) ( i_1908: Prims.nat ) ( j_1909: Prims.nat ) -> let j_1869:Prims.nat = j_1909 in Prims.b2t ( Prims.op_AmpAmp ( Prims.op_LessThanOrEqual i_1908 j_1869 ) ( Prims.op_LessThanOrEqual j_1869 ( FStar.Seq.Base.length #a_1906 s_1907 ) ) ) ) Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) 0 ( va_get_reg64 rRdx va_old_s - 12 ) /\ va_get_reg64 rRdx va_old_s - 6 >= 0 /\ ( fun a_1906 ( s_1907: ( FStar.Seq.Base.seq a_1906 ) ) ( i_1908: Prims.nat ) ( j_1909: Prims.nat ) -> let j_1869:Prims.nat = j_1909 in Prims.b2t ( Prims.op_AmpAmp ( Prims.op_LessThanOrEqual i_1908 j_1869 ) ( Prims.op_LessThanOrEqual j_1869 ( FStar.Seq.Base.length #a_1906 s_1907 ) ) ) ) Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) 0 ( va_get_reg64 rRdx va_old_s - 6 ) ) ( fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 2255 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( FStar.Seq.Base.equal #Vale.X64.Decls.quad32 ( FStar.Seq.Base.append #Vale.X64.Decls.quad32 ( FStar.Seq.Base.slice #Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) 0 ( va_get_reg64 rRdx va_old_s - 12 ) ) data ) ( FStar.Seq.Base.slice #Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) 0 ( va_get_reg64 rRdx va_old_s - 6 ) ) ) ( va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2260 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_InitPshufbMask ( va_op_xmm_xmm 0 ) ( va_op_reg_opr64_reg64 rR12 ) ) ( fun ( va_s: va_state ) _ -> va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2267 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( ( va_get_reg64 rRdx va_old_s ) `op_Division` 6 - 1 >= 0 ) ( fun _ -> let offset_in:nat = ( va_get_reg64 rRdx va_old_s ) `op_Division` 6 - 1 in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2268 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_Encrypt_save_and_shuffle_output offset_in out_b ) ( va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2271 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_UpdateScratch scratch_b ) ( fun ( va_s: va_state ) _ -> va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2273 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_get_reg64 rRdx va_old_s - 6 >= 0 /\ va_get_reg64 rRdx va_old_s >= 0 /\ ( fun a_1906 ( s_1907: ( FStar.Seq.Base.seq a_1906 ) ) ( i_1908: Prims.nat ) ( j_1909: Prims.nat ) -> let j_1869:Prims.nat = j_1909 in Prims.b2t ( Prims.op_AmpAmp ( Prims.op_LessThanOrEqual i_1908 j_1869 ) ( Prims.op_LessThanOrEqual j_1869 ( FStar.Seq.Base.length #a_1906 s_1907 ) ) ) ) Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) ( va_get_reg64 rRdx va_old_s - 6 ) ( va_get_reg64 rRdx va_old_s ) ) ( fun _ -> let data = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) ( va_get_reg64 rRdx va_old_s - 6 ) ( va_get_reg64 rRdx va_old_s ) in let va_arg122:Vale.Math.Poly2_s.poly = Vale.Math.Poly2.Bits_s.of_quad32 ( va_get_xmm 8 va_s ) in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2274 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( fun ( _: unit ) -> Vale.Math.Poly2.lemma_add_zero va_arg122 ) ( va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2275 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_GhashUnroll6x hkeys_b scratch_b h_LE y_new' data ) ( fun ( va_s: va_state ) _ -> let y_new'':Vale.Def.Types_s.quad32 = Vale.Def.Types_s.reverse_bytes_quad32 ( va_get_xmm 8 va_s ) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2278 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_get_reg64 rRdx va_old_s - 6 >= 0 /\ ( fun a_1906 ( s_1907: ( FStar.Seq.Base.seq a_1906 ) ) ( i_1908: Prims.nat ) ( j_1909: Prims.nat ) -> let j_1869:Prims.nat = j_1909 in Prims.b2t ( Prims.op_AmpAmp ( Prims.op_LessThanOrEqual i_1908 j_1869 ) ( Prims.op_LessThanOrEqual j_1869 ( FStar.Seq.Base.length #a_1906 s_1907 ) ) ) ) Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) 0 ( va_get_reg64 rRdx va_old_s - 6 ) ) ( fun _ -> let va_arg121:( FStar.Seq.Base.seq Vale.Def.Types_s.quad32 ) = data in let va_arg120:( FStar.Seq.Base.seq Vale.Def.Types_s.quad32 ) = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) 0 ( va_get_reg64 rRdx va_old_s - 6 ) in let va_arg119:Vale.Def.Types_s.quad32 = h_LE in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2278 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( fun ( _: unit ) -> Vale.AES.GHash.lemma_ghash_incremental0_append va_arg119 y_orig y_new' y_new'' va_arg120 va_arg121 ) ( va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2280 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_get_reg64 rRdx va_old_s - 6 >= 0 /\ ( fun a_1906 ( s_1907: ( FStar.Seq.Base.seq a_1906 ) ) ( i_1908: Prims.nat ) ( j_1909: Prims.nat ) -> let j_1869:Prims.nat = j_1909 in Prims.b2t ( Prims.op_AmpAmp ( Prims.op_LessThanOrEqual i_1908 j_1869 ) ( Prims.op_LessThanOrEqual j_1869 ( FStar.Seq.Base.length #a_1906 s_1907 ) ) ) ) Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) 0 ( va_get_reg64 rRdx va_old_s - 6 ) ) ( fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 2280 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( FStar.Seq.Base.equal #Vale.X64.Decls.quad32 ( FStar.Seq.Base.append #Vale.X64.Decls.quad32 ( FStar.Seq.Base.slice #Vale.X64.Decls.quad32 ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) 0 ( va_get_reg64 rRdx va_old_s - 6 ) ) data ) ( Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b ) ) ( va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2286 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( 12 + mid_len - 6 >= 0 /\ 12 + mid_len - 6 <= 4294967295 ) ( fun _ -> let va_arg118:Vale.Def.Types_s.quad32 = ctr_BE in let va_arg117:( FStar.Seq.Base.seq Vale.Def.Types_s.nat32 ) = key_words in let va_arg116:( FStar.Seq.Base.seq Vale.Def.Types_s.quad32 ) = Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b in let va_arg115:( FStar.Seq.Base.seq Vale.Def.Types_s.quad32 ) = out_snapshot in let va_arg114:( FStar.Seq.Base.seq Vale.Def.Types_s.quad32 ) = Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_old_s ) in_b in let va_arg113:( FStar.Seq.Base.seq Vale.Def.Types_s.quad32 ) = Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_old_s ) in_b in let va_arg112:Vale.Def.Types_s.nat32 = 12 + mid_len - 6 in let va_arg111:Vale.AES.AES_common_s.algorithm = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2286 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( fun ( _: unit ) -> Vale.AES.GCTR.gctr_partial_opaque_ignores_postfix va_arg111 va_arg112 va_arg113 va_arg114 va_arg115 va_arg116 va_arg117 va_arg118 ) ( let va_arg110:Vale.Def.Types_s.quad32 = ctr_BE in let va_arg109:( FStar.Seq.Base.seq Vale.Def.Types_s.nat32 ) = key_words in let va_arg108:( FStar.Seq.Base.seq Vale.Def.Types_s.quad32 ) = Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_s ) out_b in let va_arg107:( FStar.Seq.Base.seq Vale.Def.Types_s.quad32 ) = Vale.X64.Decls.s128 ( va_get_mem_heaplet 6 va_old_s ) in_b in let va_arg106:Prims.nat = 12 + mid_len - 6 in let va_arg105:Vale.AES.AES_common_s.algorithm = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2287 column 29 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( fun ( _: unit ) -> Vale.AES.GCTR.gctr_partial_extend6 va_arg105 va_arg106 va_arg107 va_arg108 va_arg109 va_arg110 ) ( va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2289 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ( va_quick_Sub64 ( va_op_dst_opr64_reg64 rRcx ) ( va_const_opr64 128 ) ) ( va_QEmpty ( () ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) )) )))))))))))) )))))) (fun (va_s: va_state) va_g -> va_QEmpty (()))))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_req_Fsqr2

val va_req_Fsqr2 (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b: buffer64) : prop

let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 12, "end_line": 1149, "start_col": 0, "start_line": 1138 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fsqr val va_code_Fsqr : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr ())) = (va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b)) //-- //-- Fsqr_stdcall val va_code_Fsqr_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr_stdcall win)) = (va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b)) //-- //-- Fsqr2 val va_code_Fsqr2 : va_dummy:unit -> Tot va_code

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

va_b0: Vale.X64.Decls.va_code -> va_s0: Vale.X64.Decls.va_state -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Decls.va_code", "Vale.X64.Decls.va_state", "Vale.X64.Memory.buffer64", "Prims.l_and", "Vale.X64.Decls.va_require_total", "Vale.Curve25519.X64.FastWide.va_code_Fsqr2", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Vale.X64.CPU_Features_s.adx_enabled", "Vale.X64.CPU_Features_s.bmi2_enabled", "Vale.X64.Memory.is_initial_heap", "Vale.X64.Decls.va_get_mem_layout", "Vale.X64.Decls.va_get_mem", "Prims.l_or", "Vale.X64.Decls.buffers_disjoint", "Prims.eq2", "Vale.X64.Decls.validDstAddrs64", "Vale.Arch.HeapTypes_s.Secret", "Vale.X64.Decls.validSrcAddrs64", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rR12", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdi", "Prims.prop" ]

[]

false

true

let va_req_Fsqr2 (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b: buffer64) : prop =

(va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in let inA_in:nat64 = va_get_reg64 rRsi va_s0 in let dst_in:nat64 = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_req_Fmul2_stdcall

val va_req_Fmul2_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) : prop

let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 47, "end_line": 590, "start_col": 0, "start_line": 572 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

va_b0: Vale.X64.Decls.va_code -> va_s0: Vale.X64.Decls.va_state -> win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> inB_b: Vale.X64.Memory.buffer64 -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Decls.va_code", "Vale.X64.Decls.va_state", "Prims.bool", "Vale.X64.Memory.buffer64", "Prims.l_and", "Vale.X64.Decls.va_require_total", "Vale.Curve25519.X64.FastWide.va_code_Fmul2_stdcall", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Prims.eq2", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rRsp", "Vale.X64.Stack_i.init_rsp", "Vale.X64.Decls.va_get_stack", "Vale.X64.Memory.is_initial_heap", "Vale.X64.Decls.va_get_mem_layout", "Vale.X64.Decls.va_get_mem", "Vale.X64.CPU_Features_s.adx_enabled", "Vale.X64.CPU_Features_s.bmi2_enabled", "Prims.l_or", "Vale.X64.Decls.buffers_disjoint", "Vale.X64.Decls.validDstAddrs64", "Vale.Arch.HeapTypes_s.Secret", "Vale.X64.Decls.validSrcAddrs64", "Vale.X64.Decls.va_int_range", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdi", "Prims.prop" ]

[]

false

true

let va_req_Fmul2_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) : prop =

(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let tmp_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let inB_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_quick_Fmul2_stdcall

val va_quick_Fmul2_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win))

let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 66, "end_line": 814, "start_col": 0, "start_line": 807 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> inB_b: Vale.X64.Memory.buffer64 -> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.Curve25519.X64.FastWide.va_code_Fmul2_stdcall win)

Prims.Tot

[ "total" ]

[]

[ "Prims.bool", "Vale.X64.Memory.buffer64", "Vale.X64.QuickCode.va_QProc", "Prims.unit", "Vale.Curve25519.X64.FastWide.va_code_Fmul2_stdcall", "Prims.Cons", "Vale.X64.QuickCode.mod_t", "Vale.X64.QuickCode.va_Mod_stackTaint", "Vale.X64.QuickCode.va_Mod_stack", "Vale.X64.QuickCode.va_Mod_mem_layout", "Vale.X64.QuickCode.va_Mod_mem_heaplet", "Vale.X64.QuickCode.va_Mod_flags", "Vale.X64.QuickCode.va_Mod_reg64", "Vale.X64.Machine_s.rR15", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRsp", "Vale.X64.Machine_s.rRbp", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRax", "Vale.X64.QuickCode.va_Mod_mem", "Prims.Nil", "Vale.Curve25519.X64.FastWide.va_wp_Fmul2_stdcall", "Vale.Curve25519.X64.FastWide.va_wpProof_Fmul2_stdcall", "Vale.X64.QuickCode.va_quickCode" ]

[]

false

let va_quick_Fmul2_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =

(va_QProc (va_code_Fmul2_stdcall win) ([ va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem ]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_wp_Fsqr2

val va_wp_Fsqr2 (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0

let va_wp_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 70, "end_line": 1272, "start_col": 0, "start_line": 1229 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fsqr val va_code_Fsqr : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr ())) = (va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b)) //-- //-- Fsqr_stdcall val va_code_Fsqr_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr_stdcall win)) = (va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b)) //-- //-- Fsqr2 val va_code_Fsqr2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> va_s0: Vale.X64.Decls.va_state -> va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0) -> Type0

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Memory.buffer64", "Vale.X64.Decls.va_state", "Prims.unit", "Prims.l_and", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Vale.X64.CPU_Features_s.adx_enabled", "Vale.X64.CPU_Features_s.bmi2_enabled", "Vale.X64.Memory.is_initial_heap", "Vale.X64.Decls.va_get_mem_layout", "Vale.X64.Decls.va_get_mem", "Prims.l_or", "Vale.X64.Decls.buffers_disjoint", "Prims.eq2", "Vale.X64.Decls.validDstAddrs64", "Vale.Arch.HeapTypes_s.Secret", "Vale.X64.Decls.validSrcAddrs64", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rR12", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdi", "Prims.l_Forall", "Vale.X64.InsBasic.vale_heap", "Vale.X64.Memory.nat64", "Vale.X64.Flags.t", "Vale.Arch.HeapImpl.vale_heap_layout", "Prims.l_imp", "Prims.int", "Prims.op_Modulus", "Vale.Curve25519.Fast_defs.prime", "Vale.X64.Decls.va_mul_nat", "Vale.Def.Types_s.nat64", "Vale.X64.Decls.modifies_buffer_2", "Prims.nat", "Vale.Curve25519.Fast_defs.pow2_four", "Vale.X64.Decls.buffer64_read", "Prims.op_Addition", "Vale.X64.State.vale_state", "Vale.X64.Decls.va_upd_mem_layout", "Vale.X64.Decls.va_upd_mem_heaplet", "Vale.X64.Decls.va_upd_flags", "Vale.X64.Decls.va_upd_reg64", "Vale.X64.Machine_s.rR15", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRax", "Vale.X64.Decls.va_upd_mem" ]

[]

false

true

let va_wp_Fsqr2 (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =

(va_get_ok va_s0 /\ (let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in let inA_in:nat64 = va_get_reg64 rRsi va_s0 in let dst_in:nat64 = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem: vale_heap) (va_x_rax: nat64) (va_x_rbx: nat64) (va_x_rcx: nat64) (va_x_rdx: nat64) (va_x_rdi: nat64) (va_x_rsi: nat64) (va_x_r8: nat64) (va_x_r9: nat64) (va_x_r10: nat64) (va_x_r11: nat64) (va_x_r13: nat64) (va_x_r14: nat64) (va_x_r15: nat64) (va_x_efl: Vale.X64.Flags.t) (va_x_heap0: vale_heap) (va_x_memLayout: vale_heap_layout). let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))) )))))))))))) in va_get_ok va_sM /\ (let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in let inA_in:nat64 = va_get_reg64 rRsi va_s0 in let dst_in:nat64 = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\ d' `op_Modulus` prime == (va_mul_nat a' a') `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_wp_Fmul_stdcall

val va_wp_Fmul_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0

let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 21, "end_line": 355, "start_col": 0, "start_line": 293 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> inB_b: Vale.X64.Memory.buffer64 -> va_s0: Vale.X64.Decls.va_state -> va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0) -> Type0

Prims.Tot

[ "total" ]

[]

[ "Prims.bool", "Vale.X64.Memory.buffer64", "Vale.X64.Decls.va_state", "Prims.unit", "Prims.l_and", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Prims.eq2", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rRsp", "Vale.X64.Stack_i.init_rsp", "Vale.X64.Decls.va_get_stack", "Vale.X64.Memory.is_initial_heap", "Vale.X64.Decls.va_get_mem_layout", "Vale.X64.Decls.va_get_mem", "Vale.X64.CPU_Features_s.adx_enabled", "Vale.X64.CPU_Features_s.bmi2_enabled", "Prims.l_or", "Vale.X64.Decls.buffers_disjoint", "Vale.X64.Decls.validDstAddrs64", "Vale.Arch.HeapTypes_s.Secret", "Vale.X64.Decls.validSrcAddrs64", "Vale.X64.Decls.va_int_range", "Vale.X64.Decls.va_if", "Vale.Def.Types_s.nat64", "Vale.X64.Machine_s.rR9", "Prims.l_not", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdi", "Prims.l_Forall", "Vale.X64.InsBasic.vale_heap", "Vale.X64.Memory.nat64", "Vale.X64.Flags.t", "Vale.Arch.HeapImpl.vale_heap_layout", "Vale.X64.InsBasic.vale_stack", "Vale.X64.Memory.memtaint", "Prims.l_imp", "Prims.int", "Prims.op_Modulus", "Vale.Curve25519.Fast_defs.prime", "Vale.X64.Decls.va_mul_nat", "Vale.X64.Decls.modifies_buffer_2", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRbp", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR15", "Prims.nat", "Vale.Curve25519.Fast_defs.pow2_four", "Vale.X64.Decls.buffer64_read", "Vale.X64.State.vale_state", "Vale.X64.Decls.va_upd_stackTaint", "Vale.X64.Decls.va_upd_stack", "Vale.X64.Decls.va_upd_mem_layout", "Vale.X64.Decls.va_upd_mem_heaplet", "Vale.X64.Decls.va_upd_flags", "Vale.X64.Decls.va_upd_reg64", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rRax", "Vale.X64.Decls.va_upd_mem" ]

[]

false

true

let va_wp_Fmul_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =

(va_get_ok va_s0 /\ (let tmp_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let inB_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem: vale_heap) (va_x_rax: nat64) (va_x_rbx: nat64) (va_x_rcx: nat64) (va_x_rdx: nat64) (va_x_rsi: nat64) (va_x_rdi: nat64) (va_x_rbp: nat64) (va_x_rsp: nat64) (va_x_r8: nat64) (va_x_r9: nat64) (va_x_r10: nat64) (va_x_r11: nat64) (va_x_r13: nat64) (va_x_r14: nat64) (va_x_r15: nat64) (va_x_efl: Vale.X64.Flags.t) (va_x_heap0: vale_heap) (va_x_memLayout: vale_heap_layout) (va_x_stack: vale_stack) (va_x_stackTaint: memtaint). let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))) ))))))))))))))) in va_get_ok va_sM /\ (let tmp_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let inB_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == (va_mul_nat a b) `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))

false

Steel.ST.GhostHigherReference.fst

Steel.ST.GhostHigherReference.reveal_ref

val reveal_ref (#a: Type u#1) (r: ref a) : GTot (Steel.ST.HigherReference.ref a)

let reveal_ref r = r.reveal

{ "file_name": "lib/steel/Steel.ST.GhostHigherReference.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 27, "end_line": 23, "start_col": 0, "start_line": 23 }

module Steel.ST.GhostHigherReference // needed because I need to know that `Steel.ST.HigherReference.ref a` // can be turned into `Steel.HigherReference.ref a` friend Steel.ST.HigherReference module RST = Steel.ST.HigherReference module R = Steel.HigherReference module STC = Steel.ST.Coercions // FIXME: WHY WHY WHY in `Ghost.reveal (ref a)` is `a` not strictly positive? [@@erasable] noeq type ref' ([@@@strictly_positive] a : Type u#1) : Type0 = | Hide: (reveal: R.ref a) -> ref' a let ref a = ref' a let pts_to r p v = RST.pts_to r.reveal p v

{ "checked_file": "/", "dependencies": [ "Steel.ST.HigherReference.fst.checked", "Steel.ST.Coercions.fsti.checked", "Steel.HigherReference.fsti.checked", "prims.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Steel.ST.GhostHigherReference.fst" }

[ { "abbrev": true, "full_module": "Steel.ST.Coercions", "short_module": "STC" }, { "abbrev": true, "full_module": "Steel.HigherReference", "short_module": "R" }, { "abbrev": true, "full_module": "Steel.ST.HigherReference", "short_module": "RST" }, { "abbrev": false, "full_module": "Steel.ST.Util", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

r: Steel.ST.GhostHigherReference.ref a -> Prims.GTot (Steel.ST.HigherReference.ref a)

Prims.GTot

[ "sometrivial" ]

[]

[ "Steel.ST.GhostHigherReference.ref", "Steel.ST.GhostHigherReference.__proj__Hide__item__reveal", "Steel.ST.HigherReference.ref" ]

[]

false

let reveal_ref r =

r.reveal

false

Steel.ST.GhostHigherReference.fst

Steel.ST.GhostHigherReference.pts_to

val pts_to (#a:Type) (r:ref a) ([@@@smt_fallback] p:perm) ([@@@smt_fallback] v:a) : vprop

let pts_to r p v = RST.pts_to r.reveal p v

{ "file_name": "lib/steel/Steel.ST.GhostHigherReference.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 42, "end_line": 21, "start_col": 0, "start_line": 21 }

module Steel.ST.GhostHigherReference // needed because I need to know that `Steel.ST.HigherReference.ref a` // can be turned into `Steel.HigherReference.ref a` friend Steel.ST.HigherReference module RST = Steel.ST.HigherReference module R = Steel.HigherReference module STC = Steel.ST.Coercions // FIXME: WHY WHY WHY in `Ghost.reveal (ref a)` is `a` not strictly positive? [@@erasable] noeq type ref' ([@@@strictly_positive] a : Type u#1) : Type0 = | Hide: (reveal: R.ref a) -> ref' a let ref a = ref' a

{ "checked_file": "/", "dependencies": [ "Steel.ST.HigherReference.fst.checked", "Steel.ST.Coercions.fsti.checked", "Steel.HigherReference.fsti.checked", "prims.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Steel.ST.GhostHigherReference.fst" }

[ { "abbrev": true, "full_module": "Steel.ST.Coercions", "short_module": "STC" }, { "abbrev": true, "full_module": "Steel.HigherReference", "short_module": "R" }, { "abbrev": true, "full_module": "Steel.ST.HigherReference", "short_module": "RST" }, { "abbrev": false, "full_module": "Steel.ST.Util", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

r: Steel.ST.GhostHigherReference.ref a -> p: Steel.FractionalPermission.perm -> v: a -> Steel.Effect.Common.vprop

Prims.Tot

[ "total" ]

[]

[ "Steel.ST.GhostHigherReference.ref", "Steel.FractionalPermission.perm", "Steel.ST.HigherReference.pts_to", "Steel.ST.GhostHigherReference.__proj__Hide__item__reveal", "Steel.Effect.Common.vprop" ]

[]

false

true

false

let pts_to r p v =

RST.pts_to r.reveal p v

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_ens_Fsqr2

val va_ens_Fsqr2 (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b: buffer64) (va_sM: va_state) (va_fM: va_fuel) : prop

let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 69, "end_line": 1182, "start_col": 0, "start_line": 1150 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fsqr val va_code_Fsqr : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr ())) = (va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b)) //-- //-- Fsqr_stdcall val va_code_Fsqr_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr_stdcall win)) = (va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b)) //-- //-- Fsqr2 val va_code_Fsqr2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

va_b0: Vale.X64.Decls.va_code -> va_s0: Vale.X64.Decls.va_state -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> va_sM: Vale.X64.Decls.va_state -> va_fM: Vale.X64.Decls.va_fuel -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Decls.va_code", "Vale.X64.Decls.va_state", "Vale.X64.Memory.buffer64", "Vale.X64.Decls.va_fuel", "Prims.l_and", "Vale.Curve25519.X64.FastWide.va_req_Fsqr2", "Vale.X64.Decls.va_ensure_total", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Prims.eq2", "Prims.int", "Prims.op_Modulus", "Vale.Curve25519.Fast_defs.prime", "Vale.X64.Decls.va_mul_nat", "Vale.Def.Types_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rR12", "Vale.X64.Decls.modifies_buffer_2", "Vale.X64.Decls.va_get_mem", "Prims.nat", "Vale.Curve25519.Fast_defs.pow2_four", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.buffer64_read", "Prims.op_Addition", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdi", "Vale.X64.Decls.va_state_eq", "Vale.X64.Decls.va_update_mem_layout", "Vale.X64.Decls.va_update_mem_heaplet", "Vale.X64.Decls.va_update_flags", "Vale.X64.Decls.va_update_reg64", "Vale.X64.Machine_s.rR15", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRax", "Vale.X64.Decls.va_update_ok", "Vale.X64.Decls.va_update_mem", "Prims.prop" ]

[]

false

true

let va_ens_Fsqr2 (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b: buffer64) (va_sM: va_state) (va_fM: va_fuel) : prop =

(va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in let inA_in:nat64 = va_get_reg64 rRsi va_s0 in let dst_in:nat64 = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\ d' `op_Modulus` prime == (va_mul_nat a' a') `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)) )))))))))))))))))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_ens_Fmul2_stdcall

val va_ens_Fmul2_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) (va_sM: va_state) (va_fM: va_fuel) : prop

let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 73, "end_line": 644, "start_col": 0, "start_line": 591 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

va_b0: Vale.X64.Decls.va_code -> va_s0: Vale.X64.Decls.va_state -> win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> inB_b: Vale.X64.Memory.buffer64 -> va_sM: Vale.X64.Decls.va_state -> va_fM: Vale.X64.Decls.va_fuel -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Decls.va_code", "Vale.X64.Decls.va_state", "Prims.bool", "Vale.X64.Memory.buffer64", "Vale.X64.Decls.va_fuel", "Prims.l_and", "Vale.Curve25519.X64.FastWide.va_req_Fmul2_stdcall", "Vale.X64.Decls.va_ensure_total", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Prims.eq2", "Prims.int", "Prims.op_Modulus", "Vale.Curve25519.Fast_defs.prime", "Vale.X64.Decls.va_mul_nat", "Vale.X64.Decls.modifies_buffer_2", "Vale.X64.Decls.va_get_mem", "Prims.l_imp", "Vale.Def.Types_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRbp", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRsp", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR15", "Prims.l_not", "Prims.nat", "Vale.Curve25519.Fast_defs.pow2_four", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.buffer64_read", "Prims.op_Addition", "Vale.X64.Decls.va_int_range", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRdx", "Vale.X64.Decls.va_state_eq", "Vale.X64.Decls.va_update_stackTaint", "Vale.X64.Decls.va_update_stack", "Vale.X64.Decls.va_update_mem_layout", "Vale.X64.Decls.va_update_mem_heaplet", "Vale.X64.Decls.va_update_flags", "Vale.X64.Decls.va_update_reg64", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rRax", "Vale.X64.Decls.va_update_ok", "Vale.X64.Decls.va_update_mem", "Prims.prop" ]

[]

false

true

let va_ens_Fmul2_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) (va_sM: va_state) (va_fM: va_fuel) : prop =

(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let tmp_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let inB_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == (va_mul_nat a b) `op_Modulus` prime /\ d' `op_Modulus` prime == (va_mul_nat a' b') `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))) ))))))))))))))))))))

false

Steel.ST.GhostHigherReference.fst

Steel.ST.GhostHigherReference.ref

val ref ([@@@ strictly_positive] a:Type u#1) : Type0

let ref a = ref' a

{ "file_name": "lib/steel/Steel.ST.GhostHigherReference.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 18, "end_line": 19, "start_col": 0, "start_line": 19 }

module Steel.ST.GhostHigherReference // needed because I need to know that `Steel.ST.HigherReference.ref a` // can be turned into `Steel.HigherReference.ref a` friend Steel.ST.HigherReference module RST = Steel.ST.HigherReference module R = Steel.HigherReference module STC = Steel.ST.Coercions // FIXME: WHY WHY WHY in `Ghost.reveal (ref a)` is `a` not strictly positive? [@@erasable] noeq type ref' ([@@@strictly_positive] a : Type u#1) : Type0 = | Hide: (reveal: R.ref a) -> ref' a

{ "checked_file": "/", "dependencies": [ "Steel.ST.HigherReference.fst.checked", "Steel.ST.Coercions.fsti.checked", "Steel.HigherReference.fsti.checked", "prims.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Steel.ST.GhostHigherReference.fst" }

[ { "abbrev": true, "full_module": "Steel.ST.Coercions", "short_module": "STC" }, { "abbrev": true, "full_module": "Steel.HigherReference", "short_module": "R" }, { "abbrev": true, "full_module": "Steel.ST.HigherReference", "short_module": "RST" }, { "abbrev": false, "full_module": "Steel.ST.Util", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Type -> Type0

Prims.Tot

[ "total" ]

[]

[ "Steel.ST.GhostHigherReference.ref'" ]

[]

false

true

let ref a =

ref' a

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_quick_Fsqr_stdcall

val va_quick_Fsqr_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr_stdcall win))

let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr_stdcall win)) = (va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 71, "end_line": 1131, "start_col": 0, "start_line": 1124 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fsqr val va_code_Fsqr : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr ())) = (va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b)) //-- //-- Fsqr_stdcall val va_code_Fsqr_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.Curve25519.X64.FastWide.va_code_Fsqr_stdcall win)

Prims.Tot

[ "total" ]

[]

[ "Prims.bool", "Vale.X64.Memory.buffer64", "Vale.X64.QuickCode.va_QProc", "Prims.unit", "Vale.Curve25519.X64.FastWide.va_code_Fsqr_stdcall", "Prims.Cons", "Vale.X64.QuickCode.mod_t", "Vale.X64.QuickCode.va_Mod_stackTaint", "Vale.X64.QuickCode.va_Mod_stack", "Vale.X64.QuickCode.va_Mod_mem_layout", "Vale.X64.QuickCode.va_Mod_mem_heaplet", "Vale.X64.QuickCode.va_Mod_flags", "Vale.X64.QuickCode.va_Mod_reg64", "Vale.X64.Machine_s.rR15", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR12", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRsp", "Vale.X64.Machine_s.rRbp", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRax", "Vale.X64.QuickCode.va_Mod_mem", "Prims.Nil", "Vale.Curve25519.X64.FastWide.va_wp_Fsqr_stdcall", "Vale.Curve25519.X64.FastWide.va_wpProof_Fsqr_stdcall", "Vale.X64.QuickCode.va_quickCode" ]

[]

false

let va_quick_Fsqr_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr_stdcall win)) =

(va_QProc (va_code_Fsqr_stdcall win) ([ va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem ]) (va_wp_Fsqr_stdcall win tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_ens_Fsqr_stdcall

val va_ens_Fsqr_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b: buffer64) (va_sM: va_state) (va_fM: va_fuel) : prop

let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 74, "end_line": 1002, "start_col": 0, "start_line": 966 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fsqr val va_code_Fsqr : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr ())) = (va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b)) //-- //-- Fsqr_stdcall val va_code_Fsqr_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

va_b0: Vale.X64.Decls.va_code -> va_s0: Vale.X64.Decls.va_state -> win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> va_sM: Vale.X64.Decls.va_state -> va_fM: Vale.X64.Decls.va_fuel -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Decls.va_code", "Vale.X64.Decls.va_state", "Prims.bool", "Vale.X64.Memory.buffer64", "Vale.X64.Decls.va_fuel", "Prims.l_and", "Vale.Curve25519.X64.FastWide.va_req_Fsqr_stdcall", "Vale.X64.Decls.va_ensure_total", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Prims.eq2", "Prims.int", "Prims.op_Modulus", "Vale.Curve25519.Fast_defs.prime", "Vale.X64.Decls.va_mul_nat", "Vale.X64.Decls.modifies_buffer_2", "Vale.X64.Decls.va_get_mem", "Prims.l_imp", "Vale.Def.Types_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRbp", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRsp", "Vale.X64.Machine_s.rR12", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR15", "Prims.l_not", "Prims.nat", "Vale.Curve25519.Fast_defs.pow2_four", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.buffer64_read", "Vale.X64.Decls.va_int_range", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRcx", "Vale.X64.Decls.va_state_eq", "Vale.X64.Decls.va_update_stackTaint", "Vale.X64.Decls.va_update_stack", "Vale.X64.Decls.va_update_mem_layout", "Vale.X64.Decls.va_update_mem_heaplet", "Vale.X64.Decls.va_update_flags", "Vale.X64.Decls.va_update_reg64", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rRax", "Vale.X64.Decls.va_update_ok", "Vale.X64.Decls.va_update_mem", "Prims.prop" ]

[]

false

true

let va_ens_Fsqr_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b: buffer64) (va_sM: va_state) (va_fM: va_fuel) : prop =

(va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let tmp_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0 )))))) ))))))))))))))))))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_quick_Fsqr

val va_quick_Fsqr (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr ()))

let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr ())) = (va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 40, "end_line": 943, "start_col": 0, "start_line": 937 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fsqr val va_code_Fsqr : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.Curve25519.X64.FastWide.va_code_Fsqr ())

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Memory.buffer64", "Vale.X64.QuickCode.va_QProc", "Prims.unit", "Vale.Curve25519.X64.FastWide.va_code_Fsqr", "Prims.Cons", "Vale.X64.QuickCode.mod_t", "Vale.X64.QuickCode.va_Mod_mem_layout", "Vale.X64.QuickCode.va_Mod_mem_heaplet", "Vale.X64.QuickCode.va_Mod_flags", "Vale.X64.QuickCode.va_Mod_reg64", "Vale.X64.Machine_s.rR15", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRax", "Vale.X64.QuickCode.va_Mod_mem", "Prims.Nil", "Vale.Curve25519.X64.FastWide.va_wp_Fsqr", "Vale.Curve25519.X64.FastWide.va_wpProof_Fsqr", "Vale.X64.QuickCode.va_quickCode" ]

[]

false

let va_quick_Fsqr (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr ())) =

(va_QProc (va_code_Fsqr ()) ([ va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem ]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_req_Fsqr_stdcall

val va_req_Fsqr_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b: buffer64) : prop

let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 12, "end_line": 965, "start_col": 0, "start_line": 950 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fsqr val va_code_Fsqr : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr ())) = (va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b)) //-- //-- Fsqr_stdcall val va_code_Fsqr_stdcall : win:bool -> Tot va_code

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

va_b0: Vale.X64.Decls.va_code -> va_s0: Vale.X64.Decls.va_state -> win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Decls.va_code", "Vale.X64.Decls.va_state", "Prims.bool", "Vale.X64.Memory.buffer64", "Prims.l_and", "Vale.X64.Decls.va_require_total", "Vale.Curve25519.X64.FastWide.va_code_Fsqr_stdcall", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Prims.eq2", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rRsp", "Vale.X64.Stack_i.init_rsp", "Vale.X64.Decls.va_get_stack", "Vale.X64.Memory.is_initial_heap", "Vale.X64.Decls.va_get_mem_layout", "Vale.X64.Decls.va_get_mem", "Vale.X64.CPU_Features_s.adx_enabled", "Vale.X64.CPU_Features_s.bmi2_enabled", "Prims.l_or", "Vale.X64.Decls.buffers_disjoint", "Vale.X64.Decls.validDstAddrs64", "Vale.Arch.HeapTypes_s.Secret", "Vale.X64.Decls.validSrcAddrs64", "Vale.X64.Decls.va_int_range", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRdi", "Prims.prop" ]

[]

false

true

let va_req_Fsqr_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b: buffer64) : prop =

(va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let tmp_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))

false

FStar.Algebra.CommMonoid.Fold.fst

FStar.Algebra.CommMonoid.Fold.fold

val fold (#c:_) (#eq:_) (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr: ifrom_ito a b -> c) : c

let rec fold #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr: (ifrom_ito a b) -> c) // some of the lemmas want (ensures (fun (x:c) -> ((nk = n0) ==> (x == expr nk)))) : Tot (c) (decreases b-a) = if b = a then expr b else (fold cm a (b-1) expr) `cm.mult` expr b

{ "file_name": "ulib/FStar.Algebra.CommMonoid.Fold.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 48, "end_line": 44, "start_col": 0, "start_line": 37 }

(* Copyright 2008-2022 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. Author: A. Rozanov *) module FStar.Algebra.CommMonoid.Fold module CE = FStar.Algebra.CommMonoid.Equiv open FStar.Seq.Base open FStar.Seq.Properties open FStar.Seq.Permutation open FStar.IntegerIntervals (* Here we define the notion for big sums and big products for arbitrary commutative monoids. We construct the folds from an integer range and a function, then calculate the fold -- a sum or a product, depending on the monoid operation. *) (* We refine multiplication a bit to make proofs smoothier *) open FStar.Mul

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Seq.Properties.fsti.checked", "FStar.Seq.Permutation.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.IntegerIntervals.fst.checked", "FStar.Algebra.CommMonoid.Equiv.fst.checked" ], "interface_file": true, "source_file": "FStar.Algebra.CommMonoid.Fold.fst" }

[ { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.IntegerIntervals", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Permutation", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Properties", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": true, "full_module": "FStar.Algebra.CommMonoid.Equiv", "short_module": "CE" }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.IntegerIntervals", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Permutation", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Properties", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": true, "full_module": "FStar.Algebra.CommMonoid.Equiv", "short_module": "CE" }, { "abbrev": false, "full_module": "FStar.Algebra.CommMonoid", "short_module": null }, { "abbrev": false, "full_module": "FStar.Algebra.CommMonoid", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

cm: FStar.Algebra.CommMonoid.Equiv.cm c eq -> a: Prims.int -> b: FStar.IntegerIntervals.not_less_than a -> expr: (_: FStar.IntegerIntervals.ifrom_ito a b -> c) -> Prims.Tot c

Prims.Tot

[ "", "total" ]

[]

[ "FStar.Algebra.CommMonoid.Equiv.equiv", "FStar.Algebra.CommMonoid.Equiv.cm", "Prims.int", "FStar.IntegerIntervals.not_less_than", "FStar.IntegerIntervals.ifrom_ito", "Prims.op_Equality", "Prims.bool", "FStar.Algebra.CommMonoid.Equiv.__proj__CM__item__mult", "FStar.Algebra.CommMonoid.Fold.fold", "Prims.op_Subtraction" ]

[ "recursion" ]

false

let rec fold #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr: ((ifrom_ito a b) -> c)) : Tot (c) (decreases b - a) =

if b = a then expr b else (fold cm a (b - 1) expr) `cm.mult` (expr b)

false

FStar.Algebra.CommMonoid.Fold.fst

FStar.Algebra.CommMonoid.Fold.fold_equality

val fold_equality (#c:_) (#eq:_) (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr1 expr2: (ifrom_ito a b) -> c) : Lemma (requires (forall (i: ifrom_ito a b). expr1 i == expr2 i)) (ensures fold cm a b expr1 == fold cm a b expr2)

let rec fold_equality #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr1 expr2: (ifrom_ito a b) -> c) : Lemma (requires (forall (i: ifrom_ito a b). expr1 i == expr2 i)) (ensures fold cm a b expr1 == fold cm a b expr2) (decreases b - a) = if b > a then fold_equality cm a (b - 1) expr1 expr2

{ "file_name": "ulib/FStar.Algebra.CommMonoid.Fold.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 54, "end_line": 52, "start_col": 0, "start_line": 46 }

(* Copyright 2008-2022 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. Author: A. Rozanov *) module FStar.Algebra.CommMonoid.Fold module CE = FStar.Algebra.CommMonoid.Equiv open FStar.Seq.Base open FStar.Seq.Properties open FStar.Seq.Permutation open FStar.IntegerIntervals (* Here we define the notion for big sums and big products for arbitrary commutative monoids. We construct the folds from an integer range and a function, then calculate the fold -- a sum or a product, depending on the monoid operation. *) (* We refine multiplication a bit to make proofs smoothier *) open FStar.Mul let rec fold #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr: (ifrom_ito a b) -> c) // some of the lemmas want (ensures (fun (x:c) -> ((nk = n0) ==> (x == expr nk)))) : Tot (c) (decreases b-a) = if b = a then expr b else (fold cm a (b-1) expr) `cm.mult` expr b

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Seq.Properties.fsti.checked", "FStar.Seq.Permutation.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.IntegerIntervals.fst.checked", "FStar.Algebra.CommMonoid.Equiv.fst.checked" ], "interface_file": true, "source_file": "FStar.Algebra.CommMonoid.Fold.fst" }

[ { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.IntegerIntervals", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Permutation", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Properties", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": true, "full_module": "FStar.Algebra.CommMonoid.Equiv", "short_module": "CE" }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.IntegerIntervals", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Permutation", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Properties", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": true, "full_module": "FStar.Algebra.CommMonoid.Equiv", "short_module": "CE" }, { "abbrev": false, "full_module": "FStar.Algebra.CommMonoid", "short_module": null }, { "abbrev": false, "full_module": "FStar.Algebra.CommMonoid", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

cm: FStar.Algebra.CommMonoid.Equiv.cm c eq -> a: Prims.int -> b: FStar.IntegerIntervals.not_less_than a -> expr1: (_: FStar.IntegerIntervals.ifrom_ito a b -> c) -> expr2: (_: FStar.IntegerIntervals.ifrom_ito a b -> c) -> FStar.Pervasives.Lemma (requires forall (i: FStar.IntegerIntervals.ifrom_ito a b). expr1 i == expr2 i) (ensures FStar.Algebra.CommMonoid.Fold.fold cm a b expr1 == FStar.Algebra.CommMonoid.Fold.fold cm a b expr2) (decreases b - a)

FStar.Pervasives.Lemma

[ "", "lemma" ]

[]

[ "FStar.Algebra.CommMonoid.Equiv.equiv", "FStar.Algebra.CommMonoid.Equiv.cm", "Prims.int", "FStar.IntegerIntervals.not_less_than", "FStar.IntegerIntervals.ifrom_ito", "Prims.op_GreaterThan", "FStar.Algebra.CommMonoid.Fold.fold_equality", "Prims.op_Subtraction", "Prims.bool", "Prims.unit", "Prims.l_Forall", "Prims.eq2", "Prims.squash", "FStar.Algebra.CommMonoid.Fold.fold", "Prims.Nil", "FStar.Pervasives.pattern" ]

[ "recursion" ]

false

true

false

let rec fold_equality #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr1: ((ifrom_ito a b) -> c)) (expr2: ((ifrom_ito a b) -> c)) : Lemma (requires (forall (i: ifrom_ito a b). expr1 i == expr2 i)) (ensures fold cm a b expr1 == fold cm a b expr2) (decreases b - a) =

if b > a then fold_equality cm a (b - 1) expr1 expr2

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_wp_Fmul2_stdcall

val va_wp_Fmul2_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0

let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 77, "end_line": 794, "start_col": 0, "start_line": 719 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> inB_b: Vale.X64.Memory.buffer64 -> va_s0: Vale.X64.Decls.va_state -> va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0) -> Type0

Prims.Tot

[ "total" ]

[]

[ "Prims.bool", "Vale.X64.Memory.buffer64", "Vale.X64.Decls.va_state", "Prims.unit", "Prims.l_and", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Prims.eq2", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rRsp", "Vale.X64.Stack_i.init_rsp", "Vale.X64.Decls.va_get_stack", "Vale.X64.Memory.is_initial_heap", "Vale.X64.Decls.va_get_mem_layout", "Vale.X64.Decls.va_get_mem", "Vale.X64.CPU_Features_s.adx_enabled", "Vale.X64.CPU_Features_s.bmi2_enabled", "Prims.l_or", "Vale.X64.Decls.buffers_disjoint", "Vale.X64.Decls.validDstAddrs64", "Vale.Arch.HeapTypes_s.Secret", "Vale.X64.Decls.validSrcAddrs64", "Vale.X64.Decls.va_int_range", "Vale.X64.Decls.va_if", "Vale.Def.Types_s.nat64", "Vale.X64.Machine_s.rR9", "Prims.l_not", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdi", "Prims.l_Forall", "Vale.X64.InsBasic.vale_heap", "Vale.X64.Memory.nat64", "Vale.X64.Flags.t", "Vale.Arch.HeapImpl.vale_heap_layout", "Vale.X64.InsBasic.vale_stack", "Vale.X64.Memory.memtaint", "Prims.l_imp", "Prims.int", "Prims.op_Modulus", "Vale.Curve25519.Fast_defs.prime", "Vale.X64.Decls.va_mul_nat", "Vale.X64.Decls.modifies_buffer_2", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRbp", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR15", "Prims.nat", "Vale.Curve25519.Fast_defs.pow2_four", "Vale.X64.Decls.buffer64_read", "Prims.op_Addition", "Vale.X64.State.vale_state", "Vale.X64.Decls.va_upd_stackTaint", "Vale.X64.Decls.va_upd_stack", "Vale.X64.Decls.va_upd_mem_layout", "Vale.X64.Decls.va_upd_mem_heaplet", "Vale.X64.Decls.va_upd_flags", "Vale.X64.Decls.va_upd_reg64", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rRax", "Vale.X64.Decls.va_upd_mem" ]

[]

false

true

let va_wp_Fmul2_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =

(va_get_ok va_s0 /\ (let tmp_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let inB_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem: vale_heap) (va_x_rax: nat64) (va_x_rbx: nat64) (va_x_rcx: nat64) (va_x_rdx: nat64) (va_x_rsi: nat64) (va_x_rdi: nat64) (va_x_rbp: nat64) (va_x_rsp: nat64) (va_x_r8: nat64) (va_x_r9: nat64) (va_x_r10: nat64) (va_x_r11: nat64) (va_x_r13: nat64) (va_x_r14: nat64) (va_x_r15: nat64) (va_x_efl: Vale.X64.Flags.t) (va_x_heap0: vale_heap) (va_x_memLayout: vale_heap_layout) (va_x_stack: vale_stack) (va_x_stackTaint: memtaint). let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))) ))))))))))))))) in va_get_ok va_sM /\ (let tmp_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let inB_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == (va_mul_nat a b) `op_Modulus` prime /\ d' `op_Modulus` prime == (va_mul_nat a' b') `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_quick_Fsqr2

val va_quick_Fsqr2 (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr2 ()))

let va_quick_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr2 ())) = (va_QProc (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr2 tmp_b inA_b dst_b) (va_wpProof_Fsqr2 tmp_b inA_b dst_b))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 48, "end_line": 1290, "start_col": 0, "start_line": 1284 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fsqr val va_code_Fsqr : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr ())) = (va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b)) //-- //-- Fsqr_stdcall val va_code_Fsqr_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr_stdcall win)) = (va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b)) //-- //-- Fsqr2 val va_code_Fsqr2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr2 tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.Curve25519.X64.FastWide.va_code_Fsqr2 ())

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Memory.buffer64", "Vale.X64.QuickCode.va_QProc", "Prims.unit", "Vale.Curve25519.X64.FastWide.va_code_Fsqr2", "Prims.Cons", "Vale.X64.QuickCode.mod_t", "Vale.X64.QuickCode.va_Mod_mem_layout", "Vale.X64.QuickCode.va_Mod_mem_heaplet", "Vale.X64.QuickCode.va_Mod_flags", "Vale.X64.QuickCode.va_Mod_reg64", "Vale.X64.Machine_s.rR15", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRax", "Vale.X64.QuickCode.va_Mod_mem", "Prims.Nil", "Vale.Curve25519.X64.FastWide.va_wp_Fsqr2", "Vale.Curve25519.X64.FastWide.va_wpProof_Fsqr2", "Vale.X64.QuickCode.va_quickCode" ]

[]

false

let va_quick_Fsqr2 (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr2 ())) =

(va_QProc (va_code_Fsqr2 ()) ([ va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem ]) (va_wp_Fsqr2 tmp_b inA_b dst_b) (va_wpProof_Fsqr2 tmp_b inA_b dst_b))

false

FStar.Algebra.CommMonoid.Fold.fst

FStar.Algebra.CommMonoid.Fold.fold_offset_irrelevance_lemma

val fold_offset_irrelevance_lemma (#c:_) (#eq:_) (cm: CE.cm c eq) (m0: int) (mk: not_less_than m0) (expr1 : ifrom_ito m0 mk -> c) (n0: int) (nk: not_less_than n0) (expr2 : ifrom_ito n0 nk -> c) : Lemma (requires (((mk-m0) = (nk-n0)) /\ (forall (i:under (closed_interval_size m0 mk)). expr1 (i+m0) == expr2 (i+n0)))) (ensures fold cm m0 mk expr1 == fold cm n0 nk expr2)

let rec fold_offset_irrelevance_lemma #c #eq (cm: CE.cm c eq) (m0: int) (mk: not_less_than m0) (expr1 : ifrom_ito m0 mk -> c) (n0: int) (nk: not_less_than n0) (expr2 : ifrom_ito n0 nk -> c) : Lemma (requires (((mk-m0) = (nk-n0)) /\ (forall (i:under (closed_interval_size m0 mk)). expr1 (i+m0) == expr2 (i+n0)))) (ensures fold cm m0 mk expr1 == fold cm n0 nk expr2) (decreases (mk-m0)) = if (mk>m0 && nk>n0) then ( fold_offset_irrelevance_lemma cm m0 (mk-1) expr1 n0 (nk-1) expr2; assert (expr1 ((mk-m0)+m0) == expr2 ((nk-n0)+n0)) ) else if (mk=m0) then ( eq.reflexivity (expr1 m0); assert (expr1 (0+m0) == expr2 (0+n0)); assert (expr1 m0 == expr2 n0) )

{ "file_name": "ulib/FStar.Algebra.CommMonoid.Fold.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 3, "end_line": 112, "start_col": 0, "start_line": 97 }

(* Copyright 2008-2022 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. Author: A. Rozanov *) module FStar.Algebra.CommMonoid.Fold module CE = FStar.Algebra.CommMonoid.Equiv open FStar.Seq.Base open FStar.Seq.Properties open FStar.Seq.Permutation open FStar.IntegerIntervals (* Here we define the notion for big sums and big products for arbitrary commutative monoids. We construct the folds from an integer range and a function, then calculate the fold -- a sum or a product, depending on the monoid operation. *) (* We refine multiplication a bit to make proofs smoothier *) open FStar.Mul let rec fold #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr: (ifrom_ito a b) -> c) // some of the lemmas want (ensures (fun (x:c) -> ((nk = n0) ==> (x == expr nk)))) : Tot (c) (decreases b-a) = if b = a then expr b else (fold cm a (b-1) expr) `cm.mult` expr b let rec fold_equality #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr1 expr2: (ifrom_ito a b) -> c) : Lemma (requires (forall (i: ifrom_ito a b). expr1 i == expr2 i)) (ensures fold cm a b expr1 == fold cm a b expr2) (decreases b - a) = if b > a then fold_equality cm a (b - 1) expr1 expr2 let fold_singleton_lemma #c #eq cm a expr : Lemma (fold #c #eq cm a a expr == expr a) = () let fold_snoc_decomposition #c #eq (cm: CE.cm c eq) a b expr : Lemma (fold cm a b expr == fold cm a (b-1) expr `cm.mult` (expr b)) = () let rec fold_equals_seq_foldm #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr: (ifrom_ito a b) -> c) : Lemma (ensures fold cm a b expr `eq.eq` foldm_snoc cm (init (closed_interval_size a b) (init_func_from_expr expr a b))) (decreases b-a) = if (b=a) then let ts = init (closed_interval_size a b) (init_func_from_expr expr a b) in lemma_eq_elim (create 1 (expr b)) ts; foldm_snoc_singleton cm (expr b); eq.symmetry (foldm_snoc cm ts) (expr b); eq.reflexivity (expr b); eq.transitivity (fold cm a b expr) (expr b) (foldm_snoc cm ts) else let lhs = fold cm a b expr in let subexpr : ifrom_ito a (b-1) -> c = expr in let fullseq = init (b+1-a) (init_func_from_expr expr a b) in let rhs = foldm_snoc cm fullseq in let subseq = init (b-a) (init_func_from_expr subexpr a (b-1)) in let subsum = fold cm a (b-1) expr in let subfold = foldm_snoc cm subseq in let last = expr b in let op = cm.mult in fold_equals_seq_foldm cm a (b-1) subexpr; cm.commutativity last subfold; eq.reflexivity last; cm.congruence subsum last subfold last; foldm_snoc_decomposition cm fullseq; lemma_eq_elim subseq (fst (un_snoc fullseq)); eq.symmetry rhs (subfold `op` last); eq.transitivity lhs (subfold `op` last) rhs (* I keep the argument types explicitly stated here because it makes

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Seq.Properties.fsti.checked", "FStar.Seq.Permutation.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.IntegerIntervals.fst.checked", "FStar.Algebra.CommMonoid.Equiv.fst.checked" ], "interface_file": true, "source_file": "FStar.Algebra.CommMonoid.Fold.fst" }

[ { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.IntegerIntervals", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Permutation", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Properties", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": true, "full_module": "FStar.Algebra.CommMonoid.Equiv", "short_module": "CE" }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.IntegerIntervals", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Permutation", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Properties", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": true, "full_module": "FStar.Algebra.CommMonoid.Equiv", "short_module": "CE" }, { "abbrev": false, "full_module": "FStar.Algebra.CommMonoid", "short_module": null }, { "abbrev": false, "full_module": "FStar.Algebra.CommMonoid", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

cm: FStar.Algebra.CommMonoid.Equiv.cm c eq -> m0: Prims.int -> mk: FStar.IntegerIntervals.not_less_than m0 -> expr1: (_: FStar.IntegerIntervals.ifrom_ito m0 mk -> c) -> n0: Prims.int -> nk: FStar.IntegerIntervals.not_less_than n0 -> expr2: (_: FStar.IntegerIntervals.ifrom_ito n0 nk -> c) -> FStar.Pervasives.Lemma (requires mk - m0 = nk - n0 /\ (forall (i: FStar.IntegerIntervals.under (FStar.IntegerIntervals.closed_interval_size m0 mk)). expr1 (i + m0) == expr2 (i + n0))) (ensures FStar.Algebra.CommMonoid.Fold.fold cm m0 mk expr1 == FStar.Algebra.CommMonoid.Fold.fold cm n0 nk expr2) (decreases mk - m0)

FStar.Pervasives.Lemma

[ "", "lemma" ]

[]

[ "FStar.Algebra.CommMonoid.Equiv.equiv", "FStar.Algebra.CommMonoid.Equiv.cm", "Prims.int", "FStar.IntegerIntervals.not_less_than", "FStar.IntegerIntervals.ifrom_ito", "Prims.op_AmpAmp", "Prims.op_GreaterThan", "Prims._assert", "Prims.eq2", "Prims.op_Addition", "Prims.op_Subtraction", "Prims.unit", "FStar.Algebra.CommMonoid.Fold.fold_offset_irrelevance_lemma", "Prims.bool", "Prims.op_Equality", "FStar.Algebra.CommMonoid.Equiv.__proj__EQ__item__reflexivity", "Prims.l_and", "Prims.b2t", "Prims.l_Forall", "FStar.IntegerIntervals.under", "FStar.IntegerIntervals.closed_interval_size", "Prims.squash", "FStar.Algebra.CommMonoid.Fold.fold", "Prims.Nil", "FStar.Pervasives.pattern" ]

[ "recursion" ]

false

true

false

let rec fold_offset_irrelevance_lemma #c #eq (cm: CE.cm c eq) (m0: int) (mk: not_less_than m0) (expr1: (ifrom_ito m0 mk -> c)) (n0: int) (nk: not_less_than n0) (expr2: (ifrom_ito n0 nk -> c)) : Lemma (requires (((mk - m0) = (nk - n0)) /\ (forall (i: under (closed_interval_size m0 mk)). expr1 (i + m0) == expr2 (i + n0)))) (ensures fold cm m0 mk expr1 == fold cm n0 nk expr2) (decreases (mk - m0)) =

if (mk > m0 && nk > n0) then (fold_offset_irrelevance_lemma cm m0 (mk - 1) expr1 n0 (nk - 1) expr2; assert (expr1 ((mk - m0) + m0) == expr2 ((nk - n0) + n0))) else if (mk = m0) then (eq.reflexivity (expr1 m0); assert (expr1 (0 + m0) == expr2 (0 + n0)); assert (expr1 m0 == expr2 n0))

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_wp_Fsqr_stdcall

val va_wp_Fsqr_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0

let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 21, "end_line": 1111, "start_col": 0, "start_line": 1057 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fsqr val va_code_Fsqr : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr ())) = (va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b)) //-- //-- Fsqr_stdcall val va_code_Fsqr_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> va_s0: Vale.X64.Decls.va_state -> va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0) -> Type0

Prims.Tot

[ "total" ]

[]

[ "Prims.bool", "Vale.X64.Memory.buffer64", "Vale.X64.Decls.va_state", "Prims.unit", "Prims.l_and", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Prims.eq2", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rRsp", "Vale.X64.Stack_i.init_rsp", "Vale.X64.Decls.va_get_stack", "Vale.X64.Memory.is_initial_heap", "Vale.X64.Decls.va_get_mem_layout", "Vale.X64.Decls.va_get_mem", "Vale.X64.CPU_Features_s.adx_enabled", "Vale.X64.CPU_Features_s.bmi2_enabled", "Prims.l_or", "Vale.X64.Decls.buffers_disjoint", "Vale.X64.Decls.validDstAddrs64", "Vale.Arch.HeapTypes_s.Secret", "Vale.X64.Decls.validSrcAddrs64", "Vale.X64.Decls.va_int_range", "Vale.X64.Decls.va_if", "Vale.Def.Types_s.nat64", "Vale.X64.Machine_s.rR8", "Prims.l_not", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRdi", "Prims.l_Forall", "Vale.X64.InsBasic.vale_heap", "Vale.X64.Memory.nat64", "Vale.X64.Flags.t", "Vale.Arch.HeapImpl.vale_heap_layout", "Vale.X64.InsBasic.vale_stack", "Vale.X64.Memory.memtaint", "Prims.l_imp", "Prims.int", "Prims.op_Modulus", "Vale.Curve25519.Fast_defs.prime", "Vale.X64.Decls.va_mul_nat", "Vale.X64.Decls.modifies_buffer_2", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRbp", "Vale.X64.Machine_s.rR12", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR15", "Prims.nat", "Vale.Curve25519.Fast_defs.pow2_four", "Vale.X64.Decls.buffer64_read", "Vale.X64.State.vale_state", "Vale.X64.Decls.va_upd_stackTaint", "Vale.X64.Decls.va_upd_stack", "Vale.X64.Decls.va_upd_mem_layout", "Vale.X64.Decls.va_upd_mem_heaplet", "Vale.X64.Decls.va_upd_flags", "Vale.X64.Decls.va_upd_reg64", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rRax", "Vale.X64.Decls.va_upd_mem" ]

[]

false

true

let va_wp_Fsqr_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =

(va_get_ok va_s0 /\ (let tmp_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem: vale_heap) (va_x_rax: nat64) (va_x_rbx: nat64) (va_x_rcx: nat64) (va_x_rdx: nat64) (va_x_rsi: nat64) (va_x_rdi: nat64) (va_x_rbp: nat64) (va_x_rsp: nat64) (va_x_r8: nat64) (va_x_r9: nat64) (va_x_r10: nat64) (va_x_r11: nat64) (va_x_r12: nat64) (va_x_r13: nat64) (va_x_r14: nat64) (va_x_r15: nat64) (va_x_efl: Vale.X64.Flags.t) (va_x_heap0: vale_heap) (va_x_memLayout: vale_heap_layout) (va_x_stack: vale_stack) (va_x_stackTaint: memtaint). let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0) )))))))))))))) )))))) in va_get_ok va_sM /\ (let tmp_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))

false

FStar.Algebra.CommMonoid.Fold.fst

FStar.Algebra.CommMonoid.Fold.fold_offset_elimination_lemma

val fold_offset_elimination_lemma (#c:_) (#eq:_) (cm: CE.cm c eq) (m0: int) (mk: not_less_than m0) (expr1 : ifrom_ito m0 mk -> c) (expr2 : under (closed_interval_size m0 mk) -> c) : Lemma (requires ((forall (i:under (closed_interval_size m0 mk)). expr2 i == expr1 (i+m0)))) (ensures fold cm m0 mk expr1 == fold cm 0 (mk-m0) expr2)

let fold_offset_elimination_lemma #c #eq (cm: CE.cm c eq) (m0: int) (mk: not_less_than m0) (expr1 : ifrom_ito m0 mk -> c) (expr2 : under (closed_interval_size m0 mk) -> c) : Lemma (requires ((forall (i:under (closed_interval_size m0 mk)). expr2 i == expr1 (i+m0)))) (ensures fold cm m0 mk expr1 == fold cm 0 (mk-m0) expr2) (decreases (mk-m0)) = fold_offset_irrelevance_lemma cm m0 mk expr1 0 (mk-m0) expr2

{ "file_name": "ulib/FStar.Algebra.CommMonoid.Fold.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 64, "end_line": 122, "start_col": 0, "start_line": 114 }

(* Copyright 2008-2022 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. Author: A. Rozanov *) module FStar.Algebra.CommMonoid.Fold module CE = FStar.Algebra.CommMonoid.Equiv open FStar.Seq.Base open FStar.Seq.Properties open FStar.Seq.Permutation open FStar.IntegerIntervals (* Here we define the notion for big sums and big products for arbitrary commutative monoids. We construct the folds from an integer range and a function, then calculate the fold -- a sum or a product, depending on the monoid operation. *) (* We refine multiplication a bit to make proofs smoothier *) open FStar.Mul let rec fold #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr: (ifrom_ito a b) -> c) // some of the lemmas want (ensures (fun (x:c) -> ((nk = n0) ==> (x == expr nk)))) : Tot (c) (decreases b-a) = if b = a then expr b else (fold cm a (b-1) expr) `cm.mult` expr b let rec fold_equality #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr1 expr2: (ifrom_ito a b) -> c) : Lemma (requires (forall (i: ifrom_ito a b). expr1 i == expr2 i)) (ensures fold cm a b expr1 == fold cm a b expr2) (decreases b - a) = if b > a then fold_equality cm a (b - 1) expr1 expr2 let fold_singleton_lemma #c #eq cm a expr : Lemma (fold #c #eq cm a a expr == expr a) = () let fold_snoc_decomposition #c #eq (cm: CE.cm c eq) a b expr : Lemma (fold cm a b expr == fold cm a (b-1) expr `cm.mult` (expr b)) = () let rec fold_equals_seq_foldm #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr: (ifrom_ito a b) -> c) : Lemma (ensures fold cm a b expr `eq.eq` foldm_snoc cm (init (closed_interval_size a b) (init_func_from_expr expr a b))) (decreases b-a) = if (b=a) then let ts = init (closed_interval_size a b) (init_func_from_expr expr a b) in lemma_eq_elim (create 1 (expr b)) ts; foldm_snoc_singleton cm (expr b); eq.symmetry (foldm_snoc cm ts) (expr b); eq.reflexivity (expr b); eq.transitivity (fold cm a b expr) (expr b) (foldm_snoc cm ts) else let lhs = fold cm a b expr in let subexpr : ifrom_ito a (b-1) -> c = expr in let fullseq = init (b+1-a) (init_func_from_expr expr a b) in let rhs = foldm_snoc cm fullseq in let subseq = init (b-a) (init_func_from_expr subexpr a (b-1)) in let subsum = fold cm a (b-1) expr in let subfold = foldm_snoc cm subseq in let last = expr b in let op = cm.mult in fold_equals_seq_foldm cm a (b-1) subexpr; cm.commutativity last subfold; eq.reflexivity last; cm.congruence subsum last subfold last; foldm_snoc_decomposition cm fullseq; lemma_eq_elim subseq (fst (un_snoc fullseq)); eq.symmetry rhs (subfold `op` last); eq.transitivity lhs (subfold `op` last) rhs (* I keep the argument types explicitly stated here because it makes the lemma easier to read. *) let rec fold_offset_irrelevance_lemma #c #eq (cm: CE.cm c eq) (m0: int) (mk: not_less_than m0) (expr1 : ifrom_ito m0 mk -> c) (n0: int) (nk: not_less_than n0) (expr2 : ifrom_ito n0 nk -> c) : Lemma (requires (((mk-m0) = (nk-n0)) /\ (forall (i:under (closed_interval_size m0 mk)). expr1 (i+m0) == expr2 (i+n0)))) (ensures fold cm m0 mk expr1 == fold cm n0 nk expr2) (decreases (mk-m0)) = if (mk>m0 && nk>n0) then ( fold_offset_irrelevance_lemma cm m0 (mk-1) expr1 n0 (nk-1) expr2; assert (expr1 ((mk-m0)+m0) == expr2 ((nk-n0)+n0)) ) else if (mk=m0) then ( eq.reflexivity (expr1 m0); assert (expr1 (0+m0) == expr2 (0+n0)); assert (expr1 m0 == expr2 n0) )

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Seq.Properties.fsti.checked", "FStar.Seq.Permutation.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.IntegerIntervals.fst.checked", "FStar.Algebra.CommMonoid.Equiv.fst.checked" ], "interface_file": true, "source_file": "FStar.Algebra.CommMonoid.Fold.fst" }

[ { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.IntegerIntervals", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Permutation", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Properties", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": true, "full_module": "FStar.Algebra.CommMonoid.Equiv", "short_module": "CE" }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.IntegerIntervals", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Permutation", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Properties", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": true, "full_module": "FStar.Algebra.CommMonoid.Equiv", "short_module": "CE" }, { "abbrev": false, "full_module": "FStar.Algebra.CommMonoid", "short_module": null }, { "abbrev": false, "full_module": "FStar.Algebra.CommMonoid", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

cm: FStar.Algebra.CommMonoid.Equiv.cm c eq -> m0: Prims.int -> mk: FStar.IntegerIntervals.not_less_than m0 -> expr1: (_: FStar.IntegerIntervals.ifrom_ito m0 mk -> c) -> expr2: (_: FStar.IntegerIntervals.under (FStar.IntegerIntervals.closed_interval_size m0 mk) -> c) -> FStar.Pervasives.Lemma (requires forall (i: FStar.IntegerIntervals.under (FStar.IntegerIntervals.closed_interval_size m0 mk)) . expr2 i == expr1 (i + m0)) (ensures FStar.Algebra.CommMonoid.Fold.fold cm m0 mk expr1 == FStar.Algebra.CommMonoid.Fold.fold cm 0 (mk - m0) expr2)

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "FStar.Algebra.CommMonoid.Equiv.equiv", "FStar.Algebra.CommMonoid.Equiv.cm", "Prims.int", "FStar.IntegerIntervals.not_less_than", "FStar.IntegerIntervals.ifrom_ito", "FStar.IntegerIntervals.under", "FStar.IntegerIntervals.closed_interval_size", "FStar.Algebra.CommMonoid.Fold.fold_offset_irrelevance_lemma", "Prims.op_Subtraction", "Prims.unit", "Prims.l_Forall", "Prims.eq2", "Prims.op_Addition", "Prims.squash", "FStar.Algebra.CommMonoid.Fold.fold", "Prims.Nil", "FStar.Pervasives.pattern" ]

[]

true

false

true

false

let fold_offset_elimination_lemma #c #eq (cm: CE.cm c eq) (m0: int) (mk: not_less_than m0) (expr1: (ifrom_ito m0 mk -> c)) (expr2: (under (closed_interval_size m0 mk) -> c)) : Lemma (requires ((forall (i: under (closed_interval_size m0 mk)). expr2 i == expr1 (i + m0)))) (ensures fold cm m0 mk expr1 == fold cm 0 (mk - m0) expr2) (decreases (mk - m0)) =

fold_offset_irrelevance_lemma cm m0 mk expr1 0 (mk - m0) expr2

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_req_Fsqr2_stdcall

val va_req_Fsqr2_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b: buffer64) : prop

let va_req_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 12, "end_line": 1312, "start_col": 0, "start_line": 1297 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fsqr val va_code_Fsqr : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr ())) = (va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b)) //-- //-- Fsqr_stdcall val va_code_Fsqr_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr_stdcall win)) = (va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b)) //-- //-- Fsqr2 val va_code_Fsqr2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr2 tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr2 ())) = (va_QProc (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr2 tmp_b inA_b dst_b) (va_wpProof_Fsqr2 tmp_b inA_b dst_b)) //-- //-- Fsqr2_stdcall val va_code_Fsqr2_stdcall : win:bool -> Tot va_code

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

va_b0: Vale.X64.Decls.va_code -> va_s0: Vale.X64.Decls.va_state -> win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Decls.va_code", "Vale.X64.Decls.va_state", "Prims.bool", "Vale.X64.Memory.buffer64", "Prims.l_and", "Vale.X64.Decls.va_require_total", "Vale.Curve25519.X64.FastWide.va_code_Fsqr2_stdcall", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Prims.eq2", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rRsp", "Vale.X64.Stack_i.init_rsp", "Vale.X64.Decls.va_get_stack", "Vale.X64.Memory.is_initial_heap", "Vale.X64.Decls.va_get_mem_layout", "Vale.X64.Decls.va_get_mem", "Vale.X64.CPU_Features_s.adx_enabled", "Vale.X64.CPU_Features_s.bmi2_enabled", "Prims.l_or", "Vale.X64.Decls.buffers_disjoint", "Vale.X64.Decls.validDstAddrs64", "Vale.Arch.HeapTypes_s.Secret", "Vale.X64.Decls.validSrcAddrs64", "Vale.X64.Decls.va_int_range", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRdi", "Prims.prop" ]

[]

false

true

let va_req_Fsqr2_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b: buffer64) : prop =

(va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let tmp_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.buffer_src

val buffer_src (#dest:Type) (b:buffer dest) : Type0

let buffer_src #b bv = Buffer?.src bv

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 37, "end_line": 28, "start_col": 0, "start_line": 28 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

b: LowStar.BufferView.Up.buffer dest -> Type0

Prims.Tot

[ "total" ]

[]

[ "LowStar.BufferView.Up.buffer", "LowStar.BufferView.Up.__proj__Buffer__item__src" ]

[]

false

true

let buffer_src #b bv =

Buffer?.src bv

false

Steel.ST.GhostHigherReference.fst

Steel.ST.GhostHigherReference.hide_ref

val hide_ref (#a: Type u#1) (r: Steel.ST.HigherReference.ref a) : Pure (ref a) (requires True) (ensures (fun r' -> reveal_ref r' == r))

let hide_ref r = Hide r

{ "file_name": "lib/steel/Steel.ST.GhostHigherReference.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 23, "end_line": 25, "start_col": 0, "start_line": 25 }

module Steel.ST.GhostHigherReference // needed because I need to know that `Steel.ST.HigherReference.ref a` // can be turned into `Steel.HigherReference.ref a` friend Steel.ST.HigherReference module RST = Steel.ST.HigherReference module R = Steel.HigherReference module STC = Steel.ST.Coercions // FIXME: WHY WHY WHY in `Ghost.reveal (ref a)` is `a` not strictly positive? [@@erasable] noeq type ref' ([@@@strictly_positive] a : Type u#1) : Type0 = | Hide: (reveal: R.ref a) -> ref' a let ref a = ref' a let pts_to r p v = RST.pts_to r.reveal p v let reveal_ref r = r.reveal

{ "checked_file": "/", "dependencies": [ "Steel.ST.HigherReference.fst.checked", "Steel.ST.Coercions.fsti.checked", "Steel.HigherReference.fsti.checked", "prims.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Steel.ST.GhostHigherReference.fst" }

[ { "abbrev": true, "full_module": "Steel.ST.Coercions", "short_module": "STC" }, { "abbrev": true, "full_module": "Steel.HigherReference", "short_module": "R" }, { "abbrev": true, "full_module": "Steel.ST.HigherReference", "short_module": "RST" }, { "abbrev": false, "full_module": "Steel.ST.Util", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

r: Steel.ST.HigherReference.ref a -> Prims.Pure (Steel.ST.GhostHigherReference.ref a)

Prims.Pure

[]

[ "Steel.ST.HigherReference.ref", "Steel.ST.GhostHigherReference.Hide", "Steel.ST.GhostHigherReference.ref" ]

[]

false

let hide_ref r =

Hide r

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.as_down_buffer

val as_down_buffer (#b:Type) (v:buffer b) : Down.buffer (buffer_src v)

let as_down_buffer #b bv = Buffer?.down_buf bv

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 46, "end_line": 29, "start_col": 0, "start_line": 29 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

v: LowStar.BufferView.Up.buffer b -> LowStar.BufferView.Down.buffer (LowStar.BufferView.Up.buffer_src v)

Prims.Tot

[ "total" ]

[]

[ "LowStar.BufferView.Up.buffer", "LowStar.BufferView.Up.__proj__Buffer__item__down_buf", "LowStar.BufferView.Down.buffer", "LowStar.BufferView.Up.buffer_src" ]

[]

false

let as_down_buffer #b bv =

Buffer?.down_buf bv

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.get_view

val get_view (#b : Type) (v:buffer b) : view (buffer_src v) b

let get_view #b v = Buffer?.v v

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 31, "end_line": 30, "start_col": 0, "start_line": 30 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

v: LowStar.BufferView.Up.buffer b -> LowStar.BufferView.Up.view (LowStar.BufferView.Up.buffer_src v) b

Prims.Tot

[ "total" ]

[]

[ "LowStar.BufferView.Up.buffer", "LowStar.BufferView.Up.__proj__Buffer__item__v", "LowStar.BufferView.Up.view", "LowStar.BufferView.Up.buffer_src" ]

[]

false

let get_view #b v =

Buffer?.v v

false

Steel.ST.GhostHigherReference.fst

Steel.ST.GhostHigherReference.reveal_pts_to

val reveal_pts_to (#a: _) (r: ref a) (p: perm) (x: a) : Lemma (pts_to r p x `equiv` Steel.ST.HigherReference.pts_to (reveal_ref r) p x)

let reveal_pts_to r p x = equiv_refl (Steel.ST.HigherReference.pts_to (reveal_ref r) p x)

{ "file_name": "lib/steel/Steel.ST.GhostHigherReference.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 65, "end_line": 30, "start_col": 0, "start_line": 29 }

module Steel.ST.GhostHigherReference // needed because I need to know that `Steel.ST.HigherReference.ref a` // can be turned into `Steel.HigherReference.ref a` friend Steel.ST.HigherReference module RST = Steel.ST.HigherReference module R = Steel.HigherReference module STC = Steel.ST.Coercions // FIXME: WHY WHY WHY in `Ghost.reveal (ref a)` is `a` not strictly positive? [@@erasable] noeq type ref' ([@@@strictly_positive] a : Type u#1) : Type0 = | Hide: (reveal: R.ref a) -> ref' a let ref a = ref' a let pts_to r p v = RST.pts_to r.reveal p v let reveal_ref r = r.reveal let hide_ref r = Hide r let hide_reveal_ref r = ()

{ "checked_file": "/", "dependencies": [ "Steel.ST.HigherReference.fst.checked", "Steel.ST.Coercions.fsti.checked", "Steel.HigherReference.fsti.checked", "prims.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Steel.ST.GhostHigherReference.fst" }

[ { "abbrev": true, "full_module": "Steel.ST.Coercions", "short_module": "STC" }, { "abbrev": true, "full_module": "Steel.HigherReference", "short_module": "R" }, { "abbrev": true, "full_module": "Steel.ST.HigherReference", "short_module": "RST" }, { "abbrev": false, "full_module": "Steel.ST.Util", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

r: Steel.ST.GhostHigherReference.ref a -> p: Steel.FractionalPermission.perm -> x: a -> FStar.Pervasives.Lemma (ensures Steel.Effect.Common.equiv (Steel.ST.GhostHigherReference.pts_to r p x) (Steel.ST.HigherReference.pts_to (Steel.ST.GhostHigherReference.reveal_ref r) p x))

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Steel.ST.GhostHigherReference.ref", "Steel.FractionalPermission.perm", "Steel.Effect.Common.equiv_refl", "Steel.ST.HigherReference.pts_to", "Steel.ST.GhostHigherReference.reveal_ref", "Prims.unit" ]

[]

true

false

true

false

let reveal_pts_to r p x =

equiv_refl (Steel.ST.HigherReference.pts_to (reveal_ref r) p x)

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_quick_Fsqr2_stdcall

val va_quick_Fsqr2_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr2_stdcall win))

let va_quick_Fsqr2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr2_stdcall win)) = (va_QProc (va_code_Fsqr2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr2_stdcall win tmp_b inA_b dst_b) (va_wpProof_Fsqr2_stdcall win tmp_b inA_b dst_b))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 72, "end_line": 1508, "start_col": 0, "start_line": 1501 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fsqr val va_code_Fsqr : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr ())) = (va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b)) //-- //-- Fsqr_stdcall val va_code_Fsqr_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr_stdcall win)) = (va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b)) //-- //-- Fsqr2 val va_code_Fsqr2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr2 tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr2 ())) = (va_QProc (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr2 tmp_b inA_b dst_b) (va_wpProof_Fsqr2 tmp_b inA_b dst_b)) //-- //-- Fsqr2_stdcall val va_code_Fsqr2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr2_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) val va_lemma_Fsqr2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fsqr2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr2_stdcall win tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.Curve25519.X64.FastWide.va_code_Fsqr2_stdcall win)

Prims.Tot

[ "total" ]

[]

[ "Prims.bool", "Vale.X64.Memory.buffer64", "Vale.X64.QuickCode.va_QProc", "Prims.unit", "Vale.Curve25519.X64.FastWide.va_code_Fsqr2_stdcall", "Prims.Cons", "Vale.X64.QuickCode.mod_t", "Vale.X64.QuickCode.va_Mod_stackTaint", "Vale.X64.QuickCode.va_Mod_stack", "Vale.X64.QuickCode.va_Mod_mem_layout", "Vale.X64.QuickCode.va_Mod_mem_heaplet", "Vale.X64.QuickCode.va_Mod_flags", "Vale.X64.QuickCode.va_Mod_reg64", "Vale.X64.Machine_s.rR15", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR12", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRsp", "Vale.X64.Machine_s.rRbp", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRax", "Vale.X64.QuickCode.va_Mod_mem", "Prims.Nil", "Vale.Curve25519.X64.FastWide.va_wp_Fsqr2_stdcall", "Vale.Curve25519.X64.FastWide.va_wpProof_Fsqr2_stdcall", "Vale.X64.QuickCode.va_quickCode" ]

[]

false

let va_quick_Fsqr2_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr2_stdcall win)) =

(va_QProc (va_code_Fsqr2_stdcall win) ([ va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem ]) (va_wp_Fsqr2_stdcall win tmp_b inA_b dst_b) (va_wpProof_Fsqr2_stdcall win tmp_b inA_b dst_b))

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.upd

val upd (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : GTot HS.mem

let upd #b h vb i x : GTot HS.mem = upd' #b h vb i x

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 20, "end_line": 98, "start_col": 0, "start_line": 96 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = () //#reset-options "--max_fuel 0 --max_ifuel 1" let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n) let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t){ let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : GTot b = let v = get_view vb in let _, es, _ = split_at_i vb i h in View?.get v es let upd' (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : GTot (h':HS.mem{sel h' vb i == x}) = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in let h' = Down.upd_seq h (as_down_buffer vb) s1 in Down.upd_seq_spec h (as_down_buffer vb) s1; assert (Down.as_seq h' (as_down_buffer vb) == s1); let n = View?.n v in assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n))); assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x); h'

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> vb: LowStar.BufferView.Up.buffer b {LowStar.BufferView.Up.live h vb} -> i: Prims.nat{i < LowStar.BufferView.Up.length vb} -> x: b -> Prims.GTot FStar.Monotonic.HyperStack.mem

Prims.GTot

[ "sometrivial" ]

[]

[ "FStar.Monotonic.HyperStack.mem", "LowStar.BufferView.Up.buffer", "LowStar.BufferView.Up.live", "Prims.nat", "Prims.b2t", "Prims.op_LessThan", "LowStar.BufferView.Up.length", "LowStar.BufferView.Up.upd'" ]

[]

false

let upd #b h vb i x : GTot HS.mem =

upd' #b h vb i x

false

Vale.AES.X64.AESGCM.fst

Vale.AES.X64.AESGCM.va_lemma_Loop6x_loop_decrypt_body0

val va_lemma_Loop6x_loop_decrypt_body0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> Ghost (va_state & va_fuel & quad32 & nat & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_decrypt_body0 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ va_get_reg64 rRdx va_s0 > 0)) (ensures (fun (va_sM, va_fM, ctr, iter, y_cur) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))))))))))))

let va_lemma_Loop6x_loop_decrypt_body0 va_b0 va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur = let va_old = va_expand_state va_old in let (va_mods:va_mods_t) = [va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags] in let va_qc = va_qcode_Loop6x_loop_decrypt_body0 va_mods va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop_decrypt_body0 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let (ctr, iter, y_cur) = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 653 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (sse_enabled /\ movbe_enabled) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 655 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 658 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 659 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 661 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 664 column 69 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 666 column 121 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 669 column 114 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 671 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 672 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 674 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 675 column 79 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 676 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 677 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_in0_b == va_in_in_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 679 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 680 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 681 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 682 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 683 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 685 column 76 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 686 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 687 column 117 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 688 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 691 column 87 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 692 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 695 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" pclmulqdq_enabled /\ label va_range1 "***** POSTCONDITION NOT MET AT line 696 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 697 column 78 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 698 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 699 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 701 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 702 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 705 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 706 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 707 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 708 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 709 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 710 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 711 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 712 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 713 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 715 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 717 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 718 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 719 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 720 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 721 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 724 column 90 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 727 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 728 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 729 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let (ctr, iter, y_cur) = va_g in (va_sM, va_fM, ctr, iter, y_cur)

{ "file_name": "obj/Vale.AES.X64.AESGCM.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 34, "end_line": 1731, "start_col": 0, "start_line": 1548 }

module Vale.AES.X64.AESGCM open FStar.Mul open Vale.Def.Prop_s open Vale.Def.Opaque_s open Vale.Def.Words_s open Vale.Def.Types_s open FStar.Seq open Vale.AES.AES_s open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsVector open Vale.X64.InsAes open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Arch.Types open Vale.AES.AES_helpers //open Vale.Poly1305.Math // For lemma_poly_bits64() open Vale.AES.GCM_helpers open Vale.AES.GCTR_s open Vale.AES.GCTR open Vale.Arch.TypesNative open Vale.X64.CPU_Features_s open Vale.AES.X64.PolyOps open Vale.Math.Poly2_s open Vale.Math.Poly2 open Vale.Math.Poly2.Bits_s open Vale.Math.Poly2.Bits open Vale.Math.Poly2.Lemmas open Vale.AES.GF128_s open Vale.AES.GF128 open Vale.AES.GHash open Vale.AES.X64.AESopt open Vale.AES.X64.AESopt2 unfold let lo(x:poly):poly = mask x 64 unfold let hi(x:poly):poly = shift x (-64) //let scratch_reqs (scratch_b:buffer128) (count:nat) (heap3:vale_heap) (s:seq quad32) (z3:quad32) : prop0 = // count * 6 + 6 <= length s /\ // (let data = slice s (count * 6) (count * 6 + 6) in // z3 == reverse_bytes_quad32 (index data 5) /\ // buffer128_read scratch_b 3 heap3 == reverse_bytes_quad32 (index data 4) /\ // buffer128_read scratch_b 4 heap3 == reverse_bytes_quad32 (index data 3) /\ // buffer128_read scratch_b 5 heap3 == reverse_bytes_quad32 (index data 2) /\ // buffer128_read scratch_b 6 heap3 == reverse_bytes_quad32 (index data 1) /\ // buffer128_read scratch_b 7 heap3 == reverse_bytes_quad32 (index data 0)) let scratch_reqs_simple (scratch_b:buffer128) (heap3:vale_heap) (data:seq quad32) (z3:quad32) : prop0 = length data == 6 /\ z3 == reverse_bytes_quad32 (index data 5) /\ buffer128_read scratch_b 3 heap3 == reverse_bytes_quad32 (index data 4) /\ buffer128_read scratch_b 4 heap3 == reverse_bytes_quad32 (index data 3) /\ buffer128_read scratch_b 5 heap3 == reverse_bytes_quad32 (index data 2) /\ buffer128_read scratch_b 6 heap3 == reverse_bytes_quad32 (index data 1) /\ buffer128_read scratch_b 7 heap3 == reverse_bytes_quad32 (index data 0) //-- finish_aes_encrypt_le val finish_aes_encrypt_le : alg:algorithm -> input_LE:quad32 -> key:(seq nat32) -> Lemma (requires (Vale.AES.AES_s.is_aes_key_LE alg key)) (ensures (Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key))) let finish_aes_encrypt_le alg input_LE key = Vale.AES.AES_s.aes_encrypt_LE_reveal (); Vale.AES.AES_s.eval_cipher_reveal (); () //-- let va_subscript_FStar__Seq__Base__seq = Seq.index #reset-options "--z3rlimit 30" //-- Load_one_msb val va_code_Load_one_msb : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Load_one_msb () = (va_Block (va_CCons (va_code_ZeroXmm (va_op_xmm_xmm 2)) (va_CCons (va_code_PinsrqImm (va_op_xmm_xmm 2) 72057594037927936 1 (va_op_reg_opr64_reg64 rR11)) (va_CNil ())))) val va_codegen_success_Load_one_msb : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Load_one_msb () = (va_pbool_and (va_codegen_success_ZeroXmm (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_PinsrqImm (va_op_xmm_xmm 2) 72057594037927936 1 (va_op_reg_opr64_reg64 rR11)) (va_ttrue ()))) [@ "opaque_to_smt" va_qattr] let va_qcode_Load_one_msb (va_mods:va_mods_t) : (va_quickCode unit (va_code_Load_one_msb ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 145 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_ZeroXmm (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 146 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Arch.Types.two_to_nat32 (Vale.Def.Words_s.Mktwo #Vale.Def.Words_s.nat32 0 16777216) == 72057594037927936) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 147 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_PinsrqImm (va_op_xmm_xmm 2) 72057594037927936 1 (va_op_reg_opr64_reg64 rR11)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 148 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Def.Types_s.insert_nat64_reveal ()) (va_QEmpty (()))))))) val va_lemma_Load_one_msb : va_b0:va_code -> va_s0:va_state -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load_one_msb ()) va_s0 /\ va_get_ok va_s0 /\ sse_enabled)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 2 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0)))))) [@"opaque_to_smt"] let va_lemma_Load_one_msb va_b0 va_s0 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11; va_Mod_ok] in let va_qc = va_qcode_Load_one_msb va_mods in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Load_one_msb ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 138 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 143 column 46 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216)) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Load_one_msb (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ sse_enabled /\ (forall (va_x_r11:nat64) (va_x_xmm2:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 2 va_x_xmm2 (va_upd_reg64 rR11 va_x_r11 va_s0)) in va_get_ok va_sM /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 ==> va_k va_sM (()))) val va_wpProof_Load_one_msb : va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load_one_msb va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load_one_msb ()) ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Load_one_msb va_s0 va_k = let (va_sM, va_f0) = va_lemma_Load_one_msb (va_code_Load_one_msb ()) va_s0 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 2 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Load_one_msb () : (va_quickCode unit (va_code_Load_one_msb ())) = (va_QProc (va_code_Load_one_msb ()) ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11]) va_wp_Load_one_msb va_wpProof_Load_one_msb) //-- //-- Ctr32_ghash_6_prelude val va_code_Ctr32_ghash_6_prelude : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Ctr32_ghash_6_prelude alg = (va_Block (va_CCons (va_code_Load_one_msb ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 4) (va_op_opr128_xmm 4)) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 15)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_CNil ())))))))))))) val va_codegen_success_Ctr32_ghash_6_prelude : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Ctr32_ghash_6_prelude alg = (va_pbool_and (va_codegen_success_Load_one_msb ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 4) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 15)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_ttrue ()))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Ctr32_ghash_6_prelude (va_mods:va_mods_t) (alg:algorithm) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) : (va_quickCode unit (va_code_Ctr32_ghash_6_prelude alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 211 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_one_msb ()) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 212 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 4) (va_op_opr128_xmm 4)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 213 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Arch.Types.lemma_quad32_xor ()) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 214 column 19 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret keys_b 0) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 215 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg44:Vale.Def.Types_s.quad32) = va_get_xmm 10 va_s in let (va_arg43:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg42:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 215 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg42 va_arg43 va_arg44 1) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 216 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg41:Vale.Def.Types_s.quad32) = va_get_xmm 11 va_s in let (va_arg40:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg39:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 216 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg39 va_arg40 va_arg41 2) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 217 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg38:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_s in let (va_arg37:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg36:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 217 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg36 va_arg37 va_arg38 3) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 218 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg35:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_s in let (va_arg34:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg33:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 218 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg33 va_arg34 va_arg35 4) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 219 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg32:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_s in let (va_arg31:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg30:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 219 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg30 va_arg31 va_arg32 5) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 220 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 221 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret scratch_b 1) (va_QEmpty (()))))))))))))))))))) val va_lemma_Ctr32_ghash_6_prelude : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> scratch_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_orig:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Ctr32_ghash_6_prelude alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 8 (va_get_mem_layout va_s0) Secret /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 1 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (va_get_xmm 15 va_sM) /\ (let counter = Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 in (counter + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) /\ (counter + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) /\ (counter + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) /\ (counter + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) /\ (counter + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) /\ Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_reg64 rR11 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 4 va_sM (va_update_xmm 2 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))) [@"opaque_to_smt"] let va_lemma_Ctr32_ghash_6_prelude va_b0 va_s0 alg scratch_b key_words round_keys keys_b ctr_orig = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Ctr32_ghash_6_prelude va_mods alg scratch_b key_words round_keys keys_b ctr_orig in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Ctr32_ghash_6_prelude alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 151 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 194 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 1) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 196 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 197 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 199 column 83 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 200 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (let counter = Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 in label va_range1 "***** POSTCONDITION NOT MET AT line 201 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 202 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 203 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 204 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 205 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 207 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 208 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_ok; va_Mod_mem]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Ctr32_ghash_6_prelude (alg:algorithm) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 8 (va_get_mem_layout va_s0) Secret /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) /\ (forall (va_x_mem:vale_heap) (va_x_xmm2:quad32) (va_x_xmm4:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_r11:nat64) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_reg64 rR11 va_x_r11 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 2 va_x_xmm2 (va_upd_mem va_x_mem va_s0)))))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 1 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (va_get_xmm 15 va_sM) /\ (let counter = Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 in (counter + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) /\ (counter + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) /\ (counter + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) /\ (counter + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) /\ (counter + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) /\ Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) ==> va_k va_sM (()))) val va_wpProof_Ctr32_ghash_6_prelude : alg:algorithm -> scratch_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_orig:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Ctr32_ghash_6_prelude alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig va_s0 va_k = let (va_sM, va_f0) = va_lemma_Ctr32_ghash_6_prelude (va_code_Ctr32_ghash_6_prelude alg) va_s0 alg scratch_b key_words round_keys keys_b ctr_orig in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_reg64 rR11 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 4 va_sM (va_update_xmm 2 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_mem]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Ctr32_ghash_6_prelude (alg:algorithm) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) : (va_quickCode unit (va_code_Ctr32_ghash_6_prelude alg)) = (va_QProc (va_code_Ctr32_ghash_6_prelude alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_mem]) (va_wp_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig) (va_wpProof_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig)) //-- //-- Handle_ctr32_2 val va_code_Handle_ctr32_2 : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Handle_ctr32_2 () = (va_Block (va_CCons (va_code_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_CCons (va_code_Load_one_lsb (va_op_xmm_xmm 5)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_CCons (va_code_Load_two_lsb (va_op_xmm_xmm 5)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 11) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_CNil ())))))))))))))))))))))) val va_codegen_success_Handle_ctr32_2 : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Handle_ctr32_2 () = (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Load_one_lsb (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_Load_two_lsb (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 11) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_ttrue ()))))))))))))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Handle_ctr32_2 (va_mods:va_mods_t) (ctr_BE:quad32) : (va_quickCode unit (va_code_Handle_ctr32_2 ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 253 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 258 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_one_lsb (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 260 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 262 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_two_lsb (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 263 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 265 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 266 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 267 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 11) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 268 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 269 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 270 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 271 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 272 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 273 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 274 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 275 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 276 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 277 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 278 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 279 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_QEmpty (()))))))))))))))))))))))) val va_lemma_Handle_ctr32_2 : va_b0:va_code -> va_s0:va_state -> ctr_BE:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Handle_ctr32_2 ()) va_s0 /\ va_get_ok va_s0 /\ (avx_enabled /\ sse_enabled /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 ctr_BE))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (va_get_xmm 4 va_sM) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (va_get_xmm 4 va_sM) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (va_get_xmm 4 va_sM) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (va_get_xmm 4 va_sM) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (va_get_xmm 4 va_sM) /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0)))))))))))))) [@"opaque_to_smt"] let va_lemma_Handle_ctr32_2 va_b0 va_s0 ctr_BE = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11; va_Mod_ok] in let va_qc = va_qcode_Handle_ctr32_2 va_mods ctr_BE in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Handle_ctr32_2 ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 224 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 246 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 247 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 248 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 249 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 250 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 251 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Handle_ctr32_2 (ctr_BE:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (avx_enabled /\ sse_enabled /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 ctr_BE) /\ (forall (va_x_r11:nat64) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rR11 va_x_r11 va_s0)))))))))) in va_get_ok va_sM /\ (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (va_get_xmm 4 va_sM) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (va_get_xmm 4 va_sM) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (va_get_xmm 4 va_sM) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (va_get_xmm 4 va_sM) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (va_get_xmm 4 va_sM) /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) ==> va_k va_sM (()))) val va_wpProof_Handle_ctr32_2 : ctr_BE:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Handle_ctr32_2 ctr_BE va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Handle_ctr32_2 ()) ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Handle_ctr32_2 ctr_BE va_s0 va_k = let (va_sM, va_f0) = va_lemma_Handle_ctr32_2 (va_code_Handle_ctr32_2 ()) va_s0 ctr_BE in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Handle_ctr32_2 (ctr_BE:quad32) : (va_quickCode unit (va_code_Handle_ctr32_2 ())) = (va_QProc (va_code_Handle_ctr32_2 ()) ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11]) (va_wp_Handle_ctr32_2 ctr_BE) (va_wpProof_Handle_ctr32_2 ctr_BE)) //-- //-- Loop6x_decrypt #push-options "--z3rlimit 300" val va_code_Loop6x_decrypt : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_decrypt alg = (va_Block (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_Loop6x_partial alg) (va_CCons (va_code_Loop6x_final alg) (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 6)) (va_CCons (va_IfElse (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 6)) (va_Block (va_CCons (va_code_Add64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_CNil ()))) (va_Block (va_CNil ()))) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_IfElse (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (va_Block (va_CCons (va_code_Loop6x_save_output ()) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_CCons (va_Block (va_CNil ())) (va_CNil ()))))) (va_Block (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret)) (va_CCons (va_code_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_op_opr128_xmm 4)) (va_CNil ())))))) (va_CNil ())))))))))))))) val va_codegen_success_Loop6x_decrypt : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_decrypt alg = (va_pbool_and (va_codegen_success_Loop6x_partial alg) (va_pbool_and (va_codegen_success_Loop6x_final alg) (va_pbool_and (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 6)) (va_pbool_and (va_codegen_success_Add64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_pbool_and (va_pbool_and (va_codegen_success_Loop6x_save_output ()) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret)) (va_codegen_success_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_op_opr128_xmm 4)))))) (va_ttrue ())))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_decrypt (va_mods:va_mods_t) (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode (quad32) (va_code_Loop6x_decrypt alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (prev:Vale.Math.Poly2_s.poly) = add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s))) in let (y_prev:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 prev) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 449 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (fun _ -> let (data:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 450 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 450 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #Vale.X64.Decls.quad32 data (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6))) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 451 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 451 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #Vale.X64.Decls.quad32 (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (FStar.Seq.Base.slice #quad32 plain_quads (count `op_Multiply` 6) (count `op_Multiply` 6 + 6))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 453 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) < 128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 454 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s)) < 128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 455 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s))) < 128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 456 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree prev < 128) (va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 457 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Math.Poly2.Bits.lemma_of_to_quad32 prev) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 459 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_partial alg h_LE y_prev data count (va_if (va_get_reg64 rRdx va_s > 6) (fun _ -> count + 1) (fun _ -> count)) iv_b in0_b in_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE) (fun (va_s:va_state) (init:quad32_6) -> let (eventual_Xi:Vale.Math.Poly2_s.poly) = add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)))) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s)) in va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 463 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (eventual_Xi == Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))) (let (ctrs:(six_of Vale.Def.Types_s.quad32)) = make_six_of #Vale.Def.Types_s.quad32 (fun (i:(va_int_range 0 5)) -> Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE i)) in let (plains:(six_of Vale.X64.Decls.quad32)) = make_six_of #Vale.X64.Decls.quad32 (fun (i:(va_int_range 0 5)) -> Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + i) (va_get_mem_heaplet 6 va_s)) in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 468 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_final alg iv_b scratch_b key_words round_keys keys_b (Vale.AES.GCTR.inc32lite ctr_BE 6) init ctrs plains (Vale.X64.Decls.buffer128_read in0_b (va_if (va_get_reg64 rRdx va_s > 6) (fun _ -> count + 1) (fun _ -> count) `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s))) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 471 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 6)) (fun (va_s:va_state) _ -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 472 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 6)) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 474 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Add64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_QEmpty (())))) (qblock va_mods (fun (va_s:va_state) -> va_QEmpty (())))) (fun (va_s:va_state) va_g -> let (y_new:quad32) = Vale.AES.GHash.ghash_incremental0 h_LE y_prev data in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 479 column 36 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 (count `op_Multiply` 6)) (fun _ -> let (va_arg104:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = data in let (va_arg103:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6) in let (va_arg102:Vale.Def.Types_s.quad32) = y_new in let (va_arg101:Vale.Def.Types_s.quad32) = y_orig in let (va_arg100:Vale.Def.Types_s.quad32) = h_LE in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 479 column 36 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GHash.lemma_ghash_incremental0_append va_arg100 va_arg101 y_prev va_arg102 va_arg103 va_arg104) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 480 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 (count `op_Multiply` 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 480 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.append #quad32 (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) data)) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 481 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 (count `op_Multiply` 6) /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 481 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #quad32 (FStar.Seq.Base.append #quad32 (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) data) (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6))) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 483 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 483 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6))) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 486 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 488 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_save_output count out_b) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 492 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret scratch_b 2) (fun (va_s:va_state) _ -> let (plain:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b in let (cipher:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (bound:(va_int_at_least 0)) = count `op_Multiply` 6 in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 497 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (bound >= 0 /\ bound <= 4294967295) (fun _ -> let (va_arg99:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg98:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg97:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = cipher in let (va_arg96:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) out_b in let (va_arg95:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg94:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg93:Vale.Def.Types_s.nat32) = bound in let (va_arg92:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 497 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_ignores_postfix va_arg92 va_arg93 va_arg94 va_arg95 va_arg96 va_arg97 va_arg98 va_arg99) (let (va_arg91:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg90:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg89:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = cipher in let (va_arg88:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg87:Prims.nat) = bound in let (va_arg86:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 499 column 29 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_extend6 va_arg86 va_arg87 va_arg88 va_arg89 va_arg90 va_arg91) (let (va_arg85:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s) in let (va_arg84:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)) in let (va_arg83:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 501 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GHash.lemma_add_manip va_arg83 va_arg84 va_arg85) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 507 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))))) (va_QEmpty (())))))))))) (qblock va_mods (fun (va_s:va_state) -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 511 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (eventual_Xi == Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 512 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret scratch_b 1) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 512 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 513 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_op_opr128_xmm 4)) (fun (va_s:va_state) _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 514 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) == Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 515 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) == Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data)))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 516 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 8 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data)) (va_QEmpty (()))))))))))) (fun (va_s:va_state) va_g -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 518 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_registers_reveal ()) (va_QEmpty ((y_new))))))))))))))))))))))))))))) val va_lemma_Loop6x_decrypt : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> count:nat -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> Ghost (va_state & va_fuel & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_decrypt alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ va_get_reg64 rRdx va_s0 >= 6 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b ((count + 1) `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 96 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b count (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig))) (ensures (fun (va_sM, va_fM, y_new) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ ((va_get_reg64 rRdx va_sM == 0 ==> va_get_mem_heaplet 6 va_sM == va_get_mem_heaplet 6 va_s0) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in_b) ((count + 1) `op_Multiply` 6) ((count + 1) `op_Multiply` 6)) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 6 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96 /\ va_get_reg64 rR14 va_sM == (if (va_get_reg64 rRdx va_sM > 6) then (va_get_reg64 rR14 va_s0 + 96) else va_get_reg64 rR14 va_s0) /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 0 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 7)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 5 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 8)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 6 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 9)) /\ (va_get_reg64 rRdx va_sM == 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 7 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 3 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 11)) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) plain_quads alg key_words ctr_BE_orig count) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 10 va_sM == va_get_xmm 0 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 11 va_sM == va_get_xmm 5 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 12 va_sM == va_get_xmm 6 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 14 va_sM == va_get_xmm 3 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 0))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs scratch_b (count + 1) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_sM))) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_decrypt va_b0 va_s0 alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Loop6x_decrypt va_mods alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_decrypt alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let y_new = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 290 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 388 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_mem_heaplet 6 va_sM == va_get_mem_heaplet 6 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 389 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 390 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 391 column 70 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 392 column 100 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in_b) ((count + 1) `op_Multiply` 6) ((count + 1) `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 397 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 398 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 399 column 64 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rR14 va_sM == va_if (va_get_reg64 rRdx va_sM > 6) (fun _ -> va_get_reg64 rR14 va_s0 + 96) (fun _ -> va_get_reg64 rR14 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 400 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 402 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 405 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 407 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 408 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 0 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 7)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 409 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 5 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 8)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 410 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 6 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 9)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 411 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 7 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 412 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 3 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 11)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 414 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 418 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) plain_quads alg key_words ctr_BE_orig count) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 420 column 93 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 421 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 10 va_sM == va_get_xmm 0 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 422 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 11 va_sM == va_get_xmm 5 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 423 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 12 va_sM == va_get_xmm 6 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 424 column 98 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 425 column 35 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 14 va_sM == va_get_xmm 3 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 427 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 0))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 428 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 429 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 430 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 431 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 432 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 435 column 108 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 438 column 90 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 440 column 103 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 441 column 55 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 443 column 89 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs scratch_b (count + 1) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_sM)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem]) va_sM va_s0; let y_new = va_g in (va_sM, va_fM, y_new) [@ va_qattr] let va_wp_Loop6x_decrypt (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) (va_s0:va_state) (va_k:(va_state -> quad32 -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ va_get_reg64 rRdx va_s0 >= 6 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b ((count + 1) `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 96 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b count (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig) /\ (forall (va_x_mem:vale_heap) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_rdx:nat64) (va_x_rbx:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_heap6:vale_heap) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) (y_new:quad32) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_mem va_x_mem va_s0)))))))))))))))))))))))))))) in va_get_ok va_sM /\ ((va_get_reg64 rRdx va_sM == 0 ==> va_get_mem_heaplet 6 va_sM == va_get_mem_heaplet 6 va_s0) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in_b) ((count + 1) `op_Multiply` 6) ((count + 1) `op_Multiply` 6)) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 6 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96 /\ va_get_reg64 rR14 va_sM == va_if (va_get_reg64 rRdx va_sM > 6) (fun _ -> va_get_reg64 rR14 va_s0 + 96) (fun _ -> va_get_reg64 rR14 va_s0) /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 0 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 7)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 5 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 8)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 6 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 9)) /\ (va_get_reg64 rRdx va_sM == 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 7 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 3 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 11)) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) plain_quads alg key_words ctr_BE_orig count) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 10 va_sM == va_get_xmm 0 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 11 va_sM == va_get_xmm 5 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 12 va_sM == va_get_xmm 6 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 14 va_sM == va_get_xmm 3 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 0))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs scratch_b (count + 1) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_sM))) ==> va_k va_sM ((y_new)))) val va_wpProof_Loop6x_decrypt : alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> count:nat -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> va_s0:va_state -> va_k:(va_state -> quad32 -> Type0) -> Ghost (va_state & va_fuel & quad32) (requires (va_t_require va_s0 /\ va_wp_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_decrypt alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k = let (va_sM, va_f0, y_new) = va_lemma_Loop6x_decrypt (va_code_Loop6x_decrypt alg) va_s0 alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_sM va_s0; let va_g = (y_new) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_decrypt (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode quad32 (va_code_Loop6x_decrypt alg)) = (va_QProc (va_code_Loop6x_decrypt alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) (va_wp_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE) (va_wpProof_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE)) #pop-options //-- //-- Loop6x_loop_decrypt_body0 #push-options "--z3rlimit 700" val va_code_Loop6x_loop_decrypt_body0 : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop_decrypt_body0 alg = (va_Block (va_CCons (va_code_Loop6x_decrypt alg) (va_CCons (va_Block (va_CNil ())) (va_CNil ())))) val va_codegen_success_Loop6x_loop_decrypt_body0 : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop_decrypt_body0 alg = (va_pbool_and (va_codegen_success_Loop6x_decrypt alg) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop_decrypt_body0 (va_mods:va_mods_t) (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_decrypt_body0 alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (ctr_BE_orig:quad32) = va_in_ctr_BE_orig in let (h_LE:quad32) = va_in_h_LE in let (hkeys_b:buffer128) = va_in_hkeys_b in let (in0_b:buffer128) = va_in_in0_b in let (in_b:buffer128) = va_in_in_b in let (iv_b:buffer128) = va_in_iv_b in let (key_words:(seq nat32)) = va_in_key_words in let (keys_b:buffer128) = va_in_keys_b in let (out_b:buffer128) = va_in_out_b in let (plain_quads:(seq quad32)) = va_in_plain_quads in let (round_keys:(seq quad32)) = va_in_round_keys in let (scratch_b:buffer128) = va_in_scratch_b in let (y_orig:quad32) = va_in_y_orig in let (ctr:quad32) = va_in_ctr in let (iter:nat) = va_in_iter in let (y_cur:quad32) = va_in_y_cur in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 733 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_decrypt alg h_LE y_orig y_cur iter iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr) (fun (va_s:va_state) (y_cur:quad32) -> va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 735 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter + 1 >= 0) (fun _ -> let (iter:nat) = iter + 1 in let (ctr:quad32) = Vale.AES.GCTR_s.inc32 ctr 6 in va_QEmpty ((ctr, iter, y_cur)))))) val va_lemma_Loop6x_loop_decrypt_body0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> Ghost (va_state & va_fuel & quad32 & nat & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_decrypt_body0 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ va_get_reg64 rRdx va_s0 > 0)) (ensures (fun (va_sM, va_fM, ctr, iter, y_cur) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))))))))))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsVector.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.InsAes.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Words.fsti.checked", "Vale.Math.Poly2.Lemmas.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Math.Poly2.Bits.fsti.checked", "Vale.Math.Poly2.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Prop_s.fst.checked", "Vale.Def.Opaque_s.fsti.checked", "Vale.Arch.TypesNative.fsti.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.X64.PolyOps.fsti.checked", "Vale.AES.X64.AESopt2.fsti.checked", "Vale.AES.X64.AESopt.fsti.checked", "Vale.AES.GHash.fsti.checked", "Vale.AES.GF128_s.fsti.checked", "Vale.AES.GF128.fsti.checked", "Vale.AES.GCTR_s.fst.checked", "Vale.AES.GCTR.fsti.checked", "Vale.AES.GCM_helpers.fsti.checked", "Vale.AES.AES_s.fst.checked", "Vale.AES.AES_helpers.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": true, "source_file": "Vale.AES.X64.AESGCM.fst" }

[ { "abbrev": false, "full_module": "Vale.AES.X64.AESopt2", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.AESopt", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Lemmas", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.PolyOps", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.TypesNative", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Prop_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.AESopt2", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.AESopt", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Lemmas", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.PolyOps", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.TypesNative", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Prop_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 700, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

va_b0: Vale.X64.Decls.va_code -> va_s0: Vale.X64.Decls.va_state -> va_old: Vale.X64.Decls.va_state -> alg: Vale.AES.AES_common_s.algorithm -> va_in_ctr_BE_orig: Vale.X64.Decls.quad32 -> va_in_h_LE: Vale.X64.Decls.quad32 -> va_in_hkeys_b: Vale.X64.Memory.buffer128 -> va_in_in0_b: Vale.X64.Memory.buffer128 -> va_in_in_b: Vale.X64.Memory.buffer128 -> va_in_iv_b: Vale.X64.Memory.buffer128 -> va_in_key_words: FStar.Seq.Base.seq Vale.X64.Memory.nat32 -> va_in_keys_b: Vale.X64.Memory.buffer128 -> va_in_out_b: Vale.X64.Memory.buffer128 -> va_in_plain_quads: FStar.Seq.Base.seq Vale.X64.Decls.quad32 -> va_in_round_keys: FStar.Seq.Base.seq Vale.X64.Decls.quad32 -> va_in_scratch_b: Vale.X64.Memory.buffer128 -> va_in_y_orig: Vale.X64.Decls.quad32 -> va_in_ctr: Vale.X64.Decls.quad32 -> va_in_iter: Prims.nat -> va_in_y_cur: Vale.X64.Decls.quad32 -> Prims.Ghost ((((Vale.X64.Decls.va_state * Vale.X64.Decls.va_fuel) * Vale.X64.Decls.quad32) * Prims.nat) * Vale.X64.Decls.quad32)

Prims.Ghost

[]

[ "Vale.X64.Decls.va_code", "Vale.X64.Decls.va_state", "Vale.AES.AES_common_s.algorithm", "Vale.X64.Decls.quad32", "Vale.X64.Memory.buffer128", "FStar.Seq.Base.seq", "Vale.X64.Memory.nat32", "Prims.nat", "Vale.X64.QuickCodes.fuel", "FStar.Pervasives.Native.tuple3", "FStar.Pervasives.Native.Mktuple5", "Vale.X64.Decls.va_fuel", "FStar.Pervasives.Native.tuple5", "Vale.Def.Types_s.quad32", "Prims.unit", "Vale.X64.QuickCode.va_lemma_norm_mods", "Prims.Cons", "Vale.X64.QuickCode.mod_t", "Vale.X64.QuickCode.va_Mod_xmm", "Vale.X64.QuickCode.va_Mod_reg64", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR12", "Vale.X64.Machine_s.rR11", "Vale.X64.QuickCode.va_Mod_ok", "Vale.X64.QuickCode.va_Mod_mem", "Vale.X64.QuickCode.va_Mod_mem_heaplet", "Vale.X64.QuickCode.va_Mod_flags", "Prims.Nil", "FStar.Pervasives.assert_norm", "Prims.eq2", "Prims.list", "Vale.X64.QuickCode.__proj__QProc__item__mods", "Vale.AES.X64.AESGCM.va_code_Loop6x_loop_decrypt_body0", "Vale.X64.State.vale_state", "Vale.X64.QuickCodes.va_wp_sound_code_norm", "Prims.l_and", "Vale.X64.QuickCodes.label", "Vale.X64.QuickCodes.va_range1", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Vale.X64.CPU_Features_s.sse_enabled", "Vale.X64.CPU_Features_s.movbe_enabled", "Prims.int", "Vale.X64.Decls.va_get_reg64", "Prims.op_Subtraction", "Prims.op_Multiply", "Prims.op_Addition", "Vale.Def.Words_s.four", "Vale.Def.Types_s.nat32", "Vale.X64.Decls.va_get_xmm", "Vale.Def.Words_s.Mkfour", "Vale.X64.Decls.validDstAddrs128", "Vale.X64.Decls.va_get_mem_heaplet", "Vale.X64.Machine_s.rR8", "Vale.X64.Decls.va_get_mem_layout", "Vale.Arch.HeapTypes_s.Public", "Prims.l_imp", "Prims.op_GreaterThan", "Vale.X64.Decls.validSrcAddrsOffset128", "Vale.Arch.HeapTypes_s.Secret", "Vale.X64.Decls.validDstAddrsOffset128", "Vale.X64.Machine_s.rRbp", "Vale.X64.Decls.validSrcAddrs128", "Vale.X64.Machine_s.rR9", "Prims.l_or", "Vale.X64.Decls.buffers_disjoint128", "Prims.op_GreaterThanOrEqual", "FStar.Seq.Base.length", "Vale.X64.Decls.s128", "Vale.AES.GCTR.partial_seq_agreement", "Prims.op_LessThan", "Vale.X64.Machine_s.pow2_64", "Vale.X64.Decls.modifies_buffer_specific128", "Vale.X64.Decls.buffer_modifies_specific128", "Vale.AES.X64.AESopt.aes_reqs_offset", "Vale.X64.Machine_s.rRcx", "FStar.Seq.Base.index", "Vale.X64.CPU_Features_s.pclmulqdq_enabled", "Vale.AES.AES_s.aes_encrypt_LE", "Vale.AES.GHash.hkeys_reqs_priv", "Vale.Def.Types_s.reverse_bytes_quad32", "Vale.AES.X64.AESopt.scratch_reqs", "Prims.op_LessThanOrEqual", "Vale.AES.GHash.ghash_incremental0", "FStar.Seq.Base.slice", "Vale.Math.Poly2.Bits_s.to_quad32", "Vale.Math.Poly2_s.add", "Vale.Math.Poly2.Bits_s.of_quad32", "Vale.X64.Decls.buffer128_read", "Prims.op_Modulus", "Vale.X64.Machine_s.pow2_32", "Vale.AES.GCTR.inc32lite", "Vale.Def.Words_s.__proj__Mkfour__item__lo0", "Vale.Def.Types_s.quad32_xor", "Vale.AES.GCTR.gctr_registers", "Vale.AES.GCTR.gctr_partial", "Vale.X64.QuickCodes.precedes_wrap", "Vale.Def.Types_s.nat64", "Vale.X64.QuickCode.quickCode", "Vale.AES.X64.AESGCM.va_qcode_Loop6x_loop_decrypt_body0", "Vale.X64.Decls.va_expand_state" ]

[]

false

let va_lemma_Loop6x_loop_decrypt_body0 va_b0 va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur =

let va_old = va_expand_state va_old in let va_mods:va_mods_t = [ va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags ] in let va_qc = va_qcode_Loop6x_loop_decrypt_body0 va_mods va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in let va_sM, va_fM, va_g = va_wp_sound_code_norm (va_code_Loop6x_loop_decrypt_body0 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let ctr, iter, y_cur = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 653 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (sse_enabled /\ movbe_enabled) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 655 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 658 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 659 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 661 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 664 column 69 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 666 column 121 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 669 column 114 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 671 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 672 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 674 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 675 column 79 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 676 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 677 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_in0_b == va_in_in_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 679 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 680 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 681 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM) < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 682 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 683 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM) < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 685 column 76 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 686 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 687 column 117 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 688 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 691 column 87 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 692 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 695 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" pclmulqdq_enabled /\ label va_range1 "***** POSTCONDITION NOT MET AT line 696 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 697 column 78 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 698 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 699 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 701 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 702 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 705 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((va_get_reg64 rRdx va_sM) `op_Modulus` 6 == 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 706 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 707 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 708 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 709 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 710 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 711 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 712 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 713 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == (Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr) `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 715 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 717 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 718 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 719 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 720 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 721 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 724 column 90 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 727 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 728 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 729 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([ va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags ]) va_sM va_s0; let ctr, iter, y_cur = va_g in (va_sM, va_fM, ctr, iter, y_cur)

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_wp_Fsqr2_stdcall

val va_wp_Fsqr2_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0

let va_wp_Fsqr2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 21, "end_line": 1488, "start_col": 0, "start_line": 1424 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fsqr val va_code_Fsqr : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr ())) = (va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b)) //-- //-- Fsqr_stdcall val va_code_Fsqr_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr_stdcall win)) = (va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b)) //-- //-- Fsqr2 val va_code_Fsqr2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr2 tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr2 ())) = (va_QProc (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr2 tmp_b inA_b dst_b) (va_wpProof_Fsqr2 tmp_b inA_b dst_b)) //-- //-- Fsqr2_stdcall val va_code_Fsqr2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr2_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) val va_lemma_Fsqr2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> va_s0: Vale.X64.Decls.va_state -> va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0) -> Type0

Prims.Tot

[ "total" ]

[]

[ "Prims.bool", "Vale.X64.Memory.buffer64", "Vale.X64.Decls.va_state", "Prims.unit", "Prims.l_and", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Prims.eq2", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rRsp", "Vale.X64.Stack_i.init_rsp", "Vale.X64.Decls.va_get_stack", "Vale.X64.Memory.is_initial_heap", "Vale.X64.Decls.va_get_mem_layout", "Vale.X64.Decls.va_get_mem", "Vale.X64.CPU_Features_s.adx_enabled", "Vale.X64.CPU_Features_s.bmi2_enabled", "Prims.l_or", "Vale.X64.Decls.buffers_disjoint", "Vale.X64.Decls.validDstAddrs64", "Vale.Arch.HeapTypes_s.Secret", "Vale.X64.Decls.validSrcAddrs64", "Vale.X64.Decls.va_int_range", "Vale.X64.Decls.va_if", "Vale.Def.Types_s.nat64", "Vale.X64.Machine_s.rR8", "Prims.l_not", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRdi", "Prims.l_Forall", "Vale.X64.InsBasic.vale_heap", "Vale.X64.Memory.nat64", "Vale.X64.Flags.t", "Vale.Arch.HeapImpl.vale_heap_layout", "Vale.X64.InsBasic.vale_stack", "Vale.X64.Memory.memtaint", "Prims.l_imp", "Prims.int", "Prims.op_Modulus", "Vale.Curve25519.Fast_defs.prime", "Vale.X64.Decls.va_mul_nat", "Vale.X64.Decls.modifies_buffer_2", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRbp", "Vale.X64.Machine_s.rR12", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR15", "Prims.nat", "Vale.Curve25519.Fast_defs.pow2_four", "Vale.X64.Decls.buffer64_read", "Prims.op_Addition", "Vale.X64.State.vale_state", "Vale.X64.Decls.va_upd_stackTaint", "Vale.X64.Decls.va_upd_stack", "Vale.X64.Decls.va_upd_mem_layout", "Vale.X64.Decls.va_upd_mem_heaplet", "Vale.X64.Decls.va_upd_flags", "Vale.X64.Decls.va_upd_reg64", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rRax", "Vale.X64.Decls.va_upd_mem" ]

[]

false

true

let va_wp_Fsqr2_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0)) : Type0 =

(va_get_ok va_s0 /\ (let tmp_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem: vale_heap) (va_x_rax: nat64) (va_x_rbx: nat64) (va_x_rcx: nat64) (va_x_rdx: nat64) (va_x_rsi: nat64) (va_x_rdi: nat64) (va_x_rbp: nat64) (va_x_rsp: nat64) (va_x_r8: nat64) (va_x_r9: nat64) (va_x_r10: nat64) (va_x_r11: nat64) (va_x_r12: nat64) (va_x_r13: nat64) (va_x_r14: nat64) (va_x_r15: nat64) (va_x_efl: Vale.X64.Flags.t) (va_x_heap0: vale_heap) (va_x_memLayout: vale_heap_layout) (va_x_stack: vale_stack) (va_x_stackTaint: memtaint). let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0) )))))))))))))) )))))) in va_get_ok va_sM /\ (let tmp_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\ d' `op_Modulus` prime == (va_mul_nat a' a') `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.length

val length (#b: _) (vb:buffer b) : GTot nat

let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb)

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 57, "end_line": 33, "start_col": 0, "start_line": 32 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

vb: LowStar.BufferView.Up.buffer b -> Prims.GTot Prims.nat

Prims.GTot

[ "sometrivial" ]

[]

[ "LowStar.BufferView.Up.buffer", "Prims.op_Division", "LowStar.BufferView.Down.length", "LowStar.BufferView.Up.buffer_src", "LowStar.BufferView.Up.as_down_buffer", "LowStar.BufferView.Up.__proj__View__item__n", "LowStar.BufferView.Up.get_view", "Prims.nat" ]

[]

false

let length #b vb =

Down.length (as_down_buffer vb) / View?.n (get_view vb)

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.mk_buffer

val mk_buffer (#src:Type0) (#dest:Type0) (b:Down.buffer src) (v:view src dest{ Down.length b % View?.n v == 0 }) : GTot (buffer dest)

let mk_buffer #src #dest down_buf v = Buffer src down_buf v

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 59, "end_line": 26, "start_col": 0, "start_line": 26 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

b: LowStar.BufferView.Down.buffer src -> v: LowStar.BufferView.Up.view src dest {LowStar.BufferView.Down.length b % View?.n v == 0} -> Prims.GTot (LowStar.BufferView.Up.buffer dest)

Prims.GTot

[ "sometrivial" ]

[]

[ "LowStar.BufferView.Down.buffer", "LowStar.BufferView.Up.view", "Prims.eq2", "Prims.int", "Prims.op_Modulus", "LowStar.BufferView.Down.length", "LowStar.BufferView.Up.__proj__View__item__n", "LowStar.BufferView.Up.Buffer", "LowStar.BufferView.Up.buffer" ]

[]

false

let mk_buffer #src #dest down_buf v =

Buffer src down_buf v

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.view_indexing

val view_indexing (#b: _) (vb:buffer b) (i:nat{i < length vb}) : Lemma (let open FStar.Mul in let n = View?.n (get_view vb) in n <= length vb * n - i * n)

let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n)

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 40, "end_line": 46, "start_col": 0, "start_line": 38 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = ()

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

vb: LowStar.BufferView.Up.buffer b -> i: Prims.nat{i < LowStar.BufferView.Up.length vb} -> FStar.Pervasives.Lemma (ensures (let n = View?.n (LowStar.BufferView.Up.get_view vb) in n <= LowStar.BufferView.Up.length vb * n - i * n))

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "LowStar.BufferView.Up.buffer", "Prims.nat", "Prims.b2t", "Prims.op_LessThan", "LowStar.BufferView.Up.length", "Prims._assert", "Prims.op_LessThanOrEqual", "FStar.Mul.op_Star", "Prims.op_Addition", "Prims.op_Minus", "Prims.unit", "Prims.op_GreaterThan", "Prims.op_Equality", "Prims.int", "FStar.Math.Lemmas.distributivity_add_left", "LowStar.BufferView.Up.length_eq", "Prims.pos", "LowStar.BufferView.Up.__proj__View__item__n", "LowStar.BufferView.Up.buffer_src", "LowStar.BufferView.Up.get_view" ]

[]

true

false

true

false

let view_indexing #b vb i =

let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (- i) n; let open FStar.Mul in assert ((length vb + (- i)) * n = length vb * n + (- i) * n); assert (length vb > i); assert (length vb + (- i) > 0); assert (n <= (length vb + (- i)) * n)

false

Vale.Curve25519.X64.FastWide.fsti

Vale.Curve25519.X64.FastWide.va_ens_Fsqr2_stdcall

val va_ens_Fsqr2_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b: buffer64) (va_sM: va_state) (va_fM: va_fuel) : prop

let va_ens_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))

{ "file_name": "obj/Vale.Curve25519.X64.FastWide.fsti", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 74, "end_line": 1359, "start_col": 0, "start_line": 1313 }

module Vale.Curve25519.X64.FastWide open Vale.Def.Types_s open Vale.Arch.Types open Vale.Arch.HeapImpl open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.Stack_i open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsStack open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Curve25519.Fast_defs open Vale.X64.CPU_Features_s //-- Fmul val va_code_Fmul : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul ())) = (va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) //-- //-- Fmul_stdcall val va_code_Fmul_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) = (va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2 val va_code_Fmul2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = (va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) //-- //-- Fmul2_stdcall val va_code_Fmul2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) [@ va_qattr] let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) = (va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) //-- //-- Fsqr val va_code_Fsqr : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr ())) = (va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b) (va_wpProof_Fsqr tmp_b inA_b dst_b)) //-- //-- Fsqr_stdcall val va_code_Fsqr_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack) (va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr_stdcall win)) = (va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b)) //-- //-- Fsqr2 val va_code_Fsqr2 : va_dummy:unit -> Tot va_code val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret)) let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop = (va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) val va_lemma_Fsqr2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@ va_qattr] let va_wp_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\ va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) val va_wpProof_Fsqr2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Fsqr2 tmp_b inA_b dst_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@ "opaque_to_smt" va_qattr] let va_quick_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit (va_code_Fsqr2 ())) = (va_QProc (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr2 tmp_b inA_b dst_b) (va_wpProof_Fsqr2 tmp_b inA_b dst_b)) //-- //-- Fsqr2_stdcall val va_code_Fsqr2_stdcall : win:bool -> Tot va_code val va_codegen_success_Fsqr2_stdcall : win:bool -> Tot va_pbool let va_req_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : prop = (va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\ Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.Stack_i.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsStack.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Def.Types_s.fst.checked", "Vale.Curve25519.Fast_defs.fst.checked", "Vale.Arch.Types.fsti.checked", "Vale.Arch.HeapImpl.fsti.checked", "prims.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked" ], "interface_file": false, "source_file": "Vale.Curve25519.X64.FastWide.fsti" }

[ { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.Fast_defs", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsStack", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Stack_i", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.HeapImpl", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.Curve25519.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

va_b0: Vale.X64.Decls.va_code -> va_s0: Vale.X64.Decls.va_state -> win: Prims.bool -> tmp_b: Vale.X64.Memory.buffer64 -> inA_b: Vale.X64.Memory.buffer64 -> dst_b: Vale.X64.Memory.buffer64 -> va_sM: Vale.X64.Decls.va_state -> va_fM: Vale.X64.Decls.va_fuel -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Vale.X64.Decls.va_code", "Vale.X64.Decls.va_state", "Prims.bool", "Vale.X64.Memory.buffer64", "Vale.X64.Decls.va_fuel", "Prims.l_and", "Vale.Curve25519.X64.FastWide.va_req_Fsqr2_stdcall", "Vale.X64.Decls.va_ensure_total", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Prims.eq2", "Prims.int", "Prims.op_Modulus", "Vale.Curve25519.Fast_defs.prime", "Vale.X64.Decls.va_mul_nat", "Vale.X64.Decls.modifies_buffer_2", "Vale.X64.Decls.va_get_mem", "Prims.l_imp", "Vale.Def.Types_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRbp", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRsp", "Vale.X64.Machine_s.rR12", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR15", "Prims.l_not", "Prims.nat", "Vale.Curve25519.Fast_defs.pow2_four", "Vale.Def.Words_s.nat64", "Vale.X64.Decls.buffer64_read", "Prims.op_Addition", "Vale.X64.Decls.va_int_range", "Vale.X64.Machine_s.rR8", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRcx", "Vale.X64.Decls.va_state_eq", "Vale.X64.Decls.va_update_stackTaint", "Vale.X64.Decls.va_update_stack", "Vale.X64.Decls.va_update_mem_layout", "Vale.X64.Decls.va_update_mem_heaplet", "Vale.X64.Decls.va_update_flags", "Vale.X64.Decls.va_update_reg64", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rR10", "Vale.X64.Machine_s.rR9", "Vale.X64.Machine_s.rRax", "Vale.X64.Decls.va_update_ok", "Vale.X64.Decls.va_update_mem", "Prims.prop" ]

[]

false

true

let va_ens_Fsqr2_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b: buffer64) (va_sM: va_state) (va_fM: va_fuel) : prop =

(va_req_Fsqr2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (let tmp_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let inA_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let dst_in:(va_int_range 0 18446744073709551615) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\ d' `op_Modulus` prime == (va_mul_nat a' a') `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0 )))))) ))))))))))))))))))

false

Vale.AES.X64.AESGCM.fst

Vale.AES.X64.AESGCM.va_lemma_Loop6x_loop_decrypt_while0

val va_lemma_Loop6x_loop_decrypt_while0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> Ghost (va_state & va_fuel & quad32 & nat & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_decrypt_while0 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig))) (ensures (fun (va_sM, va_fM, ctr, iter, y_cur) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ ~(va_get_reg64 rRdx va_sM > 0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))))))))))))

let va_lemma_Loop6x_loop_decrypt_while0 va_b0 va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur = let va_old = va_expand_state va_old in let (va_mods:va_mods_t) = [va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags] in let va_qc = va_qcode_Loop6x_loop_decrypt_while0 va_mods va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop_decrypt_while0 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let (ctr, iter, y_cur) = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 653 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (sse_enabled /\ movbe_enabled) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 655 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 658 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 659 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 661 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 664 column 69 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 666 column 121 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 669 column 114 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 671 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 672 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 674 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 675 column 79 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 676 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 677 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_in0_b == va_in_in_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 679 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 680 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 681 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 682 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 683 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 685 column 76 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 686 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 687 column 117 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 688 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 691 column 87 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 692 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 695 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" pclmulqdq_enabled /\ label va_range1 "***** POSTCONDITION NOT MET AT line 696 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 697 column 78 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 698 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 699 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 701 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 702 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 705 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 706 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 707 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 708 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 709 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 710 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 711 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 712 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 713 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 715 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 717 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 718 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 719 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 720 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 721 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 724 column 90 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 727 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 728 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (~(va_get_reg64 rRdx va_sM > 0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let (ctr, iter, y_cur) = va_g in (va_sM, va_fM, ctr, iter, y_cur)

{ "file_name": "obj/Vale.AES.X64.AESGCM.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 34, "end_line": 2478, "start_col": 0, "start_line": 2295 }

module Vale.AES.X64.AESGCM open FStar.Mul open Vale.Def.Prop_s open Vale.Def.Opaque_s open Vale.Def.Words_s open Vale.Def.Types_s open FStar.Seq open Vale.AES.AES_s open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsVector open Vale.X64.InsAes open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Arch.Types open Vale.AES.AES_helpers //open Vale.Poly1305.Math // For lemma_poly_bits64() open Vale.AES.GCM_helpers open Vale.AES.GCTR_s open Vale.AES.GCTR open Vale.Arch.TypesNative open Vale.X64.CPU_Features_s open Vale.AES.X64.PolyOps open Vale.Math.Poly2_s open Vale.Math.Poly2 open Vale.Math.Poly2.Bits_s open Vale.Math.Poly2.Bits open Vale.Math.Poly2.Lemmas open Vale.AES.GF128_s open Vale.AES.GF128 open Vale.AES.GHash open Vale.AES.X64.AESopt open Vale.AES.X64.AESopt2 unfold let lo(x:poly):poly = mask x 64 unfold let hi(x:poly):poly = shift x (-64) //let scratch_reqs (scratch_b:buffer128) (count:nat) (heap3:vale_heap) (s:seq quad32) (z3:quad32) : prop0 = // count * 6 + 6 <= length s /\ // (let data = slice s (count * 6) (count * 6 + 6) in // z3 == reverse_bytes_quad32 (index data 5) /\ // buffer128_read scratch_b 3 heap3 == reverse_bytes_quad32 (index data 4) /\ // buffer128_read scratch_b 4 heap3 == reverse_bytes_quad32 (index data 3) /\ // buffer128_read scratch_b 5 heap3 == reverse_bytes_quad32 (index data 2) /\ // buffer128_read scratch_b 6 heap3 == reverse_bytes_quad32 (index data 1) /\ // buffer128_read scratch_b 7 heap3 == reverse_bytes_quad32 (index data 0)) let scratch_reqs_simple (scratch_b:buffer128) (heap3:vale_heap) (data:seq quad32) (z3:quad32) : prop0 = length data == 6 /\ z3 == reverse_bytes_quad32 (index data 5) /\ buffer128_read scratch_b 3 heap3 == reverse_bytes_quad32 (index data 4) /\ buffer128_read scratch_b 4 heap3 == reverse_bytes_quad32 (index data 3) /\ buffer128_read scratch_b 5 heap3 == reverse_bytes_quad32 (index data 2) /\ buffer128_read scratch_b 6 heap3 == reverse_bytes_quad32 (index data 1) /\ buffer128_read scratch_b 7 heap3 == reverse_bytes_quad32 (index data 0) //-- finish_aes_encrypt_le val finish_aes_encrypt_le : alg:algorithm -> input_LE:quad32 -> key:(seq nat32) -> Lemma (requires (Vale.AES.AES_s.is_aes_key_LE alg key)) (ensures (Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key))) let finish_aes_encrypt_le alg input_LE key = Vale.AES.AES_s.aes_encrypt_LE_reveal (); Vale.AES.AES_s.eval_cipher_reveal (); () //-- let va_subscript_FStar__Seq__Base__seq = Seq.index #reset-options "--z3rlimit 30" //-- Load_one_msb val va_code_Load_one_msb : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Load_one_msb () = (va_Block (va_CCons (va_code_ZeroXmm (va_op_xmm_xmm 2)) (va_CCons (va_code_PinsrqImm (va_op_xmm_xmm 2) 72057594037927936 1 (va_op_reg_opr64_reg64 rR11)) (va_CNil ())))) val va_codegen_success_Load_one_msb : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Load_one_msb () = (va_pbool_and (va_codegen_success_ZeroXmm (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_PinsrqImm (va_op_xmm_xmm 2) 72057594037927936 1 (va_op_reg_opr64_reg64 rR11)) (va_ttrue ()))) [@ "opaque_to_smt" va_qattr] let va_qcode_Load_one_msb (va_mods:va_mods_t) : (va_quickCode unit (va_code_Load_one_msb ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 145 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_ZeroXmm (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 146 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Arch.Types.two_to_nat32 (Vale.Def.Words_s.Mktwo #Vale.Def.Words_s.nat32 0 16777216) == 72057594037927936) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 147 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_PinsrqImm (va_op_xmm_xmm 2) 72057594037927936 1 (va_op_reg_opr64_reg64 rR11)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 148 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Def.Types_s.insert_nat64_reveal ()) (va_QEmpty (()))))))) val va_lemma_Load_one_msb : va_b0:va_code -> va_s0:va_state -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load_one_msb ()) va_s0 /\ va_get_ok va_s0 /\ sse_enabled)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 2 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0)))))) [@"opaque_to_smt"] let va_lemma_Load_one_msb va_b0 va_s0 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11; va_Mod_ok] in let va_qc = va_qcode_Load_one_msb va_mods in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Load_one_msb ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 138 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 143 column 46 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216)) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Load_one_msb (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ sse_enabled /\ (forall (va_x_r11:nat64) (va_x_xmm2:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 2 va_x_xmm2 (va_upd_reg64 rR11 va_x_r11 va_s0)) in va_get_ok va_sM /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 ==> va_k va_sM (()))) val va_wpProof_Load_one_msb : va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load_one_msb va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load_one_msb ()) ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Load_one_msb va_s0 va_k = let (va_sM, va_f0) = va_lemma_Load_one_msb (va_code_Load_one_msb ()) va_s0 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 2 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Load_one_msb () : (va_quickCode unit (va_code_Load_one_msb ())) = (va_QProc (va_code_Load_one_msb ()) ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11]) va_wp_Load_one_msb va_wpProof_Load_one_msb) //-- //-- Ctr32_ghash_6_prelude val va_code_Ctr32_ghash_6_prelude : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Ctr32_ghash_6_prelude alg = (va_Block (va_CCons (va_code_Load_one_msb ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 4) (va_op_opr128_xmm 4)) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 15)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_CNil ())))))))))))) val va_codegen_success_Ctr32_ghash_6_prelude : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Ctr32_ghash_6_prelude alg = (va_pbool_and (va_codegen_success_Load_one_msb ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 4) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 15)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_ttrue ()))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Ctr32_ghash_6_prelude (va_mods:va_mods_t) (alg:algorithm) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) : (va_quickCode unit (va_code_Ctr32_ghash_6_prelude alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 211 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_one_msb ()) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 212 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 4) (va_op_opr128_xmm 4)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 213 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Arch.Types.lemma_quad32_xor ()) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 214 column 19 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret keys_b 0) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 215 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg44:Vale.Def.Types_s.quad32) = va_get_xmm 10 va_s in let (va_arg43:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg42:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 215 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg42 va_arg43 va_arg44 1) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 216 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg41:Vale.Def.Types_s.quad32) = va_get_xmm 11 va_s in let (va_arg40:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg39:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 216 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg39 va_arg40 va_arg41 2) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 217 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg38:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_s in let (va_arg37:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg36:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 217 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg36 va_arg37 va_arg38 3) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 218 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg35:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_s in let (va_arg34:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg33:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 218 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg33 va_arg34 va_arg35 4) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 219 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg32:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_s in let (va_arg31:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg30:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 219 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg30 va_arg31 va_arg32 5) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 220 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 221 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret scratch_b 1) (va_QEmpty (()))))))))))))))))))) val va_lemma_Ctr32_ghash_6_prelude : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> scratch_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_orig:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Ctr32_ghash_6_prelude alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 8 (va_get_mem_layout va_s0) Secret /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 1 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (va_get_xmm 15 va_sM) /\ (let counter = Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 in (counter + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) /\ (counter + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) /\ (counter + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) /\ (counter + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) /\ (counter + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) /\ Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_reg64 rR11 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 4 va_sM (va_update_xmm 2 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))) [@"opaque_to_smt"] let va_lemma_Ctr32_ghash_6_prelude va_b0 va_s0 alg scratch_b key_words round_keys keys_b ctr_orig = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Ctr32_ghash_6_prelude va_mods alg scratch_b key_words round_keys keys_b ctr_orig in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Ctr32_ghash_6_prelude alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 151 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 194 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 1) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 196 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 197 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 199 column 83 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 200 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (let counter = Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 in label va_range1 "***** POSTCONDITION NOT MET AT line 201 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 202 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 203 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 204 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 205 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 207 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 208 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_ok; va_Mod_mem]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Ctr32_ghash_6_prelude (alg:algorithm) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 8 (va_get_mem_layout va_s0) Secret /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) /\ (forall (va_x_mem:vale_heap) (va_x_xmm2:quad32) (va_x_xmm4:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_r11:nat64) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_reg64 rR11 va_x_r11 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 2 va_x_xmm2 (va_upd_mem va_x_mem va_s0)))))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 1 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (va_get_xmm 15 va_sM) /\ (let counter = Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 in (counter + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) /\ (counter + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) /\ (counter + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) /\ (counter + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) /\ (counter + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) /\ Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) ==> va_k va_sM (()))) val va_wpProof_Ctr32_ghash_6_prelude : alg:algorithm -> scratch_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_orig:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Ctr32_ghash_6_prelude alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig va_s0 va_k = let (va_sM, va_f0) = va_lemma_Ctr32_ghash_6_prelude (va_code_Ctr32_ghash_6_prelude alg) va_s0 alg scratch_b key_words round_keys keys_b ctr_orig in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_reg64 rR11 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 4 va_sM (va_update_xmm 2 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_mem]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Ctr32_ghash_6_prelude (alg:algorithm) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) : (va_quickCode unit (va_code_Ctr32_ghash_6_prelude alg)) = (va_QProc (va_code_Ctr32_ghash_6_prelude alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_mem]) (va_wp_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig) (va_wpProof_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig)) //-- //-- Handle_ctr32_2 val va_code_Handle_ctr32_2 : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Handle_ctr32_2 () = (va_Block (va_CCons (va_code_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_CCons (va_code_Load_one_lsb (va_op_xmm_xmm 5)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_CCons (va_code_Load_two_lsb (va_op_xmm_xmm 5)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 11) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_CNil ())))))))))))))))))))))) val va_codegen_success_Handle_ctr32_2 : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Handle_ctr32_2 () = (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Load_one_lsb (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_Load_two_lsb (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 11) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_ttrue ()))))))))))))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Handle_ctr32_2 (va_mods:va_mods_t) (ctr_BE:quad32) : (va_quickCode unit (va_code_Handle_ctr32_2 ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 253 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 258 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_one_lsb (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 260 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 262 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_two_lsb (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 263 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 265 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 266 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 267 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 11) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 268 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 269 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 270 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 271 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 272 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 273 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 274 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 275 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 276 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 277 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 278 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 279 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_QEmpty (()))))))))))))))))))))))) val va_lemma_Handle_ctr32_2 : va_b0:va_code -> va_s0:va_state -> ctr_BE:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Handle_ctr32_2 ()) va_s0 /\ va_get_ok va_s0 /\ (avx_enabled /\ sse_enabled /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 ctr_BE))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (va_get_xmm 4 va_sM) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (va_get_xmm 4 va_sM) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (va_get_xmm 4 va_sM) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (va_get_xmm 4 va_sM) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (va_get_xmm 4 va_sM) /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0)))))))))))))) [@"opaque_to_smt"] let va_lemma_Handle_ctr32_2 va_b0 va_s0 ctr_BE = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11; va_Mod_ok] in let va_qc = va_qcode_Handle_ctr32_2 va_mods ctr_BE in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Handle_ctr32_2 ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 224 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 246 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 247 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 248 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 249 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 250 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 251 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Handle_ctr32_2 (ctr_BE:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (avx_enabled /\ sse_enabled /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 ctr_BE) /\ (forall (va_x_r11:nat64) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rR11 va_x_r11 va_s0)))))))))) in va_get_ok va_sM /\ (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (va_get_xmm 4 va_sM) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (va_get_xmm 4 va_sM) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (va_get_xmm 4 va_sM) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (va_get_xmm 4 va_sM) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (va_get_xmm 4 va_sM) /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) ==> va_k va_sM (()))) val va_wpProof_Handle_ctr32_2 : ctr_BE:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Handle_ctr32_2 ctr_BE va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Handle_ctr32_2 ()) ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Handle_ctr32_2 ctr_BE va_s0 va_k = let (va_sM, va_f0) = va_lemma_Handle_ctr32_2 (va_code_Handle_ctr32_2 ()) va_s0 ctr_BE in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Handle_ctr32_2 (ctr_BE:quad32) : (va_quickCode unit (va_code_Handle_ctr32_2 ())) = (va_QProc (va_code_Handle_ctr32_2 ()) ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11]) (va_wp_Handle_ctr32_2 ctr_BE) (va_wpProof_Handle_ctr32_2 ctr_BE)) //-- //-- Loop6x_decrypt #push-options "--z3rlimit 300" val va_code_Loop6x_decrypt : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_decrypt alg = (va_Block (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_Loop6x_partial alg) (va_CCons (va_code_Loop6x_final alg) (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 6)) (va_CCons (va_IfElse (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 6)) (va_Block (va_CCons (va_code_Add64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_CNil ()))) (va_Block (va_CNil ()))) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_IfElse (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (va_Block (va_CCons (va_code_Loop6x_save_output ()) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_CCons (va_Block (va_CNil ())) (va_CNil ()))))) (va_Block (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret)) (va_CCons (va_code_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_op_opr128_xmm 4)) (va_CNil ())))))) (va_CNil ())))))))))))))) val va_codegen_success_Loop6x_decrypt : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_decrypt alg = (va_pbool_and (va_codegen_success_Loop6x_partial alg) (va_pbool_and (va_codegen_success_Loop6x_final alg) (va_pbool_and (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 6)) (va_pbool_and (va_codegen_success_Add64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_pbool_and (va_pbool_and (va_codegen_success_Loop6x_save_output ()) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret)) (va_codegen_success_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_op_opr128_xmm 4)))))) (va_ttrue ())))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_decrypt (va_mods:va_mods_t) (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode (quad32) (va_code_Loop6x_decrypt alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (prev:Vale.Math.Poly2_s.poly) = add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s))) in let (y_prev:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 prev) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 449 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (fun _ -> let (data:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 450 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 450 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #Vale.X64.Decls.quad32 data (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6))) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 451 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 451 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #Vale.X64.Decls.quad32 (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (FStar.Seq.Base.slice #quad32 plain_quads (count `op_Multiply` 6) (count `op_Multiply` 6 + 6))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 453 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) < 128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 454 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s)) < 128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 455 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s))) < 128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 456 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree prev < 128) (va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 457 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Math.Poly2.Bits.lemma_of_to_quad32 prev) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 459 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_partial alg h_LE y_prev data count (va_if (va_get_reg64 rRdx va_s > 6) (fun _ -> count + 1) (fun _ -> count)) iv_b in0_b in_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE) (fun (va_s:va_state) (init:quad32_6) -> let (eventual_Xi:Vale.Math.Poly2_s.poly) = add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)))) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s)) in va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 463 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (eventual_Xi == Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))) (let (ctrs:(six_of Vale.Def.Types_s.quad32)) = make_six_of #Vale.Def.Types_s.quad32 (fun (i:(va_int_range 0 5)) -> Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE i)) in let (plains:(six_of Vale.X64.Decls.quad32)) = make_six_of #Vale.X64.Decls.quad32 (fun (i:(va_int_range 0 5)) -> Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + i) (va_get_mem_heaplet 6 va_s)) in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 468 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_final alg iv_b scratch_b key_words round_keys keys_b (Vale.AES.GCTR.inc32lite ctr_BE 6) init ctrs plains (Vale.X64.Decls.buffer128_read in0_b (va_if (va_get_reg64 rRdx va_s > 6) (fun _ -> count + 1) (fun _ -> count) `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s))) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 471 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 6)) (fun (va_s:va_state) _ -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 472 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 6)) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 474 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Add64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_QEmpty (())))) (qblock va_mods (fun (va_s:va_state) -> va_QEmpty (())))) (fun (va_s:va_state) va_g -> let (y_new:quad32) = Vale.AES.GHash.ghash_incremental0 h_LE y_prev data in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 479 column 36 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 (count `op_Multiply` 6)) (fun _ -> let (va_arg104:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = data in let (va_arg103:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6) in let (va_arg102:Vale.Def.Types_s.quad32) = y_new in let (va_arg101:Vale.Def.Types_s.quad32) = y_orig in let (va_arg100:Vale.Def.Types_s.quad32) = h_LE in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 479 column 36 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GHash.lemma_ghash_incremental0_append va_arg100 va_arg101 y_prev va_arg102 va_arg103 va_arg104) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 480 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 (count `op_Multiply` 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 480 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.append #quad32 (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) data)) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 481 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 (count `op_Multiply` 6) /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 481 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #quad32 (FStar.Seq.Base.append #quad32 (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) data) (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6))) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 483 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 483 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6))) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 486 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 488 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_save_output count out_b) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 492 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret scratch_b 2) (fun (va_s:va_state) _ -> let (plain:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b in let (cipher:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (bound:(va_int_at_least 0)) = count `op_Multiply` 6 in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 497 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (bound >= 0 /\ bound <= 4294967295) (fun _ -> let (va_arg99:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg98:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg97:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = cipher in let (va_arg96:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) out_b in let (va_arg95:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg94:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg93:Vale.Def.Types_s.nat32) = bound in let (va_arg92:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 497 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_ignores_postfix va_arg92 va_arg93 va_arg94 va_arg95 va_arg96 va_arg97 va_arg98 va_arg99) (let (va_arg91:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg90:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg89:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = cipher in let (va_arg88:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg87:Prims.nat) = bound in let (va_arg86:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 499 column 29 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_extend6 va_arg86 va_arg87 va_arg88 va_arg89 va_arg90 va_arg91) (let (va_arg85:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s) in let (va_arg84:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)) in let (va_arg83:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 501 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GHash.lemma_add_manip va_arg83 va_arg84 va_arg85) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 507 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))))) (va_QEmpty (())))))))))) (qblock va_mods (fun (va_s:va_state) -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 511 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (eventual_Xi == Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 512 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret scratch_b 1) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 512 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 513 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_op_opr128_xmm 4)) (fun (va_s:va_state) _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 514 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) == Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 515 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) == Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data)))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 516 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 8 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data)) (va_QEmpty (()))))))))))) (fun (va_s:va_state) va_g -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 518 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_registers_reveal ()) (va_QEmpty ((y_new))))))))))))))))))))))))))))) val va_lemma_Loop6x_decrypt : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> count:nat -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> Ghost (va_state & va_fuel & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_decrypt alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ va_get_reg64 rRdx va_s0 >= 6 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b ((count + 1) `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 96 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b count (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig))) (ensures (fun (va_sM, va_fM, y_new) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ ((va_get_reg64 rRdx va_sM == 0 ==> va_get_mem_heaplet 6 va_sM == va_get_mem_heaplet 6 va_s0) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in_b) ((count + 1) `op_Multiply` 6) ((count + 1) `op_Multiply` 6)) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 6 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96 /\ va_get_reg64 rR14 va_sM == (if (va_get_reg64 rRdx va_sM > 6) then (va_get_reg64 rR14 va_s0 + 96) else va_get_reg64 rR14 va_s0) /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 0 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 7)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 5 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 8)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 6 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 9)) /\ (va_get_reg64 rRdx va_sM == 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 7 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 3 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 11)) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) plain_quads alg key_words ctr_BE_orig count) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 10 va_sM == va_get_xmm 0 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 11 va_sM == va_get_xmm 5 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 12 va_sM == va_get_xmm 6 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 14 va_sM == va_get_xmm 3 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 0))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs scratch_b (count + 1) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_sM))) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_decrypt va_b0 va_s0 alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Loop6x_decrypt va_mods alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_decrypt alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let y_new = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 290 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 388 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_mem_heaplet 6 va_sM == va_get_mem_heaplet 6 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 389 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 390 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 391 column 70 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 392 column 100 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in_b) ((count + 1) `op_Multiply` 6) ((count + 1) `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 397 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 398 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 399 column 64 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rR14 va_sM == va_if (va_get_reg64 rRdx va_sM > 6) (fun _ -> va_get_reg64 rR14 va_s0 + 96) (fun _ -> va_get_reg64 rR14 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 400 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 402 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 405 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 407 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 408 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 0 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 7)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 409 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 5 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 8)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 410 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 6 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 9)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 411 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 7 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 412 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 3 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 11)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 414 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 418 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) plain_quads alg key_words ctr_BE_orig count) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 420 column 93 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 421 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 10 va_sM == va_get_xmm 0 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 422 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 11 va_sM == va_get_xmm 5 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 423 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 12 va_sM == va_get_xmm 6 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 424 column 98 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 425 column 35 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 14 va_sM == va_get_xmm 3 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 427 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 0))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 428 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 429 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 430 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 431 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 432 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 435 column 108 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 438 column 90 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 440 column 103 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 441 column 55 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 443 column 89 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs scratch_b (count + 1) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_sM)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem]) va_sM va_s0; let y_new = va_g in (va_sM, va_fM, y_new) [@ va_qattr] let va_wp_Loop6x_decrypt (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) (va_s0:va_state) (va_k:(va_state -> quad32 -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ va_get_reg64 rRdx va_s0 >= 6 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b ((count + 1) `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 96 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b count (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig) /\ (forall (va_x_mem:vale_heap) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_rdx:nat64) (va_x_rbx:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_heap6:vale_heap) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) (y_new:quad32) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_mem va_x_mem va_s0)))))))))))))))))))))))))))) in va_get_ok va_sM /\ ((va_get_reg64 rRdx va_sM == 0 ==> va_get_mem_heaplet 6 va_sM == va_get_mem_heaplet 6 va_s0) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in_b) ((count + 1) `op_Multiply` 6) ((count + 1) `op_Multiply` 6)) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 6 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96 /\ va_get_reg64 rR14 va_sM == va_if (va_get_reg64 rRdx va_sM > 6) (fun _ -> va_get_reg64 rR14 va_s0 + 96) (fun _ -> va_get_reg64 rR14 va_s0) /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 0 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 7)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 5 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 8)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 6 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 9)) /\ (va_get_reg64 rRdx va_sM == 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 7 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 3 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 11)) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) plain_quads alg key_words ctr_BE_orig count) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 10 va_sM == va_get_xmm 0 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 11 va_sM == va_get_xmm 5 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 12 va_sM == va_get_xmm 6 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 14 va_sM == va_get_xmm 3 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 0))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs scratch_b (count + 1) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_sM))) ==> va_k va_sM ((y_new)))) val va_wpProof_Loop6x_decrypt : alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> count:nat -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> va_s0:va_state -> va_k:(va_state -> quad32 -> Type0) -> Ghost (va_state & va_fuel & quad32) (requires (va_t_require va_s0 /\ va_wp_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_decrypt alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k = let (va_sM, va_f0, y_new) = va_lemma_Loop6x_decrypt (va_code_Loop6x_decrypt alg) va_s0 alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_sM va_s0; let va_g = (y_new) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_decrypt (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode quad32 (va_code_Loop6x_decrypt alg)) = (va_QProc (va_code_Loop6x_decrypt alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) (va_wp_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE) (va_wpProof_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE)) #pop-options //-- //-- Loop6x_loop_decrypt_body0 #push-options "--z3rlimit 700" val va_code_Loop6x_loop_decrypt_body0 : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop_decrypt_body0 alg = (va_Block (va_CCons (va_code_Loop6x_decrypt alg) (va_CCons (va_Block (va_CNil ())) (va_CNil ())))) val va_codegen_success_Loop6x_loop_decrypt_body0 : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop_decrypt_body0 alg = (va_pbool_and (va_codegen_success_Loop6x_decrypt alg) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop_decrypt_body0 (va_mods:va_mods_t) (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_decrypt_body0 alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (ctr_BE_orig:quad32) = va_in_ctr_BE_orig in let (h_LE:quad32) = va_in_h_LE in let (hkeys_b:buffer128) = va_in_hkeys_b in let (in0_b:buffer128) = va_in_in0_b in let (in_b:buffer128) = va_in_in_b in let (iv_b:buffer128) = va_in_iv_b in let (key_words:(seq nat32)) = va_in_key_words in let (keys_b:buffer128) = va_in_keys_b in let (out_b:buffer128) = va_in_out_b in let (plain_quads:(seq quad32)) = va_in_plain_quads in let (round_keys:(seq quad32)) = va_in_round_keys in let (scratch_b:buffer128) = va_in_scratch_b in let (y_orig:quad32) = va_in_y_orig in let (ctr:quad32) = va_in_ctr in let (iter:nat) = va_in_iter in let (y_cur:quad32) = va_in_y_cur in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 733 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_decrypt alg h_LE y_orig y_cur iter iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr) (fun (va_s:va_state) (y_cur:quad32) -> va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 735 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter + 1 >= 0) (fun _ -> let (iter:nat) = iter + 1 in let (ctr:quad32) = Vale.AES.GCTR_s.inc32 ctr 6 in va_QEmpty ((ctr, iter, y_cur)))))) val va_lemma_Loop6x_loop_decrypt_body0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> Ghost (va_state & va_fuel & quad32 & nat & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_decrypt_body0 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ va_get_reg64 rRdx va_s0 > 0)) (ensures (fun (va_sM, va_fM, ctr, iter, y_cur) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_loop_decrypt_body0 va_b0 va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur = let va_old = va_expand_state va_old in let (va_mods:va_mods_t) = [va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags] in let va_qc = va_qcode_Loop6x_loop_decrypt_body0 va_mods va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop_decrypt_body0 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let (ctr, iter, y_cur) = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 653 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (sse_enabled /\ movbe_enabled) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 655 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 658 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 659 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 661 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 664 column 69 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 666 column 121 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 669 column 114 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 671 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 672 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 674 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 675 column 79 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 676 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 677 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_in0_b == va_in_in_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 679 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 680 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 681 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 682 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 683 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 685 column 76 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 686 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 687 column 117 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 688 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 691 column 87 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 692 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 695 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" pclmulqdq_enabled /\ label va_range1 "***** POSTCONDITION NOT MET AT line 696 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 697 column 78 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 698 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 699 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 701 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 702 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 705 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 706 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 707 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 708 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 709 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 710 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 711 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 712 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 713 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 715 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 717 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 718 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 719 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 720 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 721 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 724 column 90 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 727 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 728 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 729 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let (ctr, iter, y_cur) = va_g in (va_sM, va_fM, ctr, iter, y_cur) [@ va_qattr] let va_wp_Loop6x_loop_decrypt_body0 (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) (va_s0:va_state) (va_k:(va_state -> (quad32 & nat & quad32) -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ va_get_reg64 rRdx va_s0 > 0 /\ (forall (va_x_efl:Vale.X64.Flags.t) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_heap6:vale_heap) (va_x_mem:vale_heap) (va_x_ok:bool) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_rbx:nat64) (va_x_rdi:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (ctr:quad32) (iter:nat) (y_cur:quad32) . let va_sM = va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_ok va_x_ok (va_upd_mem va_x_mem (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_flags va_x_efl va_s0))))))))))))))))))))))))))))) in va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) ==> va_k va_sM ((ctr, iter, y_cur)))) val va_wpProof_Loop6x_loop_decrypt_body0 : va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> va_s0:va_state -> va_k:(va_state -> (quad32 & nat & quad32) -> Type0) -> Ghost (va_state & va_fuel & (quad32 & nat & quad32)) (requires (va_t_require va_s0 /\ va_wp_Loop6x_loop_decrypt_body0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_loop_decrypt_body0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_loop_decrypt_body0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k = let (va_sM, va_f0, ctr, iter, y_cur) = va_lemma_Loop6x_loop_decrypt_body0 (va_code_Loop6x_loop_decrypt_body0 alg) va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let va_g = (ctr, iter, y_cur) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_loop_decrypt_body0 (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_decrypt_body0 alg)) = (va_QProc (va_code_Loop6x_loop_decrypt_body0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) (va_wp_Loop6x_loop_decrypt_body0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur) (va_wpProof_Loop6x_loop_decrypt_body0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur)) #pop-options //-- //-- Loop6x_loop_decrypt_while0 #push-options "--z3rlimit 700" val va_code_Loop6x_loop_decrypt_while0 : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop_decrypt_while0 alg = (va_Block (va_CCons (va_While (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (va_Block (va_CCons (va_code_Loop6x_loop_decrypt_body0 alg) (va_CNil ())))) (va_CNil ()))) val va_codegen_success_Loop6x_loop_decrypt_while0 : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop_decrypt_while0 alg = (va_pbool_and (va_codegen_success_Loop6x_loop_decrypt_body0 alg) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop_decrypt_while0 (va_mods:va_mods_t) (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_decrypt_while0 alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (ctr_BE_orig:quad32) = va_in_ctr_BE_orig in let (h_LE:quad32) = va_in_h_LE in let (hkeys_b:buffer128) = va_in_hkeys_b in let (in0_b:buffer128) = va_in_in0_b in let (in_b:buffer128) = va_in_in_b in let (iv_b:buffer128) = va_in_iv_b in let (key_words:(seq nat32)) = va_in_key_words in let (keys_b:buffer128) = va_in_keys_b in let (out_b:buffer128) = va_in_out_b in let (plain_quads:(seq quad32)) = va_in_plain_quads in let (round_keys:(seq quad32)) = va_in_round_keys in let (scratch_b:buffer128) = va_in_scratch_b in let (y_orig:quad32) = va_in_y_orig in let (ctr:quad32) = va_in_ctr in let (iter:nat) = va_in_iter in let (y_cur:quad32) = va_in_y_cur in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qWhile va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (fun va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in qblock va_mods (fun (va_s:va_state) -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_loop_decrypt_body0 va_old alg ctr_BE_orig h_LE hkeys_b in0_b in_b iv_b key_words keys_b out_b plain_quads round_keys scratch_b y_orig ctr iter y_cur) (fun (va_s:va_state) va_g -> let (ctr, iter, y_cur) = va_g in va_QEmpty ((ctr, iter, y_cur))))) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in va_get_ok va_s /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_s == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_s == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_s == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s) (va_get_reg64 rR8 va_s) iv_b 1 (va_get_mem_layout va_s) Public /\ (va_get_reg64 rRdx va_s > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rR14 va_s) in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_s) Secret) /\ (va_get_reg64 rRdx va_s == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rR14 va_s) in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_s) Secret) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rRdi va_s) in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_s) Secret) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rRsi va_s) out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_s) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s) (va_get_reg64 rRbp va_s) scratch_b 9 (va_get_mem_layout va_s) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s) (va_get_reg64 rR9 va_s - 32) hkeys_b 8 (va_get_mem_layout va_s) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) in_b) >= 6 /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) in_b))) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRdi va_s + 16 `op_Multiply` va_get_reg64 rRdx va_s < pow2_64) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rR14 va_s + 16 `op_Multiply` (va_get_reg64 rRdx va_s - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRsi va_s + 16 `op_Multiply` va_get_reg64 rRdx va_s < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s) 0 0 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s) (va_get_mem_heaplet 0 va_s) (va_get_mem_layout va_s) /\ va_get_xmm 15 va_s == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ (va_get_reg64 rRdx va_s > 0 ==> scratch_reqs scratch_b iter (va_get_mem_heaplet 3 va_s) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (va_get_xmm 7 va_s)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)))))) /\ (va_get_reg64 rRdx va_s == 0 ==> va_get_xmm 8 va_s == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_s `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRdx va_s >= 6) /\ ctr == Vale.AES.GCTR.inc32lite ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_s == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_s == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_xmm 9 va_s == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_s)) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 10 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 11 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 12 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 13 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 14 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_s == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s) (va_get_xmm 10 va_s) (va_get_xmm 11 va_s) (va_get_xmm 12 va_s) (va_get_xmm 13 va_s) (va_get_xmm 14 va_s) plain_quads alg key_words ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) key_words ctr_BE_orig) /\ (va_get_reg64 rRdx va_s == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) key_words ctr_BE_orig)) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in va_get_reg64 rRdx va_s) ((ctr, iter, y_cur))) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in let va_g = (ctr, iter, y_cur) in let ((ctr:quad32), (iter:nat), (y_cur:quad32)) = va_g in va_QEmpty ((ctr, iter, y_cur))))) val va_lemma_Loop6x_loop_decrypt_while0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> Ghost (va_state & va_fuel & quad32 & nat & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_decrypt_while0 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig))) (ensures (fun (va_sM, va_fM, ctr, iter, y_cur) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ ~(va_get_reg64 rRdx va_sM > 0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))))))))))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsVector.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.InsAes.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Words.fsti.checked", "Vale.Math.Poly2.Lemmas.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Math.Poly2.Bits.fsti.checked", "Vale.Math.Poly2.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Prop_s.fst.checked", "Vale.Def.Opaque_s.fsti.checked", "Vale.Arch.TypesNative.fsti.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.X64.PolyOps.fsti.checked", "Vale.AES.X64.AESopt2.fsti.checked", "Vale.AES.X64.AESopt.fsti.checked", "Vale.AES.GHash.fsti.checked", "Vale.AES.GF128_s.fsti.checked", "Vale.AES.GF128.fsti.checked", "Vale.AES.GCTR_s.fst.checked", "Vale.AES.GCTR.fsti.checked", "Vale.AES.GCM_helpers.fsti.checked", "Vale.AES.AES_s.fst.checked", "Vale.AES.AES_helpers.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": true, "source_file": "Vale.AES.X64.AESGCM.fst" }

[ { "abbrev": false, "full_module": "Vale.AES.X64.AESopt2", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.AESopt", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Lemmas", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.PolyOps", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.TypesNative", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Prop_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.AESopt2", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.AESopt", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Lemmas", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.PolyOps", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.TypesNative", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Prop_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": false, "z3rlimit": 700, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

va_b0: Vale.X64.Decls.va_code -> va_s0: Vale.X64.Decls.va_state -> va_old: Vale.X64.Decls.va_state -> alg: Vale.AES.AES_common_s.algorithm -> va_in_ctr_BE_orig: Vale.X64.Decls.quad32 -> va_in_h_LE: Vale.X64.Decls.quad32 -> va_in_hkeys_b: Vale.X64.Memory.buffer128 -> va_in_in0_b: Vale.X64.Memory.buffer128 -> va_in_in_b: Vale.X64.Memory.buffer128 -> va_in_iv_b: Vale.X64.Memory.buffer128 -> va_in_key_words: FStar.Seq.Base.seq Vale.X64.Memory.nat32 -> va_in_keys_b: Vale.X64.Memory.buffer128 -> va_in_out_b: Vale.X64.Memory.buffer128 -> va_in_plain_quads: FStar.Seq.Base.seq Vale.X64.Decls.quad32 -> va_in_round_keys: FStar.Seq.Base.seq Vale.X64.Decls.quad32 -> va_in_scratch_b: Vale.X64.Memory.buffer128 -> va_in_y_orig: Vale.X64.Decls.quad32 -> va_in_ctr: Vale.X64.Decls.quad32 -> va_in_iter: Prims.nat -> va_in_y_cur: Vale.X64.Decls.quad32 -> Prims.Ghost ((((Vale.X64.Decls.va_state * Vale.X64.Decls.va_fuel) * Vale.X64.Decls.quad32) * Prims.nat) * Vale.X64.Decls.quad32)

Prims.Ghost

[]

[ "Vale.X64.Decls.va_code", "Vale.X64.Decls.va_state", "Vale.AES.AES_common_s.algorithm", "Vale.X64.Decls.quad32", "Vale.X64.Memory.buffer128", "FStar.Seq.Base.seq", "Vale.X64.Memory.nat32", "Prims.nat", "Vale.X64.QuickCodes.fuel", "FStar.Pervasives.Native.tuple3", "FStar.Pervasives.Native.Mktuple5", "Vale.X64.Decls.va_fuel", "FStar.Pervasives.Native.tuple5", "Vale.Def.Types_s.quad32", "Prims.unit", "Vale.X64.QuickCode.va_lemma_norm_mods", "Prims.Cons", "Vale.X64.QuickCode.mod_t", "Vale.X64.QuickCode.va_Mod_xmm", "Vale.X64.QuickCode.va_Mod_reg64", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR12", "Vale.X64.Machine_s.rR11", "Vale.X64.QuickCode.va_Mod_ok", "Vale.X64.QuickCode.va_Mod_mem", "Vale.X64.QuickCode.va_Mod_mem_heaplet", "Vale.X64.QuickCode.va_Mod_flags", "Prims.Nil", "FStar.Pervasives.assert_norm", "Prims.eq2", "Prims.list", "Vale.X64.QuickCode.__proj__QProc__item__mods", "Vale.AES.X64.AESGCM.va_code_Loop6x_loop_decrypt_while0", "Vale.X64.State.vale_state", "Vale.X64.QuickCodes.va_wp_sound_code_norm", "Prims.l_and", "Vale.X64.QuickCodes.label", "Vale.X64.QuickCodes.va_range1", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Vale.X64.CPU_Features_s.sse_enabled", "Vale.X64.CPU_Features_s.movbe_enabled", "Prims.int", "Vale.X64.Decls.va_get_reg64", "Prims.op_Subtraction", "Prims.op_Multiply", "Prims.op_Addition", "Vale.Def.Words_s.four", "Vale.Def.Types_s.nat32", "Vale.X64.Decls.va_get_xmm", "Vale.Def.Words_s.Mkfour", "Vale.X64.Decls.validDstAddrs128", "Vale.X64.Decls.va_get_mem_heaplet", "Vale.X64.Machine_s.rR8", "Vale.X64.Decls.va_get_mem_layout", "Vale.Arch.HeapTypes_s.Public", "Prims.l_imp", "Prims.op_GreaterThan", "Vale.X64.Decls.validSrcAddrsOffset128", "Vale.Arch.HeapTypes_s.Secret", "Vale.X64.Decls.validDstAddrsOffset128", "Vale.X64.Machine_s.rRbp", "Vale.X64.Decls.validSrcAddrs128", "Vale.X64.Machine_s.rR9", "Prims.l_or", "Vale.X64.Decls.buffers_disjoint128", "Prims.op_GreaterThanOrEqual", "FStar.Seq.Base.length", "Vale.X64.Decls.s128", "Vale.AES.GCTR.partial_seq_agreement", "Prims.op_LessThan", "Vale.X64.Machine_s.pow2_64", "Vale.X64.Decls.modifies_buffer_specific128", "Vale.X64.Decls.buffer_modifies_specific128", "Vale.AES.X64.AESopt.aes_reqs_offset", "Vale.X64.Machine_s.rRcx", "FStar.Seq.Base.index", "Vale.X64.CPU_Features_s.pclmulqdq_enabled", "Vale.AES.AES_s.aes_encrypt_LE", "Vale.AES.GHash.hkeys_reqs_priv", "Vale.Def.Types_s.reverse_bytes_quad32", "Vale.AES.X64.AESopt.scratch_reqs", "Prims.op_LessThanOrEqual", "Vale.AES.GHash.ghash_incremental0", "FStar.Seq.Base.slice", "Vale.Math.Poly2.Bits_s.to_quad32", "Vale.Math.Poly2_s.add", "Vale.Math.Poly2.Bits_s.of_quad32", "Vale.X64.Decls.buffer128_read", "Prims.op_Modulus", "Vale.X64.Machine_s.pow2_32", "Vale.AES.GCTR.inc32lite", "Vale.Def.Words_s.__proj__Mkfour__item__lo0", "Vale.Def.Types_s.quad32_xor", "Vale.AES.GCTR.gctr_registers", "Vale.AES.GCTR.gctr_partial", "Prims.l_not", "Vale.X64.QuickCode.quickCode", "Vale.AES.X64.AESGCM.va_qcode_Loop6x_loop_decrypt_while0", "Vale.X64.Decls.va_expand_state" ]

[]

false

let va_lemma_Loop6x_loop_decrypt_while0 va_b0 va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur =

let va_old = va_expand_state va_old in let va_mods:va_mods_t = [ va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags ] in let va_qc = va_qcode_Loop6x_loop_decrypt_while0 va_mods va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in let va_sM, va_fM, va_g = va_wp_sound_code_norm (va_code_Loop6x_loop_decrypt_while0 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let ctr, iter, y_cur = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 653 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (sse_enabled /\ movbe_enabled) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 655 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 658 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 659 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 661 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 664 column 69 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 666 column 121 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 669 column 114 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 671 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 672 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 674 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 675 column 79 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 676 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 677 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_in0_b == va_in_in_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 679 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 680 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 681 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM) < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 682 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 683 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM) < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 685 column 76 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 686 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 687 column 117 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 688 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 691 column 87 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 692 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 695 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" pclmulqdq_enabled /\ label va_range1 "***** POSTCONDITION NOT MET AT line 696 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 697 column 78 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 698 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 699 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 701 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 702 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 705 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((va_get_reg64 rRdx va_sM) `op_Modulus` 6 == 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 706 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 707 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 708 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 709 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 710 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 711 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 712 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 713 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == (Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr) `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 715 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 717 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 718 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 719 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 720 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 721 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 724 column 90 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 727 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 728 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (~(va_get_reg64 rRdx va_sM > 0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([ va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags ]) va_sM va_s0; let ctr, iter, y_cur = va_g in (va_sM, va_fM, ctr, iter, y_cur)

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.lt_leq_mul

val lt_leq_mul (min: nat) (max: nat{min < max}) (n: nat) : Lemma (let open FStar.Mul in min * n + n <= max * n)

let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat) : Lemma (FStar.Mul.(min * n + n <= max * n)) = let open FStar.Mul in assert ((min * n) + n = (min + 1) * n); assert ((min * n) + n <= max * n)

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 38, "end_line": 108, "start_col": 0, "start_line": 104 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = () //#reset-options "--max_fuel 0 --max_ifuel 1" let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n) let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t){ let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : GTot b = let v = get_view vb in let _, es, _ = split_at_i vb i h in View?.get v es let upd' (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : GTot (h':HS.mem{sel h' vb i == x}) = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in let h' = Down.upd_seq h (as_down_buffer vb) s1 in Down.upd_seq_spec h (as_down_buffer vb) s1; assert (Down.as_seq h' (as_down_buffer vb) == s1); let n = View?.n v in assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n))); assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x); h' let upd #b h vb i x : GTot HS.mem = upd' #b h vb i x let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb i == x) = ()

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

min: Prims.nat -> max: Prims.nat{min < max} -> n: Prims.nat -> FStar.Pervasives.Lemma (ensures min * n + n <= max * n)

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Prims.nat", "Prims.b2t", "Prims.op_LessThan", "Prims._assert", "Prims.op_LessThanOrEqual", "Prims.op_Addition", "FStar.Mul.op_Star", "Prims.unit", "Prims.op_Equality", "Prims.int", "Prims.l_True", "Prims.squash", "Prims.Nil", "FStar.Pervasives.pattern" ]

[]

true

false

true

false

let lt_leq_mul (min: nat) (max: nat{min < max}) (n: nat) : Lemma (let open FStar.Mul in min * n + n <= max * n) =

let open FStar.Mul in assert ((min * n) + n = (min + 1) * n); assert ((min * n) + n <= max * n)

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.split_at_i

val split_at_i (#b: _) (vb: buffer b) (i: nat{i < length vb}) (h: HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t) { let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) })

let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t){ let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 22, "end_line": 69, "start_col": 0, "start_line": 48 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = () //#reset-options "--max_fuel 0 --max_ifuel 1" let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n)

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

vb: LowStar.BufferView.Up.buffer b -> i: Prims.nat{i < LowStar.BufferView.Up.length vb} -> h: FStar.Monotonic.HyperStack.mem -> Prims.GTot (frags: (let src_t = LowStar.BufferView.Up.buffer_src vb in (FStar.Seq.Base.seq src_t * FStar.Seq.Properties.lseq src_t (View?.n (LowStar.BufferView.Up.get_view vb))) * FStar.Seq.Base.seq src_t) { let _ = frags in (let FStar.Pervasives.Native.Mktuple3 #_ #_ #_ prefix es suffix = _ in LowStar.BufferView.Down.as_seq h (LowStar.BufferView.Up.as_down_buffer vb) == FStar.Seq.Base.append prefix (FStar.Seq.Base.append es suffix)) <: Type0 })

Prims.GTot

[ "sometrivial" ]

[]

[ "LowStar.BufferView.Up.buffer", "Prims.nat", "Prims.b2t", "Prims.op_LessThan", "LowStar.BufferView.Up.length", "FStar.Monotonic.HyperStack.mem", "FStar.Seq.Base.seq", "LowStar.BufferView.Up.buffer_src", "FStar.Pervasives.Native.Mktuple3", "FStar.Seq.Properties.lseq", "LowStar.BufferView.Up.__proj__View__item__n", "LowStar.BufferView.Up.get_view", "Prims.unit", "FStar.Seq.Properties.lemma_split", "FStar.Pervasives.Native.tuple3", "Prims.eq2", "LowStar.BufferView.Down.as_seq", "LowStar.BufferView.Up.as_down_buffer", "FStar.Seq.Base.append", "FStar.Pervasives.Native.tuple2", "FStar.Seq.Properties.split", "LowStar.BufferView.Up.length_eq", "LowStar.BufferView.Up.view_indexing", "Prims.int", "FStar.Mul.op_Star", "Prims.pos", "LowStar.BufferView.Up.view", "LowStar.BufferView.Down.length" ]

[]

false

let split_at_i (#b: _) (vb: buffer b) (i: nat{i < length vb}) (h: HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t) { let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) =

let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.sel

val sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : GTot b

let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : GTot b = let v = get_view vb in let _, es, _ = split_at_i vb i h in View?.get v es

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 19, "end_line": 75, "start_col": 0, "start_line": 71 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = () //#reset-options "--max_fuel 0 --max_ifuel 1" let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n) let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t){ let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> vb: LowStar.BufferView.Up.buffer b -> i: Prims.nat{i < LowStar.BufferView.Up.length vb} -> Prims.GTot b

Prims.GTot

[ "sometrivial" ]

[]

[ "FStar.Monotonic.HyperStack.mem", "LowStar.BufferView.Up.buffer", "Prims.nat", "Prims.b2t", "Prims.op_LessThan", "LowStar.BufferView.Up.length", "FStar.Seq.Base.seq", "LowStar.BufferView.Up.buffer_src", "FStar.Seq.Properties.lseq", "LowStar.BufferView.Up.__proj__View__item__n", "LowStar.BufferView.Up.get_view", "LowStar.BufferView.Up.__proj__View__item__get", "FStar.Pervasives.Native.tuple3", "Prims.eq2", "LowStar.BufferView.Down.as_seq", "LowStar.BufferView.Up.as_down_buffer", "FStar.Seq.Base.append", "LowStar.BufferView.Up.split_at_i", "LowStar.BufferView.Up.view" ]

[]

false

let sel (#b: _) (h: HS.mem) (vb: buffer b) (i: nat{i < length vb}) : GTot b =

let v = get_view vb in let _, es, _ = split_at_i vb i h in View?.get v es

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.sel_upd

val sel_upd (#b:_) (vb:buffer b) (i:nat{i < length vb}) (j:nat{j < length vb}) (x:b) (h:HS.mem{live h vb}) : Lemma (if i = j then sel (upd h vb i x) vb j == x else sel (upd h vb i x) vb j == sel h vb j) [SMTPat (sel (upd h vb i x) vb j)]

let sel_upd #b vb i j x h = if i=j then sel_upd1 vb i x h else sel_upd2 vb i j x h

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 28, "end_line": 154, "start_col": 0, "start_line": 152 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = () //#reset-options "--max_fuel 0 --max_ifuel 1" let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n) let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t){ let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : GTot b = let v = get_view vb in let _, es, _ = split_at_i vb i h in View?.get v es let upd' (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : GTot (h':HS.mem{sel h' vb i == x}) = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in let h' = Down.upd_seq h (as_down_buffer vb) s1 in Down.upd_seq_spec h (as_down_buffer vb) s1; assert (Down.as_seq h' (as_down_buffer vb) == s1); let n = View?.n v in assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n))); assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x); h' let upd #b h vb i x : GTot HS.mem = upd' #b h vb i x let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb i == x) = () let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat) : Lemma (FStar.Mul.(min * n + n <= max * n)) = let open FStar.Mul in assert ((min * n) + n = (min + 1) * n); assert ((min * n) + n <= max * n) #set-options "--z3rlimit 20" let sel_upd2 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (j:nat{j < length vb /\ i<>j}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb j == sel h vb j) = let open FStar.Mul in let v = get_view vb in view_indexing vb i; view_indexing vb j; let h' = upd h vb i x in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = Down.as_seq h' (as_down_buffer vb) in let min = if i < j then i else j in let max = if i < j then j else i in let n = View?.n v in lt_leq_mul min max n; let min0, max0 = Seq.slice s0 (min * n) ((min * n) + n), Seq.slice s0 (max * n) ((max * n) + n) in let _, s_j, _ = split_at_i vb j h in let min1, max1 = Seq.slice s1 (min * n) ((min * n) + n), Seq.slice s1 (max * n) ((max * n) + n) in let _, s_j', _ = split_at_i vb j h' in let prefix, s_i, suffix = split_at_i vb i h in Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix)); if i < j then begin assert (Seq.equal max0 s_j); assert (Seq.equal max1 s_j'); assert (Seq.equal s_j s_j') end else begin assert (Seq.equal min0 s_j); assert (Seq.equal min1 s_j'); assert (Seq.equal s_j s_j') end

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

vb: LowStar.BufferView.Up.buffer b -> i: Prims.nat{i < LowStar.BufferView.Up.length vb} -> j: Prims.nat{j < LowStar.BufferView.Up.length vb} -> x: b -> h: FStar.Monotonic.HyperStack.mem{LowStar.BufferView.Up.live h vb} -> FStar.Pervasives.Lemma (ensures ((match i = j with | true -> LowStar.BufferView.Up.sel (LowStar.BufferView.Up.upd h vb i x) vb j == x | _ -> LowStar.BufferView.Up.sel (LowStar.BufferView.Up.upd h vb i x) vb j == LowStar.BufferView.Up.sel h vb j) <: Type0)) [SMTPat (LowStar.BufferView.Up.sel (LowStar.BufferView.Up.upd h vb i x) vb j)]

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "LowStar.BufferView.Up.buffer", "Prims.nat", "Prims.b2t", "Prims.op_LessThan", "LowStar.BufferView.Up.length", "FStar.Monotonic.HyperStack.mem", "LowStar.BufferView.Up.live", "Prims.op_Equality", "Prims.l_or", "LowStar.BufferView.Up.sel_upd1", "Prims.bool", "LowStar.BufferView.Up.sel_upd2", "Prims.unit" ]

[]

false

true

false

let sel_upd #b vb i j x h =

if i = j then sel_upd1 vb i x h else sel_upd2 vb i j x h

false

Vale.AES.X64.AESGCM.fst

Vale.AES.X64.AESGCM.va_lemma_AES_GCM_encrypt_6mult

val va_lemma_AES_GCM_encrypt_6mult : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> h_LE:quad32 -> iv_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_AES_GCM_encrypt_6mult alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 in_b == Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 out_b /\ Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 in_b == va_get_reg64 rRdx va_s0 /\ Vale.X64.Decls.buffer_length #Vale.X64.Memory.vuint128 in_b `op_Multiply` 16 < pow2_32 /\ Vale.X64.Memory.buffer_addr #Vale.X64.Memory.vuint128 keys_b (va_get_mem_heaplet 0 va_s0) + 128 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0 + 128) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 18) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 `op_Division` 6 >= 3) /\ 12 + va_get_reg64 rRdx va_s0 + 6 < pow2_32))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) /\ Vale.X64.Decls.modifies_buffer128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ va_get_reg64 rRcx va_sM == va_get_reg64 rRcx va_s0 /\ Vale.AES.GCTR.gctr_partial alg (va_get_reg64 rRdx va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words (va_get_xmm 1 va_s0) /\ Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_sM) == Vale.AES.GHash.ghash_incremental0 h_LE (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s0)) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) /\ l_and (va_get_reg64 rRdx va_s0 < pow2_32) (Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite (va_get_xmm 1 va_s0) (va_get_reg64 rRdx va_s0)))) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRcx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))))))))))))

let va_lemma_AES_GCM_encrypt_6mult va_b0 va_s0 alg h_LE iv_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRcx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRax; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_AES_GCM_encrypt_6mult va_mods alg h_LE iv_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_AES_GCM_encrypt_6mult alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 2086 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 2159 column 53 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 2160 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 2161 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 2163 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRcx va_sM == va_get_reg64 rRcx va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 2166 column 100 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GCTR.gctr_partial alg (va_get_reg64 rRdx va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words (va_get_xmm 1 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 2169 column 112 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_sM) == Vale.AES.GHash.ghash_incremental0 h_LE (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s0)) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 2173 column 98 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (l_and (va_get_reg64 rRdx va_s0 < pow2_32) (Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite (va_get_xmm 1 va_s0) (va_get_reg64 rRdx va_s0)))))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRcx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRax; va_Mod_ok; va_Mod_mem]) va_sM va_s0; (va_sM, va_fM)

{ "file_name": "obj/Vale.AES.X64.AESGCM.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 16, "end_line": 7587, "start_col": 0, "start_line": 7542 }

module Vale.AES.X64.AESGCM open FStar.Mul open Vale.Def.Prop_s open Vale.Def.Opaque_s open Vale.Def.Words_s open Vale.Def.Types_s open FStar.Seq open Vale.AES.AES_s open Vale.X64.Machine_s open Vale.X64.Memory open Vale.X64.State open Vale.X64.Decls open Vale.X64.InsBasic open Vale.X64.InsMem open Vale.X64.InsVector open Vale.X64.InsAes open Vale.X64.QuickCode open Vale.X64.QuickCodes open Vale.Arch.Types open Vale.AES.AES_helpers //open Vale.Poly1305.Math // For lemma_poly_bits64() open Vale.AES.GCM_helpers open Vale.AES.GCTR_s open Vale.AES.GCTR open Vale.Arch.TypesNative open Vale.X64.CPU_Features_s open Vale.AES.X64.PolyOps open Vale.Math.Poly2_s open Vale.Math.Poly2 open Vale.Math.Poly2.Bits_s open Vale.Math.Poly2.Bits open Vale.Math.Poly2.Lemmas open Vale.AES.GF128_s open Vale.AES.GF128 open Vale.AES.GHash open Vale.AES.X64.AESopt open Vale.AES.X64.AESopt2 unfold let lo(x:poly):poly = mask x 64 unfold let hi(x:poly):poly = shift x (-64) //let scratch_reqs (scratch_b:buffer128) (count:nat) (heap3:vale_heap) (s:seq quad32) (z3:quad32) : prop0 = // count * 6 + 6 <= length s /\ // (let data = slice s (count * 6) (count * 6 + 6) in // z3 == reverse_bytes_quad32 (index data 5) /\ // buffer128_read scratch_b 3 heap3 == reverse_bytes_quad32 (index data 4) /\ // buffer128_read scratch_b 4 heap3 == reverse_bytes_quad32 (index data 3) /\ // buffer128_read scratch_b 5 heap3 == reverse_bytes_quad32 (index data 2) /\ // buffer128_read scratch_b 6 heap3 == reverse_bytes_quad32 (index data 1) /\ // buffer128_read scratch_b 7 heap3 == reverse_bytes_quad32 (index data 0)) let scratch_reqs_simple (scratch_b:buffer128) (heap3:vale_heap) (data:seq quad32) (z3:quad32) : prop0 = length data == 6 /\ z3 == reverse_bytes_quad32 (index data 5) /\ buffer128_read scratch_b 3 heap3 == reverse_bytes_quad32 (index data 4) /\ buffer128_read scratch_b 4 heap3 == reverse_bytes_quad32 (index data 3) /\ buffer128_read scratch_b 5 heap3 == reverse_bytes_quad32 (index data 2) /\ buffer128_read scratch_b 6 heap3 == reverse_bytes_quad32 (index data 1) /\ buffer128_read scratch_b 7 heap3 == reverse_bytes_quad32 (index data 0) //-- finish_aes_encrypt_le val finish_aes_encrypt_le : alg:algorithm -> input_LE:quad32 -> key:(seq nat32) -> Lemma (requires (Vale.AES.AES_s.is_aes_key_LE alg key)) (ensures (Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key))) let finish_aes_encrypt_le alg input_LE key = Vale.AES.AES_s.aes_encrypt_LE_reveal (); Vale.AES.AES_s.eval_cipher_reveal (); () //-- let va_subscript_FStar__Seq__Base__seq = Seq.index #reset-options "--z3rlimit 30" //-- Load_one_msb val va_code_Load_one_msb : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Load_one_msb () = (va_Block (va_CCons (va_code_ZeroXmm (va_op_xmm_xmm 2)) (va_CCons (va_code_PinsrqImm (va_op_xmm_xmm 2) 72057594037927936 1 (va_op_reg_opr64_reg64 rR11)) (va_CNil ())))) val va_codegen_success_Load_one_msb : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Load_one_msb () = (va_pbool_and (va_codegen_success_ZeroXmm (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_PinsrqImm (va_op_xmm_xmm 2) 72057594037927936 1 (va_op_reg_opr64_reg64 rR11)) (va_ttrue ()))) [@ "opaque_to_smt" va_qattr] let va_qcode_Load_one_msb (va_mods:va_mods_t) : (va_quickCode unit (va_code_Load_one_msb ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 145 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_ZeroXmm (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 146 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Arch.Types.two_to_nat32 (Vale.Def.Words_s.Mktwo #Vale.Def.Words_s.nat32 0 16777216) == 72057594037927936) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 147 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_PinsrqImm (va_op_xmm_xmm 2) 72057594037927936 1 (va_op_reg_opr64_reg64 rR11)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 148 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Def.Types_s.insert_nat64_reveal ()) (va_QEmpty (()))))))) val va_lemma_Load_one_msb : va_b0:va_code -> va_s0:va_state -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Load_one_msb ()) va_s0 /\ va_get_ok va_s0 /\ sse_enabled)) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 2 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0)))))) [@"opaque_to_smt"] let va_lemma_Load_one_msb va_b0 va_s0 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11; va_Mod_ok] in let va_qc = va_qcode_Load_one_msb va_mods in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Load_one_msb ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 138 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 143 column 46 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216)) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Load_one_msb (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ sse_enabled /\ (forall (va_x_r11:nat64) (va_x_xmm2:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 2 va_x_xmm2 (va_upd_reg64 rR11 va_x_r11 va_s0)) in va_get_ok va_sM /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 ==> va_k va_sM (()))) val va_wpProof_Load_one_msb : va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Load_one_msb va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Load_one_msb ()) ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Load_one_msb va_s0 va_k = let (va_sM, va_f0) = va_lemma_Load_one_msb (va_code_Load_one_msb ()) va_s0 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 2 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Load_one_msb () : (va_quickCode unit (va_code_Load_one_msb ())) = (va_QProc (va_code_Load_one_msb ()) ([va_Mod_flags; va_Mod_xmm 2; va_Mod_reg64 rR11]) va_wp_Load_one_msb va_wpProof_Load_one_msb) //-- //-- Ctr32_ghash_6_prelude val va_code_Ctr32_ghash_6_prelude : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Ctr32_ghash_6_prelude alg = (va_Block (va_CCons (va_code_Load_one_msb ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 4) (va_op_opr128_xmm 4)) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 15)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_CNil ())))))))))))) val va_codegen_success_Ctr32_ghash_6_prelude : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Ctr32_ghash_6_prelude alg = (va_pbool_and (va_codegen_success_Load_one_msb ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 4) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 15)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_ttrue ()))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Ctr32_ghash_6_prelude (va_mods:va_mods_t) (alg:algorithm) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) : (va_quickCode unit (va_code_Ctr32_ghash_6_prelude alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 211 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_one_msb ()) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 212 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 4) (va_op_opr128_xmm 4)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 213 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Arch.Types.lemma_quad32_xor ()) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 214 column 19 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret keys_b 0) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 215 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg44:Vale.Def.Types_s.quad32) = va_get_xmm 10 va_s in let (va_arg43:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg42:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 215 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg42 va_arg43 va_arg44 1) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 216 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg41:Vale.Def.Types_s.quad32) = va_get_xmm 11 va_s in let (va_arg40:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg39:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 216 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg39 va_arg40 va_arg41 2) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 217 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg38:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_s in let (va_arg37:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg36:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 217 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg36 va_arg37 va_arg38 3) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 218 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg35:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_s in let (va_arg34:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg33:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 218 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg33 va_arg34 va_arg35 4) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 219 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg32:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_s in let (va_arg31:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg30:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 219 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg30 va_arg31 va_arg32 5) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 220 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 221 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret scratch_b 1) (va_QEmpty (()))))))))))))))))))) val va_lemma_Ctr32_ghash_6_prelude : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> scratch_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_orig:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Ctr32_ghash_6_prelude alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 8 (va_get_mem_layout va_s0) Secret /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 1 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (va_get_xmm 15 va_sM) /\ (let counter = Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 in (counter + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) /\ (counter + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) /\ (counter + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) /\ (counter + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) /\ (counter + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) /\ Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_reg64 rR11 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 4 va_sM (va_update_xmm 2 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))) [@"opaque_to_smt"] let va_lemma_Ctr32_ghash_6_prelude va_b0 va_s0 alg scratch_b key_words round_keys keys_b ctr_orig = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Ctr32_ghash_6_prelude va_mods alg scratch_b key_words round_keys keys_b ctr_orig in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Ctr32_ghash_6_prelude alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 151 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 194 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 1) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 196 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 197 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 199 column 83 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 200 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (let counter = Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 in label va_range1 "***** POSTCONDITION NOT MET AT line 201 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 202 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 203 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 204 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 205 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (counter + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 207 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 208 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_ok; va_Mod_mem]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Ctr32_ghash_6_prelude (alg:algorithm) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 8 (va_get_mem_layout va_s0) Secret /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) /\ (forall (va_x_mem:vale_heap) (va_x_xmm2:quad32) (va_x_xmm4:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_r11:nat64) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_reg64 rR11 va_x_r11 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 2 va_x_xmm2 (va_upd_mem va_x_mem va_s0)))))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 1 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (va_get_xmm 15 va_sM) /\ (let counter = Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 in (counter + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) /\ (counter + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) /\ (counter + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) /\ (counter + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) /\ (counter + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) /\ Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) ==> va_k va_sM (()))) val va_wpProof_Ctr32_ghash_6_prelude : alg:algorithm -> scratch_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_orig:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Ctr32_ghash_6_prelude alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig va_s0 va_k = let (va_sM, va_f0) = va_lemma_Ctr32_ghash_6_prelude (va_code_Ctr32_ghash_6_prelude alg) va_s0 alg scratch_b key_words round_keys keys_b ctr_orig in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_reg64 rR11 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 4 va_sM (va_update_xmm 2 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_mem]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Ctr32_ghash_6_prelude (alg:algorithm) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) : (va_quickCode unit (va_code_Ctr32_ghash_6_prelude alg)) = (va_QProc (va_code_Ctr32_ghash_6_prelude alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_reg64 rR11; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_mem]) (va_wp_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig) (va_wpProof_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b ctr_orig)) //-- //-- Handle_ctr32_2 val va_code_Handle_ctr32_2 : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Handle_ctr32_2 () = (va_Block (va_CCons (va_code_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_CCons (va_code_Load_one_lsb (va_op_xmm_xmm 5)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_CCons (va_code_Load_two_lsb (va_op_xmm_xmm 5)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 11) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_CNil ())))))))))))))))))))))) val va_codegen_success_Handle_ctr32_2 : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Handle_ctr32_2 () = (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Load_one_lsb (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_Load_two_lsb (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 11) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_ttrue ()))))))))))))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Handle_ctr32_2 (va_mods:va_mods_t) (ctr_BE:quad32) : (va_quickCode unit (va_code_Handle_ctr32_2 ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 253 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 258 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_one_lsb (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 260 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 262 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_two_lsb (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 263 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 6) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 265 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 266 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 267 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 11) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 268 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 269 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 270 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 12) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 271 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 272 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 273 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 13) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 274 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 275 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 276 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 277 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 278 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 279 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_QEmpty (()))))))))))))))))))))))) val va_lemma_Handle_ctr32_2 : va_b0:va_code -> va_s0:va_state -> ctr_BE:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Handle_ctr32_2 ()) va_s0 /\ va_get_ok va_s0 /\ (avx_enabled /\ sse_enabled /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 ctr_BE))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (va_get_xmm 4 va_sM) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (va_get_xmm 4 va_sM) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (va_get_xmm 4 va_sM) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (va_get_xmm 4 va_sM) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (va_get_xmm 4 va_sM) /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0)))))))))))))) [@"opaque_to_smt"] let va_lemma_Handle_ctr32_2 va_b0 va_s0 ctr_BE = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11; va_Mod_ok] in let va_qc = va_qcode_Handle_ctr32_2 va_mods ctr_BE in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Handle_ctr32_2 ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 224 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 246 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 247 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 248 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 249 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 250 column 77 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (va_get_xmm 4 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 251 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Handle_ctr32_2 (ctr_BE:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (avx_enabled /\ sse_enabled /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 ctr_BE) /\ (forall (va_x_r11:nat64) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rR11 va_x_r11 va_s0)))))))))) in va_get_ok va_sM /\ (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (va_get_xmm 4 va_sM) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (va_get_xmm 4 va_sM) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (va_get_xmm 4 va_sM) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (va_get_xmm 4 va_sM) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (va_get_xmm 4 va_sM) /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) ==> va_k va_sM (()))) val va_wpProof_Handle_ctr32_2 : ctr_BE:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Handle_ctr32_2 ctr_BE va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Handle_ctr32_2 ()) ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Handle_ctr32_2 ctr_BE va_s0 va_k = let (va_sM, va_f0) = va_lemma_Handle_ctr32_2 (va_code_Handle_ctr32_2 ()) va_s0 ctr_BE in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM va_s0))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Handle_ctr32_2 (ctr_BE:quad32) : (va_quickCode unit (va_code_Handle_ctr32_2 ())) = (va_QProc (va_code_Handle_ctr32_2 ()) ([va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR11]) (va_wp_Handle_ctr32_2 ctr_BE) (va_wpProof_Handle_ctr32_2 ctr_BE)) //-- //-- Loop6x_decrypt #push-options "--z3rlimit 300" val va_code_Loop6x_decrypt : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_decrypt alg = (va_Block (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_Loop6x_partial alg) (va_CCons (va_code_Loop6x_final alg) (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 6)) (va_CCons (va_IfElse (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 6)) (va_Block (va_CCons (va_code_Add64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_CNil ()))) (va_Block (va_CNil ()))) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_IfElse (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (va_Block (va_CCons (va_code_Loop6x_save_output ()) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_CCons (va_Block (va_CNil ())) (va_CNil ()))))) (va_Block (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret)) (va_CCons (va_code_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_op_opr128_xmm 4)) (va_CNil ())))))) (va_CNil ())))))))))))))) val va_codegen_success_Loop6x_decrypt : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_decrypt alg = (va_pbool_and (va_codegen_success_Loop6x_partial alg) (va_pbool_and (va_codegen_success_Loop6x_final alg) (va_pbool_and (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 6)) (va_pbool_and (va_codegen_success_Add64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_pbool_and (va_pbool_and (va_codegen_success_Loop6x_save_output ()) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret)) (va_codegen_success_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_op_opr128_xmm 4)))))) (va_ttrue ())))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_decrypt (va_mods:va_mods_t) (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode (quad32) (va_code_Loop6x_decrypt alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (prev:Vale.Math.Poly2_s.poly) = add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s))) in let (y_prev:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 prev) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 449 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (fun _ -> let (data:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 450 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 450 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #Vale.X64.Decls.quad32 data (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6))) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 451 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 451 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #Vale.X64.Decls.quad32 (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6)) (FStar.Seq.Base.slice #quad32 plain_quads (count `op_Multiply` 6) (count `op_Multiply` 6 + 6))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 453 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) < 128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 454 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s)) < 128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 455 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s))) < 128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 456 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2_s.degree prev < 128) (va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 457 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Math.Poly2.Bits.lemma_of_to_quad32 prev) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 459 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_partial alg h_LE y_prev data count (va_if (va_get_reg64 rRdx va_s > 6) (fun _ -> count + 1) (fun _ -> count)) iv_b in0_b in_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE) (fun (va_s:va_state) (init:quad32_6) -> let (eventual_Xi:Vale.Math.Poly2_s.poly) = add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)))) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s)) in va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 463 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (eventual_Xi == Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))) (let (ctrs:(six_of Vale.Def.Types_s.quad32)) = make_six_of #Vale.Def.Types_s.quad32 (fun (i:(va_int_range 0 5)) -> Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE i)) in let (plains:(six_of Vale.X64.Decls.quad32)) = make_six_of #Vale.X64.Decls.quad32 (fun (i:(va_int_range 0 5)) -> Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + i) (va_get_mem_heaplet 6 va_s)) in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 468 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_final alg iv_b scratch_b key_words round_keys keys_b (Vale.AES.GCTR.inc32lite ctr_BE 6) init ctrs plains (Vale.X64.Decls.buffer128_read in0_b (va_if (va_get_reg64 rRdx va_s > 6) (fun _ -> count + 1) (fun _ -> count) `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s))) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 471 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 6)) (fun (va_s:va_state) _ -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 472 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 6)) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 474 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Add64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_QEmpty (())))) (qblock va_mods (fun (va_s:va_state) -> va_QEmpty (())))) (fun (va_s:va_state) va_g -> let (y_new:quad32) = Vale.AES.GHash.ghash_incremental0 h_LE y_prev data in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 479 column 36 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 (count `op_Multiply` 6)) (fun _ -> let (va_arg104:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = data in let (va_arg103:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6) in let (va_arg102:Vale.Def.Types_s.quad32) = y_new in let (va_arg101:Vale.Def.Types_s.quad32) = y_orig in let (va_arg100:Vale.Def.Types_s.quad32) = h_LE in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 479 column 36 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GHash.lemma_ghash_incremental0_append va_arg100 va_arg101 y_prev va_arg102 va_arg103 va_arg104) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 480 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 (count `op_Multiply` 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 480 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.append #quad32 (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) data)) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 481 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 (count `op_Multiply` 6) /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 481 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #quad32 (FStar.Seq.Base.append #quad32 (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) data) (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6))) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 483 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 483 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6))) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 486 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 488 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_save_output count out_b) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 492 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret scratch_b 2) (fun (va_s:va_state) _ -> let (plain:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b in let (cipher:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (bound:(va_int_at_least 0)) = count `op_Multiply` 6 in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 497 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (bound >= 0 /\ bound <= 4294967295) (fun _ -> let (va_arg99:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg98:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg97:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = cipher in let (va_arg96:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) out_b in let (va_arg95:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg94:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg93:Vale.Def.Types_s.nat32) = bound in let (va_arg92:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 497 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_ignores_postfix va_arg92 va_arg93 va_arg94 va_arg95 va_arg96 va_arg97 va_arg98 va_arg99) (let (va_arg91:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg90:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg89:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = cipher in let (va_arg88:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg87:Prims.nat) = bound in let (va_arg86:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 499 column 29 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_extend6 va_arg86 va_arg87 va_arg88 va_arg89 va_arg90 va_arg91) (let (va_arg85:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s) in let (va_arg84:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)) in let (va_arg83:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 501 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GHash.lemma_add_manip va_arg83 va_arg84 va_arg85) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 507 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))))) (va_QEmpty (())))))))))) (qblock va_mods (fun (va_s:va_state) -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 511 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (eventual_Xi == Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 512 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret scratch_b 1) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 512 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 3) (va_op_reg64_reg64 rRbp) 16 Secret)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 513 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPolyAdd (va_op_xmm_xmm 8) (va_op_xmm_xmm 8) (va_op_opr128_xmm 4)) (fun (va_s:va_state) _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 514 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) == Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 515 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) == Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data)))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 516 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 8 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GHash.ghash_incremental h_LE y_prev data)) (va_QEmpty (()))))))))))) (fun (va_s:va_state) va_g -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 518 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_registers_reveal ()) (va_QEmpty ((y_new))))))))))))))))))))))))))))) val va_lemma_Loop6x_decrypt : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> count:nat -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> Ghost (va_state & va_fuel & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_decrypt alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ va_get_reg64 rRdx va_s0 >= 6 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b ((count + 1) `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 96 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b count (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig))) (ensures (fun (va_sM, va_fM, y_new) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ ((va_get_reg64 rRdx va_sM == 0 ==> va_get_mem_heaplet 6 va_sM == va_get_mem_heaplet 6 va_s0) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in_b) ((count + 1) `op_Multiply` 6) ((count + 1) `op_Multiply` 6)) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 6 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96 /\ va_get_reg64 rR14 va_sM == (if (va_get_reg64 rRdx va_sM > 6) then (va_get_reg64 rR14 va_s0 + 96) else va_get_reg64 rR14 va_s0) /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 0 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 7)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 5 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 8)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 6 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 9)) /\ (va_get_reg64 rRdx va_sM == 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 7 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 3 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 11)) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) plain_quads alg key_words ctr_BE_orig count) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 10 va_sM == va_get_xmm 0 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 11 va_sM == va_get_xmm 5 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 12 va_sM == va_get_xmm 6 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 14 va_sM == va_get_xmm 3 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 0))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs scratch_b (count + 1) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_sM))) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_decrypt va_b0 va_s0 alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Loop6x_decrypt va_mods alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_decrypt alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let y_new = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 290 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 388 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_mem_heaplet 6 va_sM == va_get_mem_heaplet 6 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 389 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 390 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 391 column 70 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 392 column 100 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in_b) ((count + 1) `op_Multiply` 6) ((count + 1) `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 397 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 398 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 399 column 64 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rR14 va_sM == va_if (va_get_reg64 rRdx va_sM > 6) (fun _ -> va_get_reg64 rR14 va_s0 + 96) (fun _ -> va_get_reg64 rR14 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 400 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 402 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 405 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 407 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 408 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 0 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 7)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 409 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 5 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 8)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 410 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 6 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 9)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 411 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 7 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 412 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 3 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 11)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 414 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 418 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) plain_quads alg key_words ctr_BE_orig count) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 420 column 93 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 421 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 10 va_sM == va_get_xmm 0 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 422 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 11 va_sM == va_get_xmm 5 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 423 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 12 va_sM == va_get_xmm 6 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 424 column 98 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 425 column 35 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 14 va_sM == va_get_xmm 3 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 427 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 0))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 428 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 429 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 430 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 431 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 432 column 177 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 435 column 108 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 438 column 90 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 440 column 103 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 441 column 55 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 443 column 89 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs scratch_b (count + 1) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_sM)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem]) va_sM va_s0; let y_new = va_g in (va_sM, va_fM, y_new) [@ va_qattr] let va_wp_Loop6x_decrypt (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) (va_s0:va_state) (va_k:(va_state -> quad32 -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ va_get_reg64 rRdx va_s0 >= 6 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b ((count + 1) `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 96 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b count (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 (count `op_Multiply` 6)) /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig) /\ (forall (va_x_mem:vale_heap) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_rdx:nat64) (va_x_rbx:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_heap6:vale_heap) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) (y_new:quad32) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_mem va_x_mem va_s0)))))))))))))))))))))))))))) in va_get_ok va_sM /\ ((va_get_reg64 rRdx va_sM == 0 ==> va_get_mem_heaplet 6 va_sM == va_get_mem_heaplet 6 va_s0) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in_b) ((count + 1) `op_Multiply` 6) ((count + 1) `op_Multiply` 6)) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_s0 - 6 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96 /\ va_get_reg64 rR14 va_sM == va_if (va_get_reg64 rRdx va_sM > 6) (fun _ -> va_get_reg64 rR14 va_s0 + 96) (fun _ -> va_get_reg64 rR14 va_s0) /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 0 /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 0 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 7)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 5 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 8)) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 6 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 9)) /\ (va_get_reg64 rRdx va_sM == 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 7 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 3 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 11)) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) plain_quads alg key_words ctr_BE_orig count) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 10 va_sM == va_get_xmm 0 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 11 va_sM == va_get_xmm 5 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 12 va_sM == va_get_xmm 6 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 10))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 14 va_sM == va_get_xmm 3 va_sM) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 0))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 ((count + 1) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_new == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs scratch_b (count + 1) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_sM))) ==> va_k va_sM ((y_new)))) val va_wpProof_Loop6x_decrypt : alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> count:nat -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> va_s0:va_state -> va_k:(va_state -> quad32 -> Type0) -> Ghost (va_state & va_fuel & quad32) (requires (va_t_require va_s0 /\ va_wp_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_decrypt alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k = let (va_sM, va_f0, y_new) = va_lemma_Loop6x_decrypt (va_code_Loop6x_decrypt alg) va_s0 alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_sM va_s0; let va_g = (y_new) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_decrypt (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode quad32 (va_code_Loop6x_decrypt alg)) = (va_QProc (va_code_Loop6x_decrypt alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) (va_wp_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE) (va_wpProof_Loop6x_decrypt alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE)) #pop-options //-- //-- Loop6x_loop_decrypt_body0 #push-options "--z3rlimit 700" val va_code_Loop6x_loop_decrypt_body0 : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop_decrypt_body0 alg = (va_Block (va_CCons (va_code_Loop6x_decrypt alg) (va_CCons (va_Block (va_CNil ())) (va_CNil ())))) val va_codegen_success_Loop6x_loop_decrypt_body0 : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop_decrypt_body0 alg = (va_pbool_and (va_codegen_success_Loop6x_decrypt alg) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop_decrypt_body0 (va_mods:va_mods_t) (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_decrypt_body0 alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (ctr_BE_orig:quad32) = va_in_ctr_BE_orig in let (h_LE:quad32) = va_in_h_LE in let (hkeys_b:buffer128) = va_in_hkeys_b in let (in0_b:buffer128) = va_in_in0_b in let (in_b:buffer128) = va_in_in_b in let (iv_b:buffer128) = va_in_iv_b in let (key_words:(seq nat32)) = va_in_key_words in let (keys_b:buffer128) = va_in_keys_b in let (out_b:buffer128) = va_in_out_b in let (plain_quads:(seq quad32)) = va_in_plain_quads in let (round_keys:(seq quad32)) = va_in_round_keys in let (scratch_b:buffer128) = va_in_scratch_b in let (y_orig:quad32) = va_in_y_orig in let (ctr:quad32) = va_in_ctr in let (iter:nat) = va_in_iter in let (y_cur:quad32) = va_in_y_cur in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 733 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_decrypt alg h_LE y_orig y_cur iter iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr) (fun (va_s:va_state) (y_cur:quad32) -> va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 735 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter + 1 >= 0) (fun _ -> let (iter:nat) = iter + 1 in let (ctr:quad32) = Vale.AES.GCTR_s.inc32 ctr 6 in va_QEmpty ((ctr, iter, y_cur)))))) val va_lemma_Loop6x_loop_decrypt_body0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> Ghost (va_state & va_fuel & quad32 & nat & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_decrypt_body0 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ va_get_reg64 rRdx va_s0 > 0)) (ensures (fun (va_sM, va_fM, ctr, iter, y_cur) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_loop_decrypt_body0 va_b0 va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur = let va_old = va_expand_state va_old in let (va_mods:va_mods_t) = [va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags] in let va_qc = va_qcode_Loop6x_loop_decrypt_body0 va_mods va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop_decrypt_body0 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let (ctr, iter, y_cur) = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 653 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (sse_enabled /\ movbe_enabled) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 655 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 658 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 659 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 661 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 664 column 69 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 666 column 121 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 669 column 114 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 671 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 672 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 674 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 675 column 79 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 676 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 677 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_in0_b == va_in_in_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 679 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 680 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 681 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 682 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 683 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 685 column 76 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 686 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 687 column 117 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 688 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 691 column 87 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 692 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 695 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" pclmulqdq_enabled /\ label va_range1 "***** POSTCONDITION NOT MET AT line 696 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 697 column 78 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 698 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 699 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 701 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 702 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 705 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 706 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 707 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 708 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 709 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 710 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 711 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 712 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 713 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 715 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 717 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 718 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 719 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 720 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 721 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 724 column 90 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 727 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 728 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 729 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let (ctr, iter, y_cur) = va_g in (va_sM, va_fM, ctr, iter, y_cur) [@ va_qattr] let va_wp_Loop6x_loop_decrypt_body0 (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) (va_s0:va_state) (va_k:(va_state -> (quad32 & nat & quad32) -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ va_get_reg64 rRdx va_s0 > 0 /\ (forall (va_x_efl:Vale.X64.Flags.t) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_heap6:vale_heap) (va_x_mem:vale_heap) (va_x_ok:bool) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_rbx:nat64) (va_x_rdi:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (ctr:quad32) (iter:nat) (y_cur:quad32) . let va_sM = va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_ok va_x_ok (va_upd_mem va_x_mem (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_flags va_x_efl va_s0))))))))))))))))))))))))))))) in va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) ==> va_k va_sM ((ctr, iter, y_cur)))) val va_wpProof_Loop6x_loop_decrypt_body0 : va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> va_s0:va_state -> va_k:(va_state -> (quad32 & nat & quad32) -> Type0) -> Ghost (va_state & va_fuel & (quad32 & nat & quad32)) (requires (va_t_require va_s0 /\ va_wp_Loop6x_loop_decrypt_body0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_loop_decrypt_body0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_loop_decrypt_body0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k = let (va_sM, va_f0, ctr, iter, y_cur) = va_lemma_Loop6x_loop_decrypt_body0 (va_code_Loop6x_loop_decrypt_body0 alg) va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let va_g = (ctr, iter, y_cur) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_loop_decrypt_body0 (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_decrypt_body0 alg)) = (va_QProc (va_code_Loop6x_loop_decrypt_body0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) (va_wp_Loop6x_loop_decrypt_body0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur) (va_wpProof_Loop6x_loop_decrypt_body0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur)) #pop-options //-- //-- Loop6x_loop_decrypt_while0 #push-options "--z3rlimit 700" val va_code_Loop6x_loop_decrypt_while0 : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop_decrypt_while0 alg = (va_Block (va_CCons (va_While (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (va_Block (va_CCons (va_code_Loop6x_loop_decrypt_body0 alg) (va_CNil ())))) (va_CNil ()))) val va_codegen_success_Loop6x_loop_decrypt_while0 : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop_decrypt_while0 alg = (va_pbool_and (va_codegen_success_Loop6x_loop_decrypt_body0 alg) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop_decrypt_while0 (va_mods:va_mods_t) (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_decrypt_while0 alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (ctr_BE_orig:quad32) = va_in_ctr_BE_orig in let (h_LE:quad32) = va_in_h_LE in let (hkeys_b:buffer128) = va_in_hkeys_b in let (in0_b:buffer128) = va_in_in0_b in let (in_b:buffer128) = va_in_in_b in let (iv_b:buffer128) = va_in_iv_b in let (key_words:(seq nat32)) = va_in_key_words in let (keys_b:buffer128) = va_in_keys_b in let (out_b:buffer128) = va_in_out_b in let (plain_quads:(seq quad32)) = va_in_plain_quads in let (round_keys:(seq quad32)) = va_in_round_keys in let (scratch_b:buffer128) = va_in_scratch_b in let (y_orig:quad32) = va_in_y_orig in let (ctr:quad32) = va_in_ctr in let (iter:nat) = va_in_iter in let (y_cur:quad32) = va_in_y_cur in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qWhile va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (fun va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in qblock va_mods (fun (va_s:va_state) -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_loop_decrypt_body0 va_old alg ctr_BE_orig h_LE hkeys_b in0_b in_b iv_b key_words keys_b out_b plain_quads round_keys scratch_b y_orig ctr iter y_cur) (fun (va_s:va_state) va_g -> let (ctr, iter, y_cur) = va_g in va_QEmpty ((ctr, iter, y_cur))))) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in va_get_ok va_s /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_s == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_s == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_s == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s) (va_get_reg64 rR8 va_s) iv_b 1 (va_get_mem_layout va_s) Public /\ (va_get_reg64 rRdx va_s > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rR14 va_s) in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_s) Secret) /\ (va_get_reg64 rRdx va_s == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rR14 va_s) in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_s) Secret) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rRdi va_s) in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_s) Secret) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rRsi va_s) out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_s) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s) (va_get_reg64 rRbp va_s) scratch_b 9 (va_get_mem_layout va_s) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s) (va_get_reg64 rR9 va_s - 32) hkeys_b 8 (va_get_mem_layout va_s) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) in_b) >= 6 /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) in_b))) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRdi va_s + 16 `op_Multiply` va_get_reg64 rRdx va_s < pow2_64) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rR14 va_s + 16 `op_Multiply` (va_get_reg64 rRdx va_s - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRsi va_s + 16 `op_Multiply` va_get_reg64 rRdx va_s < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s) 0 0 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s) (va_get_mem_heaplet 0 va_s) (va_get_mem_layout va_s) /\ va_get_xmm 15 va_s == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ (va_get_reg64 rRdx va_s > 0 ==> scratch_reqs scratch_b iter (va_get_mem_heaplet 3 va_s) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (va_get_xmm 7 va_s)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #quad32 plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)))))) /\ (va_get_reg64 rRdx va_s == 0 ==> va_get_xmm 8 va_s == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_s `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRdx va_s >= 6) /\ ctr == Vale.AES.GCTR.inc32lite ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_s == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_s == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_xmm 9 va_s == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_s)) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 10 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 11 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 12 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 13 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 14 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_s == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s) (va_get_xmm 10 va_s) (va_get_xmm 11 va_s) (va_get_xmm 12 va_s) (va_get_xmm 13 va_s) (va_get_xmm 14 va_s) plain_quads alg key_words ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) key_words ctr_BE_orig) /\ (va_get_reg64 rRdx va_s == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) key_words ctr_BE_orig)) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in va_get_reg64 rRdx va_s) ((ctr, iter, y_cur))) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in let va_g = (ctr, iter, y_cur) in let ((ctr:quad32), (iter:nat), (y_cur:quad32)) = va_g in va_QEmpty ((ctr, iter, y_cur))))) val va_lemma_Loop6x_loop_decrypt_while0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> Ghost (va_state & va_fuel & quad32 & nat & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_decrypt_while0 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig))) (ensures (fun (va_sM, va_fM, ctr, iter, y_cur) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ ~(va_get_reg64 rRdx va_sM > 0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_loop_decrypt_while0 va_b0 va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur = let va_old = va_expand_state va_old in let (va_mods:va_mods_t) = [va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags] in let va_qc = va_qcode_Loop6x_loop_decrypt_while0 va_mods va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop_decrypt_while0 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let (ctr, iter, y_cur) = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 653 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (sse_enabled /\ movbe_enabled) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 655 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 658 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 659 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 661 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 664 column 69 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 666 column 121 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 669 column 114 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 671 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 672 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 674 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 675 column 79 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 676 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 677 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_in0_b == va_in_in_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 679 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 680 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 681 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 682 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 683 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 685 column 76 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 686 column 81 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 687 column 117 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 688 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 691 column 87 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 692 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 695 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" pclmulqdq_enabled /\ label va_range1 "***** POSTCONDITION NOT MET AT line 696 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 697 column 78 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 698 column 85 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 699 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 701 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 702 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 705 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 706 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 707 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 708 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter `op_Multiply` 6 + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 709 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 710 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 711 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 712 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 713 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 715 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 717 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 718 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 719 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 720 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 721 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 724 column 90 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 727 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 728 column 118 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (~(va_get_reg64 rRdx va_sM > 0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let (ctr, iter, y_cur) = va_g in (va_sM, va_fM, ctr, iter, y_cur) [@ va_qattr] let va_wp_Loop6x_loop_decrypt_while0 (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) (va_s0:va_state) (va_k:(va_state -> (quad32 & nat & quad32) -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (va_in_iter + 1)) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b va_in_iter (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_in_iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (va_in_iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (forall (va_x_efl:Vale.X64.Flags.t) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_heap6:vale_heap) (va_x_mem:vale_heap) (va_x_ok:bool) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_rbx:nat64) (va_x_rdi:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (ctr:quad32) (iter:nat) (y_cur:quad32) . let va_sM = va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_ok va_x_ok (va_upd_mem va_x_mem (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_flags va_x_efl va_s0))))))))))))))))))))))))))))) in va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((iter + 1) `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` (iter + 1)) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM == 6 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_in_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` (va_get_reg64 rRdx va_sM - 6) < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b iter (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (iter `op_Multiply` 6 <= FStar.Seq.Base.length #quad32 va_in_plain_quads ==> y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #quad32 va_in_plain_quads 0 (iter `op_Multiply` 6))) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_get_reg64 rRdx va_old + 6 < pow2_32) /\ iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ ~(va_get_reg64 rRdx va_sM > 0) ==> va_k va_sM ((ctr, iter, y_cur)))) val va_wpProof_Loop6x_loop_decrypt_while0 : va_old:va_state -> alg:algorithm -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> va_s0:va_state -> va_k:(va_state -> (quad32 & nat & quad32) -> Type0) -> Ghost (va_state & va_fuel & (quad32 & nat & quad32)) (requires (va_t_require va_s0 /\ va_wp_Loop6x_loop_decrypt_while0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_loop_decrypt_while0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_loop_decrypt_while0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k = let (va_sM, va_f0, ctr, iter, y_cur) = va_lemma_Loop6x_loop_decrypt_while0 (va_code_Loop6x_loop_decrypt_while0 alg) va_s0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let va_g = (ctr, iter, y_cur) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_loop_decrypt_while0 (va_old:va_state) (alg:algorithm) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_decrypt_while0 alg)) = (va_QProc (va_code_Loop6x_loop_decrypt_while0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) (va_wp_Loop6x_loop_decrypt_while0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur) (va_wpProof_Loop6x_loop_decrypt_while0 va_old alg va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur)) #pop-options //-- //-- Loop6x_loop_decrypt #push-options "--z3rlimit 700" val va_code_Loop6x_loop_decrypt : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop_decrypt alg = (va_Block (va_CCons (va_IfElse (va_cmp_eq (va_op_cmp_reg64 rRdx) (va_const_cmp 6)) (va_Block (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_CNil ()))) (va_Block (va_CNil ()))) (va_CCons (va_code_Loop6x_loop_decrypt_while0 alg) (va_CNil ())))) val va_codegen_success_Loop6x_loop_decrypt : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop_decrypt alg = (va_pbool_and (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_pbool_and (va_codegen_success_Loop6x_loop_decrypt_while0 alg) (va_ttrue ()))) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop_decrypt (va_mods:va_mods_t) (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode (quad32) (va_code_Loop6x_loop_decrypt alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (iter:nat) = 0 in let (ctr:quad32) = ctr_BE in let (y_cur:quad32) = y_prev in let (plain_quads:(seq quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b in let (va_arg44:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg43:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg42:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (va_arg41:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg40:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 645 column 29 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_init va_arg40 va_arg41 va_arg42 va_arg43 va_arg44) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 648 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_eq (va_op_cmp_reg64 rRdx) (va_const_cmp 6)) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 649 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rR14) (va_const_opr64 96)) (va_QEmpty (())))) (qblock va_mods (fun (va_s:va_state) -> va_QEmpty (())))) (fun (va_s:va_state) va_g -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 651 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_loop_decrypt_while0 va_old_s alg ctr_BE_orig h_LE hkeys_b in0_b in_b iv_b key_words keys_b out_b plain_quads round_keys scratch_b y_orig ctr iter y_cur) (fun (va_s:va_state) va_g -> let (ctr, iter, y_cur) = va_g in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 738 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_registers_reveal ()) (let (y_new:quad32) = y_cur in va_QEmpty ((y_new)))))))) val va_lemma_Loop6x_loop_decrypt : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> Ghost (va_state & va_fuel & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_decrypt alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ (6 <= va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdx va_s0 + 6 < pow2_32) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b 6 (va_get_reg64 rRdx va_s0 - 6) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b 0 (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b 0 (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64 /\ va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b 0 (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == y_orig /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig 0 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5))))) (ensures (fun (va_sM, va_fM, y_new) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ l_and (va_get_reg64 rRdx va_s0 - 1 > 0) (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_s0 - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ l_and (va_get_reg64 rRdx va_s0 - 6 >= 0) (Vale.AES.GCTR.gctr_partial alg (va_get_reg64 rRdx va_s0 - 6) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6))) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 1))) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 2))) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 3))) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 4))) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 5))) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) 0 (va_get_reg64 rRdx va_s0)) /\ va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE (va_get_reg64 rRdx va_s0))) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_loop_decrypt va_b0 va_s0 alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Loop6x_loop_decrypt va_mods alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop_decrypt alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let y_new = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 521 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 614 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 615 column 103 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (l_and (va_get_reg64 rRdx va_s0 - 1 > 0) (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_s0 - 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 616 column 67 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 621 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 622 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 625 column 135 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (l_and (va_get_reg64 rRdx va_s0 - 6 >= 0) (Vale.AES.GCTR.gctr_partial alg (va_get_reg64 rRdx va_s0 - 6) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 627 column 149 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 628 column 153 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 1)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 629 column 153 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 2)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 630 column 153 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 3)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 631 column 153 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 4)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 632 column 153 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 5)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 635 column 89 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) 0 (va_get_reg64 rRdx va_s0))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 636 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 639 column 64 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE (va_get_reg64 rRdx va_s0))))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem]) va_sM va_s0; let y_new = va_g in (va_sM, va_fM, y_new) [@ va_qattr] let va_wp_Loop6x_loop_decrypt (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) (va_s0:va_state) (va_k:(va_state -> quad32 -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ (6 <= va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdx va_s0 + 6 < pow2_32) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b 6 (va_get_reg64 rRdx va_s0 - 6) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b 0 (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b 0 (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == in_b /\ va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 16 `op_Multiply` (va_get_reg64 rRdx va_s0 - 6) < pow2_64 /\ va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b 0 (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == y_orig /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig 0 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5))) /\ (forall (va_x_mem:vale_heap) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_rdx:nat64) (va_x_rbx:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_heap6:vale_heap) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) (y_new:quad32) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_mem va_x_mem va_s0)))))))))))))))))))))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ l_and (va_get_reg64 rRdx va_s0 - 1 > 0) (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) 0 (va_get_reg64 rRdx va_s0 - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ l_and (va_get_reg64 rRdx va_s0 - 6 >= 0) (Vale.AES.GCTR.gctr_partial alg (va_get_reg64 rRdx va_s0 - 6) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6))) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 1))) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 2))) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 3))) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 4))) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (va_get_reg64 rRdx va_s0 - 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (va_get_reg64 rRdx va_s0 - 6 + 5))) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) 0 (va_get_reg64 rRdx va_s0)) /\ va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE (va_get_reg64 rRdx va_s0))) ==> va_k va_sM ((y_new)))) val va_wpProof_Loop6x_loop_decrypt : alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> va_s0:va_state -> va_k:(va_state -> quad32 -> Type0) -> Ghost (va_state & va_fuel & quad32) (requires (va_t_require va_s0 /\ va_wp_Loop6x_loop_decrypt alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_loop_decrypt alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_loop_decrypt alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k = let (va_sM, va_f0, y_new) = va_lemma_Loop6x_loop_decrypt (va_code_Loop6x_loop_decrypt alg) va_s0 alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_sM va_s0; let va_g = (y_new) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_loop_decrypt (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode quad32 (va_code_Loop6x_loop_decrypt alg)) = (va_QProc (va_code_Loop6x_loop_decrypt alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) (va_wp_Loop6x_loop_decrypt alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE) (va_wpProof_Loop6x_loop_decrypt alg h_LE y_orig y_prev iv_b in0_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE)) #pop-options //-- //-- Loop6x_loop_body0 #push-options "--z3rlimit 750" val va_code_Loop6x_loop_body0 : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop_body0 alg = (va_Block (va_CCons (va_code_Loop6x alg) (va_CCons (va_Block (va_CNil ())) (va_CNil ())))) val va_codegen_success_Loop6x_loop_body0 : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop_body0 alg = (va_pbool_and (va_codegen_success_Loop6x alg) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop_body0 (va_mods:va_mods_t) (va_old:va_state) (alg:algorithm) (va_in_count:nat) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_body0 alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (count:nat) = va_in_count in let (ctr_BE_orig:quad32) = va_in_ctr_BE_orig in let (h_LE:quad32) = va_in_h_LE in let (hkeys_b:buffer128) = va_in_hkeys_b in let (in0_b:buffer128) = va_in_in0_b in let (in_b:buffer128) = va_in_in_b in let (iv_b:buffer128) = va_in_iv_b in let (key_words:(seq nat32)) = va_in_key_words in let (keys_b:buffer128) = va_in_keys_b in let (out_b:buffer128) = va_in_out_b in let (plain_quads:(seq quad32)) = va_in_plain_quads in let (round_keys:(seq quad32)) = va_in_round_keys in let (scratch_b:buffer128) = va_in_scratch_b in let (y_orig:quad32) = va_in_y_orig in let (ctr:quad32) = va_in_ctr in let (iter:nat) = va_in_iter in let (y_cur:quad32) = va_in_y_cur in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 959 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x alg h_LE y_orig y_cur (count + iter) iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr) (fun (va_s:va_state) (y_cur:quad32) -> va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 961 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (iter + 1 >= 0) (fun _ -> let (iter:nat) = iter + 1 in let (ctr:quad32) = Vale.AES.GCTR_s.inc32 ctr 6 in va_QEmpty ((ctr, iter, y_cur)))))) val va_lemma_Loop6x_loop_body0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state -> alg:algorithm -> va_in_count:nat -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> Ghost (va_state & va_fuel & quad32 & nat & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_body0 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rR14 va_s0 == va_get_reg64 rR14 va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + va_in_iter - 2 >= 0 /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_get_reg64 rRdx va_s0 == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_s0))) /\ va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) 0 ((va_in_count + va_in_iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ va_get_reg64 rRdx va_s0 > 0)) (ensures (fun (va_sM, va_fM, ctr, iter, y_cur) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + iter - 2 >= 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (va_get_reg64 rRdx va_sM == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) 0 ((va_in_count + iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_loop_body0 va_b0 va_s0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur = let va_old = va_expand_state va_old in let (va_mods:va_mods_t) = [va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags] in let va_qc = va_qcode_Loop6x_loop_body0 va_mods va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop_body0 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let (ctr, iter, y_cur) = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 742 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 878 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (sse_enabled /\ movbe_enabled) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 880 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 882 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 883 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 884 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 886 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 889 column 69 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 891 column 127 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 892 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 893 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 895 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 896 column 79 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 897 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 898 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_in0_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 900 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 901 column 128 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 902 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 903 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 904 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 906 column 76 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 907 column 95 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 908 column 131 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 909 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 912 column 87 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 913 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 916 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" pclmulqdq_enabled /\ label va_range1 "***** POSTCONDITION NOT MET AT line 917 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 918 column 78 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 920 column 34 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_count + iter - 2 >= 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 921 column 103 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 922 column 137 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 924 column 112 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) 0 ((va_in_count + iter - 2) `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 926 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 927 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 930 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (2 <= va_in_count) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 931 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 932 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 933 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 934 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 935 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 936 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + iter `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 937 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 938 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 939 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 941 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 943 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 944 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 945 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 946 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 947 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 950 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + iter - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 953 column 117 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 954 column 128 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 955 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let (ctr, iter, y_cur) = va_g in (va_sM, va_fM, ctr, iter, y_cur) [@ va_qattr] let va_wp_Loop6x_loop_body0 (va_old:va_state) (alg:algorithm) (va_in_count:nat) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) (va_s0:va_state) (va_k:(va_state -> (quad32 & nat & quad32) -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rR14 va_s0 == va_get_reg64 rR14 va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + va_in_iter - 2 >= 0 /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_get_reg64 rRdx va_s0 == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_s0))) /\ va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) 0 ((va_in_count + va_in_iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ va_get_reg64 rRdx va_s0 > 0 /\ (forall (va_x_efl:Vale.X64.Flags.t) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_heap6:vale_heap) (va_x_mem:vale_heap) (va_x_ok:bool) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_rbx:nat64) (va_x_rdi:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (ctr:quad32) (iter:nat) (y_cur:quad32) . let va_sM = va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_ok va_x_ok (va_upd_mem va_x_mem (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_flags va_x_efl va_s0))))))))))))))))))))))))))))) in va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + iter - 2 >= 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (va_get_reg64 rRdx va_sM == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) 0 ((va_in_count + iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ precedes_wrap (va_get_reg64 rRdx va_sM) (va_get_reg64 rRdx va_s0) ==> va_k va_sM ((ctr, iter, y_cur)))) val va_wpProof_Loop6x_loop_body0 : va_old:va_state -> alg:algorithm -> va_in_count:nat -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> va_s0:va_state -> va_k:(va_state -> (quad32 & nat & quad32) -> Type0) -> Ghost (va_state & va_fuel & (quad32 & nat & quad32)) (requires (va_t_require va_s0 /\ va_wp_Loop6x_loop_body0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_loop_body0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_loop_body0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k = let (va_sM, va_f0, ctr, iter, y_cur) = va_lemma_Loop6x_loop_body0 (va_code_Loop6x_loop_body0 alg) va_s0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let va_g = (ctr, iter, y_cur) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_loop_body0 (va_old:va_state) (alg:algorithm) (va_in_count:nat) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_body0 alg)) = (va_QProc (va_code_Loop6x_loop_body0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) (va_wp_Loop6x_loop_body0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur) (va_wpProof_Loop6x_loop_body0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur)) #pop-options //-- //-- Loop6x_loop_while0 #push-options "--z3rlimit 750" val va_code_Loop6x_loop_while0 : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop_while0 alg = (va_Block (va_CCons (va_While (va_cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (va_Block (va_CCons (va_code_Loop6x_loop_body0 alg) (va_CNil ())))) (va_CNil ()))) val va_codegen_success_Loop6x_loop_while0 : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop_while0 alg = (va_pbool_and (va_codegen_success_Loop6x_loop_body0 alg) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop_while0 (va_mods:va_mods_t) (va_old:va_state) (alg:algorithm) (va_in_count:nat) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_while0 alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (count:nat) = va_in_count in let (ctr_BE_orig:quad32) = va_in_ctr_BE_orig in let (h_LE:quad32) = va_in_h_LE in let (hkeys_b:buffer128) = va_in_hkeys_b in let (in0_b:buffer128) = va_in_in0_b in let (in_b:buffer128) = va_in_in_b in let (iv_b:buffer128) = va_in_iv_b in let (key_words:(seq nat32)) = va_in_key_words in let (keys_b:buffer128) = va_in_keys_b in let (out_b:buffer128) = va_in_out_b in let (plain_quads:(seq quad32)) = va_in_plain_quads in let (round_keys:(seq quad32)) = va_in_round_keys in let (scratch_b:buffer128) = va_in_scratch_b in let (y_orig:quad32) = va_in_y_orig in let (ctr:quad32) = va_in_ctr in let (iter:nat) = va_in_iter in let (y_cur:quad32) = va_in_y_cur in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 742 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qWhile va_mods (Cmp_gt (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (fun va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in qblock va_mods (fun (va_s:va_state) -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 742 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_loop_body0 va_old alg count ctr_BE_orig h_LE hkeys_b in0_b in_b iv_b key_words keys_b out_b plain_quads round_keys scratch_b y_orig ctr iter y_cur) (fun (va_s:va_state) va_g -> let (ctr, iter, y_cur) = va_g in va_QEmpty ((ctr, iter, y_cur))))) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in va_get_ok va_s /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rR14 va_s == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRdi va_s == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_s == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_s == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s) (va_get_reg64 rR8 va_s) iv_b 1 (va_get_mem_layout va_s) Public /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rR14 va_s) in0_b ((count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_s) Secret) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rRdi va_s) in_b (count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_s) Secret) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s) (va_get_reg64 rRsi va_s) out_b (count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_s) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s) (va_get_reg64 rRbp va_s) scratch_b 9 (va_get_mem_layout va_s) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s) (va_get_reg64 rR9 va_s - 32) hkeys_b 8 (va_get_mem_layout va_s) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) in_b) >= 6 /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b) (6 `op_Multiply` count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) in_b))) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRdi va_s + 16 `op_Multiply` va_get_reg64 rRdx va_s < pow2_64) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rR14 va_s + 16 `op_Multiply` va_get_reg64 rRdx va_s < pow2_64) /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRsi va_s + 16 `op_Multiply` va_get_reg64 rRdx va_s < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s) (count `op_Multiply` 6) (count `op_Multiply` 6 + iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s) (count `op_Multiply` 6) (count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s) 0 0 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s) (va_get_mem_heaplet 0 va_s) (va_get_mem_layout va_s) /\ va_get_xmm 15 va_s == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ count + iter - 2 >= 0 /\ (va_get_reg64 rRdx va_s > 0 ==> scratch_reqs scratch_b (count + iter - 2) (va_get_mem_heaplet 3 va_s) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (va_get_xmm 7 va_s)) /\ (va_get_reg64 rRdx va_s == 0 ==> scratch_reqs scratch_b (count + iter - 2) (va_get_mem_heaplet 3 va_s) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) (Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_s))) /\ y_cur == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in0_b) 0 ((count + iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_s > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)))))) /\ (va_get_reg64 rRdx va_s == 0 ==> va_get_xmm 8 va_s == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ 2 <= count /\ va_get_reg64 rRdx va_s `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_reg64 rRdx va_s >= 6) /\ ctr == Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + iter `op_Multiply` 6) /\ va_get_xmm 2 va_s == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_s == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s > 0 ==> va_get_xmm 9 va_s == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_s)) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 10 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 11 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 12 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 13 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_s > 0 ==> (va_get_reg64 rRbx va_s + 6 < 256 ==> va_get_xmm 14 va_s == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_s == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s) (va_get_xmm 10 va_s) (va_get_xmm 11 va_s) (va_get_xmm 12 va_s) (va_get_xmm 13 va_s) (va_get_xmm 14 va_s) plain_quads alg key_words ctr_BE_orig (count + iter - 1)) /\ (va_get_reg64 rRdx va_s > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count + 6 `op_Multiply` iter) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) key_words ctr_BE_orig) /\ (va_get_reg64 rRdx va_s == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count + 6 `op_Multiply` (iter - 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) key_words ctr_BE_orig)) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in va_get_reg64 rRdx va_s) ((ctr, iter, y_cur))) (fun (va_s:va_state) va_g -> let (ctr:quad32) = let (ctr, iter, y_cur) = va_g in ctr in let (iter:nat) = let (ctr, iter, y_cur) = va_g in iter in let (y_cur:quad32) = let (ctr, iter, y_cur) = va_g in y_cur in let va_g = (ctr, iter, y_cur) in let ((ctr:quad32), (iter:nat), (y_cur:quad32)) = va_g in va_QEmpty ((ctr, iter, y_cur))))) val va_lemma_Loop6x_loop_while0 : va_b0:va_code -> va_s0:va_state -> va_old:va_state -> alg:algorithm -> va_in_count:nat -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> Ghost (va_state & va_fuel & quad32 & nat & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop_while0 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rR14 va_s0 == va_get_reg64 rR14 va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + va_in_iter - 2 >= 0 /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_get_reg64 rRdx va_s0 == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_s0))) /\ va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) 0 ((va_in_count + va_in_iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig))) (ensures (fun (va_sM, va_fM, ctr, iter, y_cur) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + iter - 2 >= 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (va_get_reg64 rRdx va_sM == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) 0 ((va_in_count + iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ ~(va_get_reg64 rRdx va_sM > 0) /\ va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_loop_while0 va_b0 va_s0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur = let va_old = va_expand_state va_old in let (va_mods:va_mods_t) = [va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags] in let va_qc = va_qcode_Loop6x_loop_while0 va_mods va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop_while0 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let (ctr, iter, y_cur) = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 742 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 878 column 41 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (sse_enabled /\ movbe_enabled) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 880 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 882 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 883 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 884 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 886 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 889 column 69 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 891 column 127 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 892 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 893 column 123 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 895 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 896 column 79 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 897 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 898 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_in0_b == va_in_out_b) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 900 column 48 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 901 column 128 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 902 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 903 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 904 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 906 column 76 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 907 column 95 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 908 column 131 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 909 column 74 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 912 column 87 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 913 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 916 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" pclmulqdq_enabled /\ label va_range1 "***** POSTCONDITION NOT MET AT line 917 column 71 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 918 column 78 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 920 column 34 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_count + iter - 2 >= 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 921 column 103 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 922 column 137 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 924 column 112 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) 0 ((va_in_count + iter - 2) `op_Multiply` 6))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 926 column 107 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 927 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 930 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (2 <= va_in_count) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 931 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 932 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 933 column 62 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 934 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 935 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 936 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + iter `op_Multiply` 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 937 column 45 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 938 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 939 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 941 column 94 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 943 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 944 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 945 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 946 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 947 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 950 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + iter - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 953 column 117 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 954 column 128 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 742 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (~(va_get_reg64 rRdx va_sM > 0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let (ctr, iter, y_cur) = va_g in (va_sM, va_fM, ctr, iter, y_cur) [@ va_qattr] let va_wp_Loop6x_loop_while0 (va_old:va_state) (alg:algorithm) (va_in_count:nat) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) (va_s0:va_state) (va_k:(va_state -> (quad32 & nat & quad32) -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_s0 == va_get_reg64 rRdx va_old - 6 `op_Multiply` va_in_iter /\ va_get_reg64 rR14 va_s0 == va_get_reg64 rR14 va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRdi va_s0 == va_get_reg64 rRdi va_old + 96 `op_Multiply` va_in_iter /\ va_get_reg64 rRsi va_s0 == va_get_reg64 rRsi va_old + 96 `op_Multiply` va_in_iter /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) va_in_iv_b 1 (va_get_mem_layout va_s0) Public /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) va_in_in_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) va_in_out_b (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - va_in_iter `op_Multiply` 6) (va_get_mem_layout va_s0) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) va_in_scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) va_in_hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_s0) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_s0) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_s0) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + va_in_iter - 2 >= 0 /\ (va_get_reg64 rRdx va_s0 > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (va_get_xmm 7 va_s0)) /\ (va_get_reg64 rRdx va_s0 == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + va_in_iter - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_s0))) /\ va_in_y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_in0_b) 0 ((va_in_count + va_in_iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_in_y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_s0)))))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> va_get_xmm 8 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 va_in_y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_s0 < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + va_in_iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_reg64 rRdx va_s0 >= 6) /\ va_in_ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + va_in_iter `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0) /\ va_get_reg64 rRbx va_s0 == va_in_ctr.lo0 `op_Modulus` 256 /\ (va_get_reg64 rRdx va_s0 > 0 ==> va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 0)) (va_get_xmm 15 va_s0)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 1))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 2))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 3))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 4))) /\ (va_get_reg64 rRdx va_s0 > 0 ==> (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite va_in_ctr 5))) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_s0) (va_get_xmm 10 va_s0) (va_get_xmm 11 va_s0) (va_get_xmm 12 va_s0) (va_get_xmm 13 va_s0) (va_get_xmm 14 va_s0) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + va_in_iter - 1)) /\ (va_get_reg64 rRdx va_s0 > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` va_in_iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_s0 == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (va_in_iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (forall (va_x_efl:Vale.X64.Flags.t) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_heap6:vale_heap) (va_x_mem:vale_heap) (va_x_ok:bool) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_rbx:nat64) (va_x_rdi:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (ctr:quad32) (iter:nat) (y_cur:quad32) . let va_sM = va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_ok va_x_ok (va_upd_mem va_x_mem (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_flags va_x_efl va_s0))))))))))))))))))))))))))))) in va_get_ok va_sM /\ (sse_enabled /\ movbe_enabled) /\ va_get_reg64 rRdx va_sM == va_get_reg64 rRdx va_old - 6 `op_Multiply` iter /\ va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_old + 96 `op_Multiply` iter /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_old + 96 `op_Multiply` iter /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_sM) (va_get_reg64 rR8 va_sM) va_in_iv_b 1 (va_get_mem_layout va_sM) Public /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rR14 va_sM) va_in_in0_b ((va_in_count - 1) `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRdi va_sM) va_in_in_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_sM) (va_get_reg64 rRsi va_sM) va_in_out_b (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6) (va_get_reg64 rRdx va_old - iter `op_Multiply` 6) (va_get_mem_layout va_sM) Secret) /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_sM) (va_get_reg64 rRbp va_sM) va_in_scratch_b 9 (va_get_mem_layout va_sM) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_sM) (va_get_reg64 rR9 va_sM - 32) va_in_hkeys_b 8 (va_get_mem_layout va_sM) Secret /\ (Vale.X64.Decls.buffers_disjoint128 va_in_in_b va_in_out_b \/ va_in_in_b == va_in_out_b) /\ va_in_in0_b == va_in_out_b /\ FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b) >= 6 /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.partial_seq_agreement va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in_b) (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old) va_in_in_b))) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rR14 va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRsi va_sM + 16 `op_Multiply` va_get_reg64 rRdx va_sM < pow2_64) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_scratch_b (va_get_mem_heaplet 3 va_old) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 5) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_reg64 rRdx va_old >= 6 /\ Vale.X64.Decls.buffer_modifies_specific128 va_in_out_b (va_get_mem_heaplet 6 va_old) (va_get_mem_heaplet 6 va_sM) (va_in_count `op_Multiply` 6) (va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old - 1)) /\ Vale.X64.Decls.modifies_buffer_specific128 va_in_iv_b (va_get_mem_heaplet 2 va_old) (va_get_mem_heaplet 2 va_sM) 0 0 /\ aes_reqs_offset alg va_in_key_words va_in_round_keys va_in_keys_b (va_get_reg64 rRcx va_sM) (va_get_mem_heaplet 0 va_sM) (va_get_mem_layout va_sM) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 va_in_round_keys 0 /\ pclmulqdq_enabled /\ va_in_h_LE == Vale.AES.AES_s.aes_encrypt_LE alg va_in_key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_sM) va_in_hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 va_in_h_LE) /\ va_in_count + iter - 2 >= 0 /\ (va_get_reg64 rRdx va_sM > 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (va_get_xmm 7 va_sM)) /\ (va_get_reg64 rRdx va_sM == 0 ==> scratch_reqs va_in_scratch_b (va_in_count + iter - 2) (va_get_mem_heaplet 3 va_sM) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) (Vale.X64.Decls.buffer128_read va_in_scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ y_cur == Vale.AES.GHash.ghash_incremental0 va_in_h_LE va_in_y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_in0_b) 0 ((va_in_count + iter - 2) `op_Multiply` 6)) /\ (va_get_reg64 rRdx va_sM > 0 ==> y_cur == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_sM)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_sM))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read va_in_scratch_b 1 (va_get_mem_heaplet 3 va_sM)))))) /\ (va_get_reg64 rRdx va_sM == 0 ==> va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_cur) /\ 2 <= va_in_count /\ va_get_reg64 rRdx va_sM `op_Modulus` 6 == 0 /\ va_get_reg64 rRdx va_sM < pow2_32 /\ (6 <= va_get_reg64 rRdx va_old /\ va_in_count `op_Multiply` 6 + va_get_reg64 rRdx va_old + 6 < pow2_32) /\ va_in_count `op_Multiply` 6 + iter `op_Multiply` 6 + 6 < pow2_32 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_reg64 rRdx va_sM >= 6) /\ ctr == Vale.AES.GCTR.inc32lite va_in_ctr_BE_orig (6 `op_Multiply` va_in_count + iter `op_Multiply` 6) /\ va_get_xmm 2 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr `op_Modulus` 256 /\ (va_get_reg64 rRdx va_sM > 0 ==> va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 0)) (va_get_xmm 15 va_sM)) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 1))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 2))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 3))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 4))) /\ (va_get_reg64 rRdx va_sM > 0 ==> (va_get_reg64 rRbx va_sM + 6 < 256 ==> va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr 5))) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_registers (va_get_xmm 9 va_sM) (va_get_xmm 10 va_sM) (va_get_xmm 11 va_sM) (va_get_xmm 12 va_sM) (va_get_xmm 13 va_sM) (va_get_xmm 14 va_sM) va_in_plain_quads alg va_in_key_words va_in_ctr_BE_orig (va_in_count + iter - 1)) /\ (va_get_reg64 rRdx va_sM > 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` iter) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ (va_get_reg64 rRdx va_sM == 0 ==> Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` va_in_count + 6 `op_Multiply` (iter - 1)) va_in_plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) va_in_out_b) va_in_key_words va_in_ctr_BE_orig) /\ ~(va_get_reg64 rRdx va_sM > 0) ==> va_k va_sM ((ctr, iter, y_cur)))) val va_wpProof_Loop6x_loop_while0 : va_old:va_state -> alg:algorithm -> va_in_count:nat -> va_in_ctr_BE_orig:quad32 -> va_in_h_LE:quad32 -> va_in_hkeys_b:buffer128 -> va_in_in0_b:buffer128 -> va_in_in_b:buffer128 -> va_in_iv_b:buffer128 -> va_in_key_words:(seq nat32) -> va_in_keys_b:buffer128 -> va_in_out_b:buffer128 -> va_in_plain_quads:(seq quad32) -> va_in_round_keys:(seq quad32) -> va_in_scratch_b:buffer128 -> va_in_y_orig:quad32 -> va_in_ctr:quad32 -> va_in_iter:nat -> va_in_y_cur:quad32 -> va_s0:va_state -> va_k:(va_state -> (quad32 & nat & quad32) -> Type0) -> Ghost (va_state & va_fuel & (quad32 & nat & quad32)) (requires (va_t_require va_s0 /\ va_wp_Loop6x_loop_while0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_loop_while0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_loop_while0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur va_s0 va_k = let (va_sM, va_f0, ctr, iter, y_cur) = va_lemma_Loop6x_loop_while0 (va_code_Loop6x_loop_while0 alg) va_s0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_ok va_sM (va_update_mem va_sM (va_update_mem_heaplet 6 va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_flags va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) va_sM va_s0; let va_g = (ctr, iter, y_cur) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_loop_while0 (va_old:va_state) (alg:algorithm) (va_in_count:nat) (va_in_ctr_BE_orig:quad32) (va_in_h_LE:quad32) (va_in_hkeys_b:buffer128) (va_in_in0_b:buffer128) (va_in_in_b:buffer128) (va_in_iv_b:buffer128) (va_in_key_words:(seq nat32)) (va_in_keys_b:buffer128) (va_in_out_b:buffer128) (va_in_plain_quads:(seq quad32)) (va_in_round_keys:(seq quad32)) (va_in_scratch_b:buffer128) (va_in_y_orig:quad32) (va_in_ctr:quad32) (va_in_iter:nat) (va_in_y_cur:quad32) : (va_quickCode (quad32 & nat & quad32) (va_code_Loop6x_loop_while0 alg)) = (va_QProc (va_code_Loop6x_loop_while0 alg) ([va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRdi; va_Mod_reg64 rRbx; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_ok; va_Mod_mem; va_Mod_mem_heaplet 6; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_flags]) (va_wp_Loop6x_loop_while0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur) (va_wpProof_Loop6x_loop_while0 va_old alg va_in_count va_in_ctr_BE_orig va_in_h_LE va_in_hkeys_b va_in_in0_b va_in_in_b va_in_iv_b va_in_key_words va_in_keys_b va_in_out_b va_in_plain_quads va_in_round_keys va_in_scratch_b va_in_y_orig va_in_ctr va_in_iter va_in_y_cur)) #pop-options //-- //-- Loop6x_loop #push-options "--z3rlimit 750" val va_code_Loop6x_loop : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Loop6x_loop alg = (va_Block (va_CCons (va_code_Loop6x_loop_while0 alg) (va_CNil ()))) val va_codegen_success_Loop6x_loop : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Loop6x_loop alg = (va_pbool_and (va_codegen_success_Loop6x_loop_while0 alg) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_Loop6x_loop (va_mods:va_mods_t) (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode (quad32) (va_code_Loop6x_loop alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in let (iter:nat) = 0 in let (ctr:quad32) = ctr_BE in let (y_cur:quad32) = y_prev in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 876 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_loop_while0 va_old_s alg count ctr_BE_orig h_LE hkeys_b in0_b in_b iv_b key_words keys_b out_b plain_quads round_keys scratch_b y_orig ctr iter y_cur) (fun (va_s:va_state) va_g -> let (ctr, iter, y_cur) = va_g in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 964 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_registers_reveal ()) (let (y_new:quad32) = y_cur in va_QEmpty ((y_new)))))) val va_lemma_Loop6x_loop : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> count:nat -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> Ghost (va_state & va_fuel & quad32) (requires (va_require_total va_b0 (va_code_Loop6x_loop alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ count >= 2 /\ (6 <= va_get_reg64 rRdx va_s0 /\ count `op_Multiply` 6 + va_get_reg64 rRdx va_s0 + 6 < pow2_32) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b ((count - 1) `op_Multiply` 6) (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == out_b /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b)) /\ va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b (count - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) 0 ((count - 2) `op_Multiply` 6)) /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig))) (ensures (fun (va_sM, va_fM, y_new) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6) (count `op_Multiply` 6 + va_get_reg64 rRdx va_s0 - 1) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6))) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 1))) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 2))) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 3))) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 4))) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 5))) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in0_b) 0 (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 12)) /\ va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new /\ scratch_reqs_simple scratch_b (va_get_mem_heaplet 3 va_sM) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in0_b) (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 12) (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6)) (Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM)) /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE (va_get_reg64 rRdx va_s0))) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_Loop6x_loop va_b0 va_s0 alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Loop6x_loop va_mods alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Loop6x_loop alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let y_new = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 742 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 842 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 843 column 97 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6) (count `op_Multiply` 6 + va_get_reg64 rRdx va_s0 - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 844 column 70 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 849 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 850 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 851 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 854 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 856 column 167 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 857 column 171 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 1)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 858 column 171 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 2)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 859 column 171 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 3)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 860 column 171 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 4)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 861 column 171 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 5)))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 864 column 113 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in0_b) 0 (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 12))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 865 column 42 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 867 column 163 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (scratch_reqs_simple scratch_b (va_get_mem_heaplet 3 va_sM) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in0_b) (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 12) (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6)) (Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 870 column 64 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE (va_get_reg64 rRdx va_s0))))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem]) va_sM va_s0; let y_new = va_g in (va_sM, va_fM, y_new) [@ va_qattr] let va_wp_Loop6x_loop (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) (va_s0:va_state) (va_k:(va_state -> quad32 -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ movbe_enabled /\ count >= 2 /\ (6 <= va_get_reg64 rRdx va_s0 /\ count `op_Multiply` 6 + va_get_reg64 rRdx va_s0 + 6 < pow2_32) /\ va_get_reg64 rRdx va_s0 `op_Modulus` 6 == 0 /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 2 va_s0) (va_get_reg64 rR8 va_s0) iv_b 1 (va_get_mem_layout va_s0) Public /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rR14 va_s0) in0_b ((count - 1) `op_Multiply` 6) (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) (va_get_reg64 rRdx va_s0) (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 9 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs128 (va_get_mem_heaplet 0 va_s0) (va_get_reg64 rR9 va_s0 - 32) hkeys_b 8 (va_get_mem_layout va_s0) Secret /\ (Vale.X64.Decls.buffers_disjoint128 in_b out_b \/ in_b == out_b) /\ in0_b == out_b /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (FStar.Seq.Base.length #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b)) /\ va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 0 /\ pclmulqdq_enabled /\ h_LE == Vale.AES.AES_s.aes_encrypt_LE alg key_words (Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ Vale.AES.GHash.hkeys_reqs_priv (Vale.X64.Decls.s128 (va_get_mem_heaplet 0 va_s0) hkeys_b) (Vale.Def.Types_s.reverse_bytes_quad32 h_LE) /\ scratch_reqs scratch_b (count - 2) (va_get_mem_heaplet 3 va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) (va_get_xmm 7 va_s0) /\ y_prev == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in0_b) 0 ((count - 2) `op_Multiply` 6)) /\ y_prev == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.Math.Poly2.Bits_s.to_quad32 (add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s0)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s0))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s0))))) /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 2 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 16777216 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ va_get_xmm 9 va_s0 == Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (va_get_xmm 15 va_s0) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 10 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 11 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 12 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 13 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) /\ (va_get_reg64 rRbx va_s0 + 6 < 256 ==> va_get_xmm 14 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig) /\ (forall (va_x_mem:vale_heap) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_rdx:nat64) (va_x_rbx:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_xmm0:quad32) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm7:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_heap6:vale_heap) (va_x_heap2:vale_heap) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) (y_new:quad32) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_mem_heaplet 2 va_x_heap2 (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_xmm 0 va_x_xmm0 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_mem va_x_mem va_s0)))))))))))))))))))))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8 /\ Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6) (count `op_Multiply` 6 + va_get_reg64 rRdx va_s0 - 1) /\ Vale.X64.Decls.modifies_buffer_specific128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM) 0 0 /\ va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 16 `op_Multiply` va_get_reg64 rRdx va_s0 /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 0) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6))) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 1) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 1))) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 2) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 2))) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 3) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 3))) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 4) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 4))) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor (Vale.X64.Decls.buffer128_read in_b (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 5) (va_get_mem_heaplet 6 va_s0)) (Vale.AES.GCTR.aes_encrypt_BE alg key_words (Vale.AES.GCTR.inc32lite ctr_BE_orig (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6 + 5))) /\ y_new == Vale.AES.GHash.ghash_incremental0 h_LE y_orig (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in0_b) 0 (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 12)) /\ va_get_xmm 8 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 y_new /\ scratch_reqs_simple scratch_b (va_get_mem_heaplet 3 va_sM) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) in0_b) (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 12) (6 `op_Multiply` count + va_get_reg64 rRdx va_s0 - 6)) (Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM)) /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE (va_get_reg64 rRdx va_s0))) ==> va_k va_sM ((y_new)))) val va_wpProof_Loop6x_loop : alg:algorithm -> h_LE:quad32 -> y_orig:quad32 -> y_prev:quad32 -> count:nat -> iv_b:buffer128 -> in0_b:buffer128 -> in_b:buffer128 -> out_b:buffer128 -> scratch_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> hkeys_b:buffer128 -> ctr_BE_orig:quad32 -> ctr_BE:quad32 -> va_s0:va_state -> va_k:(va_state -> quad32 -> Type0) -> Ghost (va_state & va_fuel & quad32) (requires (va_t_require va_s0 /\ va_wp_Loop6x_loop alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Loop6x_loop alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Loop6x_loop alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE va_s0 va_k = let (va_sM, va_f0, y_new) = va_lemma_Loop6x_loop (va_code_Loop6x_loop alg) va_s0 alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_mem_heaplet 2 va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 7 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_xmm 0 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_sM va_s0; let va_g = (y_new) in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Loop6x_loop (alg:algorithm) (h_LE:quad32) (y_orig:quad32) (y_prev:quad32) (count:nat) (iv_b:buffer128) (in0_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) (ctr_BE_orig:quad32) (ctr_BE:quad32) : (va_quickCode quad32 (va_code_Loop6x_loop alg)) = (va_QProc (va_code_Loop6x_loop alg) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) (va_wp_Loop6x_loop alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE) (va_wpProof_Loop6x_loop alg h_LE y_orig y_prev count iv_b in0_b in_b out_b scratch_b plain_quads key_words round_keys keys_b hkeys_b ctr_BE_orig ctr_BE)) #pop-options //-- //-- AESNI_ctr32_6x_preamble #push-options "--z3rlimit 80" #restart-solver val va_code_AESNI_ctr32_6x_preamble : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_AESNI_ctr32_6x_preamble alg = (va_Block (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret) (va_CCons (va_code_Load_one_msb ()) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (16 - 128) Secret) (va_CCons (va_code_Mov64 (va_op_dst_opr64_reg64 rR12) (va_op_opr64_reg64 rRcx)) (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rR12) (va_const_opr64 96)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 4)) (va_CCons (va_code_Add64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 6)) (va_CCons (va_IfElse (va_cmp_lt (va_op_cmp_reg64 rRbx) (va_const_cmp 256)) (va_Block (va_CCons (va_code_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_CCons (va_code_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 14) (va_op_xmm_xmm 2)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_CNil ()))))))))))))) (va_Block (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 256)) (va_CCons (va_code_Handle_ctr32_2 ()) (va_CNil ()))))) (va_CNil ())))))))))) val va_codegen_success_AESNI_ctr32_6x_preamble : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_AESNI_ctr32_6x_preamble alg = (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret) (va_pbool_and (va_codegen_success_Load_one_msb ()) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (16 - 128) Secret) (va_pbool_and (va_codegen_success_Mov64 (va_op_dst_opr64_reg64 rR12) (va_op_opr64_reg64 rRcx)) (va_pbool_and (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rR12) (va_const_opr64 96)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_Add64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 6)) (va_pbool_and (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 14) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_pbool_and (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 256)) (va_codegen_success_Handle_ctr32_2 ()))))))))))))) (va_ttrue ()))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_AESNI_ctr32_6x_preamble (va_mods:va_mods_t) (alg:algorithm) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_preamble alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1024 column 19 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 4) (va_op_reg_opr64_reg64 rRcx) (0 - 128) Secret keys_b 0) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1025 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load_one_msb ()) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1026 column 19 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (16 - 128) Secret keys_b 1) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1029 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mov64 (va_op_dst_opr64_reg64 rR12) (va_op_opr64_reg64 rRcx)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1030 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rR12) (va_const_opr64 96)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1032 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 9) (va_op_xmm_xmm 1) (va_op_opr128_xmm 4)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1034 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Add64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 6)) (fun (va_s:va_state) _ -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1035 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_lt (va_op_cmp_reg64 rRbx) (va_const_cmp 256)) (qblock va_mods (fun (va_s:va_state) -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1036 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 10) (va_op_xmm_xmm 1) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg83:Vale.Def.Types_s.quad32) = va_get_xmm 10 va_s in let (va_arg82:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg81:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1037 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg81 va_arg82 va_arg83 1) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1038 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 11) (va_op_xmm_xmm 10) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg80:Vale.Def.Types_s.quad32) = va_get_xmm 11 va_s in let (va_arg79:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg78:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1039 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg78 va_arg79 va_arg80 2) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1040 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_opr128_xmm 4)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1041 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 12) (va_op_xmm_xmm 11) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg77:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_s in let (va_arg76:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg75:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1042 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg75 va_arg76 va_arg77 3) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1043 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_opr128_xmm 4)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1044 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 13) (va_op_xmm_xmm 12) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg74:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_s in let (va_arg73:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg72:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1045 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg72 va_arg73 va_arg74 4) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1046 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_opr128_xmm 4)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1047 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 14) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg71:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_s in let (va_arg70:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg69:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1048 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg69 va_arg70 va_arg71 5) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1049 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_opr128_xmm 4)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1050 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPaddd (va_op_xmm_xmm 1) (va_op_xmm_xmm 14) (va_op_xmm_xmm 2)) (fun (va_s:va_state) _ -> let (va_arg68:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_s in let (va_arg67:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg66:Vale.Def.Types_s.quad32) = Vale.AES.GCTR.inc32lite ctr_orig 0 in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1051 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.lemma_incr_msb va_arg66 va_arg67 va_arg68 6) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1052 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_opr128_xmm 4)) (va_QEmpty (())))))))))))))))))))) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1054 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 256)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1055 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Handle_ctr32_2 ctr_orig) (va_QEmpty (())))))) (fun (va_s:va_state) va_g -> let (va_arg65:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg64:Vale.Def.Types_s.quad32) = va_get_xmm 9 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1058 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg64 va_arg65) (let (va_arg63:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg62:Vale.Def.Types_s.quad32) = va_get_xmm 10 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1059 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg62 va_arg63) (let (va_arg61:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg60:Vale.Def.Types_s.quad32) = va_get_xmm 11 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1060 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg60 va_arg61) (let (va_arg59:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg58:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1061 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg58 va_arg59) (let (va_arg57:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg56:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1062 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg56 va_arg57) (let (va_arg55:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg54:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1063 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.init_rounds_opaque va_arg54 va_arg55) (va_QEmpty (()))))))))))))))))) val va_lemma_AESNI_ctr32_6x_preamble : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_orig:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_AESNI_ctr32_6x_preamble alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_reg64 rRcx va_s0 - 96 >= 0 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (0 <= va_get_reg64 rRbx va_sM /\ va_get_reg64 rRbx va_sM < 256 /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_orig 6) `op_Modulus` 256 /\ va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 6) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 1) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_ok va_sM va_s0))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_AESNI_ctr32_6x_preamble va_b0 va_s0 alg key_words round_keys keys_b ctr_orig = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_ok] in let va_qc = va_qcode_AESNI_ctr32_6x_preamble va_mods alg key_words round_keys keys_b ctr_orig in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_AESNI_ctr32_6x_preamble alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 968 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1010 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (0 <= va_get_reg64 rRbx va_sM /\ va_get_reg64 rRbx va_sM < 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1011 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_orig 6) `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1013 column 125 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1014 column 125 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1015 column 125 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1016 column 125 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1017 column 125 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1018 column 125 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1020 column 59 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1022 column 39 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 1))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_AESNI_ctr32_6x_preamble (alg:algorithm) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_reg64 rRcx va_s0 - 96 >= 0 /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_orig `op_Modulus` 256 /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051) /\ (forall (va_x_rbx:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rRbx va_x_rbx va_s0))))))))))))))) in va_get_ok va_sM /\ (0 <= va_get_reg64 rRbx va_sM /\ va_get_reg64 rRbx va_sM < 256 /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_orig 6) `op_Modulus` 256 /\ va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 0)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 1)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 2)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 3)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 4)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds (Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 5)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0)) round_keys 0 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_orig 6) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys 1) ==> va_k va_sM (()))) val va_wpProof_AESNI_ctr32_6x_preamble : alg:algorithm -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_orig:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_AESNI_ctr32_6x_preamble alg key_words round_keys keys_b ctr_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AESNI_ctr32_6x_preamble alg) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_AESNI_ctr32_6x_preamble alg key_words round_keys keys_b ctr_orig va_s0 va_k = let (va_sM, va_f0) = va_lemma_AESNI_ctr32_6x_preamble (va_code_AESNI_ctr32_6x_preamble alg) va_s0 alg key_words round_keys keys_b ctr_orig in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_ok va_sM va_s0)))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_AESNI_ctr32_6x_preamble (alg:algorithm) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_orig:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_preamble alg)) = (va_QProc (va_code_AESNI_ctr32_6x_preamble alg) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx]) (va_wp_AESNI_ctr32_6x_preamble alg key_words round_keys keys_b ctr_orig) (va_wpProof_AESNI_ctr32_6x_preamble alg key_words round_keys keys_b ctr_orig)) #pop-options //-- //-- AESNI_ctr32_6x_loop_body val va_code_AESNI_ctr32_6x_loop_body : alg:algorithm -> rnd:nat -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_AESNI_ctr32_6x_loop_body alg rnd = (va_Block (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 15)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 15)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 15)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 15)) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (16 `op_Multiply` (rnd + 2) - 128) Secret) (va_CNil ()))))))))) val va_codegen_success_AESNI_ctr32_6x_loop_body : alg:algorithm -> rnd:nat -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_AESNI_ctr32_6x_loop_body alg rnd = (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (16 `op_Multiply` (rnd + 2) - 128) Secret) (va_ttrue ())))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_AESNI_ctr32_6x_loop_body (va_mods:va_mods_t) (alg:algorithm) (rnd:nat) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_loop_body alg rnd)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1118 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1119 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1120 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1121 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1122 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 15)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1123 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 15)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1125 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_s.eval_rounds_reveal ()) (va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1126 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.commute_sub_bytes_shift_rows_forall ()) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1127 column 19 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 15) (va_op_reg_opr64_reg64 rRcx) (16 `op_Multiply` (rnd + 2) - 128) Secret keys_b (rnd + 2)) (va_QEmpty (())))))))))))) val va_lemma_AESNI_ctr32_6x_loop_body : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> rnd:nat -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_AESNI_ctr32_6x_loop_body alg rnd) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ rnd + 2 < FStar.Seq.Base.length #quad32 round_keys /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys (rnd + 1) /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys rnd /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys rnd /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys rnd /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys rnd /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys rnd /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys rnd))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (rnd + 1) /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (rnd + 1) /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (rnd + 1) /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (rnd + 1) /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (rnd + 1) /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (rnd + 1) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys (rnd + 2)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_ok va_sM va_s0))))))))))) [@"opaque_to_smt"] let va_lemma_AESNI_ctr32_6x_loop_body va_b0 va_s0 alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_ok] in let va_qc = va_qcode_AESNI_ctr32_6x_loop_body va_mods alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_AESNI_ctr32_6x_loop_body alg rnd) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 1066 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1109 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (rnd + 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1110 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (rnd + 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1111 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (rnd + 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1112 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (rnd + 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1113 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (rnd + 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1114 column 58 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (rnd + 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1116 column 43 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys (rnd + 2)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_AESNI_ctr32_6x_loop_body (alg:algorithm) (rnd:nat) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ rnd + 2 < FStar.Seq.Base.length #quad32 round_keys /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys (rnd + 1) /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys rnd /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys rnd /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys rnd /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys rnd /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys rnd /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys rnd) /\ (forall (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 va_s0))))))) in va_get_ok va_sM /\ (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (rnd + 1) /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (rnd + 1) /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (rnd + 1) /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (rnd + 1) /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (rnd + 1) /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (rnd + 1) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys (rnd + 2)) ==> va_k va_sM (()))) val va_wpProof_AESNI_ctr32_6x_loop_body : alg:algorithm -> rnd:nat -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_AESNI_ctr32_6x_loop_body alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AESNI_ctr32_6x_loop_body alg rnd) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_AESNI_ctr32_6x_loop_body alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 va_s0 va_k = let (va_sM, va_f0) = va_lemma_AESNI_ctr32_6x_loop_body (va_code_AESNI_ctr32_6x_loop_body alg rnd) va_s0 alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_ok va_sM va_s0)))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_AESNI_ctr32_6x_loop_body (alg:algorithm) (rnd:nat) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_loop_body alg rnd)) = (va_QProc (va_code_AESNI_ctr32_6x_loop_body alg rnd) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9]) (va_wp_AESNI_ctr32_6x_loop_body alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5) (va_wpProof_AESNI_ctr32_6x_loop_body alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5)) //-- //-- AESNI_ctr32_6x_loop_recursive val va_code_AESNI_ctr32_6x_loop_recursive : alg:algorithm -> rnd:nat -> Tot va_code(decreases %[alg;rnd]) [@ "opaque_to_smt"] let rec va_code_AESNI_ctr32_6x_loop_recursive alg rnd = (va_Block (va_CCons (if (rnd > 0) then va_Block (va_CCons (va_code_AESNI_ctr32_6x_loop_recursive alg (rnd - 1)) (va_CNil ())) else va_Block (va_CNil ())) (va_CCons (va_code_AESNI_ctr32_6x_loop_body alg rnd) (va_CNil ())))) val va_codegen_success_AESNI_ctr32_6x_loop_recursive : alg:algorithm -> rnd:nat -> Tot va_pbool(decreases %[alg;rnd]) [@ "opaque_to_smt"] let rec va_codegen_success_AESNI_ctr32_6x_loop_recursive alg rnd = (va_pbool_and (if (rnd > 0) then va_pbool_and (va_codegen_success_AESNI_ctr32_6x_loop_recursive alg (rnd - 1)) (va_ttrue ()) else va_ttrue ()) (va_pbool_and (va_codegen_success_AESNI_ctr32_6x_loop_body alg rnd) (va_ttrue ()))) val va_lemma_AESNI_ctr32_6x_loop_recursive : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> rnd:nat -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> Ghost (va_state & va_fuel)(decreases %[va_b0;va_s0;alg;rnd;key_words;round_keys;keys_b;init0;init1;init2;init3;init4;init5]) (requires (va_require_total va_b0 (va_code_AESNI_ctr32_6x_loop_recursive alg rnd) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ rnd + 2 < FStar.Seq.Base.length #quad32 round_keys /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 1 /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys 0 /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys 0 /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys 0 /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys 0 /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys 0 /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys 0))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (rnd + 1) /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (rnd + 1) /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (rnd + 1) /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (rnd + 1) /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (rnd + 1) /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (rnd + 1) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys (rnd + 2)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_ok va_sM va_s0))))))))))) [@"opaque_to_smt"] let rec va_lemma_AESNI_ctr32_6x_loop_recursive va_b0 va_s0 alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 = va_reveal_opaque (`%va_code_AESNI_ctr32_6x_loop_recursive) (va_code_AESNI_ctr32_6x_loop_recursive alg rnd); let (va_old_s:va_state) = va_s0 in let (va_b1:va_codes) = va_get_block va_b0 in let va_b10 = va_tl va_b1 in let va_c10 = va_hd va_b1 in let (va_fc10, va_s10) = ( if (rnd > 0) then ( let va_b11 = va_get_block va_c10 in let (va_s12, va_fc12) = va_lemma_AESNI_ctr32_6x_loop_recursive (va_hd va_b11) va_s0 alg (rnd - 1) key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in let va_b12 = va_tl va_b11 in let (va_s10, va_f12) = va_lemma_empty_total va_s12 va_b12 in let va_fc10 = va_lemma_merge_total va_b11 va_s0 va_fc12 va_s12 va_f12 va_s10 in (va_fc10, va_s10) ) else ( let va_b13 = va_get_block va_c10 in let (va_s10, va_fc10) = va_lemma_empty_total va_s0 va_b13 in (va_fc10, va_s10) ) ) in let (va_s14, va_fc14) = va_lemma_AESNI_ctr32_6x_loop_body (va_hd va_b10) va_s10 alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in let va_b14 = va_tl va_b10 in let (va_sM, va_f14) = va_lemma_empty_total va_s14 va_b14 in let va_f10 = va_lemma_merge_total va_b10 va_s10 va_fc14 va_s14 va_f14 va_sM in let va_fM = va_lemma_merge_total va_b1 va_s0 va_fc10 va_s10 va_f10 va_sM in (va_sM, va_fM) [@ va_qattr] let va_wp_AESNI_ctr32_6x_loop_recursive (alg:algorithm) (rnd:nat) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ rnd + 2 < FStar.Seq.Base.length #quad32 round_keys /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys 1 /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys 0 /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys 0 /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys 0 /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys 0 /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys 0 /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys 0) /\ (forall (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 va_s0))))))) in va_get_ok va_sM /\ (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (rnd + 1) /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (rnd + 1) /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (rnd + 1) /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (rnd + 1) /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (rnd + 1) /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (rnd + 1) /\ va_get_xmm 15 va_sM == FStar.Seq.Base.index #quad32 round_keys (rnd + 2)) ==> va_k va_sM (()))) val va_wpProof_AESNI_ctr32_6x_loop_recursive : alg:algorithm -> rnd:nat -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_AESNI_ctr32_6x_loop_recursive alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AESNI_ctr32_6x_loop_recursive alg rnd) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_AESNI_ctr32_6x_loop_recursive alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 va_s0 va_k = let (va_sM, va_f0) = va_lemma_AESNI_ctr32_6x_loop_recursive (va_code_AESNI_ctr32_6x_loop_recursive alg rnd) va_s0 alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_ok va_sM va_s0)))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_AESNI_ctr32_6x_loop_recursive (alg:algorithm) (rnd:nat) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_loop_recursive alg rnd)) = (va_QProc (va_code_AESNI_ctr32_6x_loop_recursive alg rnd) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9]) (va_wp_AESNI_ctr32_6x_loop_recursive alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5) (va_wpProof_AESNI_ctr32_6x_loop_recursive alg rnd key_words round_keys keys_b init0 init1 init2 init3 init4 init5)) //-- //-- AESNI_ctr32_6x_round9 #push-options "--z3rlimit 100" val va_code_AESNI_ctr32_6x_round9 : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_AESNI_ctr32_6x_round9 alg = (va_Block (va_CCons (if (alg = AES_128) then va_Block (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rRcx) (160 - 128) Secret) (va_CNil ())) else va_Block (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rRcx) (224 - 128) Secret) (va_CNil ()))) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 0 Secret)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 5) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 16 Secret)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 15)) (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 6) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 32 Secret)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 15)) (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 8) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 48 Secret)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 15)) (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 2) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 64 Secret)) (va_CCons (va_code_VAESNI_enc (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 15)) (va_CCons (va_code_Mem128_lemma ()) (va_CCons (va_code_VPxor (va_op_xmm_xmm 3) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 80 Secret)) (va_CCons (va_code_AddLea64 (va_op_dst_opr64_reg64 rRdi) (va_op_opr64_reg64 rRdi) (va_const_opr64 96)) (va_CNil ())))))))))))))))))))))) val va_codegen_success_AESNI_ctr32_6x_round9 : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_AESNI_ctr32_6x_round9 alg = (va_pbool_and (if (alg = AES_128) then va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rRcx) (160 - 128) Secret) (va_ttrue ()) else va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rRcx) (224 - 128) Secret) (va_ttrue ())) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 0 Secret)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 5) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 16 Secret)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 6) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 32 Secret)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 8) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 48 Secret)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 2) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 64 Secret)) (va_pbool_and (va_codegen_success_VAESNI_enc (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 15)) (va_pbool_and (va_codegen_success_Mem128_lemma ()) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 3) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 80 Secret)) (va_pbool_and (va_codegen_success_AddLea64 (va_op_dst_opr64_reg64 rRdi) (va_op_opr64_reg64 rRdi) (va_const_opr64 96)) (va_ttrue ()))))))))))))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_AESNI_ctr32_6x_round9 (va_mods:va_mods_t) (alg:algorithm) (count:nat) (in_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_round9 alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1260 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qInlineIf va_mods (alg = AES_128) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1261 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rRcx) (160 - 128) Secret keys_b 10) (va_QEmpty (())))) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1263 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 0) (va_op_xmm_xmm 3) (va_op_reg_opr64_reg64 rRcx) (224 - 128) Secret keys_b 14) (va_QEmpty (()))))) (fun (va_s:va_state) va_g -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1266 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1267 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 0 Secret in_b (count `op_Multiply` 6 + 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1267 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 4) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 0 Secret)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1268 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1269 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 16 Secret in_b (count `op_Multiply` 6 + 1)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1269 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 5) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 16 Secret)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1270 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1271 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 32 Secret in_b (count `op_Multiply` 6 + 2)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1271 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 6) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 32 Secret)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1272 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1273 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 48 Secret in_b (count `op_Multiply` 6 + 3)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1273 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 8) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 48 Secret)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1274 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1275 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 64 Secret in_b (count `op_Multiply` 6 + 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1275 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 2) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 64 Secret)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1276 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 15)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1277 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mem128_lemma (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 80 Secret in_b (count `op_Multiply` 6 + 5)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1277 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 3) (va_op_xmm_xmm 3) (va_opr_code_Mem128 (va_op_heaplet_mem_heaplet 6) (va_op_reg64_reg64 rRdi) 80 Secret)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1279 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_s.eval_rounds_reveal ()) (va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1280 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.commute_sub_bytes_shift_rows_forall ()) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1282 column 13 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AddLea64 (va_op_dst_opr64_reg64 rRdi) (va_op_opr64_reg64 rRdi) (va_const_opr64 96)) (va_QEmpty (()))))))))))))))))))))))))) val va_lemma_AESNI_ctr32_6x_round9 : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> count:nat -> in_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_AESNI_ctr32_6x_round9 alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 2)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ (let rk = FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg) in va_get_xmm 4 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 5 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 6 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 8 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 2 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 3 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM)) /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM va_s0)))))))))))))))))) [@"opaque_to_smt"] let va_lemma_AESNI_ctr32_6x_round9 va_b0 va_s0 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRdi; va_Mod_ok] in let va_qc = va_qcode_AESNI_ctr32_6x_round9 va_mods alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_AESNI_ctr32_6x_round9 alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 1191 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1243 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1244 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1245 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1246 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1247 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1248 column 66 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1250 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (let rk = FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg) in label va_range1 "***** POSTCONDITION NOT MET AT line 1251 column 73 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 4 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1252 column 73 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 5 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1253 column 73 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 6 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1254 column 73 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 8 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1255 column 73 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 2 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1256 column 73 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 3 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM))) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1258 column 31 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRdi; va_Mod_ok]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_AESNI_ctr32_6x_round9 (alg:algorithm) (count:nat) (in_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_xmm 15 va_s0 == FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 2) /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 2)) /\ (forall (va_x_rdi:nat64) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_reg64 rRdi va_x_rdi va_s0)))))))))))))) in va_get_ok va_sM /\ (va_get_xmm 9 va_sM == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 10 va_sM == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 11 va_sM == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 12 va_sM == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 13 va_sM == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 14 va_sM == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ (let rk = FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg) in va_get_xmm 4 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 5 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 6 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 8 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 2 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM)) /\ va_get_xmm 3 va_sM == Vale.Def.Types_s.quad32_xor rk (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM)) /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96)) ==> va_k va_sM (()))) val va_wpProof_AESNI_ctr32_6x_round9 : alg:algorithm -> count:nat -> in_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_AESNI_ctr32_6x_round9 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AESNI_ctr32_6x_round9 alg) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRdi]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_AESNI_ctr32_6x_round9 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 va_s0 va_k = let (va_sM, va_f0) = va_lemma_AESNI_ctr32_6x_round9 (va_code_AESNI_ctr32_6x_round9 alg) va_s0 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM va_s0))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRdi]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_AESNI_ctr32_6x_round9 (alg:algorithm) (count:nat) (in_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_round9 alg)) = (va_QProc (va_code_AESNI_ctr32_6x_round9 alg) ([va_Mod_flags; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRdi]) (va_wp_AESNI_ctr32_6x_round9 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5) (va_wpProof_AESNI_ctr32_6x_round9 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5)) #pop-options //-- //-- AESNI_ctr32_6x_final val va_code_AESNI_ctr32_6x_final : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_AESNI_ctr32_6x_final alg = (va_Block (va_CCons (va_code_VAESNI_enc_last (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 4)) (va_CCons (va_code_VAESNI_enc_last (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_CCons (va_code_VAESNI_enc_last (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 6)) (va_CCons (va_code_VAESNI_enc_last (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 8)) (va_CCons (va_code_VAESNI_enc_last (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_CCons (va_code_VAESNI_enc_last (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 3)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 9) 0 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 10) 16 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 11) 32 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 12) 48 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 13) 64 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 14) 80 Secret) (va_CCons (va_code_AddLea64 (va_op_dst_opr64_reg64 rRsi) (va_op_opr64_reg64 rRsi) (va_const_opr64 96)) (va_CNil ()))))))))))))))) val va_codegen_success_AESNI_ctr32_6x_final : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_AESNI_ctr32_6x_final alg = (va_pbool_and (va_codegen_success_VAESNI_enc_last (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 4)) (va_pbool_and (va_codegen_success_VAESNI_enc_last (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_pbool_and (va_codegen_success_VAESNI_enc_last (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 6)) (va_pbool_and (va_codegen_success_VAESNI_enc_last (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 8)) (va_pbool_and (va_codegen_success_VAESNI_enc_last (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_pbool_and (va_codegen_success_VAESNI_enc_last (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 3)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 9) 0 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 10) 16 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 11) 32 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 12) 48 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 13) 64 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 14) 80 Secret) (va_pbool_and (va_codegen_success_AddLea64 (va_op_dst_opr64_reg64 rRsi) (va_op_opr64_reg64 rRsi) (va_const_opr64 96)) (va_ttrue ())))))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_AESNI_ctr32_6x_final (va_mods:va_mods_t) (alg:algorithm) (count:nat) (out_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) (ctr0:quad32) (ctr1:quad32) (ctr2:quad32) (ctr3:quad32) (ctr4:quad32) (ctr5:quad32) (plain0:quad32) (plain1:quad32) (plain2:quad32) (plain3:quad32) (plain4:quad32) (plain5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_final alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1381 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc_last (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1382 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc_last (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1383 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc_last (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 6)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1384 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc_last (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 8)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1385 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc_last (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 2)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1386 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VAESNI_enc_last (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 3)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1388 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 9) 0 Secret out_b (count `op_Multiply` 6 + 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1389 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 10) 16 Secret out_b (count `op_Multiply` 6 + 1)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1390 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 11) 32 Secret out_b (count `op_Multiply` 6 + 2)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1391 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 12) 48 Secret out_b (count `op_Multiply` 6 + 3)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1392 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 13) 64 Secret out_b (count `op_Multiply` 6 + 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1393 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 14) 80 Secret out_b (count `op_Multiply` 6 + 5)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1395 column 13 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AddLea64 (va_op_dst_opr64_reg64 rRsi) (va_op_opr64_reg64 rRsi) (va_const_opr64 96)) (fun (va_s:va_state) _ -> va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1397 column 37 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Arch.TypesNative.lemma_quad32_xor_commutes_forall ()) (let (va_arg84:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg83:Vale.Def.Types_s.quad32) = va_get_xmm 9 va_s in let (va_arg82:Vale.Def.Types_s.quad32) = va_get_xmm 9 va_old_s in let (va_arg81:Vale.Def.Types_s.quad32) = init0 in let (va_arg80:Vale.Def.Types_s.quad32) = plain0 in let (va_arg79:Vale.Def.Types_s.quad32) = ctr0 in let (va_arg78:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1398 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher_opt va_arg78 va_arg79 va_arg80 va_arg81 va_arg82 va_arg83 va_arg84) (let (va_arg77:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg76:Vale.Def.Types_s.quad32) = va_get_xmm 10 va_s in let (va_arg75:Vale.Def.Types_s.quad32) = va_get_xmm 10 va_old_s in let (va_arg74:Vale.Def.Types_s.quad32) = init1 in let (va_arg73:Vale.Def.Types_s.quad32) = plain1 in let (va_arg72:Vale.Def.Types_s.quad32) = ctr1 in let (va_arg71:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1399 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher_opt va_arg71 va_arg72 va_arg73 va_arg74 va_arg75 va_arg76 va_arg77) (let (va_arg70:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg69:Vale.Def.Types_s.quad32) = va_get_xmm 11 va_s in let (va_arg68:Vale.Def.Types_s.quad32) = va_get_xmm 11 va_old_s in let (va_arg67:Vale.Def.Types_s.quad32) = init2 in let (va_arg66:Vale.Def.Types_s.quad32) = plain2 in let (va_arg65:Vale.Def.Types_s.quad32) = ctr2 in let (va_arg64:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1400 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher_opt va_arg64 va_arg65 va_arg66 va_arg67 va_arg68 va_arg69 va_arg70) (let (va_arg63:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg62:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_s in let (va_arg61:Vale.Def.Types_s.quad32) = va_get_xmm 12 va_old_s in let (va_arg60:Vale.Def.Types_s.quad32) = init3 in let (va_arg59:Vale.Def.Types_s.quad32) = plain3 in let (va_arg58:Vale.Def.Types_s.quad32) = ctr3 in let (va_arg57:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1401 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher_opt va_arg57 va_arg58 va_arg59 va_arg60 va_arg61 va_arg62 va_arg63) (let (va_arg56:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg55:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_s in let (va_arg54:Vale.Def.Types_s.quad32) = va_get_xmm 13 va_old_s in let (va_arg53:Vale.Def.Types_s.quad32) = init4 in let (va_arg52:Vale.Def.Types_s.quad32) = plain4 in let (va_arg51:Vale.Def.Types_s.quad32) = ctr4 in let (va_arg50:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1402 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher_opt va_arg50 va_arg51 va_arg52 va_arg53 va_arg54 va_arg55 va_arg56) (let (va_arg49:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = round_keys in let (va_arg48:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_s in let (va_arg47:Vale.Def.Types_s.quad32) = va_get_xmm 14 va_old_s in let (va_arg46:Vale.Def.Types_s.quad32) = init5 in let (va_arg45:Vale.Def.Types_s.quad32) = plain5 in let (va_arg44:Vale.Def.Types_s.quad32) = ctr5 in let (va_arg43:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1403 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.AES_helpers.finish_cipher_opt va_arg43 va_arg44 va_arg45 va_arg46 va_arg47 va_arg48 va_arg49) (va_QLemma va_range1 "***** PRECONDITION NOT MET AT line 1404 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg key) alg ctr0 key_words) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg ctr0 key_words) (fun (_:unit) -> finish_aes_encrypt_le alg ctr0 key_words) (va_QLemma va_range1 "***** PRECONDITION NOT MET AT line 1405 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg key) alg ctr1 key_words) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg ctr1 key_words) (fun (_:unit) -> finish_aes_encrypt_le alg ctr1 key_words) (va_QLemma va_range1 "***** PRECONDITION NOT MET AT line 1406 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg key) alg ctr2 key_words) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg ctr2 key_words) (fun (_:unit) -> finish_aes_encrypt_le alg ctr2 key_words) (va_QLemma va_range1 "***** PRECONDITION NOT MET AT line 1407 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg key) alg ctr3 key_words) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg ctr3 key_words) (fun (_:unit) -> finish_aes_encrypt_le alg ctr3 key_words) (va_QLemma va_range1 "***** PRECONDITION NOT MET AT line 1408 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg key) alg ctr4 key_words) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg ctr4 key_words) (fun (_:unit) -> finish_aes_encrypt_le alg ctr4 key_words) (va_QLemma va_range1 "***** PRECONDITION NOT MET AT line 1409 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.is_aes_key_LE alg key) alg ctr5 key_words) (fun _ -> (fun (alg:algorithm) (input_LE:quad32) (key:(seq nat32)) -> Vale.AES.AES_s.aes_encrypt_LE alg key input_LE == Vale.AES.AES_s.eval_cipher alg input_LE (Vale.AES.AES_s.key_to_round_keys_LE alg key)) alg ctr5 key_words) (fun (_:unit) -> finish_aes_encrypt_le alg ctr5 key_words) (va_QEmpty (()))))))))))))))))))))))))))))) val va_lemma_AESNI_ctr32_6x_final : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> count:nat -> out_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> ctr0:quad32 -> ctr1:quad32 -> ctr2:quad32 -> ctr3:quad32 -> ctr4:quad32 -> ctr5:quad32 -> plain0:quad32 -> plain1:quad32 -> plain2:quad32 -> plain3:quad32 -> plain4:quad32 -> plain5:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_AESNI_ctr32_6x_final alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ init0 == Vale.Def.Types_s.quad32_xor ctr0 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init1 == Vale.Def.Types_s.quad32_xor ctr1 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init2 == Vale.Def.Types_s.quad32_xor ctr2 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init3 == Vale.Def.Types_s.quad32_xor ctr3 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init4 == Vale.Def.Types_s.quad32_xor ctr4 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init5 == Vale.Def.Types_s.quad32_xor ctr5 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ (let rk = FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg) in va_get_xmm 4 va_s0 == Vale.Def.Types_s.quad32_xor rk plain0 /\ va_get_xmm 5 va_s0 == Vale.Def.Types_s.quad32_xor rk plain1 /\ va_get_xmm 6 va_s0 == Vale.Def.Types_s.quad32_xor rk plain2 /\ va_get_xmm 8 va_s0 == Vale.Def.Types_s.quad32_xor rk plain3 /\ va_get_xmm 2 va_s0 == Vale.Def.Types_s.quad32_xor rk plain4 /\ va_get_xmm 3 va_s0 == Vale.Def.Types_s.quad32_xor rk plain5)))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count) /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_sM /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor plain0 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr0) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor plain1 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr1) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor plain2 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr2) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor plain3 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr3) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor plain4 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr4) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor plain5 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr5)) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_reg64 rRsi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_AESNI_ctr32_6x_final va_b0 va_s0 alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5 = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRsi; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_AESNI_ctr32_6x_final va_mods alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5 in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_AESNI_ctr32_6x_final alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 1285 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1362 column 84 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1363 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1364 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1366 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1367 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1368 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1369 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1370 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1371 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1373 column 75 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor plain0 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1374 column 75 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor plain1 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr1)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1375 column 75 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor plain2 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr2)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1376 column 75 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor plain3 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr3)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1377 column 75 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor plain4 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr4)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1378 column 75 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor plain5 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr5)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRsi; va_Mod_ok; va_Mod_mem]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_AESNI_ctr32_6x_final (alg:algorithm) (count:nat) (out_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) (ctr0:quad32) (ctr1:quad32) (ctr2:quad32) (ctr3:quad32) (ctr4:quad32) (ctr5:quad32) (plain0:quad32) (plain1:quad32) (plain2:quad32) (plain3:quad32) (plain4:quad32) (plain5:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ init0 == Vale.Def.Types_s.quad32_xor ctr0 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init1 == Vale.Def.Types_s.quad32_xor ctr1 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init2 == Vale.Def.Types_s.quad32_xor ctr2 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init3 == Vale.Def.Types_s.quad32_xor ctr3 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init4 == Vale.Def.Types_s.quad32_xor ctr4 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ init5 == Vale.Def.Types_s.quad32_xor ctr5 (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) /\ va_get_xmm 9 va_s0 == Vale.AES.AES_s.eval_rounds init0 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 10 va_s0 == Vale.AES.AES_s.eval_rounds init1 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 11 va_s0 == Vale.AES.AES_s.eval_rounds init2 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 12 va_s0 == Vale.AES.AES_s.eval_rounds init3 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 13 va_s0 == Vale.AES.AES_s.eval_rounds init4 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ va_get_xmm 14 va_s0 == Vale.AES.AES_s.eval_rounds init5 round_keys (Vale.AES.AES_common_s.nr alg - 1) /\ (let rk = FStar.Seq.Base.index #quad32 round_keys (Vale.AES.AES_common_s.nr alg) in va_get_xmm 4 va_s0 == Vale.Def.Types_s.quad32_xor rk plain0 /\ va_get_xmm 5 va_s0 == Vale.Def.Types_s.quad32_xor rk plain1 /\ va_get_xmm 6 va_s0 == Vale.Def.Types_s.quad32_xor rk plain2 /\ va_get_xmm 8 va_s0 == Vale.Def.Types_s.quad32_xor rk plain3 /\ va_get_xmm 2 va_s0 == Vale.Def.Types_s.quad32_xor rk plain4 /\ va_get_xmm 3 va_s0 == Vale.Def.Types_s.quad32_xor rk plain5)) /\ (forall (va_x_mem:vale_heap) (va_x_rsi:nat64) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_heap6:vale_heap) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_reg64 rRsi va_x_rsi (va_upd_mem va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count) /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_sM /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.quad32_xor plain0 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr0) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.quad32_xor plain1 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr1) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.quad32_xor plain2 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr2) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.quad32_xor plain3 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr3) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.quad32_xor plain4 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr4) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.quad32_xor plain5 (Vale.AES.AES_s.aes_encrypt_LE alg key_words ctr5)) ==> va_k va_sM (()))) val va_wpProof_AESNI_ctr32_6x_final : alg:algorithm -> count:nat -> out_b:buffer128 -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> init0:quad32 -> init1:quad32 -> init2:quad32 -> init3:quad32 -> init4:quad32 -> init5:quad32 -> ctr0:quad32 -> ctr1:quad32 -> ctr2:quad32 -> ctr3:quad32 -> ctr4:quad32 -> ctr5:quad32 -> plain0:quad32 -> plain1:quad32 -> plain2:quad32 -> plain3:quad32 -> plain4:quad32 -> plain5:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_AESNI_ctr32_6x_final alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5 va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AESNI_ctr32_6x_final alg) ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRsi; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_AESNI_ctr32_6x_final alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5 va_s0 va_k = let (va_sM, va_f0) = va_lemma_AESNI_ctr32_6x_final (va_code_AESNI_ctr32_6x_final alg) va_s0 alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5 in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_reg64 rRsi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRsi; va_Mod_mem]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_AESNI_ctr32_6x_final (alg:algorithm) (count:nat) (out_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (init0:quad32) (init1:quad32) (init2:quad32) (init3:quad32) (init4:quad32) (init5:quad32) (ctr0:quad32) (ctr1:quad32) (ctr2:quad32) (ctr3:quad32) (ctr4:quad32) (ctr5:quad32) (plain0:quad32) (plain1:quad32) (plain2:quad32) (plain3:quad32) (plain4:quad32) (plain5:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x_final alg)) = (va_QProc (va_code_AESNI_ctr32_6x_final alg) ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_reg64 rRsi; va_Mod_mem]) (va_wp_AESNI_ctr32_6x_final alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5) (va_wpProof_AESNI_ctr32_6x_final alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 ctr0 ctr1 ctr2 ctr3 ctr4 ctr5 plain0 plain1 plain2 plain3 plain4 plain5)) //-- //-- AESNI_ctr32_6x val va_code_AESNI_ctr32_6x : alg:algorithm -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_AESNI_ctr32_6x alg = (va_Block (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_AESNI_ctr32_6x_preamble alg) (va_CCons (if (alg = AES_128) then va_Block (va_CCons (va_code_AESNI_ctr32_6x_loop_recursive alg 7) (va_CNil ())) else va_Block (va_CCons (va_code_AESNI_ctr32_6x_loop_recursive alg 11) (va_CNil ()))) (va_CCons (va_code_AESNI_ctr32_6x_round9 alg) (va_CCons (va_code_AESNI_ctr32_6x_final alg) (va_CCons (va_Block (va_CNil ())) (va_CNil ()))))))))))))) val va_codegen_success_AESNI_ctr32_6x : alg:algorithm -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_AESNI_ctr32_6x alg = (va_pbool_and (va_codegen_success_AESNI_ctr32_6x_preamble alg) (va_pbool_and (if (alg = AES_128) then va_pbool_and (va_codegen_success_AESNI_ctr32_6x_loop_recursive alg 7) (va_ttrue ()) else va_pbool_and (va_codegen_success_AESNI_ctr32_6x_loop_recursive alg 11) (va_ttrue ())) (va_pbool_and (va_codegen_success_AESNI_ctr32_6x_round9 alg) (va_pbool_and (va_codegen_success_AESNI_ctr32_6x_final alg) (va_ttrue ()))))) [@ "opaque_to_smt" va_qattr] let va_qcode_AESNI_ctr32_6x (va_mods:va_mods_t) (alg:algorithm) (count:nat) (in_b:buffer128) (out_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_BE:quad32) (ctr_BE_orig:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1492 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_539 (s_540:(FStar.Seq.Base.seq a_539)) (i_541:Prims.nat) -> let (i_515:Prims.nat) = i_541 in Prims.b2t (Prims.op_LessThan i_515 (FStar.Seq.Base.length #a_539 s_540))) Vale.Def.Types_s.quad32 round_keys 0) (fun _ -> let (init0:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1493 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_539 (s_540:(FStar.Seq.Base.seq a_539)) (i_541:Prims.nat) -> let (i_515:Prims.nat) = i_541 in Prims.b2t (Prims.op_LessThan i_515 (FStar.Seq.Base.length #a_539 s_540))) Vale.Def.Types_s.quad32 round_keys 0) (fun _ -> let (init1:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1494 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_539 (s_540:(FStar.Seq.Base.seq a_539)) (i_541:Prims.nat) -> let (i_515:Prims.nat) = i_541 in Prims.b2t (Prims.op_LessThan i_515 (FStar.Seq.Base.length #a_539 s_540))) Vale.Def.Types_s.quad32 round_keys 0) (fun _ -> let (init2:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1495 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_539 (s_540:(FStar.Seq.Base.seq a_539)) (i_541:Prims.nat) -> let (i_515:Prims.nat) = i_541 in Prims.b2t (Prims.op_LessThan i_515 (FStar.Seq.Base.length #a_539 s_540))) Vale.Def.Types_s.quad32 round_keys 0) (fun _ -> let (init3:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1496 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_539 (s_540:(FStar.Seq.Base.seq a_539)) (i_541:Prims.nat) -> let (i_515:Prims.nat) = i_541 in Prims.b2t (Prims.op_LessThan i_515 (FStar.Seq.Base.length #a_539 s_540))) Vale.Def.Types_s.quad32 round_keys 0) (fun _ -> let (init4:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1497 column 5 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" ((fun a_539 (s_540:(FStar.Seq.Base.seq a_539)) (i_541:Prims.nat) -> let (i_515:Prims.nat) = i_541 in Prims.b2t (Prims.op_LessThan i_515 (FStar.Seq.Base.length #a_539 s_540))) Vale.Def.Types_s.quad32 round_keys 0) (fun _ -> let (init5:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.quad32_xor (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (FStar.Seq.Base.index #Vale.Def.Types_s.quad32 round_keys 0) in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1499 column 28 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x_preamble alg key_words round_keys keys_b ctr_BE) (fun (va_s:va_state) _ -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1500 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qInlineIf va_mods (alg = AES_128) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1501 column 36 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x_loop_recursive alg 7 key_words round_keys keys_b init0 init1 init2 init3 init4 init5) (va_QEmpty (())))) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1503 column 36 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x_loop_recursive alg 11 key_words round_keys keys_b init0 init1 init2 init3 init4 init5) (va_QEmpty (()))))) (fun (va_s:va_state) va_g -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1505 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x_round9 alg count in_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5) (fun (va_s:va_state) _ -> va_QBind va_range1 "***** PRECONDITION NOT MET AT line 1506 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x_final alg count out_b key_words round_keys keys_b init0 init1 init2 init3 init4 init5 (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0)) (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 1)) (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 2)) (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 3)) (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 4)) (Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 5)) (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_s)) (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_s)) (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_s)) (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_s)) (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_s)) (Vale.X64.Decls.buffer128_read in_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_s))) (fun (va_s:va_state) _ -> let (plain:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b in let (cipher:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (bound:(va_int_at_least 0)) = count `op_Multiply` 6 in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 1523 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (bound >= 0 /\ bound <= 4294967295) (fun _ -> let (va_arg61:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg60:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg59:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = cipher in let (va_arg58:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) out_b in let (va_arg57:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg56:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg55:Vale.Def.Types_s.nat32) = bound in let (va_arg54:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1523 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_ignores_postfix va_arg54 va_arg55 va_arg56 va_arg57 va_arg58 va_arg59 va_arg60 va_arg61) (let (va_arg53:Vale.Def.Types_s.quad32) = ctr_BE_orig in let (va_arg52:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg51:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = cipher in let (va_arg50:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = plain_quads in let (va_arg49:Prims.nat) = bound in let (va_arg48:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 1525 column 25 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_extend6 va_arg48 va_arg49 va_arg50 va_arg51 va_arg52 va_arg53) (va_QEmpty (())))))))))))))))) val va_lemma_AESNI_ctr32_6x : va_b0:va_code -> va_s0:va_state -> alg:algorithm -> count:nat -> in_b:buffer128 -> out_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_BE:quad32 -> ctr_BE_orig:quad32 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_AESNI_ctr32_6x alg) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_reg64 rRcx va_s0 - 96 >= 0 /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count) /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96 /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6) /\ (0 <= va_get_reg64 rRbx va_sM /\ va_get_reg64 rRbx va_sM < 256) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_sM /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))) [@"opaque_to_smt"] let va_lemma_AESNI_ctr32_6x va_b0 va_s0 alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_AESNI_ctr32_6x va_mods alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_AESNI_ctr32_6x alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 1412 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1473 column 84 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1474 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1475 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1476 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1478 column 57 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1479 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (0 <= va_get_reg64 rRbx va_sM /\ va_get_reg64 rRbx va_sM < 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1480 column 50 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1482 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1483 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1484 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1485 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1486 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1487 column 60 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1490 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_ok; va_Mod_mem]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_AESNI_ctr32_6x (alg:algorithm) (count:nat) (in_b:buffer128) (out_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_BE:quad32) (ctr_BE_orig:quad32) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validSrcAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRdi va_s0) in_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ Vale.AES.GCTR.partial_seq_agreement plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (count `op_Multiply` 6) (count `op_Multiply` 6 + 6) /\ va_get_reg64 rRdi va_s0 + 96 < pow2_64 /\ va_get_reg64 rRsi va_s0 + 96 < pow2_64 /\ aes_reqs_offset alg key_words round_keys keys_b (va_get_reg64 rRcx va_s0) (va_get_mem_heaplet 0 va_s0) (va_get_mem_layout va_s0) /\ va_get_reg64 rRcx va_s0 - 96 >= 0 /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051 /\ count `op_Multiply` 6 + 6 < pow2_32 /\ ctr_BE == Vale.AES.GCTR.inc32lite ctr_BE_orig (count `op_Multiply` 6) /\ va_get_xmm 1 va_s0 == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 0) /\ va_get_reg64 rRbx va_s0 == Vale.Def.Words_s.__proj__Mkfour__item__lo0 ctr_BE `op_Modulus` 256 /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` count) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) key_words ctr_BE_orig) /\ (forall (va_x_mem:vale_heap) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_rbx:nat64) (va_x_r11:nat64) (va_x_r12:nat64) (va_x_xmm1:quad32) (va_x_xmm2:quad32) (va_x_xmm3:quad32) (va_x_xmm4:quad32) (va_x_xmm5:quad32) (va_x_xmm6:quad32) (va_x_xmm8:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_xmm15:quad32) (va_x_heap6:vale_heap) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 6 va_x_heap6 (va_upd_xmm 15 va_x_xmm15 (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 8 va_x_xmm8 (va_upd_xmm 6 va_x_xmm6 (va_upd_xmm 5 va_x_xmm5 (va_upd_xmm 4 va_x_xmm4 (va_upd_xmm 3 va_x_xmm3 (va_upd_xmm 2 va_x_xmm2 (va_upd_xmm 1 va_x_xmm1 (va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count) /\ va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0 + 96 /\ va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0 + 96 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite ctr_BE 6) /\ (0 <= va_get_reg64 rRbx va_sM /\ va_get_reg64 rRbx va_sM < 256) /\ va_get_reg64 rRbx va_sM == Vale.Def.Words_s.__proj__Mkfour__item__lo0 (Vale.AES.GCTR.inc32lite ctr_BE 6) `op_Modulus` 256 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_sM /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_sM /\ Vale.AES.GCTR.gctr_partial alg (6 `op_Multiply` (count + 1)) plain_quads (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words ctr_BE_orig) ==> va_k va_sM (()))) val va_wpProof_AESNI_ctr32_6x : alg:algorithm -> count:nat -> in_b:buffer128 -> out_b:buffer128 -> plain_quads:(seq quad32) -> key_words:(seq nat32) -> round_keys:(seq quad32) -> keys_b:buffer128 -> ctr_BE:quad32 -> ctr_BE_orig:quad32 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_AESNI_ctr32_6x alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AESNI_ctr32_6x alg) ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_AESNI_ctr32_6x alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig va_s0 va_k = let (va_sM, va_f0) = va_lemma_AESNI_ctr32_6x (va_code_AESNI_ctr32_6x alg) va_s0 alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 6 va_sM (va_update_xmm 15 va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 8 va_sM (va_update_xmm 6 va_sM (va_update_xmm 5 va_sM (va_update_xmm 4 va_sM (va_update_xmm 3 va_sM (va_update_xmm 2 va_sM (va_update_xmm 1 va_sM (va_update_reg64 rR12 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_AESNI_ctr32_6x (alg:algorithm) (count:nat) (in_b:buffer128) (out_b:buffer128) (plain_quads:(seq quad32)) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (ctr_BE:quad32) (ctr_BE_orig:quad32) : (va_quickCode unit (va_code_AESNI_ctr32_6x alg)) = (va_QProc (va_code_AESNI_ctr32_6x alg) ([va_Mod_flags; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_mem]) (va_wp_AESNI_ctr32_6x alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig) (va_wpProof_AESNI_ctr32_6x alg count in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE_orig)) //-- //-- Encrypt_save_and_shuffle_output val va_code_Encrypt_save_and_shuffle_output : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_Encrypt_save_and_shuffle_output () = (va_Block (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 9) (0 - 96) Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_opr128_xmm 7)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 10) (0 - 80) Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 11) (0 - 64) Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 12) (0 - 48) Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 13) (0 - 32) Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 14) (0 - 16) Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_CNil ()))))))))))))))) val va_codegen_success_Encrypt_save_and_shuffle_output : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_Encrypt_save_and_shuffle_output () = (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 9) (0 - 96) Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_opr128_xmm 7)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 10) (0 - 80) Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 11) (0 - 64) Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 12) (0 - 48) Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 13) (0 - 32) Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 14) (0 - 16) Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_ttrue ())))))))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_Encrypt_save_and_shuffle_output (va_mods:va_mods_t) (count:nat) (out_b:buffer128) : (va_quickCode unit (va_code_Encrypt_save_and_shuffle_output ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1573 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 9) (0 - 96) Secret out_b (count `op_Multiply` 6 + 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1574 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 9) (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1575 column 10 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPxor (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_opr128_xmm 7)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1576 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 10) (0 - 80) Secret out_b (count `op_Multiply` 6 + 1)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1577 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 10) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1578 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 11) (0 - 64) Secret out_b (count `op_Multiply` 6 + 2)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1579 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 11) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1580 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 12) (0 - 48) Secret out_b (count `op_Multiply` 6 + 3)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1581 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 12) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1582 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 13) (0 - 32) Secret out_b (count `op_Multiply` 6 + 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1583 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 13) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1584 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 6) (va_op_reg_opr64_reg64 rRsi) (va_op_xmm_xmm 14) (0 - 16) Secret out_b (count `op_Multiply` 6 + 5)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1585 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 14) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_QEmpty (())))))))))))))))) val va_lemma_Encrypt_save_and_shuffle_output : va_b0:va_code -> va_s0:va_state -> count:nat -> out_b:buffer128 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_Encrypt_save_and_shuffle_output ()) va_s0 /\ va_get_ok va_s0 /\ (avx_enabled /\ sse_enabled /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0 - 96) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count) /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_s0 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.quad32_xor (va_get_xmm 1 va_s0) (va_get_xmm 7 va_sM) /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 9 va_s0) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 10 va_s0) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11 va_s0) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 12 va_s0) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 13 va_s0) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 14 va_s0)) /\ va_state_eq va_sM (va_update_mem_heaplet 6 va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))) [@"opaque_to_smt"] let va_lemma_Encrypt_save_and_shuffle_output va_b0 va_s0 count out_b = let (va_mods:va_mods_t) = [va_Mod_mem_heaplet 6; va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 1; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_Encrypt_save_and_shuffle_output va_mods count out_b in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_Encrypt_save_and_shuffle_output ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 1528 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1554 column 84 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1555 column 96 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1557 column 65 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1558 column 65 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1559 column 65 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1560 column 65 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1561 column 65 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1562 column 65 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1564 column 38 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 1 va_sM == Vale.Def.Types_s.quad32_xor (va_get_xmm 1 va_s0) (va_get_xmm 7 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1565 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 9 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 9 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1566 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 10 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1567 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1568 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 12 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1569 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 13 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1570 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 14 va_s0)))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_mem_heaplet 6; va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 1; va_Mod_ok; va_Mod_mem]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_Encrypt_save_and_shuffle_output (count:nat) (out_b:buffer128) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (avx_enabled /\ sse_enabled /\ Vale.X64.Decls.validDstAddrsOffset128 (va_get_mem_heaplet 6 va_s0) (va_get_reg64 rRsi va_s0 - 96) out_b (count `op_Multiply` 6) 6 (va_get_mem_layout va_s0) Secret /\ va_get_xmm 0 va_s0 == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 202182159 134810123 67438087 66051) /\ (forall (va_x_mem:vale_heap) (va_x_xmm1:quad32) (va_x_xmm9:quad32) (va_x_xmm10:quad32) (va_x_xmm11:quad32) (va_x_xmm12:quad32) (va_x_xmm13:quad32) (va_x_xmm14:quad32) (va_x_efl:Vale.X64.Flags.t) (va_x_heap6:vale_heap) . let va_sM = va_upd_mem_heaplet 6 va_x_heap6 (va_upd_flags va_x_efl (va_upd_xmm 14 va_x_xmm14 (va_upd_xmm 13 va_x_xmm13 (va_upd_xmm 12 va_x_xmm12 (va_upd_xmm 11 va_x_xmm11 (va_upd_xmm 10 va_x_xmm10 (va_upd_xmm 9 va_x_xmm9 (va_upd_xmm 1 va_x_xmm1 (va_upd_mem va_x_mem va_s0))))))))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer_specific128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM) (count `op_Multiply` 6 + 0) (count `op_Multiply` 6 + 5) /\ FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) 0 (6 `op_Multiply` count) == FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) out_b) 0 (6 `op_Multiply` count) /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 0) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 9 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 1) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 10 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 2) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 11 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 3) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 12 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 4) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 13 va_s0 /\ Vale.X64.Decls.buffer128_read out_b (count `op_Multiply` 6 + 5) (va_get_mem_heaplet 6 va_sM) == va_get_xmm 14 va_s0 /\ va_get_xmm 1 va_sM == Vale.Def.Types_s.quad32_xor (va_get_xmm 1 va_s0) (va_get_xmm 7 va_sM) /\ va_get_xmm 9 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 9 va_s0) /\ va_get_xmm 10 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 10 va_s0) /\ va_get_xmm 11 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 11 va_s0) /\ va_get_xmm 12 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 12 va_s0) /\ va_get_xmm 13 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 13 va_s0) /\ va_get_xmm 14 va_sM == Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 14 va_s0)) ==> va_k va_sM (()))) val va_wpProof_Encrypt_save_and_shuffle_output : count:nat -> out_b:buffer128 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_Encrypt_save_and_shuffle_output count out_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Encrypt_save_and_shuffle_output ()) ([va_Mod_mem_heaplet 6; va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 1; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_Encrypt_save_and_shuffle_output count out_b va_s0 va_k = let (va_sM, va_f0) = va_lemma_Encrypt_save_and_shuffle_output (va_code_Encrypt_save_and_shuffle_output ()) va_s0 count out_b in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_mem_heaplet 6 va_sM (va_update_flags va_sM (va_update_xmm 14 va_sM (va_update_xmm 13 va_sM (va_update_xmm 12 va_sM (va_update_xmm 11 va_sM (va_update_xmm 10 va_sM (va_update_xmm 9 va_sM (va_update_xmm 1 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))); va_lemma_norm_mods ([va_Mod_mem_heaplet 6; va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 1; va_Mod_mem]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_Encrypt_save_and_shuffle_output (count:nat) (out_b:buffer128) : (va_quickCode unit (va_code_Encrypt_save_and_shuffle_output ())) = (va_QProc (va_code_Encrypt_save_and_shuffle_output ()) ([va_Mod_mem_heaplet 6; va_Mod_flags; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 1; va_Mod_mem]) (va_wp_Encrypt_save_and_shuffle_output count out_b) (va_wpProof_Encrypt_save_and_shuffle_output count out_b)) //-- //-- UpdateScratch val va_code_UpdateScratch : va_dummy:unit -> Tot va_code [@ "opaque_to_smt" va_qattr] let va_code_UpdateScratch () = (va_Block (va_CCons (va_code_ZeroXmm (va_op_xmm_xmm 4)) (va_CCons (va_code_Mov128 (va_op_xmm_xmm 7) (va_op_xmm_xmm 14)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 13) 48 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 12) 64 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 11) 80 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 10) 96 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 9) 112 Secret) (va_CNil ())))))))))) val va_codegen_success_UpdateScratch : va_dummy:unit -> Tot va_pbool [@ "opaque_to_smt" va_qattr] let va_codegen_success_UpdateScratch () = (va_pbool_and (va_codegen_success_ZeroXmm (va_op_xmm_xmm 4)) (va_pbool_and (va_codegen_success_Mov128 (va_op_xmm_xmm 7) (va_op_xmm_xmm 14)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 13) 48 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 12) 64 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 11) 80 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 10) 96 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 9) 112 Secret) (va_ttrue ()))))))))) [@ "opaque_to_smt" va_qattr] let va_qcode_UpdateScratch (va_mods:va_mods_t) (scratch_b:buffer128) : (va_quickCode unit (va_code_UpdateScratch ())) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1623 column 12 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_ZeroXmm (va_op_xmm_xmm 4)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1624 column 11 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Mov128 (va_op_xmm_xmm 7) (va_op_xmm_xmm 14)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1625 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret scratch_b 1) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1626 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 13) 48 Secret scratch_b 3) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1627 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 12) 64 Secret scratch_b 4) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1628 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 11) 80 Secret scratch_b 5) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1629 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 10) 96 Secret scratch_b 6) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 1630 column 20 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 9) 112 Secret scratch_b 7) (va_QEmpty (()))))))))))) val va_lemma_UpdateScratch : va_b0:va_code -> va_s0:va_state -> scratch_b:buffer128 -> Ghost (va_state & va_fuel) (requires (va_require_total va_b0 (va_code_UpdateScratch ()) va_s0 /\ va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 8 (va_get_mem_layout va_s0) Secret))) (ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) /\ Vale.X64.Decls.buffer_modifies_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 7 /\ Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_s0) == Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM) /\ Vale.X64.Decls.buffer128_read scratch_b 3 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 13 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 4 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 12 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 5 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 11 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 6 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 10 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 7 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 9 va_sM /\ va_get_xmm 7 va_sM == va_get_xmm 14 va_sM /\ va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_xmm 7 va_sM (va_update_xmm 4 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0)))))))) [@"opaque_to_smt"] let va_lemma_UpdateScratch va_b0 va_s0 scratch_b = let (va_mods:va_mods_t) = [va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_xmm 7; va_Mod_xmm 4; va_Mod_ok; va_Mod_mem] in let va_qc = va_qcode_UpdateScratch va_mods scratch_b in let (va_sM, va_fM, va_g) = va_wp_sound_code_norm (va_code_UpdateScratch ()) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 1588 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 1610 column 57 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1611 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer_modifies_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 7) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1613 column 63 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1614 column 88 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_s0) == Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1615 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 3 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 13 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1616 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 4 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 12 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1617 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 5 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 11 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1618 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 6 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 10 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1619 column 54 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.buffer128_read scratch_b 7 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 9 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1620 column 21 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 7 va_sM == va_get_xmm 14 va_sM) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 1621 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_xmm 7; va_Mod_xmm 4; va_Mod_ok; va_Mod_mem]) va_sM va_s0; (va_sM, va_fM) [@ va_qattr] let va_wp_UpdateScratch (scratch_b:buffer128) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 = (va_get_ok va_s0 /\ (sse_enabled /\ Vale.X64.Decls.validDstAddrs128 (va_get_mem_heaplet 3 va_s0) (va_get_reg64 rRbp va_s0) scratch_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_xmm4:quad32) (va_x_xmm7:quad32) (va_x_heap3:vale_heap) (va_x_efl:Vale.X64.Flags.t) . let va_sM = va_upd_flags va_x_efl (va_upd_mem_heaplet 3 va_x_heap3 (va_upd_xmm 7 va_x_xmm7 (va_upd_xmm 4 va_x_xmm4 (va_upd_mem va_x_mem va_s0)))) in va_get_ok va_sM /\ (Vale.X64.Decls.modifies_buffer128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) /\ Vale.X64.Decls.buffer_modifies_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 7 /\ Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0 /\ Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_s0) == Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM) /\ Vale.X64.Decls.buffer128_read scratch_b 3 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 13 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 4 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 12 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 5 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 11 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 6 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 10 va_sM /\ Vale.X64.Decls.buffer128_read scratch_b 7 (va_get_mem_heaplet 3 va_sM) == va_get_xmm 9 va_sM /\ va_get_xmm 7 va_sM == va_get_xmm 14 va_sM /\ va_get_xmm 4 va_sM == Vale.Def.Words_s.Mkfour #Vale.Def.Types_s.nat32 0 0 0 0) ==> va_k va_sM (()))) val va_wpProof_UpdateScratch : scratch_b:buffer128 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0) -> Ghost (va_state & va_fuel & unit) (requires (va_t_require va_s0 /\ va_wp_UpdateScratch scratch_b va_s0 va_k)) (ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_UpdateScratch ()) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_xmm 7; va_Mod_xmm 4; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g)))) [@"opaque_to_smt"] let va_wpProof_UpdateScratch scratch_b va_s0 va_k = let (va_sM, va_f0) = va_lemma_UpdateScratch (va_code_UpdateScratch ()) va_s0 scratch_b in va_lemma_upd_update va_sM; assert (va_state_eq va_sM (va_update_flags va_sM (va_update_mem_heaplet 3 va_sM (va_update_xmm 7 va_sM (va_update_xmm 4 va_sM (va_update_ok va_sM (va_update_mem va_sM va_s0))))))); va_lemma_norm_mods ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_xmm 7; va_Mod_xmm 4; va_Mod_mem]) va_sM va_s0; let va_g = () in (va_sM, va_f0, va_g) [@ "opaque_to_smt" va_qattr] let va_quick_UpdateScratch (scratch_b:buffer128) : (va_quickCode unit (va_code_UpdateScratch ())) = (va_QProc (va_code_UpdateScratch ()) ([va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_xmm 7; va_Mod_xmm 4; va_Mod_mem]) (va_wp_UpdateScratch scratch_b) (va_wpProof_UpdateScratch scratch_b)) //-- //-- AES_GCM_encrypt_6mult #push-options "--z3rlimit 40000 --z3refresh --max_ifuel 0 --z3seed 7" #restart-solver [@ "opaque_to_smt" va_qattr] let va_code_AES_GCM_encrypt_6mult alg = (va_Block (va_CCons (va_IfElse (va_cmp_eq (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (va_Block (va_CCons (va_code_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 1) 32 Secret) (va_CNil ())))) (va_Block (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 32 Secret) (va_CCons (va_code_Add64 (va_op_dst_opr64_reg64 rRcx) (va_const_opr64 128)) (va_CCons (va_code_Pextrq (va_op_dst_opr64_reg64 rRbx) (va_op_xmm_xmm 1) 0) (va_CCons (va_code_And64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 255)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_CCons (va_code_AddLea64 (va_op_dst_opr64_reg64 rR14) (va_op_opr64_reg64 rRsi) (va_const_opr64 96)) (va_CCons (va_code_AESNI_ctr32_6x alg) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 8) (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 2) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 112 Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 4) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 2) 96 Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 5) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 80 Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 5) 64 Secret) (va_CCons (va_code_VPshufb (va_op_xmm_xmm 7) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 6) 48 Secret) (va_CCons (va_code_AESNI_ctr32_6x alg) (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 12)) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 8) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_CCons (va_code_Ctr32_ghash_6_prelude alg) (va_CCons (va_code_Loop6x_loop alg) (va_CCons (va_code_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 1) 32 Secret) (va_CCons (va_code_ZeroXmm (va_op_xmm_xmm 4)) (va_CCons (va_code_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_GhashUnroll6x ()) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_InitPshufbMask (va_op_xmm_xmm 0) (va_op_reg_opr64_reg64 rR12)) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_Encrypt_save_and_shuffle_output ()) (va_CCons (va_code_UpdateScratch ()) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_GhashUnroll6x ()) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_Block (va_CNil ())) (va_CCons (va_code_Sub64 (va_op_dst_opr64_reg64 rRcx) (va_const_opr64 128)) (va_CNil ())))))))))))))))))))))))))))))))))))))))))))) (va_CNil ()))) [@ "opaque_to_smt" va_qattr] let va_codegen_success_AES_GCM_encrypt_6mult alg = (va_pbool_and (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 1) 32 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 32 Secret) (va_pbool_and (va_codegen_success_Add64 (va_op_dst_opr64_reg64 rRcx) (va_const_opr64 128)) (va_pbool_and (va_codegen_success_Pextrq (va_op_dst_opr64_reg64 rRbx) (va_op_xmm_xmm 1) 0) (va_pbool_and (va_codegen_success_And64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 255)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_AddLea64 (va_op_dst_opr64_reg64 rR14) (va_op_opr64_reg64 rRsi) (va_const_opr64 96)) (va_pbool_and (va_codegen_success_AESNI_ctr32_6x alg) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 8) (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 2) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 112 Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 4) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 2) 96 Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 5) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 80 Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 5) 64 Secret) (va_pbool_and (va_codegen_success_VPshufb (va_op_xmm_xmm 7) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 6) 48 Secret) (va_pbool_and (va_codegen_success_AESNI_ctr32_6x alg) (va_pbool_and (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 12)) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 8) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_pbool_and (va_codegen_success_Ctr32_ghash_6_prelude alg) (va_pbool_and (va_codegen_success_Loop6x_loop alg) (va_pbool_and (va_codegen_success_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 1) 32 Secret) (va_pbool_and (va_codegen_success_ZeroXmm (va_op_xmm_xmm 4)) (va_pbool_and (va_codegen_success_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret) (va_pbool_and (va_codegen_success_GhashUnroll6x ()) (va_pbool_and (va_codegen_success_InitPshufbMask (va_op_xmm_xmm 0) (va_op_reg_opr64_reg64 rR12)) (va_pbool_and (va_codegen_success_Encrypt_save_and_shuffle_output ()) (va_pbool_and (va_codegen_success_UpdateScratch ()) (va_pbool_and (va_codegen_success_GhashUnroll6x ()) (va_codegen_success_Sub64 (va_op_dst_opr64_reg64 rRcx) (va_const_opr64 128)))))))))))))))))))))))))))))))))))) (va_ttrue ())) [@ "opaque_to_smt" va_qattr] let va_qcode_AES_GCM_encrypt_6mult (va_mods:va_mods_t) (alg:algorithm) (h_LE:quad32) (iv_b:buffer128) (in_b:buffer128) (out_b:buffer128) (scratch_b:buffer128) (key_words:(seq nat32)) (round_keys:(seq quad32)) (keys_b:buffer128) (hkeys_b:buffer128) : (va_quickCode unit (va_code_AES_GCM_encrypt_6mult alg)) = (qblock va_mods (fun (va_s:va_state) -> let (va_old_s:va_state) = va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2176 column 8 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_qIf va_mods (Cmp_eq (va_op_cmp_reg64 rRdx) (va_const_cmp 0)) (qblock va_mods (fun (va_s:va_state) -> va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2178 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2179 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 1) 32 Secret scratch_b 2) (fun (va_s:va_state) _ -> let (va_arg104:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_old_s in let (va_arg103:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg102:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (va_arg101:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b in let (va_arg100:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2180 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_init va_arg100 va_arg101 va_arg102 va_arg103 va_arg104) (va_QEmpty (())))))) (qblock va_mods (fun (va_s:va_state) -> let (plain_quads:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b in let (y_orig:Vale.Def.Types_s.quad32) = Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s) in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2187 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 32 Secret scratch_b 2) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2189 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Add64 (va_op_dst_opr64_reg64 rRcx) (va_const_opr64 128)) (fun (va_s:va_state) _ -> let (ctr_BE:quad32) = va_get_xmm 1 va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2195 column 15 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Pextrq (va_op_dst_opr64_reg64 rRbx) (va_op_xmm_xmm 1) 0) (fun (va_s:va_state) _ -> let (full_counter:nat64) = va_get_reg64 rRbx va_s in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2197 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_And64 (va_op_dst_opr64_reg64 rRbx) (va_const_opr64 255)) (fun (va_s:va_state) _ -> let (va_arg136:Vale.Def.Types_s.nat64) = va_get_reg64 rRbx va_s in let (va_arg135:Vale.Def.Types_s.nat64) = full_counter in let (va_arg134:Vale.Def.Types_s.quad32) = va_get_xmm 1 va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2198 column 27 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.lemma_counter_init va_arg134 va_arg135 va_arg136) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2200 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 1) (va_op_xmm_xmm 1) (va_op_xmm_xmm 0)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2203 column 17 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AddLea64 (va_op_dst_opr64_reg64 rR14) (va_op_opr64_reg64 rRsi) (va_const_opr64 96)) (fun (va_s:va_state) _ -> let (va_arg133:Vale.Def.Types_s.quad32) = ctr_BE in let (va_arg132:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg131:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (va_arg130:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) in_b in let (va_arg129:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2205 column 33 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_init va_arg129 va_arg130 va_arg131 va_arg132 va_arg133) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2206 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x alg 0 in_b out_b plain_quads key_words round_keys keys_b ctr_BE ctr_BE) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2208 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 8) (va_op_xmm_xmm 9) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2209 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 2) (va_op_xmm_xmm 10) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2210 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 8) 112 Secret scratch_b 7) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2211 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 4) (va_op_xmm_xmm 11) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2212 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 2) 96 Secret scratch_b 6) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2213 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 5) (va_op_xmm_xmm 12) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2214 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 80 Secret scratch_b 5) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2215 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 6) (va_op_xmm_xmm 13) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2216 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 5) 64 Secret scratch_b 4) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2217 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_VPshufb (va_op_xmm_xmm 7) (va_op_xmm_xmm 14) (va_op_xmm_xmm 0)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2218 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 6) 48 Secret scratch_b 3) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2220 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_AESNI_ctr32_6x alg 1 in_b out_b plain_quads key_words round_keys keys_b (Vale.AES.GCTR_s.inc32 ctr_BE 6) ctr_BE) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2221 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rRdx) (va_const_opr64 12)) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2223 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 8) (va_op_reg_opr64_reg64 rRbp) 32 Secret scratch_b 2) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2226 column 30 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Ctr32_ghash_6_prelude alg scratch_b key_words round_keys keys_b (Vale.AES.GCTR_s.inc32 ctr_BE 12)) (fun (va_s:va_state) _ -> let (mid_len:nat64) = va_get_reg64 rRdx va_s in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2233 column 26 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Math.Poly2.Words.lemma_quad32_zero ()) (let (va_arg128:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2234 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Math.Poly2.lemma_add_zero va_arg128) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 2235 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) == add (add (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 4 va_s))) (Vale.Math.Poly2.Bits_s.of_quad32 (Vale.X64.Decls.buffer128_read scratch_b 1 (va_get_mem_heaplet 3 va_s)))) (va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 2236 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Math.Poly2.Bits_s.to_quad32 (Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s)) == va_get_xmm 8 va_s) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2237 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Loop6x_loop alg h_LE (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s)) (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s)) 2 iv_b out_b in_b out_b scratch_b (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b) key_words round_keys keys_b hkeys_b ctr_BE (Vale.AES.GCTR_s.inc32 ctr_BE 12)) (fun (va_s:va_state) (y_new:quad32) -> let (out_snapshot:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2240 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Load128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_xmm_xmm 7) (va_op_reg_opr64_reg64 rRbp) 32 Secret scratch_b 2) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2243 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 1) 32 Secret scratch_b 2) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2246 column 16 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_ZeroXmm (va_op_xmm_xmm 4)) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2247 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Store128_buffer (va_op_heaplet_mem_heaplet 3) (va_op_reg_opr64_reg64 rRbp) (va_op_xmm_xmm 4) 16 Secret scratch_b 1) (fun (va_s:va_state) _ -> let (va_arg127:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2248 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Math.Poly2.lemma_add_zero va_arg127) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2250 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s - 12 >= 0 /\ va_get_reg64 rRdx va_old_s - 6 >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) (va_get_reg64 rRdx va_old_s - 12) (va_get_reg64 rRdx va_old_s - 6)) (fun _ -> let (data:(FStar.Seq.Base.seq Vale.X64.Decls.quad32)) = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) (va_get_reg64 rRdx va_old_s - 12) (va_get_reg64 rRdx va_old_s - 6) in va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2251 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_GhashUnroll6x hkeys_b scratch_b h_LE y_new data) (fun (va_s:va_state) _ -> let (y_new':Vale.Def.Types_s.quad32) = Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2253 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s - 12 >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 12)) (fun _ -> let (va_arg126:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = data in let (va_arg125:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 12) in let (va_arg124:Vale.Def.Types_s.quad32) = y_new in let (va_arg123:Vale.Def.Types_s.quad32) = h_LE in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2253 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GHash.lemma_ghash_incremental0_append va_arg123 y_orig va_arg124 y_new' va_arg125 va_arg126) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2255 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s - 12 >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 12) /\ va_get_reg64 rRdx va_old_s - 6 >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 2255 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #Vale.X64.Decls.quad32 (FStar.Seq.Base.append #Vale.X64.Decls.quad32 (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 12)) data) (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 6))) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2260 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_InitPshufbMask (va_op_xmm_xmm 0) (va_op_reg_opr64_reg64 rR12)) (fun (va_s:va_state) _ -> va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2267 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s `op_Division` 6 - 1 >= 0) (fun _ -> let (offset_in:nat) = va_get_reg64 rRdx va_old_s `op_Division` 6 - 1 in va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2268 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Encrypt_save_and_shuffle_output offset_in out_b) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2271 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_UpdateScratch scratch_b) (fun (va_s:va_state) _ -> va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2273 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s - 6 >= 0 /\ va_get_reg64 rRdx va_old_s >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) (va_get_reg64 rRdx va_old_s - 6) (va_get_reg64 rRdx va_old_s)) (fun _ -> let data = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) (va_get_reg64 rRdx va_old_s - 6) (va_get_reg64 rRdx va_old_s) in let (va_arg122:Vale.Math.Poly2_s.poly) = Vale.Math.Poly2.Bits_s.of_quad32 (va_get_xmm 8 va_s) in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2274 column 23 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.Math.Poly2.lemma_add_zero va_arg122) (va_QBind va_range1 "***** PRECONDITION NOT MET AT line 2275 column 22 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_GhashUnroll6x hkeys_b scratch_b h_LE y_new' data) (fun (va_s:va_state) _ -> let (y_new'':Vale.Def.Types_s.quad32) = Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s) in va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2278 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s - 6 >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 6)) (fun _ -> let (va_arg121:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = data in let (va_arg120:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 6) in let (va_arg119:Vale.Def.Types_s.quad32) = h_LE in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2278 column 40 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GHash.lemma_ghash_incremental0_append va_arg119 y_orig y_new' y_new'' va_arg120 va_arg121) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2280 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRdx va_old_s - 6 >= 0 /\ (fun a_1906 (s_1907:(FStar.Seq.Base.seq a_1906)) (i_1908:Prims.nat) (j_1909:Prims.nat) -> let (j_1869:Prims.nat) = j_1909 in Prims.b2t (Prims.op_AmpAmp (Prims.op_LessThanOrEqual i_1908 j_1869) (Prims.op_LessThanOrEqual j_1869 (FStar.Seq.Base.length #a_1906 s_1907)))) Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 6)) (fun _ -> va_qAssert va_range1 "***** PRECONDITION NOT MET AT line 2280 column 9 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (FStar.Seq.Base.equal #Vale.X64.Decls.quad32 (FStar.Seq.Base.append #Vale.X64.Decls.quad32 (FStar.Seq.Base.slice #Vale.X64.Decls.quad32 (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b) 0 (va_get_reg64 rRdx va_old_s - 6)) data) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b)) (va_qAssertSquash va_range1 "***** EXPRESSION PRECONDITIONS NOT MET WITHIN line 2286 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (12 + mid_len - 6 >= 0 /\ 12 + mid_len - 6 <= 4294967295) (fun _ -> let (va_arg118:Vale.Def.Types_s.quad32) = ctr_BE in let (va_arg117:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg116:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (va_arg115:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = out_snapshot in let (va_arg114:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b in let (va_arg113:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b in let (va_arg112:Vale.Def.Types_s.nat32) = 12 + mid_len - 6 in let (va_arg111:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2286 column 44 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_opaque_ignores_postfix va_arg111 va_arg112 va_arg113 va_arg114 va_arg115 va_arg116 va_arg117 va_arg118) (let (va_arg110:Vale.Def.Types_s.quad32) = ctr_BE in let (va_arg109:(FStar.Seq.Base.seq Vale.Def.Types_s.nat32)) = key_words in let (va_arg108:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s) out_b in let (va_arg107:(FStar.Seq.Base.seq Vale.Def.Types_s.quad32)) = Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_old_s) in_b in let (va_arg106:Prims.nat) = 12 + mid_len - 6 in let (va_arg105:Vale.AES.AES_common_s.algorithm) = alg in va_qPURE va_range1 "***** PRECONDITION NOT MET AT line 2287 column 29 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (fun (_:unit) -> Vale.AES.GCTR.gctr_partial_extend6 va_arg105 va_arg106 va_arg107 va_arg108 va_arg109 va_arg110) (va_QSeq va_range1 "***** PRECONDITION NOT MET AT line 2289 column 14 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_quick_Sub64 (va_op_dst_opr64_reg64 rRcx) (va_const_opr64 128)) (va_QEmpty (()))))))))))))))))))))))))))))))))))))))))))))))))))))))))))) (fun (va_s:va_state) va_g -> va_QEmpty (()))))

{ "checked_file": "/", "dependencies": [ "Vale.X64.State.fsti.checked", "Vale.X64.QuickCodes.fsti.checked", "Vale.X64.QuickCode.fst.checked", "Vale.X64.Memory.fsti.checked", "Vale.X64.Machine_s.fst.checked", "Vale.X64.InsVector.fsti.checked", "Vale.X64.InsMem.fsti.checked", "Vale.X64.InsBasic.fsti.checked", "Vale.X64.InsAes.fsti.checked", "Vale.X64.Flags.fsti.checked", "Vale.X64.Decls.fsti.checked", "Vale.X64.CPU_Features_s.fst.checked", "Vale.Math.Poly2_s.fsti.checked", "Vale.Math.Poly2.Words.fsti.checked", "Vale.Math.Poly2.Lemmas.fsti.checked", "Vale.Math.Poly2.Bits_s.fsti.checked", "Vale.Math.Poly2.Bits.fsti.checked", "Vale.Math.Poly2.fsti.checked", "Vale.Def.Words_s.fsti.checked", "Vale.Def.Types_s.fst.checked", "Vale.Def.Prop_s.fst.checked", "Vale.Def.Opaque_s.fsti.checked", "Vale.Arch.TypesNative.fsti.checked", "Vale.Arch.Types.fsti.checked", "Vale.AES.X64.PolyOps.fsti.checked", "Vale.AES.X64.AESopt2.fsti.checked", "Vale.AES.X64.AESopt.fsti.checked", "Vale.AES.GHash.fsti.checked", "Vale.AES.GF128_s.fsti.checked", "Vale.AES.GF128.fsti.checked", "Vale.AES.GCTR_s.fst.checked", "Vale.AES.GCTR.fsti.checked", "Vale.AES.GCM_helpers.fsti.checked", "Vale.AES.AES_s.fst.checked", "Vale.AES.AES_helpers.fsti.checked", "Vale.AES.AES_common_s.fst.checked", "prims.fst.checked", "FStar.Seq.Base.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked" ], "interface_file": true, "source_file": "Vale.AES.X64.AESGCM.fst" }

[ { "abbrev": false, "full_module": "Vale.AES.X64.AESopt2", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.AESopt", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Lemmas", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.PolyOps", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.TypesNative", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Prop_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.AESopt2", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.AESopt", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GHash", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GF128_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Lemmas", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2.Bits_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2", "short_module": null }, { "abbrev": false, "full_module": "Vale.Math.Poly2_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64.PolyOps", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.CPU_Features_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.TypesNative", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCTR_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.GCM_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_helpers", "short_module": null }, { "abbrev": false, "full_module": "Vale.Arch.Types", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCodes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.QuickCode", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsAes", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsVector", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsMem", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.InsBasic", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Decls", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.State", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Memory", "short_module": null }, { "abbrev": false, "full_module": "Vale.X64.Machine_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.AES_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Types_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Words_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Opaque_s", "short_module": null }, { "abbrev": false, "full_module": "Vale.Def.Prop_s", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "Vale.AES.X64", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 0, "max_fuel": 1, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": true, "smtencoding_l_arith_repr": "native", "smtencoding_nl_arith_repr": "wrapped", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [ "smt.arith.nl=false", "smt.QI.EAGER_THRESHOLD=100", "smt.CASE_SPLIT=3" ], "z3refresh": true, "z3rlimit": 40000, "z3rlimit_factor": 1, "z3seed": 7, "z3smtopt": [], "z3version": "4.8.5" }

false

va_b0: Vale.X64.Decls.va_code -> va_s0: Vale.X64.Decls.va_state -> alg: Vale.AES.AES_common_s.algorithm -> h_LE: Vale.X64.Decls.quad32 -> iv_b: Vale.X64.Memory.buffer128 -> in_b: Vale.X64.Memory.buffer128 -> out_b: Vale.X64.Memory.buffer128 -> scratch_b: Vale.X64.Memory.buffer128 -> key_words: FStar.Seq.Base.seq Vale.X64.Memory.nat32 -> round_keys: FStar.Seq.Base.seq Vale.X64.Decls.quad32 -> keys_b: Vale.X64.Memory.buffer128 -> hkeys_b: Vale.X64.Memory.buffer128 -> Prims.Ghost (Vale.X64.Decls.va_state * Vale.X64.Decls.va_fuel)

Prims.Ghost

[]

[ "Vale.X64.Decls.va_code", "Vale.X64.Decls.va_state", "Vale.AES.AES_common_s.algorithm", "Vale.X64.Decls.quad32", "Vale.X64.Memory.buffer128", "FStar.Seq.Base.seq", "Vale.X64.Memory.nat32", "Vale.X64.QuickCodes.fuel", "Prims.unit", "FStar.Pervasives.Native.Mktuple2", "Vale.X64.Decls.va_fuel", "Vale.X64.QuickCode.va_lemma_norm_mods", "Prims.Cons", "Vale.X64.QuickCode.mod_t", "Vale.X64.QuickCode.va_Mod_flags", "Vale.X64.QuickCode.va_Mod_mem_heaplet", "Vale.X64.QuickCode.va_Mod_xmm", "Vale.X64.QuickCode.va_Mod_reg64", "Vale.X64.Machine_s.rR14", "Vale.X64.Machine_s.rR13", "Vale.X64.Machine_s.rR12", "Vale.X64.Machine_s.rR11", "Vale.X64.Machine_s.rRbx", "Vale.X64.Machine_s.rRcx", "Vale.X64.Machine_s.rRdx", "Vale.X64.Machine_s.rRsi", "Vale.X64.Machine_s.rRdi", "Vale.X64.Machine_s.rRax", "Vale.X64.QuickCode.va_Mod_ok", "Vale.X64.QuickCode.va_Mod_mem", "Prims.Nil", "FStar.Pervasives.assert_norm", "Prims.eq2", "Prims.list", "Vale.X64.QuickCode.__proj__QProc__item__mods", "Vale.AES.X64.AESGCM.va_code_AES_GCM_encrypt_6mult", "FStar.Pervasives.Native.tuple2", "FStar.Pervasives.Native.tuple3", "Vale.X64.State.vale_state", "Vale.X64.QuickCodes.va_wp_sound_code_norm", "Prims.l_and", "Vale.X64.QuickCodes.label", "Vale.X64.QuickCodes.va_range1", "Prims.b2t", "Vale.X64.Decls.va_get_ok", "Vale.X64.Decls.modifies_buffer128", "Vale.X64.Decls.va_get_mem_heaplet", "Vale.X64.Decls.modifies_buffer_specific128", "Vale.Def.Types_s.nat64", "Vale.X64.Decls.va_get_reg64", "Vale.AES.GCTR.gctr_partial", "Vale.X64.Decls.s128", "Vale.X64.Decls.va_get_xmm", "Vale.Def.Types_s.quad32", "Vale.Def.Types_s.reverse_bytes_quad32", "Vale.AES.GHash.ghash_incremental0", "Prims.op_LessThan", "Vale.X64.Machine_s.pow2_32", "Vale.X64.Decls.buffer128_read", "Vale.AES.GCTR.inc32lite", "Vale.X64.QuickCode.quickCode", "Vale.AES.X64.AESGCM.va_qcode_AES_GCM_encrypt_6mult" ]

[]

false

let va_lemma_AES_GCM_encrypt_6mult va_b0 va_s0 alg h_LE iv_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b =

let va_mods:va_mods_t = [ va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRcx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRax; va_Mod_ok; va_Mod_mem ] in let va_qc = va_qcode_AES_GCM_encrypt_6mult va_mods alg h_LE iv_b in_b out_b scratch_b key_words round_keys keys_b hkeys_b in let va_sM, va_fM, va_g = va_wp_sound_code_norm (va_code_AES_GCM_encrypt_6mult alg) va_qc va_s0 (fun va_s0 va_sM va_g -> let () = va_g in label va_range1 "***** POSTCONDITION NOT MET AT line 2086 column 1 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_ok va_sM) /\ (label va_range1 "***** POSTCONDITION NOT MET AT line 2159 column 53 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer128 out_b (va_get_mem_heaplet 6 va_s0) (va_get_mem_heaplet 6 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 2160 column 52 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer128 iv_b (va_get_mem_heaplet 2 va_s0) (va_get_mem_heaplet 2 va_sM)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 2161 column 72 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.X64.Decls.modifies_buffer_specific128 scratch_b (va_get_mem_heaplet 3 va_s0) (va_get_mem_heaplet 3 va_sM) 1 8) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 2163 column 24 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (va_get_reg64 rRcx va_sM == va_get_reg64 rRcx va_s0) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 2166 column 100 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.AES.GCTR.gctr_partial alg (va_get_reg64 rRdx va_s0) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_s0) in_b) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b) key_words (va_get_xmm 1 va_s0)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 2169 column 112 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_sM) == Vale.AES.GHash.ghash_incremental0 h_LE (Vale.Def.Types_s.reverse_bytes_quad32 (va_get_xmm 8 va_s0)) (Vale.X64.Decls.s128 (va_get_mem_heaplet 6 va_sM) out_b)) /\ label va_range1 "***** POSTCONDITION NOT MET AT line 2173 column 98 of file /home/gebner/fstar_dataset/projects/hacl-star/vale/code/thirdPartyPorts/OpenSSL/aes/Vale.AES.X64.AESGCM.vaf *****" (l_and (va_get_reg64 rRdx va_s0 < pow2_32) (Vale.X64.Decls.buffer128_read scratch_b 2 (va_get_mem_heaplet 3 va_sM) == Vale.Def.Types_s.reverse_bytes_quad32 (Vale.AES.GCTR.inc32lite (va_get_xmm 1 va_s0 ) (va_get_reg64 rRdx va_s0)))))) in assert_norm (va_qc.mods == va_mods); va_lemma_norm_mods ([ va_Mod_flags; va_Mod_mem_heaplet 3; va_Mod_mem_heaplet 2; va_Mod_mem_heaplet 6; va_Mod_xmm 15; va_Mod_xmm 14; va_Mod_xmm 13; va_Mod_xmm 12; va_Mod_xmm 11; va_Mod_xmm 10; va_Mod_xmm 9; va_Mod_xmm 8; va_Mod_xmm 7; va_Mod_xmm 6; va_Mod_xmm 5; va_Mod_xmm 4; va_Mod_xmm 3; va_Mod_xmm 2; va_Mod_xmm 1; va_Mod_xmm 0; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rRbx; va_Mod_reg64 rRcx; va_Mod_reg64 rRdx; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRax; va_Mod_ok; va_Mod_mem ]) va_sM va_s0; (va_sM, va_fM)

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.upd'

val upd' (#b: _) (h: HS.mem) (vb: buffer b {live h vb}) (i: nat{i < length vb}) (x: b) : GTot (h': HS.mem{sel h' vb i == x})

let upd' (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : GTot (h':HS.mem{sel h' vb i == x}) = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in let h' = Down.upd_seq h (as_down_buffer vb) s1 in Down.upd_seq_spec h (as_down_buffer vb) s1; assert (Down.as_seq h' (as_down_buffer vb) == s1); let n = View?.n v in assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n))); assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x); h'

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 6, "end_line": 93, "start_col": 0, "start_line": 77 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = () //#reset-options "--max_fuel 0 --max_ifuel 1" let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n) let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t){ let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : GTot b = let v = get_view vb in let _, es, _ = split_at_i vb i h in View?.get v es

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> vb: LowStar.BufferView.Up.buffer b {LowStar.BufferView.Up.live h vb} -> i: Prims.nat{i < LowStar.BufferView.Up.length vb} -> x: b -> Prims.GTot (h': FStar.Monotonic.HyperStack.mem{LowStar.BufferView.Up.sel h' vb i == x})

Prims.GTot

[ "sometrivial" ]

[]

[ "FStar.Monotonic.HyperStack.mem", "LowStar.BufferView.Up.buffer", "LowStar.BufferView.Up.live", "Prims.nat", "Prims.b2t", "Prims.op_LessThan", "LowStar.BufferView.Up.length", "FStar.Seq.Base.seq", "LowStar.BufferView.Up.buffer_src", "FStar.Seq.Properties.lseq", "LowStar.BufferView.Up.__proj__View__item__n", "LowStar.BufferView.Up.get_view", "Prims.unit", "Prims._assert", "FStar.Seq.Base.equal", "FStar.Seq.Base.slice", "FStar.Mul.op_Star", "Prims.op_Addition", "LowStar.BufferView.Up.__proj__View__item__put", "Prims.eq2", "LowStar.BufferView.Up.sel", "LowStar.BufferView.Up.__proj__View__item__get", "Prims.pos", "LowStar.BufferView.Down.as_seq", "LowStar.BufferView.Up.as_down_buffer", "LowStar.BufferView.Down.upd_seq_spec", "LowStar.BufferView.Down.upd_seq", "FStar.Seq.Base.append", "FStar.Pervasives.Native.tuple3", "LowStar.BufferView.Up.split_at_i", "LowStar.BufferView.Up.view" ]

[]

false

let upd' (#b: _) (h: HS.mem) (vb: buffer b {live h vb}) (i: nat{i < length vb}) (x: b) : GTot (h': HS.mem{sel h' vb i == x}) =

let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` ((View?.put v x) `Seq.append` suffix) in let h' = Down.upd_seq h (as_down_buffer vb) s1 in Down.upd_seq_spec h (as_down_buffer vb) s1; assert (Down.as_seq h' (as_down_buffer vb) == s1); let n = View?.n v in assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n))); assert ((Seq.slice s1 (i * n) (i * n + n)) `Seq.equal` (View?.put v x)); h'

false

FStar.Algebra.CommMonoid.Fold.fst

FStar.Algebra.CommMonoid.Fold.fold_equals_seq_foldm

val fold_equals_seq_foldm (#c:_) (#eq:_) (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr: (ifrom_ito a b) -> c) : Lemma (ensures fold cm a b expr `eq.eq` foldm_snoc cm (init (closed_interval_size a b) (init_func_from_expr expr a b)))

let rec fold_equals_seq_foldm #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr: (ifrom_ito a b) -> c) : Lemma (ensures fold cm a b expr `eq.eq` foldm_snoc cm (init (closed_interval_size a b) (init_func_from_expr expr a b))) (decreases b-a) = if (b=a) then let ts = init (closed_interval_size a b) (init_func_from_expr expr a b) in lemma_eq_elim (create 1 (expr b)) ts; foldm_snoc_singleton cm (expr b); eq.symmetry (foldm_snoc cm ts) (expr b); eq.reflexivity (expr b); eq.transitivity (fold cm a b expr) (expr b) (foldm_snoc cm ts) else let lhs = fold cm a b expr in let subexpr : ifrom_ito a (b-1) -> c = expr in let fullseq = init (b+1-a) (init_func_from_expr expr a b) in let rhs = foldm_snoc cm fullseq in let subseq = init (b-a) (init_func_from_expr subexpr a (b-1)) in let subsum = fold cm a (b-1) expr in let subfold = foldm_snoc cm subseq in let last = expr b in let op = cm.mult in fold_equals_seq_foldm cm a (b-1) subexpr; cm.commutativity last subfold; eq.reflexivity last; cm.congruence subsum last subfold last; foldm_snoc_decomposition cm fullseq; lemma_eq_elim subseq (fst (un_snoc fullseq)); eq.symmetry rhs (subfold `op` last); eq.transitivity lhs (subfold `op` last) rhs

{ "file_name": "ulib/FStar.Algebra.CommMonoid.Fold.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 47, "end_line": 93, "start_col": 0, "start_line": 61 }

(* Copyright 2008-2022 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. Author: A. Rozanov *) module FStar.Algebra.CommMonoid.Fold module CE = FStar.Algebra.CommMonoid.Equiv open FStar.Seq.Base open FStar.Seq.Properties open FStar.Seq.Permutation open FStar.IntegerIntervals (* Here we define the notion for big sums and big products for arbitrary commutative monoids. We construct the folds from an integer range and a function, then calculate the fold -- a sum or a product, depending on the monoid operation. *) (* We refine multiplication a bit to make proofs smoothier *) open FStar.Mul let rec fold #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr: (ifrom_ito a b) -> c) // some of the lemmas want (ensures (fun (x:c) -> ((nk = n0) ==> (x == expr nk)))) : Tot (c) (decreases b-a) = if b = a then expr b else (fold cm a (b-1) expr) `cm.mult` expr b let rec fold_equality #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr1 expr2: (ifrom_ito a b) -> c) : Lemma (requires (forall (i: ifrom_ito a b). expr1 i == expr2 i)) (ensures fold cm a b expr1 == fold cm a b expr2) (decreases b - a) = if b > a then fold_equality cm a (b - 1) expr1 expr2 let fold_singleton_lemma #c #eq cm a expr : Lemma (fold #c #eq cm a a expr == expr a) = () let fold_snoc_decomposition #c #eq (cm: CE.cm c eq) a b expr : Lemma (fold cm a b expr == fold cm a (b-1) expr `cm.mult` (expr b)) = ()

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Seq.Properties.fsti.checked", "FStar.Seq.Permutation.fsti.checked", "FStar.Seq.Base.fsti.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.IntegerIntervals.fst.checked", "FStar.Algebra.CommMonoid.Equiv.fst.checked" ], "interface_file": true, "source_file": "FStar.Algebra.CommMonoid.Fold.fst" }

[ { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.IntegerIntervals", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Permutation", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Properties", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": true, "full_module": "FStar.Algebra.CommMonoid.Equiv", "short_module": "CE" }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "FStar.IntegerIntervals", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Permutation", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Properties", "short_module": null }, { "abbrev": false, "full_module": "FStar.Seq.Base", "short_module": null }, { "abbrev": true, "full_module": "FStar.Algebra.CommMonoid.Equiv", "short_module": "CE" }, { "abbrev": false, "full_module": "FStar.Algebra.CommMonoid", "short_module": null }, { "abbrev": false, "full_module": "FStar.Algebra.CommMonoid", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

cm: FStar.Algebra.CommMonoid.Equiv.cm c eq -> a: Prims.int -> b: FStar.IntegerIntervals.not_less_than a -> expr: (_: FStar.IntegerIntervals.ifrom_ito a b -> c) -> FStar.Pervasives.Lemma (ensures EQ?.eq eq (FStar.Algebra.CommMonoid.Fold.fold cm a b expr) (FStar.Seq.Permutation.foldm_snoc cm (FStar.Seq.Base.init (FStar.IntegerIntervals.closed_interval_size a b) (FStar.Seq.Permutation.init_func_from_expr expr a b)))) (decreases b - a)

FStar.Pervasives.Lemma

[ "", "lemma" ]

[]

[ "FStar.Algebra.CommMonoid.Equiv.equiv", "FStar.Algebra.CommMonoid.Equiv.cm", "Prims.int", "FStar.IntegerIntervals.not_less_than", "FStar.IntegerIntervals.ifrom_ito", "Prims.op_Equality", "FStar.Algebra.CommMonoid.Equiv.__proj__EQ__item__transitivity", "FStar.Algebra.CommMonoid.Fold.fold", "FStar.Seq.Permutation.foldm_snoc", "Prims.unit", "FStar.Algebra.CommMonoid.Equiv.__proj__EQ__item__reflexivity", "FStar.Algebra.CommMonoid.Equiv.__proj__EQ__item__symmetry", "FStar.Seq.Permutation.foldm_snoc_singleton", "FStar.Seq.Base.lemma_eq_elim", "FStar.Seq.Base.create", "FStar.Seq.Base.seq", "FStar.Seq.Base.init", "FStar.IntegerIntervals.closed_interval_size", "FStar.Seq.Permutation.init_func_from_expr", "Prims.bool", "FStar.Pervasives.Native.fst", "FStar.Seq.Properties.un_snoc", "FStar.Seq.Permutation.foldm_snoc_decomposition", "FStar.Algebra.CommMonoid.Equiv.__proj__CM__item__congruence", "FStar.Algebra.CommMonoid.Equiv.__proj__CM__item__commutativity", "FStar.Algebra.CommMonoid.Fold.fold_equals_seq_foldm", "Prims.op_Subtraction", "FStar.Algebra.CommMonoid.Equiv.__proj__CM__item__mult", "Prims.op_Addition", "Prims.l_True", "Prims.squash", "FStar.Algebra.CommMonoid.Equiv.__proj__EQ__item__eq", "Prims.Nil", "FStar.Pervasives.pattern" ]

[ "recursion" ]

false

true

false

let rec fold_equals_seq_foldm #c #eq (cm: CE.cm c eq) (a: int) (b: not_less_than a) (expr: ((ifrom_ito a b) -> c)) : Lemma (ensures (fold cm a b expr) `eq.eq` (foldm_snoc cm (init (closed_interval_size a b) (init_func_from_expr expr a b)))) (decreases b - a) =

if (b = a) then let ts = init (closed_interval_size a b) (init_func_from_expr expr a b) in lemma_eq_elim (create 1 (expr b)) ts; foldm_snoc_singleton cm (expr b); eq.symmetry (foldm_snoc cm ts) (expr b); eq.reflexivity (expr b); eq.transitivity (fold cm a b expr) (expr b) (foldm_snoc cm ts) else let lhs = fold cm a b expr in let subexpr: ifrom_ito a (b - 1) -> c = expr in let fullseq = init (b + 1 - a) (init_func_from_expr expr a b) in let rhs = foldm_snoc cm fullseq in let subseq = init (b - a) (init_func_from_expr subexpr a (b - 1)) in let subsum = fold cm a (b - 1) expr in let subfold = foldm_snoc cm subseq in let last = expr b in let op = cm.mult in fold_equals_seq_foldm cm a (b - 1) subexpr; cm.commutativity last subfold; eq.reflexivity last; cm.congruence subsum last subfold last; foldm_snoc_decomposition cm fullseq; lemma_eq_elim subseq (fst (un_snoc fullseq)); eq.symmetry rhs (subfold `op` last); eq.transitivity lhs (subfold `op` last) rhs

false

Hacl.Spec.K256.Field52.Lemmas1.fst

Hacl.Spec.K256.Field52.Lemmas1.load_felem5_lemma_fits

val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 = v s3 / pow2 16)) (ensures felem_fits5 f (1,1,1,1,1))

let load_felem5_lemma_fits s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in assert (v f0 < pow2 52); Math.Lemmas.lemma_div_lt (v s0) 64 52; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12; assert (v f1 < pow2 52); Math.Lemmas.lemma_div_lt (v s1) 64 40; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24; assert (v f2 < pow2 52); Math.Lemmas.lemma_div_lt (v s2) 64 28; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36; assert (v f3 < pow2 52); assert (v f4 = v s3 / pow2 16); Math.Lemmas.lemma_div_lt (v s3) 64 16; assert (v f4 < pow2 48)

{ "file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 25, "end_line": 74, "start_col": 0, "start_line": 55 }

module Hacl.Spec.K256.Field52.Lemmas1 open FStar.Mul open Lib.IntTypes module S = Spec.K256 include Hacl.Spec.K256.Field52.Definitions include Hacl.Spec.K256.Field52 module ML = Hacl.Spec.K256.MathLemmas #set-options "--z3rlimit 100 --fuel 0 --ifuel 0" /// Load and store functions val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 == v s3 / pow2 16)) (ensures as_nat5 f == as_nat4 s) let load_felem5_lemma_as_nat s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in Math.Lemmas.euclidean_division_definition (v s0) (pow2 52); assert_norm (pow2 12 * pow2 52 = pow2 64); assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64); Math.Lemmas.euclidean_division_definition (v s1) (pow2 40); assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128); assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128); Math.Lemmas.euclidean_division_definition (v s2) (pow2 25); assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192); assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192); Math.Lemmas.euclidean_division_definition (v s3) (pow2 16); assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192) val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 = v s3 / pow2 16)) (ensures felem_fits5 f (1,1,1,1,1))

{ "checked_file": "/", "dependencies": [ "Spec.K256.fst.checked", "prims.fst.checked", "Lib.IntTypes.fsti.checked", "Hacl.Spec.K256.MathLemmas.fst.checked", "Hacl.Spec.K256.Field52.Definitions.fst.checked", "Hacl.Spec.K256.Field52.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.Calc.fsti.checked" ], "interface_file": false, "source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.K256.MathLemmas", "short_module": "ML" }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52.Definitions", "short_module": null }, { "abbrev": true, "full_module": "Spec.K256", "short_module": "S" }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

s: Hacl.Spec.K256.Field52.Definitions.felem4 -> f: Hacl.Spec.K256.Field52.Definitions.felem5 -> FStar.Pervasives.Lemma (requires (let _ = s in (let FStar.Pervasives.Native.Mktuple4 #_ #_ #_ #_ s0 s1 s2 s3 = _ in let _ = f in (let FStar.Pervasives.Native.Mktuple5 #_ #_ #_ #_ #_ f0 f1 f2 f3 f4 = _ in Lib.IntTypes.v f0 == Lib.IntTypes.v s0 % Prims.pow2 52 /\ Lib.IntTypes.v f1 == Lib.IntTypes.v s0 / Prims.pow2 52 + (Lib.IntTypes.v s1 % Prims.pow2 40) * Prims.pow2 12 /\ Lib.IntTypes.v f2 = Lib.IntTypes.v s1 / Prims.pow2 40 + (Lib.IntTypes.v s2 % Prims.pow2 28) * Prims.pow2 24 /\ Lib.IntTypes.v f3 = Lib.IntTypes.v s2 / Prims.pow2 28 + (Lib.IntTypes.v s3 % Prims.pow2 16) * Prims.pow2 36 /\ Lib.IntTypes.v f4 = Lib.IntTypes.v s3 / Prims.pow2 16) <: Type0) <: Type0)) (ensures Hacl.Spec.K256.Field52.Definitions.felem_fits5 f (1, 1, 1, 1, 1))

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Hacl.Spec.K256.Field52.Definitions.felem4", "Hacl.Spec.K256.Field52.Definitions.felem5", "Lib.IntTypes.uint64", "Prims._assert", "Prims.b2t", "Prims.op_LessThan", "Lib.IntTypes.v", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Prims.pow2", "Prims.unit", "FStar.Math.Lemmas.lemma_div_lt", "Prims.op_Equality", "Prims.int", "Prims.op_Division", "Hacl.Spec.K256.MathLemmas.lemma_a_div_b_plus_c_mod_d_mul_e" ]

[]

false

true

false

let load_felem5_lemma_fits s f =

let s0, s1, s2, s3 = s in let f0, f1, f2, f3, f4 = f in assert (v f0 < pow2 52); Math.Lemmas.lemma_div_lt (v s0) 64 52; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12; assert (v f1 < pow2 52); Math.Lemmas.lemma_div_lt (v s1) 64 40; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24; assert (v f2 < pow2 52); Math.Lemmas.lemma_div_lt (v s2) 64 28; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36; assert (v f3 < pow2 52); assert (v f4 = v s3 / pow2 16); Math.Lemmas.lemma_div_lt (v s3) 64 16; assert (v f4 < pow2 48)

false

Hacl.Spec.K256.Field52.Lemmas1.fst

Hacl.Spec.K256.Field52.Lemmas1.store_felem5_lemma

val store_felem5_lemma: f:felem5 -> Lemma (requires felem_fits5 f (1,1,1,1,1)) (ensures as_nat4 (store_felem5 f) == as_nat5 f)

let store_felem5_lemma f = let (f0,f1,f2,f3,f4) = f in let o0 = f0 |. (f1 <<. 52ul) in //assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52; //assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52); Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52); logor_disjoint f0 (f1 <<. 52ul) 52; assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52); let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in //assert (v (f1 >>. 12ul) == v f1 / pow2 12); Math.Lemmas.lemma_div_lt (v f1) 52 12; //assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40; assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40); Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40); logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40; assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40); let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in Math.Lemmas.lemma_div_lt (v f2) 52 24; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28; //assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28); Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28); logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28; assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28); let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in Math.Lemmas.lemma_div_lt (v f3) 52 36; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16; //assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16); Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16); logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16; assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16); store_felem5_lemma_as_nat f (o0,o1,o2,o3)

{ "file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 43, "end_line": 210, "start_col": 0, "start_line": 175 }

module Hacl.Spec.K256.Field52.Lemmas1 open FStar.Mul open Lib.IntTypes module S = Spec.K256 include Hacl.Spec.K256.Field52.Definitions include Hacl.Spec.K256.Field52 module ML = Hacl.Spec.K256.MathLemmas #set-options "--z3rlimit 100 --fuel 0 --ifuel 0" /// Load and store functions val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 == v s3 / pow2 16)) (ensures as_nat5 f == as_nat4 s) let load_felem5_lemma_as_nat s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in Math.Lemmas.euclidean_division_definition (v s0) (pow2 52); assert_norm (pow2 12 * pow2 52 = pow2 64); assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64); Math.Lemmas.euclidean_division_definition (v s1) (pow2 40); assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128); assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128); Math.Lemmas.euclidean_division_definition (v s2) (pow2 25); assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192); assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192); Math.Lemmas.euclidean_division_definition (v s3) (pow2 16); assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192) val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 = v s3 / pow2 16)) (ensures felem_fits5 f (1,1,1,1,1)) let load_felem5_lemma_fits s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in assert (v f0 < pow2 52); Math.Lemmas.lemma_div_lt (v s0) 64 52; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12; assert (v f1 < pow2 52); Math.Lemmas.lemma_div_lt (v s1) 64 40; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24; assert (v f2 < pow2 52); Math.Lemmas.lemma_div_lt (v s2) 64 28; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36; assert (v f3 < pow2 52); assert (v f4 = v s3 / pow2 16); Math.Lemmas.lemma_div_lt (v s3) 64 16; assert (v f4 < pow2 48) val load_felem5_lemma: s:felem4 -> Lemma (let f = load_felem5 s in felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s) let load_felem5_lemma s = assert_norm (v mask52 = pow2 52 - 1); assert_norm (0xffffffffff = pow2 40 - 1); assert_norm (0xfffffff = pow2 28 - 1); assert_norm (0xffff = pow2 16 - 1); let (s0,s1,s2,s3) = s in let f0 = s0 &. mask52 in // s0 % pow2 52 mod_mask_lemma s0 52ul; assert (v (mod_mask #U64 #SEC 52ul) == v mask52); assert (v f0 = v s0 % pow2 52); let f11 = s0 >>. 52ul in let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12 Math.Lemmas.lemma_div_lt (v s0) 64 52; //assert (v f11 < pow2 12); mod_mask_lemma s1 40ul; assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64; //assert (v f12 == v s1 % pow2 40 * pow2 12); Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12); logor_disjoint f11 f12 12; assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12); let f21 = s1 >>. 40ul in let f22 = (s2 &. u64 0xfffffff) <<. 24ul in let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24 Math.Lemmas.lemma_div_lt (v s1) 64 40; //assert (v f21 < pow2 24); mod_mask_lemma s2 28ul; assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64; //assert (v f22 == v s2 % pow2 28 * pow2 24); Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24); logor_disjoint f21 f22 24; assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24); let f31 = s2 >>. 28ul in let f32 = (s3 &. u64 0xffff) <<. 36ul in let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36 Math.Lemmas.lemma_div_lt (v s2) 64 28; //assert (v f31 < pow2 36); mod_mask_lemma s3 16ul; assert (v (mod_mask #U64 #SEC 16ul) == 0xffff); ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64; //assert (v f32 == v s3 % pow2 16 * pow2 36); Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36); logor_disjoint f31 f32 36; assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36); let f4 = s3 >>. 16ul in // s3 / pow2 16 assert (v f4 = v s3 / pow2 16); let f = (f0,f1,f2,f3,f4) in load_felem5_lemma_as_nat s f; load_felem5_lemma_fits s f val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma (requires (let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in felem_fits5 f (1,1,1,1,1) /\ v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\ v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\ v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\ v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16)) (ensures as_nat4 s == as_nat5 f) let store_felem5_lemma_as_nat f s = let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192); calc (==) { v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { } v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 } v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208; (==) { Math.Lemmas.small_mod (v f4) (pow2 48) } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208; } val store_felem5_lemma: f:felem5 -> Lemma (requires felem_fits5 f (1,1,1,1,1)) (ensures as_nat4 (store_felem5 f) == as_nat5 f)

{ "checked_file": "/", "dependencies": [ "Spec.K256.fst.checked", "prims.fst.checked", "Lib.IntTypes.fsti.checked", "Hacl.Spec.K256.MathLemmas.fst.checked", "Hacl.Spec.K256.Field52.Definitions.fst.checked", "Hacl.Spec.K256.Field52.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.Calc.fsti.checked" ], "interface_file": false, "source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.K256.MathLemmas", "short_module": "ML" }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52.Definitions", "short_module": null }, { "abbrev": true, "full_module": "Spec.K256", "short_module": "S" }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

f: Hacl.Spec.K256.Field52.Definitions.felem5 -> FStar.Pervasives.Lemma (requires Hacl.Spec.K256.Field52.Definitions.felem_fits5 f (1, 1, 1, 1, 1)) (ensures Hacl.Spec.K256.Field52.Definitions.as_nat4 (Hacl.Spec.K256.Field52.store_felem5 f) == Hacl.Spec.K256.Field52.Definitions.as_nat5 f)

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Hacl.Spec.K256.Field52.Definitions.felem5", "Lib.IntTypes.uint64", "Hacl.Spec.K256.Field52.Lemmas1.store_felem5_lemma_as_nat", "FStar.Pervasives.Native.Mktuple4", "Prims.unit", "Prims._assert", "Prims.eq2", "Prims.int", "Lib.IntTypes.v", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Prims.op_Addition", "Prims.op_Division", "Prims.pow2", "FStar.Mul.op_Star", "Prims.op_Modulus", "Lib.IntTypes.logor_disjoint", "Lib.IntTypes.op_Greater_Greater_Dot", "FStar.UInt32.__uint_to_t", "Lib.IntTypes.op_Less_Less_Dot", "FStar.Math.Lemmas.cancel_mul_mod", "FStar.Math.Lemmas.pow2_multiplication_modulo_lemma_2", "FStar.Math.Lemmas.lemma_div_lt", "Lib.IntTypes.int_t", "Lib.IntTypes.op_Bar_Dot" ]

[]

false

true

false

let store_felem5_lemma f =

let f0, f1, f2, f3, f4 = f in let o0 = f0 |. (f1 <<. 52ul) in Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52; Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52); logor_disjoint f0 (f1 <<. 52ul) 52; assert (v o0 == v f0 + (v f1 % pow2 12) * pow2 52); let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in Math.Lemmas.lemma_div_lt (v f1) 52 12; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40; assert (v (f2 <<. 40ul) == (v f2 % pow2 24) * pow2 40); Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40); logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40; assert (v o1 == v f1 / pow2 12 + (v f2 % pow2 24) * pow2 40); let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in Math.Lemmas.lemma_div_lt (v f2) 52 24; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28; Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28); logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28; assert (v o2 == v f2 / pow2 24 + (v f3 % pow2 36) * pow2 28); let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in Math.Lemmas.lemma_div_lt (v f3) 52 36; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16; Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16); logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16; assert (v o3 == v f3 / pow2 36 + (v f4 % pow2 48) * pow2 16); store_felem5_lemma_as_nat f (o0, o1, o2, o3)

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.upd_modifies

val upd_modifies (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : Lemma (ensures (modifies vb h (upd h vb i x) /\ live (upd h vb i x) vb)) [SMTPat (upd h vb i x)]

let upd_modifies #b h vb i x = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in Down.upd_seq_spec h (as_down_buffer vb) s1

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 46, "end_line": 169, "start_col": 0, "start_line": 164 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = () //#reset-options "--max_fuel 0 --max_ifuel 1" let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n) let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t){ let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : GTot b = let v = get_view vb in let _, es, _ = split_at_i vb i h in View?.get v es let upd' (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : GTot (h':HS.mem{sel h' vb i == x}) = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in let h' = Down.upd_seq h (as_down_buffer vb) s1 in Down.upd_seq_spec h (as_down_buffer vb) s1; assert (Down.as_seq h' (as_down_buffer vb) == s1); let n = View?.n v in assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n))); assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x); h' let upd #b h vb i x : GTot HS.mem = upd' #b h vb i x let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb i == x) = () let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat) : Lemma (FStar.Mul.(min * n + n <= max * n)) = let open FStar.Mul in assert ((min * n) + n = (min + 1) * n); assert ((min * n) + n <= max * n) #set-options "--z3rlimit 20" let sel_upd2 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (j:nat{j < length vb /\ i<>j}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb j == sel h vb j) = let open FStar.Mul in let v = get_view vb in view_indexing vb i; view_indexing vb j; let h' = upd h vb i x in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = Down.as_seq h' (as_down_buffer vb) in let min = if i < j then i else j in let max = if i < j then j else i in let n = View?.n v in lt_leq_mul min max n; let min0, max0 = Seq.slice s0 (min * n) ((min * n) + n), Seq.slice s0 (max * n) ((max * n) + n) in let _, s_j, _ = split_at_i vb j h in let min1, max1 = Seq.slice s1 (min * n) ((min * n) + n), Seq.slice s1 (max * n) ((max * n) + n) in let _, s_j', _ = split_at_i vb j h' in let prefix, s_i, suffix = split_at_i vb i h in Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix)); if i < j then begin assert (Seq.equal max0 s_j); assert (Seq.equal max1 s_j'); assert (Seq.equal s_j s_j') end else begin assert (Seq.equal min0 s_j); assert (Seq.equal min1 s_j'); assert (Seq.equal s_j s_j') end let sel_upd #b vb i j x h = if i=j then sel_upd1 vb i x h else sel_upd2 vb i j x h let lemma_upd_with_sel #b vb i h = let v = get_view vb in let prefix, es, suffix = split_at_i vb i h in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = prefix `Seq.append` (View?.put v (View?.get v es) `Seq.append` suffix) in assert (Seq.equal s0 s1); Down.upd_seq_spec h (as_down_buffer vb) s0

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> vb: LowStar.BufferView.Up.buffer b {LowStar.BufferView.Up.live h vb} -> i: Prims.nat{i < LowStar.BufferView.Up.length vb} -> x: b -> FStar.Pervasives.Lemma (ensures LowStar.BufferView.Up.modifies vb h (LowStar.BufferView.Up.upd h vb i x) /\ LowStar.BufferView.Up.live (LowStar.BufferView.Up.upd h vb i x) vb) [SMTPat (LowStar.BufferView.Up.upd h vb i x)]

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "FStar.Monotonic.HyperStack.mem", "LowStar.BufferView.Up.buffer", "LowStar.BufferView.Up.live", "Prims.nat", "Prims.b2t", "Prims.op_LessThan", "LowStar.BufferView.Up.length", "FStar.Seq.Base.seq", "LowStar.BufferView.Up.buffer_src", "FStar.Seq.Properties.lseq", "LowStar.BufferView.Up.__proj__View__item__n", "LowStar.BufferView.Up.get_view", "LowStar.BufferView.Down.upd_seq_spec", "LowStar.BufferView.Up.as_down_buffer", "FStar.Seq.Base.append", "LowStar.BufferView.Up.__proj__View__item__put", "Prims.unit", "FStar.Pervasives.Native.tuple3", "Prims.eq2", "LowStar.BufferView.Down.as_seq", "LowStar.BufferView.Up.split_at_i", "LowStar.BufferView.Up.view" ]

[]

false

true

false

let upd_modifies #b h vb i x =

let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` ((View?.put v x) `Seq.append` suffix) in Down.upd_seq_spec h (as_down_buffer vb) s1

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.as_seq'

val as_seq' (#b: _) (h: HS.mem) (vb: buffer b) (i: nat{i <= length vb}) : GTot (Seq.lseq b (length vb - i)) (decreases (length vb - i))

let rec as_seq' (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i <= length vb}) : GTot (Seq.lseq b (length vb - i)) (decreases (length vb - i)) = let v = get_view vb in if i = length vb then Seq.empty else let _ = view_indexing vb i in let _, s_i, suffix = split_at_i vb i h in View?.get v s_i `Seq.cons` as_seq' h vb (i + 1)

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 56, "end_line": 187, "start_col": 0, "start_line": 179 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = () //#reset-options "--max_fuel 0 --max_ifuel 1" let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n) let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t){ let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : GTot b = let v = get_view vb in let _, es, _ = split_at_i vb i h in View?.get v es let upd' (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : GTot (h':HS.mem{sel h' vb i == x}) = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in let h' = Down.upd_seq h (as_down_buffer vb) s1 in Down.upd_seq_spec h (as_down_buffer vb) s1; assert (Down.as_seq h' (as_down_buffer vb) == s1); let n = View?.n v in assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n))); assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x); h' let upd #b h vb i x : GTot HS.mem = upd' #b h vb i x let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb i == x) = () let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat) : Lemma (FStar.Mul.(min * n + n <= max * n)) = let open FStar.Mul in assert ((min * n) + n = (min + 1) * n); assert ((min * n) + n <= max * n) #set-options "--z3rlimit 20" let sel_upd2 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (j:nat{j < length vb /\ i<>j}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb j == sel h vb j) = let open FStar.Mul in let v = get_view vb in view_indexing vb i; view_indexing vb j; let h' = upd h vb i x in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = Down.as_seq h' (as_down_buffer vb) in let min = if i < j then i else j in let max = if i < j then j else i in let n = View?.n v in lt_leq_mul min max n; let min0, max0 = Seq.slice s0 (min * n) ((min * n) + n), Seq.slice s0 (max * n) ((max * n) + n) in let _, s_j, _ = split_at_i vb j h in let min1, max1 = Seq.slice s1 (min * n) ((min * n) + n), Seq.slice s1 (max * n) ((max * n) + n) in let _, s_j', _ = split_at_i vb j h' in let prefix, s_i, suffix = split_at_i vb i h in Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix)); if i < j then begin assert (Seq.equal max0 s_j); assert (Seq.equal max1 s_j'); assert (Seq.equal s_j s_j') end else begin assert (Seq.equal min0 s_j); assert (Seq.equal min1 s_j'); assert (Seq.equal s_j s_j') end let sel_upd #b vb i j x h = if i=j then sel_upd1 vb i x h else sel_upd2 vb i j x h let lemma_upd_with_sel #b vb i h = let v = get_view vb in let prefix, es, suffix = split_at_i vb i h in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = prefix `Seq.append` (View?.put v (View?.get v es) `Seq.append` suffix) in assert (Seq.equal s0 s1); Down.upd_seq_spec h (as_down_buffer vb) s0 let upd_modifies #b h vb i x = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in Down.upd_seq_spec h (as_down_buffer vb) s1 let upd_equal_domains #b h vb i x = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in upd_modifies h vb i x; Down.upd_seq_spec h (as_down_buffer vb) s1

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> vb: LowStar.BufferView.Up.buffer b -> i: Prims.nat{i <= LowStar.BufferView.Up.length vb} -> Prims.GTot (FStar.Seq.Properties.lseq b (LowStar.BufferView.Up.length vb - i))

Prims.GTot

[ "sometrivial", "" ]

[]

[ "FStar.Monotonic.HyperStack.mem", "LowStar.BufferView.Up.buffer", "Prims.nat", "Prims.b2t", "Prims.op_LessThanOrEqual", "LowStar.BufferView.Up.length", "Prims.op_Equality", "FStar.Seq.Base.empty", "Prims.bool", "FStar.Seq.Base.seq", "LowStar.BufferView.Up.buffer_src", "FStar.Seq.Properties.lseq", "LowStar.BufferView.Up.__proj__View__item__n", "LowStar.BufferView.Up.get_view", "FStar.Seq.Base.cons", "LowStar.BufferView.Up.__proj__View__item__get", "LowStar.BufferView.Up.as_seq'", "Prims.op_Addition", "Prims.op_Subtraction", "FStar.Pervasives.Native.tuple3", "Prims.eq2", "LowStar.BufferView.Down.as_seq", "LowStar.BufferView.Up.as_down_buffer", "FStar.Seq.Base.append", "LowStar.BufferView.Up.split_at_i", "Prims.unit", "LowStar.BufferView.Up.view_indexing", "LowStar.BufferView.Up.view" ]

[ "recursion" ]

false

let rec as_seq' (#b: _) (h: HS.mem) (vb: buffer b) (i: nat{i <= length vb}) : GTot (Seq.lseq b (length vb - i)) (decreases (length vb - i)) =

let v = get_view vb in if i = length vb then Seq.empty else let _ = view_indexing vb i in let _, s_i, suffix = split_at_i vb i h in (View?.get v s_i) `Seq.cons` (as_seq' h vb (i + 1))

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.as_seq

val as_seq (#b: _) (h:HS.mem) (vb:buffer b) : GTot (Seq.lseq b (length vb))

let as_seq (#b: _) (h:HS.mem) (vb:buffer b) = as_seq' h vb 0

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 60, "end_line": 189, "start_col": 0, "start_line": 189 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = () //#reset-options "--max_fuel 0 --max_ifuel 1" let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n) let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t){ let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : GTot b = let v = get_view vb in let _, es, _ = split_at_i vb i h in View?.get v es let upd' (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : GTot (h':HS.mem{sel h' vb i == x}) = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in let h' = Down.upd_seq h (as_down_buffer vb) s1 in Down.upd_seq_spec h (as_down_buffer vb) s1; assert (Down.as_seq h' (as_down_buffer vb) == s1); let n = View?.n v in assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n))); assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x); h' let upd #b h vb i x : GTot HS.mem = upd' #b h vb i x let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb i == x) = () let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat) : Lemma (FStar.Mul.(min * n + n <= max * n)) = let open FStar.Mul in assert ((min * n) + n = (min + 1) * n); assert ((min * n) + n <= max * n) #set-options "--z3rlimit 20" let sel_upd2 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (j:nat{j < length vb /\ i<>j}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb j == sel h vb j) = let open FStar.Mul in let v = get_view vb in view_indexing vb i; view_indexing vb j; let h' = upd h vb i x in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = Down.as_seq h' (as_down_buffer vb) in let min = if i < j then i else j in let max = if i < j then j else i in let n = View?.n v in lt_leq_mul min max n; let min0, max0 = Seq.slice s0 (min * n) ((min * n) + n), Seq.slice s0 (max * n) ((max * n) + n) in let _, s_j, _ = split_at_i vb j h in let min1, max1 = Seq.slice s1 (min * n) ((min * n) + n), Seq.slice s1 (max * n) ((max * n) + n) in let _, s_j', _ = split_at_i vb j h' in let prefix, s_i, suffix = split_at_i vb i h in Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix)); if i < j then begin assert (Seq.equal max0 s_j); assert (Seq.equal max1 s_j'); assert (Seq.equal s_j s_j') end else begin assert (Seq.equal min0 s_j); assert (Seq.equal min1 s_j'); assert (Seq.equal s_j s_j') end let sel_upd #b vb i j x h = if i=j then sel_upd1 vb i x h else sel_upd2 vb i j x h let lemma_upd_with_sel #b vb i h = let v = get_view vb in let prefix, es, suffix = split_at_i vb i h in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = prefix `Seq.append` (View?.put v (View?.get v es) `Seq.append` suffix) in assert (Seq.equal s0 s1); Down.upd_seq_spec h (as_down_buffer vb) s0 let upd_modifies #b h vb i x = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in Down.upd_seq_spec h (as_down_buffer vb) s1 let upd_equal_domains #b h vb i x = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in upd_modifies h vb i x; Down.upd_seq_spec h (as_down_buffer vb) s1 let rec as_seq' (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i <= length vb}) : GTot (Seq.lseq b (length vb - i)) (decreases (length vb - i)) = let v = get_view vb in if i = length vb then Seq.empty else let _ = view_indexing vb i in let _, s_i, suffix = split_at_i vb i h in View?.get v s_i `Seq.cons` as_seq' h vb (i + 1)

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> vb: LowStar.BufferView.Up.buffer b -> Prims.GTot (FStar.Seq.Properties.lseq b (LowStar.BufferView.Up.length vb))

Prims.GTot

[ "sometrivial" ]

[]

[ "FStar.Monotonic.HyperStack.mem", "LowStar.BufferView.Up.buffer", "LowStar.BufferView.Up.as_seq'", "FStar.Seq.Properties.lseq", "LowStar.BufferView.Up.length" ]

[]

false

let as_seq (#b: _) (h: HS.mem) (vb: buffer b) =

as_seq' h vb 0

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.upd_equal_domains

val upd_equal_domains (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : Lemma (FStar.HyperStack.ST.equal_domains h (upd h vb i x))

let upd_equal_domains #b h vb i x = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in upd_modifies h vb i x; Down.upd_seq_spec h (as_down_buffer vb) s1

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 46, "end_line": 177, "start_col": 0, "start_line": 171 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = () //#reset-options "--max_fuel 0 --max_ifuel 1" let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n) let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t){ let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : GTot b = let v = get_view vb in let _, es, _ = split_at_i vb i h in View?.get v es let upd' (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : GTot (h':HS.mem{sel h' vb i == x}) = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in let h' = Down.upd_seq h (as_down_buffer vb) s1 in Down.upd_seq_spec h (as_down_buffer vb) s1; assert (Down.as_seq h' (as_down_buffer vb) == s1); let n = View?.n v in assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n))); assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x); h' let upd #b h vb i x : GTot HS.mem = upd' #b h vb i x let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb i == x) = () let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat) : Lemma (FStar.Mul.(min * n + n <= max * n)) = let open FStar.Mul in assert ((min * n) + n = (min + 1) * n); assert ((min * n) + n <= max * n) #set-options "--z3rlimit 20" let sel_upd2 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (j:nat{j < length vb /\ i<>j}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb j == sel h vb j) = let open FStar.Mul in let v = get_view vb in view_indexing vb i; view_indexing vb j; let h' = upd h vb i x in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = Down.as_seq h' (as_down_buffer vb) in let min = if i < j then i else j in let max = if i < j then j else i in let n = View?.n v in lt_leq_mul min max n; let min0, max0 = Seq.slice s0 (min * n) ((min * n) + n), Seq.slice s0 (max * n) ((max * n) + n) in let _, s_j, _ = split_at_i vb j h in let min1, max1 = Seq.slice s1 (min * n) ((min * n) + n), Seq.slice s1 (max * n) ((max * n) + n) in let _, s_j', _ = split_at_i vb j h' in let prefix, s_i, suffix = split_at_i vb i h in Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix)); if i < j then begin assert (Seq.equal max0 s_j); assert (Seq.equal max1 s_j'); assert (Seq.equal s_j s_j') end else begin assert (Seq.equal min0 s_j); assert (Seq.equal min1 s_j'); assert (Seq.equal s_j s_j') end let sel_upd #b vb i j x h = if i=j then sel_upd1 vb i x h else sel_upd2 vb i j x h let lemma_upd_with_sel #b vb i h = let v = get_view vb in let prefix, es, suffix = split_at_i vb i h in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = prefix `Seq.append` (View?.put v (View?.get v es) `Seq.append` suffix) in assert (Seq.equal s0 s1); Down.upd_seq_spec h (as_down_buffer vb) s0 let upd_modifies #b h vb i x = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in Down.upd_seq_spec h (as_down_buffer vb) s1

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> vb: LowStar.BufferView.Up.buffer b {LowStar.BufferView.Up.live h vb} -> i: Prims.nat{i < LowStar.BufferView.Up.length vb} -> x: b -> FStar.Pervasives.Lemma (ensures FStar.HyperStack.ST.equal_domains h (LowStar.BufferView.Up.upd h vb i x))

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "FStar.Monotonic.HyperStack.mem", "LowStar.BufferView.Up.buffer", "LowStar.BufferView.Up.live", "Prims.nat", "Prims.b2t", "Prims.op_LessThan", "LowStar.BufferView.Up.length", "FStar.Seq.Base.seq", "LowStar.BufferView.Up.buffer_src", "FStar.Seq.Properties.lseq", "LowStar.BufferView.Up.__proj__View__item__n", "LowStar.BufferView.Up.get_view", "LowStar.BufferView.Down.upd_seq_spec", "LowStar.BufferView.Up.as_down_buffer", "Prims.unit", "LowStar.BufferView.Up.upd_modifies", "FStar.Seq.Base.append", "LowStar.BufferView.Up.__proj__View__item__put", "FStar.Pervasives.Native.tuple3", "Prims.eq2", "LowStar.BufferView.Down.as_seq", "LowStar.BufferView.Up.split_at_i", "LowStar.BufferView.Up.view" ]

[]

false

true

false

let upd_equal_domains #b h vb i x =

let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` ((View?.put v x) `Seq.append` suffix) in upd_modifies h vb i x; Down.upd_seq_spec h (as_down_buffer vb) s1

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.lemma_upd_with_sel

val lemma_upd_with_sel (#b:_) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem{live h vb}) :Lemma (upd h vb i (sel h vb i) == h)

let lemma_upd_with_sel #b vb i h = let v = get_view vb in let prefix, es, suffix = split_at_i vb i h in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = prefix `Seq.append` (View?.put v (View?.get v es) `Seq.append` suffix) in assert (Seq.equal s0 s1); Down.upd_seq_spec h (as_down_buffer vb) s0

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 44, "end_line": 162, "start_col": 0, "start_line": 156 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = () //#reset-options "--max_fuel 0 --max_ifuel 1" let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n) let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t){ let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : GTot b = let v = get_view vb in let _, es, _ = split_at_i vb i h in View?.get v es let upd' (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : GTot (h':HS.mem{sel h' vb i == x}) = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in let h' = Down.upd_seq h (as_down_buffer vb) s1 in Down.upd_seq_spec h (as_down_buffer vb) s1; assert (Down.as_seq h' (as_down_buffer vb) == s1); let n = View?.n v in assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n))); assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x); h' let upd #b h vb i x : GTot HS.mem = upd' #b h vb i x let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb i == x) = () let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat) : Lemma (FStar.Mul.(min * n + n <= max * n)) = let open FStar.Mul in assert ((min * n) + n = (min + 1) * n); assert ((min * n) + n <= max * n) #set-options "--z3rlimit 20" let sel_upd2 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (j:nat{j < length vb /\ i<>j}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb j == sel h vb j) = let open FStar.Mul in let v = get_view vb in view_indexing vb i; view_indexing vb j; let h' = upd h vb i x in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = Down.as_seq h' (as_down_buffer vb) in let min = if i < j then i else j in let max = if i < j then j else i in let n = View?.n v in lt_leq_mul min max n; let min0, max0 = Seq.slice s0 (min * n) ((min * n) + n), Seq.slice s0 (max * n) ((max * n) + n) in let _, s_j, _ = split_at_i vb j h in let min1, max1 = Seq.slice s1 (min * n) ((min * n) + n), Seq.slice s1 (max * n) ((max * n) + n) in let _, s_j', _ = split_at_i vb j h' in let prefix, s_i, suffix = split_at_i vb i h in Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix)); if i < j then begin assert (Seq.equal max0 s_j); assert (Seq.equal max1 s_j'); assert (Seq.equal s_j s_j') end else begin assert (Seq.equal min0 s_j); assert (Seq.equal min1 s_j'); assert (Seq.equal s_j s_j') end let sel_upd #b vb i j x h = if i=j then sel_upd1 vb i x h else sel_upd2 vb i j x h

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

vb: LowStar.BufferView.Up.buffer b -> i: Prims.nat{i < LowStar.BufferView.Up.length vb} -> h: FStar.Monotonic.HyperStack.mem{LowStar.BufferView.Up.live h vb} -> FStar.Pervasives.Lemma (ensures LowStar.BufferView.Up.upd h vb i (LowStar.BufferView.Up.sel h vb i) == h)

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "LowStar.BufferView.Up.buffer", "Prims.nat", "Prims.b2t", "Prims.op_LessThan", "LowStar.BufferView.Up.length", "FStar.Monotonic.HyperStack.mem", "LowStar.BufferView.Up.live", "FStar.Seq.Base.seq", "LowStar.BufferView.Up.buffer_src", "FStar.Seq.Properties.lseq", "LowStar.BufferView.Up.__proj__View__item__n", "LowStar.BufferView.Up.get_view", "LowStar.BufferView.Down.upd_seq_spec", "LowStar.BufferView.Up.as_down_buffer", "Prims.unit", "Prims._assert", "FStar.Seq.Base.equal", "FStar.Seq.Base.append", "LowStar.BufferView.Up.__proj__View__item__put", "LowStar.BufferView.Up.__proj__View__item__get", "LowStar.BufferView.Down.length", "LowStar.BufferView.Down.as_seq", "FStar.Pervasives.Native.tuple3", "Prims.eq2", "LowStar.BufferView.Up.split_at_i", "LowStar.BufferView.Up.view" ]

[]

false

true

false

let lemma_upd_with_sel #b vb i h =

let v = get_view vb in let prefix, es, suffix = split_at_i vb i h in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = prefix `Seq.append` ((View?.put v (View?.get v es)) `Seq.append` suffix) in assert (Seq.equal s0 s1); Down.upd_seq_spec h (as_down_buffer vb) s0

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.base_len

val base_len (#elt: Type) (b: base_t elt) : GTot nat

let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b)

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 68, "end_line": 39, "start_col": 0, "start_line": 39 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len)))

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

b: Pulse.Lib.HigherArray.base_t elt -> Prims.GTot Prims.nat

Prims.GTot

[ "sometrivial" ]

[]

[ "Pulse.Lib.HigherArray.base_t", "FStar.SizeT.v", "FStar.Pervasives.dfst", "FStar.SizeT.t", "Pulse.Lib.Core.pcm_ref", "Pulse.Lib.PCM.Array.carrier", "FStar.Ghost.hide", "Prims.nat", "Pulse.Lib.PCM.Array.pcm", "FStar.Ghost.reveal", "Prims.dtuple2" ]

[]

false

let base_len (#elt: Type) (b: base_t elt) : GTot nat =

SZ.v (dfst b)

false

Hacl.Spec.K256.Field52.Lemmas1.fst

Hacl.Spec.K256.Field52.Lemmas1.add5_lemma_last1

val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536) (ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb))

let add5_lemma_last1 ma mb a b = assert (v a + v b <= (ma + mb) * max48); Math.Lemmas.lemma_mult_le_right max48 (ma + mb) 65536; assert (v a + v b <= 65536 * max48); assert_norm (65536 * max48 < pow2 64); Math.Lemmas.small_mod (v a + v b) (pow2 64)

{ "file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 45, "end_line": 236, "start_col": 0, "start_line": 231 }

module Hacl.Spec.K256.Field52.Lemmas1 open FStar.Mul open Lib.IntTypes module S = Spec.K256 include Hacl.Spec.K256.Field52.Definitions include Hacl.Spec.K256.Field52 module ML = Hacl.Spec.K256.MathLemmas #set-options "--z3rlimit 100 --fuel 0 --ifuel 0" /// Load and store functions val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 == v s3 / pow2 16)) (ensures as_nat5 f == as_nat4 s) let load_felem5_lemma_as_nat s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in Math.Lemmas.euclidean_division_definition (v s0) (pow2 52); assert_norm (pow2 12 * pow2 52 = pow2 64); assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64); Math.Lemmas.euclidean_division_definition (v s1) (pow2 40); assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128); assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128); Math.Lemmas.euclidean_division_definition (v s2) (pow2 25); assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192); assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192); Math.Lemmas.euclidean_division_definition (v s3) (pow2 16); assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192) val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 = v s3 / pow2 16)) (ensures felem_fits5 f (1,1,1,1,1)) let load_felem5_lemma_fits s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in assert (v f0 < pow2 52); Math.Lemmas.lemma_div_lt (v s0) 64 52; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12; assert (v f1 < pow2 52); Math.Lemmas.lemma_div_lt (v s1) 64 40; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24; assert (v f2 < pow2 52); Math.Lemmas.lemma_div_lt (v s2) 64 28; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36; assert (v f3 < pow2 52); assert (v f4 = v s3 / pow2 16); Math.Lemmas.lemma_div_lt (v s3) 64 16; assert (v f4 < pow2 48) val load_felem5_lemma: s:felem4 -> Lemma (let f = load_felem5 s in felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s) let load_felem5_lemma s = assert_norm (v mask52 = pow2 52 - 1); assert_norm (0xffffffffff = pow2 40 - 1); assert_norm (0xfffffff = pow2 28 - 1); assert_norm (0xffff = pow2 16 - 1); let (s0,s1,s2,s3) = s in let f0 = s0 &. mask52 in // s0 % pow2 52 mod_mask_lemma s0 52ul; assert (v (mod_mask #U64 #SEC 52ul) == v mask52); assert (v f0 = v s0 % pow2 52); let f11 = s0 >>. 52ul in let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12 Math.Lemmas.lemma_div_lt (v s0) 64 52; //assert (v f11 < pow2 12); mod_mask_lemma s1 40ul; assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64; //assert (v f12 == v s1 % pow2 40 * pow2 12); Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12); logor_disjoint f11 f12 12; assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12); let f21 = s1 >>. 40ul in let f22 = (s2 &. u64 0xfffffff) <<. 24ul in let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24 Math.Lemmas.lemma_div_lt (v s1) 64 40; //assert (v f21 < pow2 24); mod_mask_lemma s2 28ul; assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64; //assert (v f22 == v s2 % pow2 28 * pow2 24); Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24); logor_disjoint f21 f22 24; assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24); let f31 = s2 >>. 28ul in let f32 = (s3 &. u64 0xffff) <<. 36ul in let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36 Math.Lemmas.lemma_div_lt (v s2) 64 28; //assert (v f31 < pow2 36); mod_mask_lemma s3 16ul; assert (v (mod_mask #U64 #SEC 16ul) == 0xffff); ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64; //assert (v f32 == v s3 % pow2 16 * pow2 36); Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36); logor_disjoint f31 f32 36; assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36); let f4 = s3 >>. 16ul in // s3 / pow2 16 assert (v f4 = v s3 / pow2 16); let f = (f0,f1,f2,f3,f4) in load_felem5_lemma_as_nat s f; load_felem5_lemma_fits s f val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma (requires (let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in felem_fits5 f (1,1,1,1,1) /\ v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\ v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\ v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\ v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16)) (ensures as_nat4 s == as_nat5 f) let store_felem5_lemma_as_nat f s = let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192); calc (==) { v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { } v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 } v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208; (==) { Math.Lemmas.small_mod (v f4) (pow2 48) } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208; } val store_felem5_lemma: f:felem5 -> Lemma (requires felem_fits5 f (1,1,1,1,1)) (ensures as_nat4 (store_felem5 f) == as_nat5 f) let store_felem5_lemma f = let (f0,f1,f2,f3,f4) = f in let o0 = f0 |. (f1 <<. 52ul) in //assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52; //assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52); Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52); logor_disjoint f0 (f1 <<. 52ul) 52; assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52); let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in //assert (v (f1 >>. 12ul) == v f1 / pow2 12); Math.Lemmas.lemma_div_lt (v f1) 52 12; //assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40; assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40); Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40); logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40; assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40); let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in Math.Lemmas.lemma_div_lt (v f2) 52 24; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28; //assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28); Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28); logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28; assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28); let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in Math.Lemmas.lemma_div_lt (v f3) 52 36; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16; //assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16); Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16); logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16; assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16); store_felem5_lemma_as_nat f (o0,o1,o2,o3) /// Addition and multiplication by a digit val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096) (ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb)) let add5_lemma1 ma mb a b = assert (v a + v b <= (ma + mb) * max52); Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096; assert (v a + v b <= 4096 * max52); assert_norm (4096 * max52 < pow2 64); Math.Lemmas.small_mod (v a + v b) (pow2 64) val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536) (ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb))

{ "checked_file": "/", "dependencies": [ "Spec.K256.fst.checked", "prims.fst.checked", "Lib.IntTypes.fsti.checked", "Hacl.Spec.K256.MathLemmas.fst.checked", "Hacl.Spec.K256.Field52.Definitions.fst.checked", "Hacl.Spec.K256.Field52.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.Calc.fsti.checked" ], "interface_file": false, "source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.K256.MathLemmas", "short_module": "ML" }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52.Definitions", "short_module": null }, { "abbrev": true, "full_module": "Spec.K256", "short_module": "S" }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

ma: Hacl.Spec.K256.Field52.Definitions.scale64_last -> mb: Hacl.Spec.K256.Field52.Definitions.scale64_last -> a: Lib.IntTypes.uint64 -> b: Lib.IntTypes.uint64 -> FStar.Pervasives.Lemma (requires Hacl.Spec.K256.Field52.Definitions.felem_fits_last1 a ma /\ Hacl.Spec.K256.Field52.Definitions.felem_fits_last1 b mb /\ ma + mb <= 65536) (ensures Lib.IntTypes.v (a +. b) == Lib.IntTypes.v a + Lib.IntTypes.v b /\ Hacl.Spec.K256.Field52.Definitions.felem_fits_last1 (a +. b) (ma + mb))

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Hacl.Spec.K256.Field52.Definitions.scale64_last", "Lib.IntTypes.uint64", "FStar.Math.Lemmas.small_mod", "Prims.op_Addition", "Lib.IntTypes.v", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Prims.pow2", "Prims.unit", "FStar.Pervasives.assert_norm", "Prims.b2t", "Prims.op_LessThan", "FStar.Mul.op_Star", "Hacl.Spec.K256.Field52.Definitions.max48", "Prims._assert", "Prims.op_LessThanOrEqual", "FStar.Math.Lemmas.lemma_mult_le_right" ]

[]

true

false

true

false

let add5_lemma_last1 ma mb a b =

assert (v a + v b <= (ma + mb) * max48); Math.Lemmas.lemma_mult_le_right max48 (ma + mb) 65536; assert (v a + v b <= 65536 * max48); assert_norm (65536 * max48 < pow2 64); Math.Lemmas.small_mod (v a + v b) (pow2 64)

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.base_t

val base_t (elt: Type u#a) : Tot Type0

let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len)))

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 70, "end_line": 37, "start_col": 0, "start_line": 35 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

elt: Type -> Type0

Prims.Tot

[ "total" ]

[]

[ "FStar.Ghost.erased", "Prims.dtuple2", "FStar.SizeT.t", "Pulse.Lib.Core.pcm_ref", "Pulse.Lib.PCM.Array.carrier", "FStar.Ghost.hide", "Prims.nat", "FStar.SizeT.v", "Pulse.Lib.PCM.Array.pcm" ]

[]

false

true

let base_t (elt: Type u#a) : Tot Type0 =

Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len)))

false

Hacl.Spec.K256.Field52.Lemmas1.fst

Hacl.Spec.K256.Field52.Lemmas1.mul15_fits_lemma

val mul15_fits_lemma: m1:scale64_5 -> m2:nat -> f:felem5 -> c:uint64 -> Lemma (requires felem_fits5 f m1 /\ v c <= m2 /\ m1 ** mk_nat5 m2 <=* (4096,4096,4096,4096,65536)) (ensures felem_fits5 (mul15 f c) (m1 ** mk_nat5 m2))

let mul15_fits_lemma m1 m2 f c = let (f0,f1,f2,f3,f4) = f in let (mf0,mf1,mf2,mf3,mf4) = m1 in let (r0,r1,r2,r3,r4) = mul15 f c in mul15_lemma1 mf0 m2 f0 c; assert (felem_fits1 r0 (mf0 * m2)); mul15_lemma1 mf1 m2 f1 c; assert (felem_fits1 r1 (mf1 * m2)); mul15_lemma1 mf2 m2 f2 c; assert (felem_fits1 r2 (mf2 * m2)); mul15_lemma1 mf3 m2 f3 c; assert (felem_fits1 r3 (mf3 * m2)); mul15_lemma_last1 mf4 m2 f4 c; assert (felem_fits_last1 r4 (mf4 * m2))

{ "file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 41, "end_line": 298, "start_col": 0, "start_line": 284 }

module Hacl.Spec.K256.Field52.Lemmas1 open FStar.Mul open Lib.IntTypes module S = Spec.K256 include Hacl.Spec.K256.Field52.Definitions include Hacl.Spec.K256.Field52 module ML = Hacl.Spec.K256.MathLemmas #set-options "--z3rlimit 100 --fuel 0 --ifuel 0" /// Load and store functions val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 == v s3 / pow2 16)) (ensures as_nat5 f == as_nat4 s) let load_felem5_lemma_as_nat s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in Math.Lemmas.euclidean_division_definition (v s0) (pow2 52); assert_norm (pow2 12 * pow2 52 = pow2 64); assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64); Math.Lemmas.euclidean_division_definition (v s1) (pow2 40); assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128); assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128); Math.Lemmas.euclidean_division_definition (v s2) (pow2 25); assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192); assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192); Math.Lemmas.euclidean_division_definition (v s3) (pow2 16); assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192) val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 = v s3 / pow2 16)) (ensures felem_fits5 f (1,1,1,1,1)) let load_felem5_lemma_fits s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in assert (v f0 < pow2 52); Math.Lemmas.lemma_div_lt (v s0) 64 52; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12; assert (v f1 < pow2 52); Math.Lemmas.lemma_div_lt (v s1) 64 40; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24; assert (v f2 < pow2 52); Math.Lemmas.lemma_div_lt (v s2) 64 28; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36; assert (v f3 < pow2 52); assert (v f4 = v s3 / pow2 16); Math.Lemmas.lemma_div_lt (v s3) 64 16; assert (v f4 < pow2 48) val load_felem5_lemma: s:felem4 -> Lemma (let f = load_felem5 s in felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s) let load_felem5_lemma s = assert_norm (v mask52 = pow2 52 - 1); assert_norm (0xffffffffff = pow2 40 - 1); assert_norm (0xfffffff = pow2 28 - 1); assert_norm (0xffff = pow2 16 - 1); let (s0,s1,s2,s3) = s in let f0 = s0 &. mask52 in // s0 % pow2 52 mod_mask_lemma s0 52ul; assert (v (mod_mask #U64 #SEC 52ul) == v mask52); assert (v f0 = v s0 % pow2 52); let f11 = s0 >>. 52ul in let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12 Math.Lemmas.lemma_div_lt (v s0) 64 52; //assert (v f11 < pow2 12); mod_mask_lemma s1 40ul; assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64; //assert (v f12 == v s1 % pow2 40 * pow2 12); Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12); logor_disjoint f11 f12 12; assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12); let f21 = s1 >>. 40ul in let f22 = (s2 &. u64 0xfffffff) <<. 24ul in let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24 Math.Lemmas.lemma_div_lt (v s1) 64 40; //assert (v f21 < pow2 24); mod_mask_lemma s2 28ul; assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64; //assert (v f22 == v s2 % pow2 28 * pow2 24); Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24); logor_disjoint f21 f22 24; assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24); let f31 = s2 >>. 28ul in let f32 = (s3 &. u64 0xffff) <<. 36ul in let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36 Math.Lemmas.lemma_div_lt (v s2) 64 28; //assert (v f31 < pow2 36); mod_mask_lemma s3 16ul; assert (v (mod_mask #U64 #SEC 16ul) == 0xffff); ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64; //assert (v f32 == v s3 % pow2 16 * pow2 36); Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36); logor_disjoint f31 f32 36; assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36); let f4 = s3 >>. 16ul in // s3 / pow2 16 assert (v f4 = v s3 / pow2 16); let f = (f0,f1,f2,f3,f4) in load_felem5_lemma_as_nat s f; load_felem5_lemma_fits s f val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma (requires (let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in felem_fits5 f (1,1,1,1,1) /\ v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\ v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\ v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\ v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16)) (ensures as_nat4 s == as_nat5 f) let store_felem5_lemma_as_nat f s = let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192); calc (==) { v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { } v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 } v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208; (==) { Math.Lemmas.small_mod (v f4) (pow2 48) } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208; } val store_felem5_lemma: f:felem5 -> Lemma (requires felem_fits5 f (1,1,1,1,1)) (ensures as_nat4 (store_felem5 f) == as_nat5 f) let store_felem5_lemma f = let (f0,f1,f2,f3,f4) = f in let o0 = f0 |. (f1 <<. 52ul) in //assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52; //assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52); Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52); logor_disjoint f0 (f1 <<. 52ul) 52; assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52); let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in //assert (v (f1 >>. 12ul) == v f1 / pow2 12); Math.Lemmas.lemma_div_lt (v f1) 52 12; //assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40; assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40); Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40); logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40; assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40); let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in Math.Lemmas.lemma_div_lt (v f2) 52 24; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28; //assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28); Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28); logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28; assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28); let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in Math.Lemmas.lemma_div_lt (v f3) 52 36; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16; //assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16); Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16); logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16; assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16); store_felem5_lemma_as_nat f (o0,o1,o2,o3) /// Addition and multiplication by a digit val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096) (ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb)) let add5_lemma1 ma mb a b = assert (v a + v b <= (ma + mb) * max52); Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096; assert (v a + v b <= 4096 * max52); assert_norm (4096 * max52 < pow2 64); Math.Lemmas.small_mod (v a + v b) (pow2 64) val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536) (ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb)) let add5_lemma_last1 ma mb a b = assert (v a + v b <= (ma + mb) * max48); Math.Lemmas.lemma_mult_le_right max48 (ma + mb) 65536; assert (v a + v b <= 65536 * max48); assert_norm (65536 * max48 < pow2 64); Math.Lemmas.small_mod (v a + v b) (pow2 64) val add5_lemma: m1:scale64_5 -> m2:scale64_5 -> f1:felem5 -> f2:felem5 -> Lemma (requires felem_fits5 f1 m1 /\ felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096,4096,4096,4096,65536)) (ensures (let r = add5 f1 f2 in as_nat5 r == as_nat5 f1 + as_nat5 f2 /\ felem_fits5 r (m1 +* m2))) let add5_lemma m1 m2 f1 f2 = let (a0,a1,a2,a3,a4) = f1 in let (b0,b1,b2,b3,b4) = f2 in let (ma0,ma1,ma2,ma3,ma4) = m1 in let (mb0,mb1,mb2,mb3,mb4) = m2 in add5_lemma1 ma0 mb0 a0 b0; add5_lemma1 ma1 mb1 a1 b1; add5_lemma1 ma2 mb2 a2 b2; add5_lemma1 ma3 mb3 a3 b3; add5_lemma_last1 ma4 mb4 a4 b4 val mul15_lemma1: ma:scale64 -> mb:nat -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits1 a ma /\ v b <= mb /\ ma * mb <= 4096) (ensures v (a *. b) == v a * v b /\ felem_fits1 (a *. b) (ma * mb)) let mul15_lemma1 ma mb a b = assert (v a * v b <= (ma * mb) * max52); Math.Lemmas.lemma_mult_le_right max52 (ma * mb) 4096; assert (v a * v b <= 4096 * max52); assert_norm (4096 * max52 < pow2 64); Math.Lemmas.small_mod (v a * v b) (pow2 64) val mul15_lemma_last1: ma:scale64_last -> mb:nat -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits_last1 a ma /\ v b <= mb /\ ma * mb <= 65536) (ensures v (a *. b) == v a * v b /\ felem_fits_last1 (a *. b) (ma * mb)) let mul15_lemma_last1 ma mb a b = assert (v a * v b <= (ma * mb) * max48); Math.Lemmas.lemma_mult_le_right max48 (ma * mb) 65536; assert (v a * v b <= 65536 * max48); assert_norm (65536 * max48 < pow2 64); Math.Lemmas.small_mod (v a * v b) (pow2 64) val mul15_fits_lemma: m1:scale64_5 -> m2:nat -> f:felem5 -> c:uint64 -> Lemma (requires felem_fits5 f m1 /\ v c <= m2 /\ m1 ** mk_nat5 m2 <=* (4096,4096,4096,4096,65536)) (ensures felem_fits5 (mul15 f c) (m1 ** mk_nat5 m2))

{ "checked_file": "/", "dependencies": [ "Spec.K256.fst.checked", "prims.fst.checked", "Lib.IntTypes.fsti.checked", "Hacl.Spec.K256.MathLemmas.fst.checked", "Hacl.Spec.K256.Field52.Definitions.fst.checked", "Hacl.Spec.K256.Field52.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.Calc.fsti.checked" ], "interface_file": false, "source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.K256.MathLemmas", "short_module": "ML" }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52.Definitions", "short_module": null }, { "abbrev": true, "full_module": "Spec.K256", "short_module": "S" }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

m1: Hacl.Spec.K256.Field52.Definitions.scale64_5 -> m2: Prims.nat -> f: Hacl.Spec.K256.Field52.Definitions.felem5 -> c: Lib.IntTypes.uint64 -> FStar.Pervasives.Lemma (requires Hacl.Spec.K256.Field52.Definitions.felem_fits5 f m1 /\ Lib.IntTypes.v c <= m2 /\ m1 ** Hacl.Spec.K256.Field52.Definitions.mk_nat5 m2 <=* (4096, 4096, 4096, 4096, 65536)) (ensures Hacl.Spec.K256.Field52.Definitions.felem_fits5 (Hacl.Spec.K256.Field52.mul15 f c) (m1 ** Hacl.Spec.K256.Field52.Definitions.mk_nat5 m2))

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Hacl.Spec.K256.Field52.Definitions.scale64_5", "Prims.nat", "Hacl.Spec.K256.Field52.Definitions.felem5", "Lib.IntTypes.uint64", "Prims._assert", "Prims.b2t", "Hacl.Spec.K256.Field52.Definitions.felem_fits_last1", "FStar.Mul.op_Star", "Prims.unit", "Hacl.Spec.K256.Field52.Lemmas1.mul15_lemma_last1", "Hacl.Spec.K256.Field52.Definitions.felem_fits1", "Hacl.Spec.K256.Field52.Lemmas1.mul15_lemma1", "Hacl.Spec.K256.Field52.mul15" ]

[]

false

true

false

let mul15_fits_lemma m1 m2 f c =

let f0, f1, f2, f3, f4 = f in let mf0, mf1, mf2, mf3, mf4 = m1 in let r0, r1, r2, r3, r4 = mul15 f c in mul15_lemma1 mf0 m2 f0 c; assert (felem_fits1 r0 (mf0 * m2)); mul15_lemma1 mf1 m2 f1 c; assert (felem_fits1 r1 (mf1 * m2)); mul15_lemma1 mf2 m2 f2 c; assert (felem_fits1 r2 (mf2 * m2)); mul15_lemma1 mf3 m2 f3 c; assert (felem_fits1 r3 (mf3 * m2)); mul15_lemma_last1 mf4 m2 f4 c; assert (felem_fits_last1 r4 (mf4 * m2))

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.l_pcm_ref

val l_pcm_ref : elt: Type -> base_len: FStar.SizeT.t -> Type0

let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz }

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 87, "end_line": 44, "start_col": 0, "start_line": 43 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

elt: Type -> base_len: FStar.SizeT.t -> Type0

Prims.Tot

[ "total" ]

[]

[ "FStar.SizeT.t", "Pulse.Lib.Core.pcm_ref", "Pulse.Lib.PCM.Array.carrier", "FStar.Ghost.hide", "Prims.nat", "FStar.SizeT.v", "Pulse.Lib.PCM.Array.pcm", "Prims.b2t", "Prims.op_BarBar", "Prims.op_Equality", "Prims.bool", "Pulse.Lib.Core.is_pcm_ref_null", "FStar.SizeT.__uint_to_t" ]

[]

false

true

let l_pcm_ref (elt: Type u#a) (base_len: SZ.t) =

r: pcm_ref (PA.pcm elt (SZ.v base_len)) {is_pcm_ref_null r = false || base_len = 0sz}

false

Hacl.Spec.K256.Field52.Lemmas1.fst

Hacl.Spec.K256.Field52.Lemmas1.mul15_lemma_last1

val mul15_lemma_last1: ma:scale64_last -> mb:nat -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits_last1 a ma /\ v b <= mb /\ ma * mb <= 65536) (ensures v (a *. b) == v a * v b /\ felem_fits_last1 (a *. b) (ma * mb))

let mul15_lemma_last1 ma mb a b = assert (v a * v b <= (ma * mb) * max48); Math.Lemmas.lemma_mult_le_right max48 (ma * mb) 65536; assert (v a * v b <= 65536 * max48); assert_norm (65536 * max48 < pow2 64); Math.Lemmas.small_mod (v a * v b) (pow2 64)

{ "file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 45, "end_line": 277, "start_col": 0, "start_line": 272 }

module Hacl.Spec.K256.Field52.Lemmas1 open FStar.Mul open Lib.IntTypes module S = Spec.K256 include Hacl.Spec.K256.Field52.Definitions include Hacl.Spec.K256.Field52 module ML = Hacl.Spec.K256.MathLemmas #set-options "--z3rlimit 100 --fuel 0 --ifuel 0" /// Load and store functions val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 == v s3 / pow2 16)) (ensures as_nat5 f == as_nat4 s) let load_felem5_lemma_as_nat s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in Math.Lemmas.euclidean_division_definition (v s0) (pow2 52); assert_norm (pow2 12 * pow2 52 = pow2 64); assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64); Math.Lemmas.euclidean_division_definition (v s1) (pow2 40); assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128); assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128); Math.Lemmas.euclidean_division_definition (v s2) (pow2 25); assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192); assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192); Math.Lemmas.euclidean_division_definition (v s3) (pow2 16); assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192) val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 = v s3 / pow2 16)) (ensures felem_fits5 f (1,1,1,1,1)) let load_felem5_lemma_fits s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in assert (v f0 < pow2 52); Math.Lemmas.lemma_div_lt (v s0) 64 52; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12; assert (v f1 < pow2 52); Math.Lemmas.lemma_div_lt (v s1) 64 40; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24; assert (v f2 < pow2 52); Math.Lemmas.lemma_div_lt (v s2) 64 28; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36; assert (v f3 < pow2 52); assert (v f4 = v s3 / pow2 16); Math.Lemmas.lemma_div_lt (v s3) 64 16; assert (v f4 < pow2 48) val load_felem5_lemma: s:felem4 -> Lemma (let f = load_felem5 s in felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s) let load_felem5_lemma s = assert_norm (v mask52 = pow2 52 - 1); assert_norm (0xffffffffff = pow2 40 - 1); assert_norm (0xfffffff = pow2 28 - 1); assert_norm (0xffff = pow2 16 - 1); let (s0,s1,s2,s3) = s in let f0 = s0 &. mask52 in // s0 % pow2 52 mod_mask_lemma s0 52ul; assert (v (mod_mask #U64 #SEC 52ul) == v mask52); assert (v f0 = v s0 % pow2 52); let f11 = s0 >>. 52ul in let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12 Math.Lemmas.lemma_div_lt (v s0) 64 52; //assert (v f11 < pow2 12); mod_mask_lemma s1 40ul; assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64; //assert (v f12 == v s1 % pow2 40 * pow2 12); Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12); logor_disjoint f11 f12 12; assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12); let f21 = s1 >>. 40ul in let f22 = (s2 &. u64 0xfffffff) <<. 24ul in let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24 Math.Lemmas.lemma_div_lt (v s1) 64 40; //assert (v f21 < pow2 24); mod_mask_lemma s2 28ul; assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64; //assert (v f22 == v s2 % pow2 28 * pow2 24); Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24); logor_disjoint f21 f22 24; assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24); let f31 = s2 >>. 28ul in let f32 = (s3 &. u64 0xffff) <<. 36ul in let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36 Math.Lemmas.lemma_div_lt (v s2) 64 28; //assert (v f31 < pow2 36); mod_mask_lemma s3 16ul; assert (v (mod_mask #U64 #SEC 16ul) == 0xffff); ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64; //assert (v f32 == v s3 % pow2 16 * pow2 36); Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36); logor_disjoint f31 f32 36; assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36); let f4 = s3 >>. 16ul in // s3 / pow2 16 assert (v f4 = v s3 / pow2 16); let f = (f0,f1,f2,f3,f4) in load_felem5_lemma_as_nat s f; load_felem5_lemma_fits s f val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma (requires (let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in felem_fits5 f (1,1,1,1,1) /\ v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\ v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\ v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\ v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16)) (ensures as_nat4 s == as_nat5 f) let store_felem5_lemma_as_nat f s = let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192); calc (==) { v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { } v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 } v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208; (==) { Math.Lemmas.small_mod (v f4) (pow2 48) } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208; } val store_felem5_lemma: f:felem5 -> Lemma (requires felem_fits5 f (1,1,1,1,1)) (ensures as_nat4 (store_felem5 f) == as_nat5 f) let store_felem5_lemma f = let (f0,f1,f2,f3,f4) = f in let o0 = f0 |. (f1 <<. 52ul) in //assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52; //assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52); Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52); logor_disjoint f0 (f1 <<. 52ul) 52; assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52); let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in //assert (v (f1 >>. 12ul) == v f1 / pow2 12); Math.Lemmas.lemma_div_lt (v f1) 52 12; //assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40; assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40); Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40); logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40; assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40); let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in Math.Lemmas.lemma_div_lt (v f2) 52 24; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28; //assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28); Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28); logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28; assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28); let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in Math.Lemmas.lemma_div_lt (v f3) 52 36; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16; //assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16); Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16); logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16; assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16); store_felem5_lemma_as_nat f (o0,o1,o2,o3) /// Addition and multiplication by a digit val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096) (ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb)) let add5_lemma1 ma mb a b = assert (v a + v b <= (ma + mb) * max52); Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096; assert (v a + v b <= 4096 * max52); assert_norm (4096 * max52 < pow2 64); Math.Lemmas.small_mod (v a + v b) (pow2 64) val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536) (ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb)) let add5_lemma_last1 ma mb a b = assert (v a + v b <= (ma + mb) * max48); Math.Lemmas.lemma_mult_le_right max48 (ma + mb) 65536; assert (v a + v b <= 65536 * max48); assert_norm (65536 * max48 < pow2 64); Math.Lemmas.small_mod (v a + v b) (pow2 64) val add5_lemma: m1:scale64_5 -> m2:scale64_5 -> f1:felem5 -> f2:felem5 -> Lemma (requires felem_fits5 f1 m1 /\ felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096,4096,4096,4096,65536)) (ensures (let r = add5 f1 f2 in as_nat5 r == as_nat5 f1 + as_nat5 f2 /\ felem_fits5 r (m1 +* m2))) let add5_lemma m1 m2 f1 f2 = let (a0,a1,a2,a3,a4) = f1 in let (b0,b1,b2,b3,b4) = f2 in let (ma0,ma1,ma2,ma3,ma4) = m1 in let (mb0,mb1,mb2,mb3,mb4) = m2 in add5_lemma1 ma0 mb0 a0 b0; add5_lemma1 ma1 mb1 a1 b1; add5_lemma1 ma2 mb2 a2 b2; add5_lemma1 ma3 mb3 a3 b3; add5_lemma_last1 ma4 mb4 a4 b4 val mul15_lemma1: ma:scale64 -> mb:nat -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits1 a ma /\ v b <= mb /\ ma * mb <= 4096) (ensures v (a *. b) == v a * v b /\ felem_fits1 (a *. b) (ma * mb)) let mul15_lemma1 ma mb a b = assert (v a * v b <= (ma * mb) * max52); Math.Lemmas.lemma_mult_le_right max52 (ma * mb) 4096; assert (v a * v b <= 4096 * max52); assert_norm (4096 * max52 < pow2 64); Math.Lemmas.small_mod (v a * v b) (pow2 64) val mul15_lemma_last1: ma:scale64_last -> mb:nat -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits_last1 a ma /\ v b <= mb /\ ma * mb <= 65536) (ensures v (a *. b) == v a * v b /\ felem_fits_last1 (a *. b) (ma * mb))

{ "checked_file": "/", "dependencies": [ "Spec.K256.fst.checked", "prims.fst.checked", "Lib.IntTypes.fsti.checked", "Hacl.Spec.K256.MathLemmas.fst.checked", "Hacl.Spec.K256.Field52.Definitions.fst.checked", "Hacl.Spec.K256.Field52.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.Calc.fsti.checked" ], "interface_file": false, "source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.K256.MathLemmas", "short_module": "ML" }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52.Definitions", "short_module": null }, { "abbrev": true, "full_module": "Spec.K256", "short_module": "S" }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

ma: Hacl.Spec.K256.Field52.Definitions.scale64_last -> mb: Prims.nat -> a: Lib.IntTypes.uint64 -> b: Lib.IntTypes.uint64 -> FStar.Pervasives.Lemma (requires Hacl.Spec.K256.Field52.Definitions.felem_fits_last1 a ma /\ Lib.IntTypes.v b <= mb /\ ma * mb <= 65536) (ensures Lib.IntTypes.v (a *. b) == Lib.IntTypes.v a * Lib.IntTypes.v b /\ Hacl.Spec.K256.Field52.Definitions.felem_fits_last1 (a *. b) (ma * mb))

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Hacl.Spec.K256.Field52.Definitions.scale64_last", "Prims.nat", "Lib.IntTypes.uint64", "FStar.Math.Lemmas.small_mod", "FStar.Mul.op_Star", "Lib.IntTypes.v", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Prims.pow2", "Prims.unit", "FStar.Pervasives.assert_norm", "Prims.b2t", "Prims.op_LessThan", "Hacl.Spec.K256.Field52.Definitions.max48", "Prims._assert", "Prims.op_LessThanOrEqual", "FStar.Math.Lemmas.lemma_mult_le_right" ]

[]

true

false

true

false

let mul15_lemma_last1 ma mb a b =

assert (v a * v b <= (ma * mb) * max48); Math.Lemmas.lemma_mult_le_right max48 (ma * mb) 65536; assert (v a * v b <= 65536 * max48); assert_norm (65536 * max48 < pow2 64); Math.Lemmas.small_mod (v a * v b) (pow2 64)

false

Hacl.Spec.K256.Field52.Lemmas1.fst

Hacl.Spec.K256.Field52.Lemmas1.mul15_lemma1

val mul15_lemma1: ma:scale64 -> mb:nat -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits1 a ma /\ v b <= mb /\ ma * mb <= 4096) (ensures v (a *. b) == v a * v b /\ felem_fits1 (a *. b) (ma * mb))

let mul15_lemma1 ma mb a b = assert (v a * v b <= (ma * mb) * max52); Math.Lemmas.lemma_mult_le_right max52 (ma * mb) 4096; assert (v a * v b <= 4096 * max52); assert_norm (4096 * max52 < pow2 64); Math.Lemmas.small_mod (v a * v b) (pow2 64)

{ "file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 45, "end_line": 265, "start_col": 0, "start_line": 260 }

module Hacl.Spec.K256.Field52.Lemmas1 open FStar.Mul open Lib.IntTypes module S = Spec.K256 include Hacl.Spec.K256.Field52.Definitions include Hacl.Spec.K256.Field52 module ML = Hacl.Spec.K256.MathLemmas #set-options "--z3rlimit 100 --fuel 0 --ifuel 0" /// Load and store functions val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 == v s3 / pow2 16)) (ensures as_nat5 f == as_nat4 s) let load_felem5_lemma_as_nat s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in Math.Lemmas.euclidean_division_definition (v s0) (pow2 52); assert_norm (pow2 12 * pow2 52 = pow2 64); assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64); Math.Lemmas.euclidean_division_definition (v s1) (pow2 40); assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128); assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128); Math.Lemmas.euclidean_division_definition (v s2) (pow2 25); assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192); assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192); Math.Lemmas.euclidean_division_definition (v s3) (pow2 16); assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192) val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 = v s3 / pow2 16)) (ensures felem_fits5 f (1,1,1,1,1)) let load_felem5_lemma_fits s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in assert (v f0 < pow2 52); Math.Lemmas.lemma_div_lt (v s0) 64 52; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12; assert (v f1 < pow2 52); Math.Lemmas.lemma_div_lt (v s1) 64 40; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24; assert (v f2 < pow2 52); Math.Lemmas.lemma_div_lt (v s2) 64 28; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36; assert (v f3 < pow2 52); assert (v f4 = v s3 / pow2 16); Math.Lemmas.lemma_div_lt (v s3) 64 16; assert (v f4 < pow2 48) val load_felem5_lemma: s:felem4 -> Lemma (let f = load_felem5 s in felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s) let load_felem5_lemma s = assert_norm (v mask52 = pow2 52 - 1); assert_norm (0xffffffffff = pow2 40 - 1); assert_norm (0xfffffff = pow2 28 - 1); assert_norm (0xffff = pow2 16 - 1); let (s0,s1,s2,s3) = s in let f0 = s0 &. mask52 in // s0 % pow2 52 mod_mask_lemma s0 52ul; assert (v (mod_mask #U64 #SEC 52ul) == v mask52); assert (v f0 = v s0 % pow2 52); let f11 = s0 >>. 52ul in let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12 Math.Lemmas.lemma_div_lt (v s0) 64 52; //assert (v f11 < pow2 12); mod_mask_lemma s1 40ul; assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64; //assert (v f12 == v s1 % pow2 40 * pow2 12); Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12); logor_disjoint f11 f12 12; assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12); let f21 = s1 >>. 40ul in let f22 = (s2 &. u64 0xfffffff) <<. 24ul in let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24 Math.Lemmas.lemma_div_lt (v s1) 64 40; //assert (v f21 < pow2 24); mod_mask_lemma s2 28ul; assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64; //assert (v f22 == v s2 % pow2 28 * pow2 24); Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24); logor_disjoint f21 f22 24; assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24); let f31 = s2 >>. 28ul in let f32 = (s3 &. u64 0xffff) <<. 36ul in let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36 Math.Lemmas.lemma_div_lt (v s2) 64 28; //assert (v f31 < pow2 36); mod_mask_lemma s3 16ul; assert (v (mod_mask #U64 #SEC 16ul) == 0xffff); ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64; //assert (v f32 == v s3 % pow2 16 * pow2 36); Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36); logor_disjoint f31 f32 36; assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36); let f4 = s3 >>. 16ul in // s3 / pow2 16 assert (v f4 = v s3 / pow2 16); let f = (f0,f1,f2,f3,f4) in load_felem5_lemma_as_nat s f; load_felem5_lemma_fits s f val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma (requires (let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in felem_fits5 f (1,1,1,1,1) /\ v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\ v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\ v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\ v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16)) (ensures as_nat4 s == as_nat5 f) let store_felem5_lemma_as_nat f s = let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192); calc (==) { v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { } v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 } v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208; (==) { Math.Lemmas.small_mod (v f4) (pow2 48) } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208; } val store_felem5_lemma: f:felem5 -> Lemma (requires felem_fits5 f (1,1,1,1,1)) (ensures as_nat4 (store_felem5 f) == as_nat5 f) let store_felem5_lemma f = let (f0,f1,f2,f3,f4) = f in let o0 = f0 |. (f1 <<. 52ul) in //assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52; //assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52); Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52); logor_disjoint f0 (f1 <<. 52ul) 52; assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52); let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in //assert (v (f1 >>. 12ul) == v f1 / pow2 12); Math.Lemmas.lemma_div_lt (v f1) 52 12; //assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40; assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40); Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40); logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40; assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40); let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in Math.Lemmas.lemma_div_lt (v f2) 52 24; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28; //assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28); Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28); logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28; assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28); let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in Math.Lemmas.lemma_div_lt (v f3) 52 36; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16; //assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16); Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16); logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16; assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16); store_felem5_lemma_as_nat f (o0,o1,o2,o3) /// Addition and multiplication by a digit val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096) (ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb)) let add5_lemma1 ma mb a b = assert (v a + v b <= (ma + mb) * max52); Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096; assert (v a + v b <= 4096 * max52); assert_norm (4096 * max52 < pow2 64); Math.Lemmas.small_mod (v a + v b) (pow2 64) val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536) (ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb)) let add5_lemma_last1 ma mb a b = assert (v a + v b <= (ma + mb) * max48); Math.Lemmas.lemma_mult_le_right max48 (ma + mb) 65536; assert (v a + v b <= 65536 * max48); assert_norm (65536 * max48 < pow2 64); Math.Lemmas.small_mod (v a + v b) (pow2 64) val add5_lemma: m1:scale64_5 -> m2:scale64_5 -> f1:felem5 -> f2:felem5 -> Lemma (requires felem_fits5 f1 m1 /\ felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096,4096,4096,4096,65536)) (ensures (let r = add5 f1 f2 in as_nat5 r == as_nat5 f1 + as_nat5 f2 /\ felem_fits5 r (m1 +* m2))) let add5_lemma m1 m2 f1 f2 = let (a0,a1,a2,a3,a4) = f1 in let (b0,b1,b2,b3,b4) = f2 in let (ma0,ma1,ma2,ma3,ma4) = m1 in let (mb0,mb1,mb2,mb3,mb4) = m2 in add5_lemma1 ma0 mb0 a0 b0; add5_lemma1 ma1 mb1 a1 b1; add5_lemma1 ma2 mb2 a2 b2; add5_lemma1 ma3 mb3 a3 b3; add5_lemma_last1 ma4 mb4 a4 b4 val mul15_lemma1: ma:scale64 -> mb:nat -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits1 a ma /\ v b <= mb /\ ma * mb <= 4096) (ensures v (a *. b) == v a * v b /\ felem_fits1 (a *. b) (ma * mb))

{ "checked_file": "/", "dependencies": [ "Spec.K256.fst.checked", "prims.fst.checked", "Lib.IntTypes.fsti.checked", "Hacl.Spec.K256.MathLemmas.fst.checked", "Hacl.Spec.K256.Field52.Definitions.fst.checked", "Hacl.Spec.K256.Field52.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.Calc.fsti.checked" ], "interface_file": false, "source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.K256.MathLemmas", "short_module": "ML" }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52.Definitions", "short_module": null }, { "abbrev": true, "full_module": "Spec.K256", "short_module": "S" }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

ma: Hacl.Spec.K256.Field52.Definitions.scale64 -> mb: Prims.nat -> a: Lib.IntTypes.uint64 -> b: Lib.IntTypes.uint64 -> FStar.Pervasives.Lemma (requires Hacl.Spec.K256.Field52.Definitions.felem_fits1 a ma /\ Lib.IntTypes.v b <= mb /\ ma * mb <= 4096) (ensures Lib.IntTypes.v (a *. b) == Lib.IntTypes.v a * Lib.IntTypes.v b /\ Hacl.Spec.K256.Field52.Definitions.felem_fits1 (a *. b) (ma * mb))

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Hacl.Spec.K256.Field52.Definitions.scale64", "Prims.nat", "Lib.IntTypes.uint64", "FStar.Math.Lemmas.small_mod", "FStar.Mul.op_Star", "Lib.IntTypes.v", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Prims.pow2", "Prims.unit", "FStar.Pervasives.assert_norm", "Prims.b2t", "Prims.op_LessThan", "Hacl.Spec.K256.Field52.Definitions.max52", "Prims._assert", "Prims.op_LessThanOrEqual", "FStar.Math.Lemmas.lemma_mult_le_right" ]

[]

true

false

true

false

let mul15_lemma1 ma mb a b =

assert (v a * v b <= (ma * mb) * max52); Math.Lemmas.lemma_mult_le_right max52 (ma * mb) 4096; assert (v a * v b <= 4096 * max52); assert_norm (4096 * max52 < pow2 64); Math.Lemmas.small_mod (v a * v b) (pow2 64)

false

Steel.ST.GhostHigherReference.fst

Steel.ST.GhostHigherReference.share

val share (#a:Type) (#uses:_) (#p:perm) (#v:erased a) (r:ref a) : STGhostT unit uses (pts_to r p v) (fun _ -> pts_to r (half_perm p) v `star` pts_to r (half_perm p) v)

let share r = RST.share r.reveal

{ "file_name": "lib/steel/Steel.ST.GhostHigherReference.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 20, "end_line": 70, "start_col": 0, "start_line": 68 }

module Steel.ST.GhostHigherReference // needed because I need to know that `Steel.ST.HigherReference.ref a` // can be turned into `Steel.HigherReference.ref a` friend Steel.ST.HigherReference module RST = Steel.ST.HigherReference module R = Steel.HigherReference module STC = Steel.ST.Coercions // FIXME: WHY WHY WHY in `Ghost.reveal (ref a)` is `a` not strictly positive? [@@erasable] noeq type ref' ([@@@strictly_positive] a : Type u#1) : Type0 = | Hide: (reveal: R.ref a) -> ref' a let ref a = ref' a let pts_to r p v = RST.pts_to r.reveal p v let reveal_ref r = r.reveal let hide_ref r = Hide r let hide_reveal_ref r = () let reveal_pts_to r p x = equiv_refl (Steel.ST.HigherReference.pts_to (reveal_ref r) p x) let pts_to_injective_eq #_ #_ #p0 #p1 #v0 #v1 r = rewrite (pts_to r p0 v0) (RST.pts_to r.reveal p0 v0); rewrite (pts_to r p1 v1) (RST.pts_to r.reveal p1 v1); RST.pts_to_injective_eq #_ #_ #_ #_ #v0 #v1 r.reveal; rewrite (RST.pts_to r.reveal p0 v0) (pts_to r p0 v0); rewrite (RST.pts_to r.reveal p1 v0) (pts_to r p1 v0) let alloc #_ #a x = let gr = STC.coerce_ghost (fun _ -> R.ghost_alloc x) in let r = Hide (Ghost.reveal (coerce_eq (R.reveal_ghost_ref a) gr)) in weaken (R.ghost_pts_to gr full_perm x) (pts_to r full_perm x) (fun _ -> R.reveal_ghost_pts_to_sl gr full_perm x ); r let write #_ #a #v r x = let gr : R.ghost_ref a = coerce_eq (R.reveal_ghost_ref a) (Ghost.hide r.reveal) in weaken (pts_to r full_perm v) (R.ghost_pts_to gr full_perm v) (fun _ -> R.reveal_ghost_pts_to_sl gr full_perm v ); STC.coerce_ghost (fun _ -> R.ghost_write gr x); weaken (R.ghost_pts_to gr full_perm x) (pts_to r full_perm x) (fun _ -> R.reveal_ghost_pts_to_sl gr full_perm x ) let free #_ #a #v r = let gr : R.ghost_ref a = coerce_eq (R.reveal_ghost_ref a) (Ghost.hide r.reveal) in weaken (pts_to r full_perm v) (R.ghost_pts_to gr full_perm v) (fun _ -> R.reveal_ghost_pts_to_sl gr full_perm v ); STC.coerce_ghost (fun _ -> R.ghost_free gr)

{ "checked_file": "/", "dependencies": [ "Steel.ST.HigherReference.fst.checked", "Steel.ST.Coercions.fsti.checked", "Steel.HigherReference.fsti.checked", "prims.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Steel.ST.GhostHigherReference.fst" }

[ { "abbrev": true, "full_module": "Steel.ST.Coercions", "short_module": "STC" }, { "abbrev": true, "full_module": "Steel.HigherReference", "short_module": "R" }, { "abbrev": true, "full_module": "Steel.ST.HigherReference", "short_module": "RST" }, { "abbrev": false, "full_module": "Steel.ST.Util", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

r: Steel.ST.GhostHigherReference.ref a -> Steel.ST.Effect.Ghost.STGhostT Prims.unit

Steel.ST.Effect.Ghost.STGhostT

[]

[ "Steel.Memory.inames", "Steel.FractionalPermission.perm", "FStar.Ghost.erased", "Steel.ST.GhostHigherReference.ref", "Steel.ST.HigherReference.share", "Steel.ST.GhostHigherReference.__proj__Hide__item__reveal", "Prims.unit" ]

[]

false

true

false

let share r =

RST.share r.reveal

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.base

val base (#elt: Type) (p: ptr elt) : Tot (base_t elt)

let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |)

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 39, "end_line": 65, "start_col": 0, "start_line": 63 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

p: Pulse.Lib.HigherArray.ptr elt -> Pulse.Lib.HigherArray.base_t elt

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.ptr", "FStar.Ghost.hide", "Prims.dtuple2", "FStar.SizeT.t", "Pulse.Lib.Core.pcm_ref", "Pulse.Lib.PCM.Array.carrier", "Prims.nat", "FStar.SizeT.v", "Pulse.Lib.PCM.Array.pcm", "Prims.Mkdtuple2", "FStar.Ghost.reveal", "Pulse.Lib.HigherArray.__proj__Mkptr__item__base_len", "Pulse.Lib.HigherArray.__proj__Mkptr__item__base", "Pulse.Lib.HigherArray.base_t" ]

[]

false

true

false

let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) =

(| Ghost.reveal p.base_len, p.base |)

false

Hacl.Spec.K256.Field52.Lemmas1.fst

Hacl.Spec.K256.Field52.Lemmas1.add5_lemma1

val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096) (ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb))

let add5_lemma1 ma mb a b = assert (v a + v b <= (ma + mb) * max52); Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096; assert (v a + v b <= 4096 * max52); assert_norm (4096 * max52 < pow2 64); Math.Lemmas.small_mod (v a + v b) (pow2 64)

{ "file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 45, "end_line": 224, "start_col": 0, "start_line": 219 }

module Hacl.Spec.K256.Field52.Lemmas1 open FStar.Mul open Lib.IntTypes module S = Spec.K256 include Hacl.Spec.K256.Field52.Definitions include Hacl.Spec.K256.Field52 module ML = Hacl.Spec.K256.MathLemmas #set-options "--z3rlimit 100 --fuel 0 --ifuel 0" /// Load and store functions val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 == v s3 / pow2 16)) (ensures as_nat5 f == as_nat4 s) let load_felem5_lemma_as_nat s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in Math.Lemmas.euclidean_division_definition (v s0) (pow2 52); assert_norm (pow2 12 * pow2 52 = pow2 64); assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64); Math.Lemmas.euclidean_division_definition (v s1) (pow2 40); assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128); assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128); Math.Lemmas.euclidean_division_definition (v s2) (pow2 25); assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192); assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192); Math.Lemmas.euclidean_division_definition (v s3) (pow2 16); assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192) val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 = v s3 / pow2 16)) (ensures felem_fits5 f (1,1,1,1,1)) let load_felem5_lemma_fits s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in assert (v f0 < pow2 52); Math.Lemmas.lemma_div_lt (v s0) 64 52; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12; assert (v f1 < pow2 52); Math.Lemmas.lemma_div_lt (v s1) 64 40; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24; assert (v f2 < pow2 52); Math.Lemmas.lemma_div_lt (v s2) 64 28; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36; assert (v f3 < pow2 52); assert (v f4 = v s3 / pow2 16); Math.Lemmas.lemma_div_lt (v s3) 64 16; assert (v f4 < pow2 48) val load_felem5_lemma: s:felem4 -> Lemma (let f = load_felem5 s in felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s) let load_felem5_lemma s = assert_norm (v mask52 = pow2 52 - 1); assert_norm (0xffffffffff = pow2 40 - 1); assert_norm (0xfffffff = pow2 28 - 1); assert_norm (0xffff = pow2 16 - 1); let (s0,s1,s2,s3) = s in let f0 = s0 &. mask52 in // s0 % pow2 52 mod_mask_lemma s0 52ul; assert (v (mod_mask #U64 #SEC 52ul) == v mask52); assert (v f0 = v s0 % pow2 52); let f11 = s0 >>. 52ul in let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12 Math.Lemmas.lemma_div_lt (v s0) 64 52; //assert (v f11 < pow2 12); mod_mask_lemma s1 40ul; assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64; //assert (v f12 == v s1 % pow2 40 * pow2 12); Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12); logor_disjoint f11 f12 12; assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12); let f21 = s1 >>. 40ul in let f22 = (s2 &. u64 0xfffffff) <<. 24ul in let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24 Math.Lemmas.lemma_div_lt (v s1) 64 40; //assert (v f21 < pow2 24); mod_mask_lemma s2 28ul; assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64; //assert (v f22 == v s2 % pow2 28 * pow2 24); Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24); logor_disjoint f21 f22 24; assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24); let f31 = s2 >>. 28ul in let f32 = (s3 &. u64 0xffff) <<. 36ul in let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36 Math.Lemmas.lemma_div_lt (v s2) 64 28; //assert (v f31 < pow2 36); mod_mask_lemma s3 16ul; assert (v (mod_mask #U64 #SEC 16ul) == 0xffff); ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64; //assert (v f32 == v s3 % pow2 16 * pow2 36); Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36); logor_disjoint f31 f32 36; assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36); let f4 = s3 >>. 16ul in // s3 / pow2 16 assert (v f4 = v s3 / pow2 16); let f = (f0,f1,f2,f3,f4) in load_felem5_lemma_as_nat s f; load_felem5_lemma_fits s f val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma (requires (let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in felem_fits5 f (1,1,1,1,1) /\ v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\ v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\ v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\ v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16)) (ensures as_nat4 s == as_nat5 f) let store_felem5_lemma_as_nat f s = let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192); calc (==) { v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { } v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 } v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208; (==) { Math.Lemmas.small_mod (v f4) (pow2 48) } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208; } val store_felem5_lemma: f:felem5 -> Lemma (requires felem_fits5 f (1,1,1,1,1)) (ensures as_nat4 (store_felem5 f) == as_nat5 f) let store_felem5_lemma f = let (f0,f1,f2,f3,f4) = f in let o0 = f0 |. (f1 <<. 52ul) in //assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52; //assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52); Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52); logor_disjoint f0 (f1 <<. 52ul) 52; assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52); let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in //assert (v (f1 >>. 12ul) == v f1 / pow2 12); Math.Lemmas.lemma_div_lt (v f1) 52 12; //assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40; assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40); Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40); logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40; assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40); let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in Math.Lemmas.lemma_div_lt (v f2) 52 24; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28; //assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28); Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28); logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28; assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28); let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in Math.Lemmas.lemma_div_lt (v f3) 52 36; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16; //assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16); Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16); logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16; assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16); store_felem5_lemma_as_nat f (o0,o1,o2,o3) /// Addition and multiplication by a digit val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096) (ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb))

{ "checked_file": "/", "dependencies": [ "Spec.K256.fst.checked", "prims.fst.checked", "Lib.IntTypes.fsti.checked", "Hacl.Spec.K256.MathLemmas.fst.checked", "Hacl.Spec.K256.Field52.Definitions.fst.checked", "Hacl.Spec.K256.Field52.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.Calc.fsti.checked" ], "interface_file": false, "source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.K256.MathLemmas", "short_module": "ML" }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52.Definitions", "short_module": null }, { "abbrev": true, "full_module": "Spec.K256", "short_module": "S" }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

ma: Hacl.Spec.K256.Field52.Definitions.scale64 -> mb: Hacl.Spec.K256.Field52.Definitions.scale64 -> a: Lib.IntTypes.uint64 -> b: Lib.IntTypes.uint64 -> FStar.Pervasives.Lemma (requires Hacl.Spec.K256.Field52.Definitions.felem_fits1 a ma /\ Hacl.Spec.K256.Field52.Definitions.felem_fits1 b mb /\ ma + mb <= 4096) (ensures Lib.IntTypes.v (a +. b) == Lib.IntTypes.v a + Lib.IntTypes.v b /\ Hacl.Spec.K256.Field52.Definitions.felem_fits1 (a +. b) (ma + mb))

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Hacl.Spec.K256.Field52.Definitions.scale64", "Lib.IntTypes.uint64", "FStar.Math.Lemmas.small_mod", "Prims.op_Addition", "Lib.IntTypes.v", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "Prims.pow2", "Prims.unit", "FStar.Pervasives.assert_norm", "Prims.b2t", "Prims.op_LessThan", "FStar.Mul.op_Star", "Hacl.Spec.K256.Field52.Definitions.max52", "Prims._assert", "Prims.op_LessThanOrEqual", "FStar.Math.Lemmas.lemma_mult_le_right" ]

[]

true

false

true

false

let add5_lemma1 ma mb a b =

assert (v a + v b <= (ma + mb) * max52); Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096; assert (v a + v b <= 4096 * max52); assert_norm (4096 * max52 < pow2 64); Math.Lemmas.small_mod (v a + v b) (pow2 64)

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.length

val length (#a:Type) (x:array a) : GTot nat

let length (#elt: Type) (a: array elt) : GTot nat = a.length

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 60, "end_line": 94, "start_col": 0, "start_line": 94 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) }

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

x: Pulse.Lib.HigherArray.array a -> Prims.GTot Prims.nat

Prims.GTot

[ "sometrivial" ]

[]

[ "Pulse.Lib.HigherArray.array", "FStar.Ghost.reveal", "Prims.nat", "Pulse.Lib.HigherArray.__proj__Mkarray__item__length" ]

[]

false

let length (#elt: Type) (a: array elt) : GTot nat =

a.length

false

Hacl.Spec.K256.Field52.Lemmas1.fst

Hacl.Spec.K256.Field52.Lemmas1.load_felem5_lemma_as_nat

val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 == v s3 / pow2 16)) (ensures as_nat5 f == as_nat4 s)

let load_felem5_lemma_as_nat s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in Math.Lemmas.euclidean_division_definition (v s0) (pow2 52); assert_norm (pow2 12 * pow2 52 = pow2 64); assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64); Math.Lemmas.euclidean_division_definition (v s1) (pow2 40); assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128); assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128); Math.Lemmas.euclidean_division_definition (v s2) (pow2 25); assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192); assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192); Math.Lemmas.euclidean_division_definition (v s3) (pow2 16); assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192)

{ "file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 81, "end_line": 41, "start_col": 0, "start_line": 28 }

module Hacl.Spec.K256.Field52.Lemmas1 open FStar.Mul open Lib.IntTypes module S = Spec.K256 include Hacl.Spec.K256.Field52.Definitions include Hacl.Spec.K256.Field52 module ML = Hacl.Spec.K256.MathLemmas #set-options "--z3rlimit 100 --fuel 0 --ifuel 0" /// Load and store functions val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 == v s3 / pow2 16)) (ensures as_nat5 f == as_nat4 s)

{ "checked_file": "/", "dependencies": [ "Spec.K256.fst.checked", "prims.fst.checked", "Lib.IntTypes.fsti.checked", "Hacl.Spec.K256.MathLemmas.fst.checked", "Hacl.Spec.K256.Field52.Definitions.fst.checked", "Hacl.Spec.K256.Field52.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.Calc.fsti.checked" ], "interface_file": false, "source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.K256.MathLemmas", "short_module": "ML" }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52.Definitions", "short_module": null }, { "abbrev": true, "full_module": "Spec.K256", "short_module": "S" }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

s: Hacl.Spec.K256.Field52.Definitions.felem4 -> f: Hacl.Spec.K256.Field52.Definitions.felem5 -> FStar.Pervasives.Lemma (requires (let _ = s in (let FStar.Pervasives.Native.Mktuple4 #_ #_ #_ #_ s0 s1 s2 s3 = _ in let _ = f in (let FStar.Pervasives.Native.Mktuple5 #_ #_ #_ #_ #_ f0 f1 f2 f3 f4 = _ in Lib.IntTypes.v f0 == Lib.IntTypes.v s0 % Prims.pow2 52 /\ Lib.IntTypes.v f1 == Lib.IntTypes.v s0 / Prims.pow2 52 + (Lib.IntTypes.v s1 % Prims.pow2 40) * Prims.pow2 12 /\ Lib.IntTypes.v f2 == Lib.IntTypes.v s1 / Prims.pow2 40 + (Lib.IntTypes.v s2 % Prims.pow2 28) * Prims.pow2 24 /\ Lib.IntTypes.v f3 == Lib.IntTypes.v s2 / Prims.pow2 28 + (Lib.IntTypes.v s3 % Prims.pow2 16) * Prims.pow2 36 /\ Lib.IntTypes.v f4 == Lib.IntTypes.v s3 / Prims.pow2 16) <: Type0) <: Type0)) (ensures Hacl.Spec.K256.Field52.Definitions.as_nat5 f == Hacl.Spec.K256.Field52.Definitions.as_nat4 s )

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Hacl.Spec.K256.Field52.Definitions.felem4", "Hacl.Spec.K256.Field52.Definitions.felem5", "Lib.IntTypes.uint64", "Prims._assert", "Prims.eq2", "Prims.int", "Hacl.Spec.K256.Field52.Definitions.as_nat5", "Prims.op_Addition", "Lib.IntTypes.v", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "FStar.Mul.op_Star", "Prims.pow2", "Prims.unit", "FStar.Math.Lemmas.euclidean_division_definition", "FStar.Pervasives.assert_norm", "Prims.b2t", "Prims.op_Equality" ]

[]

false

true

false

let load_felem5_lemma_as_nat s f =

let s0, s1, s2, s3 = s in let f0, f1, f2, f3, f4 = f in Math.Lemmas.euclidean_division_definition (v s0) (pow2 52); assert_norm (pow2 12 * pow2 52 = pow2 64); assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64); Math.Lemmas.euclidean_division_definition (v s1) (pow2 40); assert_norm ((pow2 24 * pow2 52) * pow2 52 = pow2 128); assert_norm ((pow2 52 * pow2 52) * pow2 52 = pow2 28 * pow2 128); Math.Lemmas.euclidean_division_definition (v s2) (pow2 25); assert_norm (((pow2 36 * pow2 52) * pow2 52) * pow2 52 = pow2 192); assert_norm (((pow2 52 * pow2 52) * pow2 52) * pow2 52 = pow2 16 * pow2 192); Math.Lemmas.euclidean_division_definition (v s3) (pow2 16); assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192)

false

Hacl.Spec.K256.Field52.Lemmas1.fst

Hacl.Spec.K256.Field52.Lemmas1.add5_lemma

val add5_lemma: m1:scale64_5 -> m2:scale64_5 -> f1:felem5 -> f2:felem5 -> Lemma (requires felem_fits5 f1 m1 /\ felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096,4096,4096,4096,65536)) (ensures (let r = add5 f1 f2 in as_nat5 r == as_nat5 f1 + as_nat5 f2 /\ felem_fits5 r (m1 +* m2)))

let add5_lemma m1 m2 f1 f2 = let (a0,a1,a2,a3,a4) = f1 in let (b0,b1,b2,b3,b4) = f2 in let (ma0,ma1,ma2,ma3,ma4) = m1 in let (mb0,mb1,mb2,mb3,mb4) = m2 in add5_lemma1 ma0 mb0 a0 b0; add5_lemma1 ma1 mb1 a1 b1; add5_lemma1 ma2 mb2 a2 b2; add5_lemma1 ma3 mb3 a3 b3; add5_lemma_last1 ma4 mb4 a4 b4

{ "file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 32, "end_line": 253, "start_col": 0, "start_line": 244 }

module Hacl.Spec.K256.Field52.Lemmas1 open FStar.Mul open Lib.IntTypes module S = Spec.K256 include Hacl.Spec.K256.Field52.Definitions include Hacl.Spec.K256.Field52 module ML = Hacl.Spec.K256.MathLemmas #set-options "--z3rlimit 100 --fuel 0 --ifuel 0" /// Load and store functions val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 == v s3 / pow2 16)) (ensures as_nat5 f == as_nat4 s) let load_felem5_lemma_as_nat s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in Math.Lemmas.euclidean_division_definition (v s0) (pow2 52); assert_norm (pow2 12 * pow2 52 = pow2 64); assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64); Math.Lemmas.euclidean_division_definition (v s1) (pow2 40); assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128); assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128); Math.Lemmas.euclidean_division_definition (v s2) (pow2 25); assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192); assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192); Math.Lemmas.euclidean_division_definition (v s3) (pow2 16); assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192) val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 = v s3 / pow2 16)) (ensures felem_fits5 f (1,1,1,1,1)) let load_felem5_lemma_fits s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in assert (v f0 < pow2 52); Math.Lemmas.lemma_div_lt (v s0) 64 52; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12; assert (v f1 < pow2 52); Math.Lemmas.lemma_div_lt (v s1) 64 40; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24; assert (v f2 < pow2 52); Math.Lemmas.lemma_div_lt (v s2) 64 28; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36; assert (v f3 < pow2 52); assert (v f4 = v s3 / pow2 16); Math.Lemmas.lemma_div_lt (v s3) 64 16; assert (v f4 < pow2 48) val load_felem5_lemma: s:felem4 -> Lemma (let f = load_felem5 s in felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s) let load_felem5_lemma s = assert_norm (v mask52 = pow2 52 - 1); assert_norm (0xffffffffff = pow2 40 - 1); assert_norm (0xfffffff = pow2 28 - 1); assert_norm (0xffff = pow2 16 - 1); let (s0,s1,s2,s3) = s in let f0 = s0 &. mask52 in // s0 % pow2 52 mod_mask_lemma s0 52ul; assert (v (mod_mask #U64 #SEC 52ul) == v mask52); assert (v f0 = v s0 % pow2 52); let f11 = s0 >>. 52ul in let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12 Math.Lemmas.lemma_div_lt (v s0) 64 52; //assert (v f11 < pow2 12); mod_mask_lemma s1 40ul; assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64; //assert (v f12 == v s1 % pow2 40 * pow2 12); Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12); logor_disjoint f11 f12 12; assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12); let f21 = s1 >>. 40ul in let f22 = (s2 &. u64 0xfffffff) <<. 24ul in let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24 Math.Lemmas.lemma_div_lt (v s1) 64 40; //assert (v f21 < pow2 24); mod_mask_lemma s2 28ul; assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64; //assert (v f22 == v s2 % pow2 28 * pow2 24); Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24); logor_disjoint f21 f22 24; assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24); let f31 = s2 >>. 28ul in let f32 = (s3 &. u64 0xffff) <<. 36ul in let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36 Math.Lemmas.lemma_div_lt (v s2) 64 28; //assert (v f31 < pow2 36); mod_mask_lemma s3 16ul; assert (v (mod_mask #U64 #SEC 16ul) == 0xffff); ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64; //assert (v f32 == v s3 % pow2 16 * pow2 36); Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36); logor_disjoint f31 f32 36; assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36); let f4 = s3 >>. 16ul in // s3 / pow2 16 assert (v f4 = v s3 / pow2 16); let f = (f0,f1,f2,f3,f4) in load_felem5_lemma_as_nat s f; load_felem5_lemma_fits s f val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma (requires (let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in felem_fits5 f (1,1,1,1,1) /\ v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\ v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\ v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\ v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16)) (ensures as_nat4 s == as_nat5 f) let store_felem5_lemma_as_nat f s = let (f0,f1,f2,f3,f4) = f in let (s0,s1,s2,s3) = s in assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192); calc (==) { v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { } v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 } v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192; (==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208; (==) { Math.Lemmas.small_mod (v f4) (pow2 48) } v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208; } val store_felem5_lemma: f:felem5 -> Lemma (requires felem_fits5 f (1,1,1,1,1)) (ensures as_nat4 (store_felem5 f) == as_nat5 f) let store_felem5_lemma f = let (f0,f1,f2,f3,f4) = f in let o0 = f0 |. (f1 <<. 52ul) in //assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52; //assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52); Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52); logor_disjoint f0 (f1 <<. 52ul) 52; assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52); let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in //assert (v (f1 >>. 12ul) == v f1 / pow2 12); Math.Lemmas.lemma_div_lt (v f1) 52 12; //assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64); Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40; assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40); Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40); logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40; assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40); let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in Math.Lemmas.lemma_div_lt (v f2) 52 24; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28; //assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28); Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28); logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28; assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28); let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in Math.Lemmas.lemma_div_lt (v f3) 52 36; Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16; //assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16); Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16); logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16; assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16); store_felem5_lemma_as_nat f (o0,o1,o2,o3) /// Addition and multiplication by a digit val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096) (ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb)) let add5_lemma1 ma mb a b = assert (v a + v b <= (ma + mb) * max52); Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096; assert (v a + v b <= 4096 * max52); assert_norm (4096 * max52 < pow2 64); Math.Lemmas.small_mod (v a + v b) (pow2 64) val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma (requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536) (ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb)) let add5_lemma_last1 ma mb a b = assert (v a + v b <= (ma + mb) * max48); Math.Lemmas.lemma_mult_le_right max48 (ma + mb) 65536; assert (v a + v b <= 65536 * max48); assert_norm (65536 * max48 < pow2 64); Math.Lemmas.small_mod (v a + v b) (pow2 64) val add5_lemma: m1:scale64_5 -> m2:scale64_5 -> f1:felem5 -> f2:felem5 -> Lemma (requires felem_fits5 f1 m1 /\ felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096,4096,4096,4096,65536)) (ensures (let r = add5 f1 f2 in as_nat5 r == as_nat5 f1 + as_nat5 f2 /\ felem_fits5 r (m1 +* m2)))

{ "checked_file": "/", "dependencies": [ "Spec.K256.fst.checked", "prims.fst.checked", "Lib.IntTypes.fsti.checked", "Hacl.Spec.K256.MathLemmas.fst.checked", "Hacl.Spec.K256.Field52.Definitions.fst.checked", "Hacl.Spec.K256.Field52.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.Calc.fsti.checked" ], "interface_file": false, "source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.K256.MathLemmas", "short_module": "ML" }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52.Definitions", "short_module": null }, { "abbrev": true, "full_module": "Spec.K256", "short_module": "S" }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

m1: Hacl.Spec.K256.Field52.Definitions.scale64_5 -> m2: Hacl.Spec.K256.Field52.Definitions.scale64_5 -> f1: Hacl.Spec.K256.Field52.Definitions.felem5 -> f2: Hacl.Spec.K256.Field52.Definitions.felem5 -> FStar.Pervasives.Lemma (requires Hacl.Spec.K256.Field52.Definitions.felem_fits5 f1 m1 /\ Hacl.Spec.K256.Field52.Definitions.felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096, 4096, 4096, 4096, 65536)) (ensures (let r = Hacl.Spec.K256.Field52.add5 f1 f2 in Hacl.Spec.K256.Field52.Definitions.as_nat5 r == Hacl.Spec.K256.Field52.Definitions.as_nat5 f1 + Hacl.Spec.K256.Field52.Definitions.as_nat5 f2 /\ Hacl.Spec.K256.Field52.Definitions.felem_fits5 r (m1 +* m2)))

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Hacl.Spec.K256.Field52.Definitions.scale64_5", "Hacl.Spec.K256.Field52.Definitions.felem5", "Lib.IntTypes.uint64", "Prims.nat", "Hacl.Spec.K256.Field52.Lemmas1.add5_lemma_last1", "Prims.unit", "Hacl.Spec.K256.Field52.Lemmas1.add5_lemma1" ]

[]

false

true

false

let add5_lemma m1 m2 f1 f2 =

let a0, a1, a2, a3, a4 = f1 in let b0, b1, b2, b3, b4 = f2 in let ma0, ma1, ma2, ma3, ma4 = m1 in let mb0, mb1, mb2, mb3, mb4 = m2 in add5_lemma1 ma0 mb0 a0 b0; add5_lemma1 ma1 mb1 a1 b1; add5_lemma1 ma2 mb2 a2 b2; add5_lemma1 ma3 mb3 a3 b3; add5_lemma_last1 ma4 mb4 a4 b4

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.ptr_of

val ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt)

let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 5, "end_line": 100, "start_col": 0, "start_line": 96 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Pulse.Lib.HigherArray.array elt -> Pulse.Lib.HigherArray.ptr elt

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.array", "Pulse.Lib.HigherArray.__proj__Mkarray__item__p", "Pulse.Lib.HigherArray.ptr" ]

[]

false

true

false

let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) =

a.p

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.sel_upd2

val sel_upd2 (#b: _) (vb: buffer b) (i: nat{i < length vb}) (j: nat{j < length vb /\ i <> j}) (x: b) (h: HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb j == sel h vb j)

let sel_upd2 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (j:nat{j < length vb /\ i<>j}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb j == sel h vb j) = let open FStar.Mul in let v = get_view vb in view_indexing vb i; view_indexing vb j; let h' = upd h vb i x in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = Down.as_seq h' (as_down_buffer vb) in let min = if i < j then i else j in let max = if i < j then j else i in let n = View?.n v in lt_leq_mul min max n; let min0, max0 = Seq.slice s0 (min * n) ((min * n) + n), Seq.slice s0 (max * n) ((max * n) + n) in let _, s_j, _ = split_at_i vb j h in let min1, max1 = Seq.slice s1 (min * n) ((min * n) + n), Seq.slice s1 (max * n) ((max * n) + n) in let _, s_j', _ = split_at_i vb j h' in let prefix, s_i, suffix = split_at_i vb i h in Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix)); if i < j then begin assert (Seq.equal max0 s_j); assert (Seq.equal max1 s_j'); assert (Seq.equal s_j s_j') end else begin assert (Seq.equal min0 s_j); assert (Seq.equal min1 s_j'); assert (Seq.equal s_j s_j') end

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 7, "end_line": 150, "start_col": 0, "start_line": 111 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = () //#reset-options "--max_fuel 0 --max_ifuel 1" let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n) let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t){ let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : GTot b = let v = get_view vb in let _, es, _ = split_at_i vb i h in View?.get v es let upd' (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : GTot (h':HS.mem{sel h' vb i == x}) = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in let h' = Down.upd_seq h (as_down_buffer vb) s1 in Down.upd_seq_spec h (as_down_buffer vb) s1; assert (Down.as_seq h' (as_down_buffer vb) == s1); let n = View?.n v in assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n))); assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x); h' let upd #b h vb i x : GTot HS.mem = upd' #b h vb i x let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb i == x) = () let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat) : Lemma (FStar.Mul.(min * n + n <= max * n)) = let open FStar.Mul in assert ((min * n) + n = (min + 1) * n); assert ((min * n) + n <= max * n)

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

vb: LowStar.BufferView.Up.buffer b -> i: Prims.nat{i < LowStar.BufferView.Up.length vb} -> j: Prims.nat{j < LowStar.BufferView.Up.length vb /\ i <> j} -> x: b -> h: FStar.Monotonic.HyperStack.mem{LowStar.BufferView.Up.live h vb} -> FStar.Pervasives.Lemma (ensures LowStar.BufferView.Up.sel (LowStar.BufferView.Up.upd h vb i x) vb j == LowStar.BufferView.Up.sel h vb j)

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "LowStar.BufferView.Up.buffer", "Prims.nat", "Prims.b2t", "Prims.op_LessThan", "LowStar.BufferView.Up.length", "Prims.l_and", "Prims.op_disEquality", "FStar.Monotonic.HyperStack.mem", "LowStar.BufferView.Up.live", "FStar.Seq.Base.seq", "LowStar.BufferView.Up.buffer_src", "FStar.Seq.Properties.lseq", "LowStar.BufferView.Up.__proj__View__item__n", "LowStar.BufferView.Up.get_view", "Prims._assert", "FStar.Seq.Base.equal", "Prims.unit", "Prims.bool", "LowStar.BufferView.Down.upd_seq_spec", "LowStar.BufferView.Up.as_down_buffer", "FStar.Seq.Base.append", "LowStar.BufferView.Up.__proj__View__item__put", "FStar.Pervasives.Native.tuple3", "Prims.eq2", "LowStar.BufferView.Down.as_seq", "LowStar.BufferView.Up.split_at_i", "FStar.Pervasives.Native.tuple2", "FStar.Pervasives.Native.Mktuple2", "FStar.Seq.Base.slice", "FStar.Mul.op_Star", "Prims.op_Addition", "LowStar.BufferView.Up.lt_leq_mul", "Prims.pos", "Prims.int", "Prims.op_GreaterThanOrEqual", "LowStar.BufferView.Down.length", "LowStar.BufferView.Up.upd", "LowStar.BufferView.Up.view_indexing", "LowStar.BufferView.Up.view", "Prims.l_True", "Prims.squash", "LowStar.BufferView.Up.sel", "Prims.Nil", "FStar.Pervasives.pattern" ]

[]

false

true

false

let sel_upd2 (#b: _) (vb: buffer b) (i: nat{i < length vb}) (j: nat{j < length vb /\ i <> j}) (x: b) (h: HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb j == sel h vb j) =

let open FStar.Mul in let v = get_view vb in view_indexing vb i; view_indexing vb j; let h' = upd h vb i x in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = Down.as_seq h' (as_down_buffer vb) in let min = if i < j then i else j in let max = if i < j then j else i in let n = View?.n v in lt_leq_mul min max n; let min0, max0 = Seq.slice s0 (min * n) ((min * n) + n), Seq.slice s0 (max * n) ((max * n) + n) in let _, s_j, _ = split_at_i vb j h in let min1, max1 = Seq.slice s1 (min * n) ((min * n) + n), Seq.slice s1 (max * n) ((max * n) + n) in let _, s_j', _ = split_at_i vb j h' in let prefix, s_i, suffix = split_at_i vb i h in Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` ((View?.put v x) `Seq.append` suffix)); if i < j then (assert (Seq.equal max0 s_j); assert (Seq.equal max1 s_j'); assert (Seq.equal s_j s_j')) else (assert (Seq.equal min0 s_j); assert (Seq.equal min1 s_j'); assert (Seq.equal s_j s_j'))

false

LowStar.BufferView.Up.fst

LowStar.BufferView.Up.as_seq_sel

val as_seq_sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : Lemma (sel h vb i == Seq.index (as_seq h vb) i)

let as_seq_sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : Lemma (ensures (sel h vb i == Seq.index (as_seq h vb) i)) = let rec as_seq'_as_seq' (j:nat) (i:nat{j + i < length vb}) : Lemma (ensures (Seq.index (as_seq' h vb j) i == Seq.index (as_seq' h vb (j + i)) 0)) (decreases i) = if i = 0 then () else as_seq'_as_seq' (j + 1) (i - 1) in as_seq'_as_seq' 0 i

{ "file_name": "ulib/LowStar.BufferView.Up.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 25, "end_line": 201, "start_col": 0, "start_line": 192 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module LowStar.BufferView.Up module Down = LowStar.BufferView.Down noeq type buffer (dest:Type0) : Type u#1 = | Buffer: src:Type0 -> down_buf:Down.buffer src -> v:view src dest{Down.length down_buf % View?.n v == 0} -> buffer dest let mk_buffer #src #dest down_buf v = Buffer src down_buf v let buffer_src #b bv = Buffer?.src bv let as_down_buffer #b bv = Buffer?.down_buf bv let get_view #b v = Buffer?.v v let as_buffer_mk_buffer #_ #_ _ _ = () let length #b vb = Down.length (as_down_buffer vb) / View?.n (get_view vb) let length_eq #_ _ = () //#reset-options "--max_fuel 0 --max_ifuel 1" let view_indexing #b vb i = let n = View?.n (get_view vb) in length_eq vb; FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n; let open FStar.Mul in assert ((length vb + (-i)) * n = length vb * n + (-i) * n); assert (length vb > i); assert (length vb + (-i) > 0); assert (n <= (length vb + (-i)) * n) let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem) : GTot (frags: (let src_t = buffer_src vb in Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t){ let prefix, es, suffix = frags in Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = let open FStar.Mul in let s0 = Down.as_seq h (as_down_buffer vb) in let v = get_view vb in let n = View?.n v in let start = i * n in view_indexing vb i; length_eq vb; let prefix, suffix = Seq.split s0 start in Seq.lemma_split s0 start; let es, tail = Seq.split suffix n in Seq.lemma_split suffix n; prefix, es, tail let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) : GTot b = let v = get_view vb in let _, es, _ = split_at_i vb i h in View?.get v es let upd' (#b: _) (h:HS.mem) (vb:buffer b{live h vb}) (i:nat{i < length vb}) (x:b) : GTot (h':HS.mem{sel h' vb i == x}) = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in let h' = Down.upd_seq h (as_down_buffer vb) s1 in Down.upd_seq_spec h (as_down_buffer vb) s1; assert (Down.as_seq h' (as_down_buffer vb) == s1); let n = View?.n v in assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n))); assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x); h' let upd #b h vb i x : GTot HS.mem = upd' #b h vb i x let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb i == x) = () let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat) : Lemma (FStar.Mul.(min * n + n <= max * n)) = let open FStar.Mul in assert ((min * n) + n = (min + 1) * n); assert ((min * n) + n <= max * n) #set-options "--z3rlimit 20" let sel_upd2 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (j:nat{j < length vb /\ i<>j}) (x:b) (h:HS.mem{live h vb}) : Lemma (sel (upd h vb i x) vb j == sel h vb j) = let open FStar.Mul in let v = get_view vb in view_indexing vb i; view_indexing vb j; let h' = upd h vb i x in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = Down.as_seq h' (as_down_buffer vb) in let min = if i < j then i else j in let max = if i < j then j else i in let n = View?.n v in lt_leq_mul min max n; let min0, max0 = Seq.slice s0 (min * n) ((min * n) + n), Seq.slice s0 (max * n) ((max * n) + n) in let _, s_j, _ = split_at_i vb j h in let min1, max1 = Seq.slice s1 (min * n) ((min * n) + n), Seq.slice s1 (max * n) ((max * n) + n) in let _, s_j', _ = split_at_i vb j h' in let prefix, s_i, suffix = split_at_i vb i h in Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix)); if i < j then begin assert (Seq.equal max0 s_j); assert (Seq.equal max1 s_j'); assert (Seq.equal s_j s_j') end else begin assert (Seq.equal min0 s_j); assert (Seq.equal min1 s_j'); assert (Seq.equal s_j s_j') end let sel_upd #b vb i j x h = if i=j then sel_upd1 vb i x h else sel_upd2 vb i j x h let lemma_upd_with_sel #b vb i h = let v = get_view vb in let prefix, es, suffix = split_at_i vb i h in let s0 = Down.as_seq h (as_down_buffer vb) in let s1 = prefix `Seq.append` (View?.put v (View?.get v es) `Seq.append` suffix) in assert (Seq.equal s0 s1); Down.upd_seq_spec h (as_down_buffer vb) s0 let upd_modifies #b h vb i x = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in Down.upd_seq_spec h (as_down_buffer vb) s1 let upd_equal_domains #b h vb i x = let open FStar.Mul in let v = get_view vb in let prefix, _, suffix = split_at_i vb i h in let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in upd_modifies h vb i x; Down.upd_seq_spec h (as_down_buffer vb) s1 let rec as_seq' (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i <= length vb}) : GTot (Seq.lseq b (length vb - i)) (decreases (length vb - i)) = let v = get_view vb in if i = length vb then Seq.empty else let _ = view_indexing vb i in let _, s_i, suffix = split_at_i vb i h in View?.get v s_i `Seq.cons` as_seq' h vb (i + 1) let as_seq (#b: _) (h:HS.mem) (vb:buffer b) = as_seq' h vb 0

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "LowStar.BufferView.Down.fsti.checked", "FStar.Seq.fst.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked" ], "interface_file": true, "source_file": "LowStar.BufferView.Up.fst" }

[ { "abbrev": true, "full_module": "LowStar.BufferView.Down", "short_module": "Down" }, { "abbrev": true, "full_module": "LowStar.Monotonic.Buffer", "short_module": "B" }, { "abbrev": true, "full_module": "FStar.HyperStack", "short_module": "HS" }, { "abbrev": false, "full_module": "LowStar.Monotonic.Buffer", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "LowStar.BufferView", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 1, "max_ifuel": 1, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 20, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

h: FStar.Monotonic.HyperStack.mem -> vb: LowStar.BufferView.Up.buffer b -> i: Prims.nat{i < LowStar.BufferView.Up.length vb} -> FStar.Pervasives.Lemma (ensures LowStar.BufferView.Up.sel h vb i == FStar.Seq.Base.index (LowStar.BufferView.Up.as_seq h vb) i )

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "FStar.Monotonic.HyperStack.mem", "LowStar.BufferView.Up.buffer", "Prims.nat", "Prims.b2t", "Prims.op_LessThan", "LowStar.BufferView.Up.length", "Prims.op_Addition", "Prims.unit", "Prims.l_True", "Prims.squash", "Prims.eq2", "FStar.Seq.Base.index", "LowStar.BufferView.Up.as_seq'", "Prims.Nil", "FStar.Pervasives.pattern", "Prims.op_Equality", "Prims.int", "Prims.bool", "Prims.op_Subtraction", "LowStar.BufferView.Up.sel", "LowStar.BufferView.Up.as_seq" ]

[]

false

true

false

let as_seq_sel (#b: _) (h: HS.mem) (vb: buffer b) (i: nat{i < length vb}) : Lemma (ensures (sel h vb i == Seq.index (as_seq h vb) i)) =

let rec as_seq'_as_seq' (j: nat) (i: nat{j + i < length vb}) : Lemma (ensures (Seq.index (as_seq' h vb j) i == Seq.index (as_seq' h vb (j + i)) 0)) (decreases i) = if i = 0 then () else as_seq'_as_seq' (j + 1) (i - 1) in as_seq'_as_seq' 0 i

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.valid_perm

val valid_perm (len offset slice_len: nat) (p: perm) : prop

let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one))

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 66, "end_line": 117, "start_col": 0, "start_line": 110 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = ()

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

len: Prims.nat -> offset: Prims.nat -> slice_len: Prims.nat -> p: PulseCore.FractionalPermission.perm -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Prims.nat", "PulseCore.FractionalPermission.perm", "Prims.l_imp", "Prims.l_and", "Prims.b2t", "Prims.op_LessThanOrEqual", "Prims.op_Addition", "Prims.op_GreaterThan", "FStar.Real.op_Less_Equals_Dot", "PulseCore.FractionalPermission.__proj__MkPerm__item__v", "FStar.Real.one", "Prims.prop" ]

[]

false

true

let valid_perm (len offset slice_len: nat) (p: perm) : prop =

let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one))

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.is_full_array

val is_full_array (#a:Type) (x:array a) : prop

let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a))

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 40, "end_line": 103, "start_col": 0, "start_line": 102 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

x: Pulse.Lib.HigherArray.array a -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.array", "Prims.eq2", "Prims.nat", "Pulse.Lib.HigherArray.length", "Pulse.Lib.HigherArray.base_len", "Pulse.Lib.HigherArray.base", "Pulse.Lib.HigherArray.ptr_of", "Prims.prop" ]

[]

false

true

let is_full_array (#elt: Type) (a: array elt) : Tot prop =

length a == base_len (base (ptr_of a))

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.pts_to_len

val pts_to_len (#t:Type) (a:array t) (#p:perm) (#x:Seq.seq t) : stt_ghost unit (pts_to a #p x) (fun _ → pts_to a #p x ** pure (length a == Seq.length x))

let pts_to_len = pts_to_len'

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 28, "end_line": 176, "start_col": 0, "start_line": 176 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one)) let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a ) let mk_array (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) : array elt = { p = { base_len; base; offset} ; length = Ghost.hide (SZ.v base_len - offset) } ```pulse ghost fn fold_pts_to (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) (#p: perm { p `lesser_equal_perm` full_perm}) (s: Seq.seq elt { Seq.length s == SZ.v base_len - offset}) requires pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p) ensures pts_to (mk_array base_len base offset) #p s { let a = (mk_array base_len base offset); rewrite (pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p)) as pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p); fold (pts_to a #p s); rewrite (pts_to a #p s) as (pts_to (mk_array base_len base offset) #p s); } ``` ```pulse ghost fn pts_to_len' (#elt: Type u#1) (a:array elt) (#p:perm) (#x:Seq.seq elt) requires pts_to a #p x ensures pts_to a #p x ** pure (length a == Seq.length x) { unfold pts_to a #p x; fold pts_to a #p x; }

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Pulse.Lib.HigherArray.array t -> Pulse.Lib.Core.stt_ghost Prims.unit (Pulse.Lib.HigherArray.pts_to a x) (fun _ -> Pulse.Lib.HigherArray.pts_to a x ** Pulse.Lib.Core.pure (Pulse.Lib.HigherArray.length a == FStar.Seq.Base.length x))

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.pts_to_len'" ]

[]

false

let pts_to_len =

pts_to_len'

false

Hacl.Spec.K256.Field52.Lemmas1.fst

Hacl.Spec.K256.Field52.Lemmas1.load_felem5_lemma

val load_felem5_lemma: s:felem4 -> Lemma (let f = load_felem5 s in felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s)

let load_felem5_lemma s = assert_norm (v mask52 = pow2 52 - 1); assert_norm (0xffffffffff = pow2 40 - 1); assert_norm (0xfffffff = pow2 28 - 1); assert_norm (0xffff = pow2 16 - 1); let (s0,s1,s2,s3) = s in let f0 = s0 &. mask52 in // s0 % pow2 52 mod_mask_lemma s0 52ul; assert (v (mod_mask #U64 #SEC 52ul) == v mask52); assert (v f0 = v s0 % pow2 52); let f11 = s0 >>. 52ul in let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12 Math.Lemmas.lemma_div_lt (v s0) 64 52; //assert (v f11 < pow2 12); mod_mask_lemma s1 40ul; assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64; //assert (v f12 == v s1 % pow2 40 * pow2 12); Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12); logor_disjoint f11 f12 12; assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12); let f21 = s1 >>. 40ul in let f22 = (s2 &. u64 0xfffffff) <<. 24ul in let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24 Math.Lemmas.lemma_div_lt (v s1) 64 40; //assert (v f21 < pow2 24); mod_mask_lemma s2 28ul; assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64; //assert (v f22 == v s2 % pow2 28 * pow2 24); Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24); logor_disjoint f21 f22 24; assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24); let f31 = s2 >>. 28ul in let f32 = (s3 &. u64 0xffff) <<. 36ul in let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36 Math.Lemmas.lemma_div_lt (v s2) 64 28; //assert (v f31 < pow2 36); mod_mask_lemma s3 16ul; assert (v (mod_mask #U64 #SEC 16ul) == 0xffff); ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64; //assert (v f32 == v s3 % pow2 16 * pow2 36); Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36); logor_disjoint f31 f32 36; assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36); let f4 = s3 >>. 16ul in // s3 / pow2 16 assert (v f4 = v s3 / pow2 16); let f = (f0,f1,f2,f3,f4) in load_felem5_lemma_as_nat s f; load_felem5_lemma_fits s f

{ "file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst", "git_rev": "eb1badfa34c70b0bbe0fe24fe0f49fb1295c7872", "git_url": "https://github.com/project-everest/hacl-star.git", "project_name": "hacl-star" }

{ "end_col": 28, "end_line": 137, "start_col": 0, "start_line": 81 }

module Hacl.Spec.K256.Field52.Lemmas1 open FStar.Mul open Lib.IntTypes module S = Spec.K256 include Hacl.Spec.K256.Field52.Definitions include Hacl.Spec.K256.Field52 module ML = Hacl.Spec.K256.MathLemmas #set-options "--z3rlimit 100 --fuel 0 --ifuel 0" /// Load and store functions val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 == v s3 / pow2 16)) (ensures as_nat5 f == as_nat4 s) let load_felem5_lemma_as_nat s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in Math.Lemmas.euclidean_division_definition (v s0) (pow2 52); assert_norm (pow2 12 * pow2 52 = pow2 64); assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64); Math.Lemmas.euclidean_division_definition (v s1) (pow2 40); assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128); assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128); Math.Lemmas.euclidean_division_definition (v s2) (pow2 25); assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192); assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192); Math.Lemmas.euclidean_division_definition (v s3) (pow2 16); assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192) val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma (requires (let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in v f0 == v s0 % pow2 52 /\ v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\ v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\ v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\ v f4 = v s3 / pow2 16)) (ensures felem_fits5 f (1,1,1,1,1)) let load_felem5_lemma_fits s f = let (s0,s1,s2,s3) = s in let (f0,f1,f2,f3,f4) = f in assert (v f0 < pow2 52); Math.Lemmas.lemma_div_lt (v s0) 64 52; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12; assert (v f1 < pow2 52); Math.Lemmas.lemma_div_lt (v s1) 64 40; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24; assert (v f2 < pow2 52); Math.Lemmas.lemma_div_lt (v s2) 64 28; ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36; assert (v f3 < pow2 52); assert (v f4 = v s3 / pow2 16); Math.Lemmas.lemma_div_lt (v s3) 64 16; assert (v f4 < pow2 48) val load_felem5_lemma: s:felem4 -> Lemma (let f = load_felem5 s in felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s)

{ "checked_file": "/", "dependencies": [ "Spec.K256.fst.checked", "prims.fst.checked", "Lib.IntTypes.fsti.checked", "Hacl.Spec.K256.MathLemmas.fst.checked", "Hacl.Spec.K256.Field52.Definitions.fst.checked", "Hacl.Spec.K256.Field52.fst.checked", "FStar.UInt32.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Mul.fst.checked", "FStar.Math.Lemmas.fst.checked", "FStar.Calc.fsti.checked" ], "interface_file": false, "source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst" }

[ { "abbrev": true, "full_module": "Hacl.Spec.K256.MathLemmas", "short_module": "ML" }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52.Definitions", "short_module": null }, { "abbrev": true, "full_module": "Spec.K256", "short_module": "S" }, { "abbrev": false, "full_module": "Lib.IntTypes", "short_module": null }, { "abbrev": false, "full_module": "FStar.Mul", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "Hacl.Spec.K256.Field52", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 0, "initial_ifuel": 0, "max_fuel": 0, "max_ifuel": 0, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": false, "z3cliopt": [], "z3refresh": false, "z3rlimit": 100, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

s: Hacl.Spec.K256.Field52.Definitions.felem4 -> FStar.Pervasives.Lemma (ensures (let f = Hacl.Spec.K256.Field52.load_felem5 s in Hacl.Spec.K256.Field52.Definitions.felem_fits5 f (1, 1, 1, 1, 1) /\ Hacl.Spec.K256.Field52.Definitions.as_nat5 f == Hacl.Spec.K256.Field52.Definitions.as_nat4 s ))

FStar.Pervasives.Lemma

[ "lemma" ]

[]

[ "Hacl.Spec.K256.Field52.Definitions.felem4", "Lib.IntTypes.uint64", "Hacl.Spec.K256.Field52.Lemmas1.load_felem5_lemma_fits", "Prims.unit", "Hacl.Spec.K256.Field52.Lemmas1.load_felem5_lemma_as_nat", "FStar.Pervasives.Native.tuple5", "Lib.IntTypes.int_t", "Lib.IntTypes.U64", "Lib.IntTypes.SEC", "FStar.Pervasives.Native.Mktuple5", "Prims._assert", "Prims.b2t", "Prims.op_Equality", "Prims.int", "Lib.IntTypes.v", "Prims.op_Division", "Prims.pow2", "Lib.IntTypes.op_Greater_Greater_Dot", "FStar.UInt32.__uint_to_t", "Prims.op_Addition", "FStar.Mul.op_Star", "Prims.op_Modulus", "Lib.IntTypes.logor_disjoint", "FStar.Math.Lemmas.cancel_mul_mod", "Hacl.Spec.K256.MathLemmas.lemma_a_mod_b_mul_c_mod_d", "Prims.eq2", "Lib.IntTypes.mod_mask", "Lib.IntTypes.mod_mask_lemma", "FStar.Math.Lemmas.lemma_div_lt", "Lib.IntTypes.op_Bar_Dot", "Lib.IntTypes.op_Less_Less_Dot", "Lib.IntTypes.op_Amp_Dot", "Lib.IntTypes.u64", "Lib.IntTypes.range_t", "Hacl.Spec.K256.Field52.Definitions.mask52", "FStar.Pervasives.assert_norm", "Prims.op_Subtraction" ]

[]

false

true

false

let load_felem5_lemma s =

assert_norm (v mask52 = pow2 52 - 1); assert_norm (0xffffffffff = pow2 40 - 1); assert_norm (0xfffffff = pow2 28 - 1); assert_norm (0xffff = pow2 16 - 1); let s0, s1, s2, s3 = s in let f0 = s0 &. mask52 in mod_mask_lemma s0 52ul; assert (v (mod_mask #U64 #SEC 52ul) == v mask52); assert (v f0 = v s0 % pow2 52); let f11 = s0 >>. 52ul in let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in let f1 = f11 |. f12 in Math.Lemmas.lemma_div_lt (v s0) 64 52; mod_mask_lemma s1 40ul; assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64; Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12); logor_disjoint f11 f12 12; assert (v f1 = v s0 / pow2 52 + (v s1 % pow2 40) * pow2 12); let f21 = s1 >>. 40ul in let f22 = (s2 &. u64 0xfffffff) <<. 24ul in let f2 = f21 |. f22 in Math.Lemmas.lemma_div_lt (v s1) 64 40; mod_mask_lemma s2 28ul; assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff); ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64; Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24); logor_disjoint f21 f22 24; assert (v f2 = v s1 / pow2 40 + (v s2 % pow2 28) * pow2 24); let f31 = s2 >>. 28ul in let f32 = (s3 &. u64 0xffff) <<. 36ul in let f3 = f31 |. f32 in Math.Lemmas.lemma_div_lt (v s2) 64 28; mod_mask_lemma s3 16ul; assert (v (mod_mask #U64 #SEC 16ul) == 0xffff); ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64; Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36); logor_disjoint f31 f32 36; assert (v f3 = v s2 / pow2 28 + (v s3 % pow2 16) * pow2 36); let f4 = s3 >>. 16ul in assert (v f4 = v s3 / pow2 16); let f = (f0, f1, f2, f3, f4) in load_felem5_lemma_as_nat s f; load_felem5_lemma_fits s f

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.pts_to

val pts_to (#a:Type) (x:array a) (#[exact (`full_perm)] p:perm) (s: Seq.seq a) : vprop

let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a )

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 3, "end_line": 125, "start_col": 0, "start_line": 120 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one))

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

x: Pulse.Lib.HigherArray.array a -> s: FStar.Seq.Base.seq a -> Pulse.Lib.Core.vprop

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.array", "PulseCore.FractionalPermission.perm", "FStar.Seq.Base.seq", "Pulse.Lib.Core.op_Star_Star", "Pulse.Lib.Core.pcm_pts_to", "Pulse.Lib.PCM.Array.carrier", "FStar.Ghost.hide", "Prims.nat", "FStar.SizeT.v", "FStar.Ghost.reveal", "FStar.SizeT.t", "Pulse.Lib.HigherArray.__proj__Mkptr__item__base_len", "Pulse.Lib.HigherArray.ptr_of", "Pulse.Lib.PCM.Array.pcm", "Pulse.Lib.HigherArray.__proj__Mkptr__item__base", "Pulse.Lib.PCM.Array.mk_carrier", "Pulse.Lib.HigherArray.__proj__Mkptr__item__offset", "Pulse.Lib.Core.pure", "Prims.l_and", "Pulse.Lib.HigherArray.valid_perm", "FStar.Seq.Base.length", "Prims.eq2", "Pulse.Lib.HigherArray.length", "Pulse.Lib.Core.vprop" ]

[]

false

true

false

let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop =

pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure (valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a)

false

Steel.ST.GhostHigherReference.fst

Steel.ST.GhostHigherReference.gather

val gather (#a:Type) (#uses:_) (#p0 p1:perm) (#v0 #v1:erased a) (r:ref a) : STGhost unit uses (pts_to r p0 v0 `star` pts_to r p1 v1) (fun _ -> pts_to r (sum_perm p0 p1) v0) (requires True) (ensures fun _ -> v0 == v1)

let gather p1 r = RST.gather p1 r.reveal

{ "file_name": "lib/steel/Steel.ST.GhostHigherReference.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 24, "end_line": 74, "start_col": 0, "start_line": 72 }

module Steel.ST.GhostHigherReference // needed because I need to know that `Steel.ST.HigherReference.ref a` // can be turned into `Steel.HigherReference.ref a` friend Steel.ST.HigherReference module RST = Steel.ST.HigherReference module R = Steel.HigherReference module STC = Steel.ST.Coercions // FIXME: WHY WHY WHY in `Ghost.reveal (ref a)` is `a` not strictly positive? [@@erasable] noeq type ref' ([@@@strictly_positive] a : Type u#1) : Type0 = | Hide: (reveal: R.ref a) -> ref' a let ref a = ref' a let pts_to r p v = RST.pts_to r.reveal p v let reveal_ref r = r.reveal let hide_ref r = Hide r let hide_reveal_ref r = () let reveal_pts_to r p x = equiv_refl (Steel.ST.HigherReference.pts_to (reveal_ref r) p x) let pts_to_injective_eq #_ #_ #p0 #p1 #v0 #v1 r = rewrite (pts_to r p0 v0) (RST.pts_to r.reveal p0 v0); rewrite (pts_to r p1 v1) (RST.pts_to r.reveal p1 v1); RST.pts_to_injective_eq #_ #_ #_ #_ #v0 #v1 r.reveal; rewrite (RST.pts_to r.reveal p0 v0) (pts_to r p0 v0); rewrite (RST.pts_to r.reveal p1 v0) (pts_to r p1 v0) let alloc #_ #a x = let gr = STC.coerce_ghost (fun _ -> R.ghost_alloc x) in let r = Hide (Ghost.reveal (coerce_eq (R.reveal_ghost_ref a) gr)) in weaken (R.ghost_pts_to gr full_perm x) (pts_to r full_perm x) (fun _ -> R.reveal_ghost_pts_to_sl gr full_perm x ); r let write #_ #a #v r x = let gr : R.ghost_ref a = coerce_eq (R.reveal_ghost_ref a) (Ghost.hide r.reveal) in weaken (pts_to r full_perm v) (R.ghost_pts_to gr full_perm v) (fun _ -> R.reveal_ghost_pts_to_sl gr full_perm v ); STC.coerce_ghost (fun _ -> R.ghost_write gr x); weaken (R.ghost_pts_to gr full_perm x) (pts_to r full_perm x) (fun _ -> R.reveal_ghost_pts_to_sl gr full_perm x ) let free #_ #a #v r = let gr : R.ghost_ref a = coerce_eq (R.reveal_ghost_ref a) (Ghost.hide r.reveal) in weaken (pts_to r full_perm v) (R.ghost_pts_to gr full_perm v) (fun _ -> R.reveal_ghost_pts_to_sl gr full_perm v ); STC.coerce_ghost (fun _ -> R.ghost_free gr) let share r = RST.share r.reveal

{ "checked_file": "/", "dependencies": [ "Steel.ST.HigherReference.fst.checked", "Steel.ST.Coercions.fsti.checked", "Steel.HigherReference.fsti.checked", "prims.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Steel.ST.GhostHigherReference.fst" }

[ { "abbrev": true, "full_module": "Steel.ST.Coercions", "short_module": "STC" }, { "abbrev": true, "full_module": "Steel.HigherReference", "short_module": "R" }, { "abbrev": true, "full_module": "Steel.ST.HigherReference", "short_module": "RST" }, { "abbrev": false, "full_module": "Steel.ST.Util", "short_module": null }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "Steel.ST", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

p1: Steel.FractionalPermission.perm -> r: Steel.ST.GhostHigherReference.ref a -> Steel.ST.Effect.Ghost.STGhost Prims.unit

Steel.ST.Effect.Ghost.STGhost

[]

[ "Steel.Memory.inames", "Steel.FractionalPermission.perm", "FStar.Ghost.erased", "Steel.ST.GhostHigherReference.ref", "Steel.ST.HigherReference.gather", "Steel.ST.GhostHigherReference.__proj__Hide__item__reveal", "Prims.unit" ]

[]

false

true

false

let gather p1 r =

RST.gather p1 r.reveal

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.share

val share (#a:Type) (arr:array a) (#s:Ghost.erased (Seq.seq a)) (#p:perm) : stt_ghost unit (requires pts_to arr #p s) (ensures fun _ -> pts_to arr #(half_perm p) s ** pts_to arr #(half_perm p) s)

let share = share'

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 18, "end_line": 353, "start_col": 0, "start_line": 353 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one)) let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a ) let mk_array (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) : array elt = { p = { base_len; base; offset} ; length = Ghost.hide (SZ.v base_len - offset) } ```pulse ghost fn fold_pts_to (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) (#p: perm { p `lesser_equal_perm` full_perm}) (s: Seq.seq elt { Seq.length s == SZ.v base_len - offset}) requires pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p) ensures pts_to (mk_array base_len base offset) #p s { let a = (mk_array base_len base offset); rewrite (pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p)) as pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p); fold (pts_to a #p s); rewrite (pts_to a #p s) as (pts_to (mk_array base_len base offset) #p s); } ``` ```pulse ghost fn pts_to_len' (#elt: Type u#1) (a:array elt) (#p:perm) (#x:Seq.seq elt) requires pts_to a #p x ensures pts_to a #p x ** pure (length a == Seq.length x) { unfold pts_to a #p x; fold pts_to a #p x; } ``` let pts_to_len = pts_to_len' ```pulse fn alloc' (#elt: Type u#1) (x: elt) (n: SZ.t) requires emp returns a:array elt ensures pts_to a (Seq.create (SZ.v n) x) ** pure (length a == SZ.v n /\ is_full_array a) { let v = (mk_carrier (SZ.v n) 0 (Seq.create (SZ.v n) x) full_perm); FStar.PCM.compatible_refl (PA.pcm elt (SZ.v n)) v; let b = Pulse.Lib.Core.alloc #_ #(PA.pcm elt (SZ.v n)) v; pts_to_not_null b _; fold_pts_to n b 0 #full_perm (Seq.create (SZ.v n) x); mk_array n b 0; } ``` let alloc = alloc' ```pulse fn read (#t: Type) (a: array t) (i: SZ.t) (#p: perm) (#s: Ghost.erased (Seq.seq t){SZ.v i < Seq.length s}) requires pts_to a #p s returns res:t ensures pts_to a #p s ** pure (res == Seq.index s (SZ.v i)) { unfold pts_to a #p s; with w. assert (pcm_pts_to (ptr_of a).base w); let v = Pulse.Lib.Core.read (ptr_of a).base w (fun _ -> w); fold (pts_to a #p s); fst (Some?.v (FStar.Map.sel v ((ptr_of a).offset + SZ.v i))); } ``` let op_Array_Access = read let mk_carrier_upd (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (i: nat) (v: elt) (_: squash ( offset + Seq.length s <= len /\ i < Seq.length s )) : Lemma (ensures ( let o = mk_carrier len offset s full_perm in let o' = mk_carrier len offset (Seq.upd s i v) full_perm in o' `Map.equal` Map.upd o (offset + i) (Some (v, full_perm)) )) = () ```pulse fn write (#t: Type) (a: array t) (i: SZ.t) (v: t) (#s: Ghost.erased (Seq.seq t) {SZ.v i < Seq.length s}) requires pts_to a s ensures pts_to a (Seq.upd s (SZ.v i) v) { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); mk_carrier_upd (SZ.v (ptr_of a).base_len) ((ptr_of a).offset) s (SZ.v i) v (); Pulse.Lib.Core.write (ptr_of a).base w _ (PM.lift_frame_preserving_upd _ _ (Frac.mk_frame_preserving_upd (Seq.index s (SZ.v i)) v ) _ ((ptr_of a).offset + SZ.v i)); fold (pts_to a #full_perm (Seq.upd s (SZ.v i) v)); } ``` let op_Array_Assignment = write (* let frame_preserving_upd_one (#elt:Type) (n:erased nat) (s:erased (Seq.seq elt) { Seq.length s == reveal n }) : FStar.PCM.frame_preserving_upd (PA.pcm elt n) (mk_carrier n 0 s full_perm) (PA.one #elt #n) = fun _ -> admit(); (PA.one #elt #n) *) ```pulse fn free' (#elt: Type) (a: array elt) (#s: Ghost.erased (Seq.seq elt)) requires pts_to a s ** pure (is_full_array a) ensures emp { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); // Pulse.Lib.Core.write (ptr_of a).base w (PA.one #elt #(length a)) (frame_preserving_upd_one #elt (length a) s); drop_ (pcm_pts_to (ptr_of a).base _) } ``` let free = free' let valid_sum_perm (len: nat) (offset: nat) (slice_len: nat) (p1 p2: perm) : Tot prop = let open FStar.Real in valid_perm len offset slice_len (sum_perm p1 p2) ```pulse ghost fn mk_carrier_share (#elt: Type u#1) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) (_:squash (valid_sum_perm len offset (Seq.length s) p1 p2)) requires emp ensures ( // let c1 = (mk_carrier len offset s p1) in pure ( composable (mk_carrier len offset s p1) (mk_carrier len offset s p2) /\ mk_carrier len offset s (p1 `sum_perm` p2) `Map.equal` ((mk_carrier len offset s p1) `compose` (mk_carrier len offset s p2)) ) ) { () } ``` ```pulse ghost fn share' (#elt:Type) (arr:array elt) (#s:Ghost.erased (Seq.seq elt)) (#p:perm) requires pts_to arr #p s ensures pts_to arr #(half_perm p) s ** pts_to arr #(half_perm p) s { unfold pts_to arr #p s; with w. assert (pcm_pts_to (ptr_of arr).base w); mk_carrier_share (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p) (half_perm p) (); Pulse.Lib.Core.share (ptr_of arr).base (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)) (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)); fold pts_to arr #(half_perm p) s; fold pts_to arr #(half_perm p) s; }

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

arr: Pulse.Lib.HigherArray.array a -> Pulse.Lib.Core.stt_ghost Prims.unit (Pulse.Lib.HigherArray.pts_to arr (FStar.Ghost.reveal s)) (fun _ -> Pulse.Lib.HigherArray.pts_to arr (FStar.Ghost.reveal s) ** Pulse.Lib.HigherArray.pts_to arr (FStar.Ghost.reveal s))

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.share'" ]

[]

false

let share =

share'

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.alloc

val alloc (#elt: Type) (x: elt) (n: SZ.t) : stt (array elt) (requires emp) (ensures fun a -> pts_to a (Seq.create (SZ.v n) x) ** pure (length a == SZ.v n /\ is_full_array a))

let alloc = alloc'

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 18, "end_line": 197, "start_col": 0, "start_line": 197 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one)) let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a ) let mk_array (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) : array elt = { p = { base_len; base; offset} ; length = Ghost.hide (SZ.v base_len - offset) } ```pulse ghost fn fold_pts_to (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) (#p: perm { p `lesser_equal_perm` full_perm}) (s: Seq.seq elt { Seq.length s == SZ.v base_len - offset}) requires pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p) ensures pts_to (mk_array base_len base offset) #p s { let a = (mk_array base_len base offset); rewrite (pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p)) as pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p); fold (pts_to a #p s); rewrite (pts_to a #p s) as (pts_to (mk_array base_len base offset) #p s); } ``` ```pulse ghost fn pts_to_len' (#elt: Type u#1) (a:array elt) (#p:perm) (#x:Seq.seq elt) requires pts_to a #p x ensures pts_to a #p x ** pure (length a == Seq.length x) { unfold pts_to a #p x; fold pts_to a #p x; } ``` let pts_to_len = pts_to_len' ```pulse fn alloc' (#elt: Type u#1) (x: elt) (n: SZ.t) requires emp returns a:array elt ensures pts_to a (Seq.create (SZ.v n) x) ** pure (length a == SZ.v n /\ is_full_array a) { let v = (mk_carrier (SZ.v n) 0 (Seq.create (SZ.v n) x) full_perm); FStar.PCM.compatible_refl (PA.pcm elt (SZ.v n)) v; let b = Pulse.Lib.Core.alloc #_ #(PA.pcm elt (SZ.v n)) v; pts_to_not_null b _; fold_pts_to n b 0 #full_perm (Seq.create (SZ.v n) x); mk_array n b 0; }

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

x: elt -> n: FStar.SizeT.t -> Pulse.Lib.Core.stt (Pulse.Lib.HigherArray.array elt) Pulse.Lib.Core.emp (fun a -> Pulse.Lib.HigherArray.pts_to a (FStar.Seq.Base.create (FStar.SizeT.v n) x) ** Pulse.Lib.Core.pure (Pulse.Lib.HigherArray.length a == FStar.SizeT.v n /\ Pulse.Lib.HigherArray.is_full_array a))

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.alloc'" ]

[]

false

let alloc =

alloc'

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.gather

val gather (#a:Type) (arr:array a) (#s0 #s1:Ghost.erased (Seq.seq a)) (#p0 #p1:perm) : stt_ghost unit (requires pts_to arr #p0 s0 ** pts_to arr #p1 s1) (ensures fun _ -> pts_to arr #(sum_perm p0 p1) s0 ** pure (s0 == s1))

let gather = gather'

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 20, "end_line": 433, "start_col": 0, "start_line": 433 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one)) let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a ) let mk_array (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) : array elt = { p = { base_len; base; offset} ; length = Ghost.hide (SZ.v base_len - offset) } ```pulse ghost fn fold_pts_to (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) (#p: perm { p `lesser_equal_perm` full_perm}) (s: Seq.seq elt { Seq.length s == SZ.v base_len - offset}) requires pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p) ensures pts_to (mk_array base_len base offset) #p s { let a = (mk_array base_len base offset); rewrite (pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p)) as pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p); fold (pts_to a #p s); rewrite (pts_to a #p s) as (pts_to (mk_array base_len base offset) #p s); } ``` ```pulse ghost fn pts_to_len' (#elt: Type u#1) (a:array elt) (#p:perm) (#x:Seq.seq elt) requires pts_to a #p x ensures pts_to a #p x ** pure (length a == Seq.length x) { unfold pts_to a #p x; fold pts_to a #p x; } ``` let pts_to_len = pts_to_len' ```pulse fn alloc' (#elt: Type u#1) (x: elt) (n: SZ.t) requires emp returns a:array elt ensures pts_to a (Seq.create (SZ.v n) x) ** pure (length a == SZ.v n /\ is_full_array a) { let v = (mk_carrier (SZ.v n) 0 (Seq.create (SZ.v n) x) full_perm); FStar.PCM.compatible_refl (PA.pcm elt (SZ.v n)) v; let b = Pulse.Lib.Core.alloc #_ #(PA.pcm elt (SZ.v n)) v; pts_to_not_null b _; fold_pts_to n b 0 #full_perm (Seq.create (SZ.v n) x); mk_array n b 0; } ``` let alloc = alloc' ```pulse fn read (#t: Type) (a: array t) (i: SZ.t) (#p: perm) (#s: Ghost.erased (Seq.seq t){SZ.v i < Seq.length s}) requires pts_to a #p s returns res:t ensures pts_to a #p s ** pure (res == Seq.index s (SZ.v i)) { unfold pts_to a #p s; with w. assert (pcm_pts_to (ptr_of a).base w); let v = Pulse.Lib.Core.read (ptr_of a).base w (fun _ -> w); fold (pts_to a #p s); fst (Some?.v (FStar.Map.sel v ((ptr_of a).offset + SZ.v i))); } ``` let op_Array_Access = read let mk_carrier_upd (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (i: nat) (v: elt) (_: squash ( offset + Seq.length s <= len /\ i < Seq.length s )) : Lemma (ensures ( let o = mk_carrier len offset s full_perm in let o' = mk_carrier len offset (Seq.upd s i v) full_perm in o' `Map.equal` Map.upd o (offset + i) (Some (v, full_perm)) )) = () ```pulse fn write (#t: Type) (a: array t) (i: SZ.t) (v: t) (#s: Ghost.erased (Seq.seq t) {SZ.v i < Seq.length s}) requires pts_to a s ensures pts_to a (Seq.upd s (SZ.v i) v) { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); mk_carrier_upd (SZ.v (ptr_of a).base_len) ((ptr_of a).offset) s (SZ.v i) v (); Pulse.Lib.Core.write (ptr_of a).base w _ (PM.lift_frame_preserving_upd _ _ (Frac.mk_frame_preserving_upd (Seq.index s (SZ.v i)) v ) _ ((ptr_of a).offset + SZ.v i)); fold (pts_to a #full_perm (Seq.upd s (SZ.v i) v)); } ``` let op_Array_Assignment = write (* let frame_preserving_upd_one (#elt:Type) (n:erased nat) (s:erased (Seq.seq elt) { Seq.length s == reveal n }) : FStar.PCM.frame_preserving_upd (PA.pcm elt n) (mk_carrier n 0 s full_perm) (PA.one #elt #n) = fun _ -> admit(); (PA.one #elt #n) *) ```pulse fn free' (#elt: Type) (a: array elt) (#s: Ghost.erased (Seq.seq elt)) requires pts_to a s ** pure (is_full_array a) ensures emp { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); // Pulse.Lib.Core.write (ptr_of a).base w (PA.one #elt #(length a)) (frame_preserving_upd_one #elt (length a) s); drop_ (pcm_pts_to (ptr_of a).base _) } ``` let free = free' let valid_sum_perm (len: nat) (offset: nat) (slice_len: nat) (p1 p2: perm) : Tot prop = let open FStar.Real in valid_perm len offset slice_len (sum_perm p1 p2) ```pulse ghost fn mk_carrier_share (#elt: Type u#1) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) (_:squash (valid_sum_perm len offset (Seq.length s) p1 p2)) requires emp ensures ( // let c1 = (mk_carrier len offset s p1) in pure ( composable (mk_carrier len offset s p1) (mk_carrier len offset s p2) /\ mk_carrier len offset s (p1 `sum_perm` p2) `Map.equal` ((mk_carrier len offset s p1) `compose` (mk_carrier len offset s p2)) ) ) { () } ``` ```pulse ghost fn share' (#elt:Type) (arr:array elt) (#s:Ghost.erased (Seq.seq elt)) (#p:perm) requires pts_to arr #p s ensures pts_to arr #(half_perm p) s ** pts_to arr #(half_perm p) s { unfold pts_to arr #p s; with w. assert (pcm_pts_to (ptr_of arr).base w); mk_carrier_share (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p) (half_perm p) (); Pulse.Lib.Core.share (ptr_of arr).base (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)) (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)); fold pts_to arr #(half_perm p) s; fold pts_to arr #(half_perm p) s; } ``` let share = share' let mk_carrier_gather (#elt: Type) (len: nat) (offset: nat) (s1 s2: Seq.seq elt) (p1 p2: perm) (_:squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ Seq.length s1 == Seq.length s2 /\ offset + Seq.length s1 <= len )) : squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ mk_carrier len offset s1 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ mk_carrier len offset s2 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ s1 == s2 ) = let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in assert (composable c1 c2); assert (mk_carrier len offset s1 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); assert (mk_carrier len offset s2 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); mk_carrier_inj len offset s1 s2 (p1 `sum_perm` p2) (p1 `sum_perm` p2) let mk_carrier_valid_sum_perm (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) : squash (let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in composable c1 c2 <==> valid_sum_perm len offset (Seq.length s) p1 p2) = let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in if Seq.length s > 0 && offset + Seq.length s <= len then let open FStar.Real in assert (Frac.composable (Map.sel c1 offset) (Map.sel c2 offset) <==> valid_perm len offset (Seq.length s) (sum_perm p1 p2)) else () ```pulse ghost fn of_squash (#p:prop) (s:squash p) requires emp ensures pure p { () } ``` ```pulse ghost fn gather' (#a:Type) (arr:array a) (#s0 #s1:Ghost.erased (Seq.seq a)) (#p0 #p1:perm) requires pts_to arr #p0 s0 ** pts_to arr #p1 s1 ensures pts_to arr #(sum_perm p0 p1) s0 ** pure (s0 == s1) { unfold pts_to arr #p0 s0; with w0. assert (pcm_pts_to (ptr_of arr).base w0); unfold pts_to arr #p1 s1; with w1. assert (pcm_pts_to (ptr_of arr).base w1); Pulse.Lib.Core.gather (ptr_of arr).base w0 w1; of_squash (mk_carrier_gather (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 s1 p0 p1 ()); of_squash (mk_carrier_valid_sum_perm (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 p0 p1); fold pts_to arr #(sum_perm p0 p1) s0; }

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

arr: Pulse.Lib.HigherArray.array a -> Pulse.Lib.Core.stt_ghost Prims.unit (Pulse.Lib.HigherArray.pts_to arr (FStar.Ghost.reveal s0) ** Pulse.Lib.HigherArray.pts_to arr (FStar.Ghost.reveal s1)) (fun _ -> Pulse.Lib.HigherArray.pts_to arr (FStar.Ghost.reveal s0) ** Pulse.Lib.Core.pure (s0 == s1) )

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.gather'" ]

[]

false

let gather =

gather'

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.valid_sum_perm

val valid_sum_perm (len offset slice_len: nat) (p1 p2: perm) : Tot prop

let valid_sum_perm (len: nat) (offset: nat) (slice_len: nat) (p1 p2: perm) : Tot prop = let open FStar.Real in valid_perm len offset slice_len (sum_perm p1 p2)

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 50, "end_line": 300, "start_col": 0, "start_line": 293 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one)) let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a ) let mk_array (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) : array elt = { p = { base_len; base; offset} ; length = Ghost.hide (SZ.v base_len - offset) } ```pulse ghost fn fold_pts_to (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) (#p: perm { p `lesser_equal_perm` full_perm}) (s: Seq.seq elt { Seq.length s == SZ.v base_len - offset}) requires pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p) ensures pts_to (mk_array base_len base offset) #p s { let a = (mk_array base_len base offset); rewrite (pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p)) as pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p); fold (pts_to a #p s); rewrite (pts_to a #p s) as (pts_to (mk_array base_len base offset) #p s); } ``` ```pulse ghost fn pts_to_len' (#elt: Type u#1) (a:array elt) (#p:perm) (#x:Seq.seq elt) requires pts_to a #p x ensures pts_to a #p x ** pure (length a == Seq.length x) { unfold pts_to a #p x; fold pts_to a #p x; } ``` let pts_to_len = pts_to_len' ```pulse fn alloc' (#elt: Type u#1) (x: elt) (n: SZ.t) requires emp returns a:array elt ensures pts_to a (Seq.create (SZ.v n) x) ** pure (length a == SZ.v n /\ is_full_array a) { let v = (mk_carrier (SZ.v n) 0 (Seq.create (SZ.v n) x) full_perm); FStar.PCM.compatible_refl (PA.pcm elt (SZ.v n)) v; let b = Pulse.Lib.Core.alloc #_ #(PA.pcm elt (SZ.v n)) v; pts_to_not_null b _; fold_pts_to n b 0 #full_perm (Seq.create (SZ.v n) x); mk_array n b 0; } ``` let alloc = alloc' ```pulse fn read (#t: Type) (a: array t) (i: SZ.t) (#p: perm) (#s: Ghost.erased (Seq.seq t){SZ.v i < Seq.length s}) requires pts_to a #p s returns res:t ensures pts_to a #p s ** pure (res == Seq.index s (SZ.v i)) { unfold pts_to a #p s; with w. assert (pcm_pts_to (ptr_of a).base w); let v = Pulse.Lib.Core.read (ptr_of a).base w (fun _ -> w); fold (pts_to a #p s); fst (Some?.v (FStar.Map.sel v ((ptr_of a).offset + SZ.v i))); } ``` let op_Array_Access = read let mk_carrier_upd (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (i: nat) (v: elt) (_: squash ( offset + Seq.length s <= len /\ i < Seq.length s )) : Lemma (ensures ( let o = mk_carrier len offset s full_perm in let o' = mk_carrier len offset (Seq.upd s i v) full_perm in o' `Map.equal` Map.upd o (offset + i) (Some (v, full_perm)) )) = () ```pulse fn write (#t: Type) (a: array t) (i: SZ.t) (v: t) (#s: Ghost.erased (Seq.seq t) {SZ.v i < Seq.length s}) requires pts_to a s ensures pts_to a (Seq.upd s (SZ.v i) v) { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); mk_carrier_upd (SZ.v (ptr_of a).base_len) ((ptr_of a).offset) s (SZ.v i) v (); Pulse.Lib.Core.write (ptr_of a).base w _ (PM.lift_frame_preserving_upd _ _ (Frac.mk_frame_preserving_upd (Seq.index s (SZ.v i)) v ) _ ((ptr_of a).offset + SZ.v i)); fold (pts_to a #full_perm (Seq.upd s (SZ.v i) v)); } ``` let op_Array_Assignment = write (* let frame_preserving_upd_one (#elt:Type) (n:erased nat) (s:erased (Seq.seq elt) { Seq.length s == reveal n }) : FStar.PCM.frame_preserving_upd (PA.pcm elt n) (mk_carrier n 0 s full_perm) (PA.one #elt #n) = fun _ -> admit(); (PA.one #elt #n) *) ```pulse fn free' (#elt: Type) (a: array elt) (#s: Ghost.erased (Seq.seq elt)) requires pts_to a s ** pure (is_full_array a) ensures emp { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); // Pulse.Lib.Core.write (ptr_of a).base w (PA.one #elt #(length a)) (frame_preserving_upd_one #elt (length a) s); drop_ (pcm_pts_to (ptr_of a).base _) } ``` let free = free'

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

len: Prims.nat -> offset: Prims.nat -> slice_len: Prims.nat -> p1: PulseCore.FractionalPermission.perm -> p2: PulseCore.FractionalPermission.perm -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Prims.nat", "PulseCore.FractionalPermission.perm", "Pulse.Lib.HigherArray.valid_perm", "PulseCore.FractionalPermission.sum_perm", "Prims.prop" ]

[]

false

true

let valid_sum_perm (len offset slice_len: nat) (p1 p2: perm) : Tot prop =

let open FStar.Real in valid_perm len offset slice_len (sum_perm p1 p2)

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.free

val free (#elt: Type) (a: array elt) (#s: Ghost.erased (Seq.seq elt)) : stt unit (requires pts_to a s ** pure (is_full_array a)) (ensures fun _ -> emp)

let free = free'

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 16, "end_line": 291, "start_col": 0, "start_line": 291 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one)) let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a ) let mk_array (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) : array elt = { p = { base_len; base; offset} ; length = Ghost.hide (SZ.v base_len - offset) } ```pulse ghost fn fold_pts_to (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) (#p: perm { p `lesser_equal_perm` full_perm}) (s: Seq.seq elt { Seq.length s == SZ.v base_len - offset}) requires pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p) ensures pts_to (mk_array base_len base offset) #p s { let a = (mk_array base_len base offset); rewrite (pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p)) as pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p); fold (pts_to a #p s); rewrite (pts_to a #p s) as (pts_to (mk_array base_len base offset) #p s); } ``` ```pulse ghost fn pts_to_len' (#elt: Type u#1) (a:array elt) (#p:perm) (#x:Seq.seq elt) requires pts_to a #p x ensures pts_to a #p x ** pure (length a == Seq.length x) { unfold pts_to a #p x; fold pts_to a #p x; } ``` let pts_to_len = pts_to_len' ```pulse fn alloc' (#elt: Type u#1) (x: elt) (n: SZ.t) requires emp returns a:array elt ensures pts_to a (Seq.create (SZ.v n) x) ** pure (length a == SZ.v n /\ is_full_array a) { let v = (mk_carrier (SZ.v n) 0 (Seq.create (SZ.v n) x) full_perm); FStar.PCM.compatible_refl (PA.pcm elt (SZ.v n)) v; let b = Pulse.Lib.Core.alloc #_ #(PA.pcm elt (SZ.v n)) v; pts_to_not_null b _; fold_pts_to n b 0 #full_perm (Seq.create (SZ.v n) x); mk_array n b 0; } ``` let alloc = alloc' ```pulse fn read (#t: Type) (a: array t) (i: SZ.t) (#p: perm) (#s: Ghost.erased (Seq.seq t){SZ.v i < Seq.length s}) requires pts_to a #p s returns res:t ensures pts_to a #p s ** pure (res == Seq.index s (SZ.v i)) { unfold pts_to a #p s; with w. assert (pcm_pts_to (ptr_of a).base w); let v = Pulse.Lib.Core.read (ptr_of a).base w (fun _ -> w); fold (pts_to a #p s); fst (Some?.v (FStar.Map.sel v ((ptr_of a).offset + SZ.v i))); } ``` let op_Array_Access = read let mk_carrier_upd (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (i: nat) (v: elt) (_: squash ( offset + Seq.length s <= len /\ i < Seq.length s )) : Lemma (ensures ( let o = mk_carrier len offset s full_perm in let o' = mk_carrier len offset (Seq.upd s i v) full_perm in o' `Map.equal` Map.upd o (offset + i) (Some (v, full_perm)) )) = () ```pulse fn write (#t: Type) (a: array t) (i: SZ.t) (v: t) (#s: Ghost.erased (Seq.seq t) {SZ.v i < Seq.length s}) requires pts_to a s ensures pts_to a (Seq.upd s (SZ.v i) v) { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); mk_carrier_upd (SZ.v (ptr_of a).base_len) ((ptr_of a).offset) s (SZ.v i) v (); Pulse.Lib.Core.write (ptr_of a).base w _ (PM.lift_frame_preserving_upd _ _ (Frac.mk_frame_preserving_upd (Seq.index s (SZ.v i)) v ) _ ((ptr_of a).offset + SZ.v i)); fold (pts_to a #full_perm (Seq.upd s (SZ.v i) v)); } ``` let op_Array_Assignment = write (* let frame_preserving_upd_one (#elt:Type) (n:erased nat) (s:erased (Seq.seq elt) { Seq.length s == reveal n }) : FStar.PCM.frame_preserving_upd (PA.pcm elt n) (mk_carrier n 0 s full_perm) (PA.one #elt #n) = fun _ -> admit(); (PA.one #elt #n) *) ```pulse fn free' (#elt: Type) (a: array elt) (#s: Ghost.erased (Seq.seq elt)) requires pts_to a s ** pure (is_full_array a) ensures emp { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); // Pulse.Lib.Core.write (ptr_of a).base w (PA.one #elt #(length a)) (frame_preserving_upd_one #elt (length a) s); drop_ (pcm_pts_to (ptr_of a).base _) }

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Pulse.Lib.HigherArray.array elt -> Pulse.Lib.Core.stt Prims.unit (Pulse.Lib.HigherArray.pts_to a (FStar.Ghost.reveal s) ** Pulse.Lib.Core.pure (Pulse.Lib.HigherArray.is_full_array a)) (fun _ -> Pulse.Lib.Core.emp)

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.free'" ]

[]

false

let free =

free'

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.split_r

val split_r (#elt: Type) (a: array elt) (i: nat{i <= length a}) : x: array elt {x == split_r' a i}

let split_r (#elt: Type) (a: array elt) (i: nat {i <= length a}) : x:array elt { x == split_r' a i } = split_r' a i

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 14, "end_line": 474, "start_col": 0, "start_line": 469 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one)) let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a ) let mk_array (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) : array elt = { p = { base_len; base; offset} ; length = Ghost.hide (SZ.v base_len - offset) } ```pulse ghost fn fold_pts_to (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) (#p: perm { p `lesser_equal_perm` full_perm}) (s: Seq.seq elt { Seq.length s == SZ.v base_len - offset}) requires pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p) ensures pts_to (mk_array base_len base offset) #p s { let a = (mk_array base_len base offset); rewrite (pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p)) as pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p); fold (pts_to a #p s); rewrite (pts_to a #p s) as (pts_to (mk_array base_len base offset) #p s); } ``` ```pulse ghost fn pts_to_len' (#elt: Type u#1) (a:array elt) (#p:perm) (#x:Seq.seq elt) requires pts_to a #p x ensures pts_to a #p x ** pure (length a == Seq.length x) { unfold pts_to a #p x; fold pts_to a #p x; } ``` let pts_to_len = pts_to_len' ```pulse fn alloc' (#elt: Type u#1) (x: elt) (n: SZ.t) requires emp returns a:array elt ensures pts_to a (Seq.create (SZ.v n) x) ** pure (length a == SZ.v n /\ is_full_array a) { let v = (mk_carrier (SZ.v n) 0 (Seq.create (SZ.v n) x) full_perm); FStar.PCM.compatible_refl (PA.pcm elt (SZ.v n)) v; let b = Pulse.Lib.Core.alloc #_ #(PA.pcm elt (SZ.v n)) v; pts_to_not_null b _; fold_pts_to n b 0 #full_perm (Seq.create (SZ.v n) x); mk_array n b 0; } ``` let alloc = alloc' ```pulse fn read (#t: Type) (a: array t) (i: SZ.t) (#p: perm) (#s: Ghost.erased (Seq.seq t){SZ.v i < Seq.length s}) requires pts_to a #p s returns res:t ensures pts_to a #p s ** pure (res == Seq.index s (SZ.v i)) { unfold pts_to a #p s; with w. assert (pcm_pts_to (ptr_of a).base w); let v = Pulse.Lib.Core.read (ptr_of a).base w (fun _ -> w); fold (pts_to a #p s); fst (Some?.v (FStar.Map.sel v ((ptr_of a).offset + SZ.v i))); } ``` let op_Array_Access = read let mk_carrier_upd (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (i: nat) (v: elt) (_: squash ( offset + Seq.length s <= len /\ i < Seq.length s )) : Lemma (ensures ( let o = mk_carrier len offset s full_perm in let o' = mk_carrier len offset (Seq.upd s i v) full_perm in o' `Map.equal` Map.upd o (offset + i) (Some (v, full_perm)) )) = () ```pulse fn write (#t: Type) (a: array t) (i: SZ.t) (v: t) (#s: Ghost.erased (Seq.seq t) {SZ.v i < Seq.length s}) requires pts_to a s ensures pts_to a (Seq.upd s (SZ.v i) v) { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); mk_carrier_upd (SZ.v (ptr_of a).base_len) ((ptr_of a).offset) s (SZ.v i) v (); Pulse.Lib.Core.write (ptr_of a).base w _ (PM.lift_frame_preserving_upd _ _ (Frac.mk_frame_preserving_upd (Seq.index s (SZ.v i)) v ) _ ((ptr_of a).offset + SZ.v i)); fold (pts_to a #full_perm (Seq.upd s (SZ.v i) v)); } ``` let op_Array_Assignment = write (* let frame_preserving_upd_one (#elt:Type) (n:erased nat) (s:erased (Seq.seq elt) { Seq.length s == reveal n }) : FStar.PCM.frame_preserving_upd (PA.pcm elt n) (mk_carrier n 0 s full_perm) (PA.one #elt #n) = fun _ -> admit(); (PA.one #elt #n) *) ```pulse fn free' (#elt: Type) (a: array elt) (#s: Ghost.erased (Seq.seq elt)) requires pts_to a s ** pure (is_full_array a) ensures emp { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); // Pulse.Lib.Core.write (ptr_of a).base w (PA.one #elt #(length a)) (frame_preserving_upd_one #elt (length a) s); drop_ (pcm_pts_to (ptr_of a).base _) } ``` let free = free' let valid_sum_perm (len: nat) (offset: nat) (slice_len: nat) (p1 p2: perm) : Tot prop = let open FStar.Real in valid_perm len offset slice_len (sum_perm p1 p2) ```pulse ghost fn mk_carrier_share (#elt: Type u#1) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) (_:squash (valid_sum_perm len offset (Seq.length s) p1 p2)) requires emp ensures ( // let c1 = (mk_carrier len offset s p1) in pure ( composable (mk_carrier len offset s p1) (mk_carrier len offset s p2) /\ mk_carrier len offset s (p1 `sum_perm` p2) `Map.equal` ((mk_carrier len offset s p1) `compose` (mk_carrier len offset s p2)) ) ) { () } ``` ```pulse ghost fn share' (#elt:Type) (arr:array elt) (#s:Ghost.erased (Seq.seq elt)) (#p:perm) requires pts_to arr #p s ensures pts_to arr #(half_perm p) s ** pts_to arr #(half_perm p) s { unfold pts_to arr #p s; with w. assert (pcm_pts_to (ptr_of arr).base w); mk_carrier_share (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p) (half_perm p) (); Pulse.Lib.Core.share (ptr_of arr).base (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)) (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)); fold pts_to arr #(half_perm p) s; fold pts_to arr #(half_perm p) s; } ``` let share = share' let mk_carrier_gather (#elt: Type) (len: nat) (offset: nat) (s1 s2: Seq.seq elt) (p1 p2: perm) (_:squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ Seq.length s1 == Seq.length s2 /\ offset + Seq.length s1 <= len )) : squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ mk_carrier len offset s1 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ mk_carrier len offset s2 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ s1 == s2 ) = let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in assert (composable c1 c2); assert (mk_carrier len offset s1 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); assert (mk_carrier len offset s2 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); mk_carrier_inj len offset s1 s2 (p1 `sum_perm` p2) (p1 `sum_perm` p2) let mk_carrier_valid_sum_perm (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) : squash (let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in composable c1 c2 <==> valid_sum_perm len offset (Seq.length s) p1 p2) = let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in if Seq.length s > 0 && offset + Seq.length s <= len then let open FStar.Real in assert (Frac.composable (Map.sel c1 offset) (Map.sel c2 offset) <==> valid_perm len offset (Seq.length s) (sum_perm p1 p2)) else () ```pulse ghost fn of_squash (#p:prop) (s:squash p) requires emp ensures pure p { () } ``` ```pulse ghost fn gather' (#a:Type) (arr:array a) (#s0 #s1:Ghost.erased (Seq.seq a)) (#p0 #p1:perm) requires pts_to arr #p0 s0 ** pts_to arr #p1 s1 ensures pts_to arr #(sum_perm p0 p1) s0 ** pure (s0 == s1) { unfold pts_to arr #p0 s0; with w0. assert (pcm_pts_to (ptr_of arr).base w0); unfold pts_to arr #p1 s1; with w1. assert (pcm_pts_to (ptr_of arr).base w1); Pulse.Lib.Core.gather (ptr_of arr).base w0 w1; of_squash (mk_carrier_gather (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 s1 p0 p1 ()); of_squash (mk_carrier_valid_sum_perm (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 p0 p1); fold pts_to arr #(sum_perm p0 p1) s0; } ``` let gather = gather' let ptr_shift (#elt: Type) (p: ptr elt) (off: nat {offset p + off <= base_len (base p)}) : ptr elt = { base_len = p.base_len; base = p.base; offset = p.offset + off; } let split_l' (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : array elt = { p = ptr_of a; length=i } irreducible let split_l (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : x:array elt { x == split_l' a i } = split_l' a i let split_r' (#elt: Type) (a: array elt) (i: nat {i <= length a}) : array elt = { p= ptr_shift (ptr_of a) i; length=Ghost.hide (length a - i) }

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Pulse.Lib.HigherArray.array elt -> i: Prims.nat{i <= Pulse.Lib.HigherArray.length a} -> x: Pulse.Lib.HigherArray.array elt {x == Pulse.Lib.HigherArray.split_r' a i}

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.array", "Prims.nat", "Prims.b2t", "Prims.op_LessThanOrEqual", "Pulse.Lib.HigherArray.length", "Pulse.Lib.HigherArray.split_r'", "Prims.eq2" ]

[]

false

let split_r (#elt: Type) (a: array elt) (i: nat{i <= length a}) : x: array elt {x == split_r' a i} =

split_r' a i

false

MiniParse.Tac.Base.fst

MiniParse.Tac.Base.app_head_tail

val app_head_tail (t: T.term) : T.Tac (T.term * list T.argv)

let app_head_tail (t: T.term) : T.Tac (T.term * list T.argv) = let (x, l) = app_head_rev_tail t in (x, L.rev l)

{ "file_name": "examples/miniparse/MiniParse.Tac.Base.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 14, "end_line": 39, "start_col": 0, "start_line": 36 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module MiniParse.Tac.Base module T = FStar.Tactics.V2 module L = FStar.List.Tot let pack_nat (n: nat) : T.Tac T.term = T.pack (T.Tv_Const (T.C_Int n)) let rec app_head_rev_tail (t: T.term) : T.Tac (T.term * list T.argv) = let ins = T.inspect t in if T.Tv_App? ins then let (T.Tv_App u v) = ins in let (x, l) = app_head_rev_tail u in (x, v :: l) else (t, [])

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Squash.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.List.Tot.fst.checked" ], "interface_file": false, "source_file": "MiniParse.Tac.Base.fst" }

[ { "abbrev": true, "full_module": "FStar.List.Tot", "short_module": "L" }, { "abbrev": true, "full_module": "FStar.Tactics.V2", "short_module": "T" }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

t: FStar.Tactics.NamedView.term -> FStar.Tactics.Effect.Tac (FStar.Tactics.NamedView.term * Prims.list FStar.Stubs.Reflection.V2.Data.argv)

FStar.Tactics.Effect.Tac

[]

[ "FStar.Tactics.NamedView.term", "Prims.list", "FStar.Stubs.Reflection.V2.Data.argv", "FStar.Pervasives.Native.Mktuple2", "FStar.List.Tot.Base.rev", "FStar.Pervasives.Native.tuple2", "MiniParse.Tac.Base.app_head_rev_tail" ]

[]

false

true

false

let app_head_tail (t: T.term) : T.Tac (T.term * list T.argv) =

let x, l = app_head_rev_tail t in (x, L.rev l)

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.pts_to_range_elim

val pts_to_range_elim (#elt: Type) (a: array elt) (p: perm) (s: Seq.seq elt) : stt_ghost unit (pts_to_range a 0 (length a) #p s) (fun _ -> pts_to a #p s)

let pts_to_range_elim = pts_to_range_elim'

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 42, "end_line": 562, "start_col": 0, "start_line": 562 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one)) let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a ) let mk_array (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) : array elt = { p = { base_len; base; offset} ; length = Ghost.hide (SZ.v base_len - offset) } ```pulse ghost fn fold_pts_to (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) (#p: perm { p `lesser_equal_perm` full_perm}) (s: Seq.seq elt { Seq.length s == SZ.v base_len - offset}) requires pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p) ensures pts_to (mk_array base_len base offset) #p s { let a = (mk_array base_len base offset); rewrite (pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p)) as pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p); fold (pts_to a #p s); rewrite (pts_to a #p s) as (pts_to (mk_array base_len base offset) #p s); } ``` ```pulse ghost fn pts_to_len' (#elt: Type u#1) (a:array elt) (#p:perm) (#x:Seq.seq elt) requires pts_to a #p x ensures pts_to a #p x ** pure (length a == Seq.length x) { unfold pts_to a #p x; fold pts_to a #p x; } ``` let pts_to_len = pts_to_len' ```pulse fn alloc' (#elt: Type u#1) (x: elt) (n: SZ.t) requires emp returns a:array elt ensures pts_to a (Seq.create (SZ.v n) x) ** pure (length a == SZ.v n /\ is_full_array a) { let v = (mk_carrier (SZ.v n) 0 (Seq.create (SZ.v n) x) full_perm); FStar.PCM.compatible_refl (PA.pcm elt (SZ.v n)) v; let b = Pulse.Lib.Core.alloc #_ #(PA.pcm elt (SZ.v n)) v; pts_to_not_null b _; fold_pts_to n b 0 #full_perm (Seq.create (SZ.v n) x); mk_array n b 0; } ``` let alloc = alloc' ```pulse fn read (#t: Type) (a: array t) (i: SZ.t) (#p: perm) (#s: Ghost.erased (Seq.seq t){SZ.v i < Seq.length s}) requires pts_to a #p s returns res:t ensures pts_to a #p s ** pure (res == Seq.index s (SZ.v i)) { unfold pts_to a #p s; with w. assert (pcm_pts_to (ptr_of a).base w); let v = Pulse.Lib.Core.read (ptr_of a).base w (fun _ -> w); fold (pts_to a #p s); fst (Some?.v (FStar.Map.sel v ((ptr_of a).offset + SZ.v i))); } ``` let op_Array_Access = read let mk_carrier_upd (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (i: nat) (v: elt) (_: squash ( offset + Seq.length s <= len /\ i < Seq.length s )) : Lemma (ensures ( let o = mk_carrier len offset s full_perm in let o' = mk_carrier len offset (Seq.upd s i v) full_perm in o' `Map.equal` Map.upd o (offset + i) (Some (v, full_perm)) )) = () ```pulse fn write (#t: Type) (a: array t) (i: SZ.t) (v: t) (#s: Ghost.erased (Seq.seq t) {SZ.v i < Seq.length s}) requires pts_to a s ensures pts_to a (Seq.upd s (SZ.v i) v) { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); mk_carrier_upd (SZ.v (ptr_of a).base_len) ((ptr_of a).offset) s (SZ.v i) v (); Pulse.Lib.Core.write (ptr_of a).base w _ (PM.lift_frame_preserving_upd _ _ (Frac.mk_frame_preserving_upd (Seq.index s (SZ.v i)) v ) _ ((ptr_of a).offset + SZ.v i)); fold (pts_to a #full_perm (Seq.upd s (SZ.v i) v)); } ``` let op_Array_Assignment = write (* let frame_preserving_upd_one (#elt:Type) (n:erased nat) (s:erased (Seq.seq elt) { Seq.length s == reveal n }) : FStar.PCM.frame_preserving_upd (PA.pcm elt n) (mk_carrier n 0 s full_perm) (PA.one #elt #n) = fun _ -> admit(); (PA.one #elt #n) *) ```pulse fn free' (#elt: Type) (a: array elt) (#s: Ghost.erased (Seq.seq elt)) requires pts_to a s ** pure (is_full_array a) ensures emp { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); // Pulse.Lib.Core.write (ptr_of a).base w (PA.one #elt #(length a)) (frame_preserving_upd_one #elt (length a) s); drop_ (pcm_pts_to (ptr_of a).base _) } ``` let free = free' let valid_sum_perm (len: nat) (offset: nat) (slice_len: nat) (p1 p2: perm) : Tot prop = let open FStar.Real in valid_perm len offset slice_len (sum_perm p1 p2) ```pulse ghost fn mk_carrier_share (#elt: Type u#1) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) (_:squash (valid_sum_perm len offset (Seq.length s) p1 p2)) requires emp ensures ( // let c1 = (mk_carrier len offset s p1) in pure ( composable (mk_carrier len offset s p1) (mk_carrier len offset s p2) /\ mk_carrier len offset s (p1 `sum_perm` p2) `Map.equal` ((mk_carrier len offset s p1) `compose` (mk_carrier len offset s p2)) ) ) { () } ``` ```pulse ghost fn share' (#elt:Type) (arr:array elt) (#s:Ghost.erased (Seq.seq elt)) (#p:perm) requires pts_to arr #p s ensures pts_to arr #(half_perm p) s ** pts_to arr #(half_perm p) s { unfold pts_to arr #p s; with w. assert (pcm_pts_to (ptr_of arr).base w); mk_carrier_share (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p) (half_perm p) (); Pulse.Lib.Core.share (ptr_of arr).base (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)) (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)); fold pts_to arr #(half_perm p) s; fold pts_to arr #(half_perm p) s; } ``` let share = share' let mk_carrier_gather (#elt: Type) (len: nat) (offset: nat) (s1 s2: Seq.seq elt) (p1 p2: perm) (_:squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ Seq.length s1 == Seq.length s2 /\ offset + Seq.length s1 <= len )) : squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ mk_carrier len offset s1 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ mk_carrier len offset s2 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ s1 == s2 ) = let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in assert (composable c1 c2); assert (mk_carrier len offset s1 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); assert (mk_carrier len offset s2 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); mk_carrier_inj len offset s1 s2 (p1 `sum_perm` p2) (p1 `sum_perm` p2) let mk_carrier_valid_sum_perm (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) : squash (let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in composable c1 c2 <==> valid_sum_perm len offset (Seq.length s) p1 p2) = let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in if Seq.length s > 0 && offset + Seq.length s <= len then let open FStar.Real in assert (Frac.composable (Map.sel c1 offset) (Map.sel c2 offset) <==> valid_perm len offset (Seq.length s) (sum_perm p1 p2)) else () ```pulse ghost fn of_squash (#p:prop) (s:squash p) requires emp ensures pure p { () } ``` ```pulse ghost fn gather' (#a:Type) (arr:array a) (#s0 #s1:Ghost.erased (Seq.seq a)) (#p0 #p1:perm) requires pts_to arr #p0 s0 ** pts_to arr #p1 s1 ensures pts_to arr #(sum_perm p0 p1) s0 ** pure (s0 == s1) { unfold pts_to arr #p0 s0; with w0. assert (pcm_pts_to (ptr_of arr).base w0); unfold pts_to arr #p1 s1; with w1. assert (pcm_pts_to (ptr_of arr).base w1); Pulse.Lib.Core.gather (ptr_of arr).base w0 w1; of_squash (mk_carrier_gather (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 s1 p0 p1 ()); of_squash (mk_carrier_valid_sum_perm (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 p0 p1); fold pts_to arr #(sum_perm p0 p1) s0; } ``` let gather = gather' let ptr_shift (#elt: Type) (p: ptr elt) (off: nat {offset p + off <= base_len (base p)}) : ptr elt = { base_len = p.base_len; base = p.base; offset = p.offset + off; } let split_l' (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : array elt = { p = ptr_of a; length=i } irreducible let split_l (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : x:array elt { x == split_l' a i } = split_l' a i let split_r' (#elt: Type) (a: array elt) (i: nat {i <= length a}) : array elt = { p= ptr_shift (ptr_of a) i; length=Ghost.hide (length a - i) } irreducible let split_r (#elt: Type) (a: array elt) (i: nat {i <= length a}) : x:array elt { x == split_r' a i } = split_r' a i let array_slice (#elt: Type) (a: array elt) (i:nat) (j: nat {i <= j /\ j <= length a}) : GTot (array elt) = split_l (split_r a i) (j - i) let in_bounds (i j:nat) (s:array 'a) = squash (i <= j /\ j <= length s) ```pulse ghost fn elim_in_bounds (#elt:Type) (#i #j:nat) (s:array elt) (p:in_bounds i j s) requires emp ensures pure (i <= j /\ j <= length s) { () } ``` let token (x:'a) = emp let pts_to_range (#a:Type) (x:array a) ([@@@ equate_by_smt] i:nat) ([@@@ equate_by_smt] j: nat) (#[exact (`full_perm)] p:perm) ([@@@ equate_by_smt] s: Seq.seq a) : vprop = exists* (q:in_bounds i j x). pts_to (array_slice x i j) #p s ** token q ```pulse ghost fn pts_to_range_prop' (#elt: Type) (a: array elt) (#i #j: nat) (#p: perm) (#s: Seq.seq elt) requires pts_to_range a i j #p s ensures pts_to_range a i j #p s ** pure ( (i <= j /\ j <= length a /\ Seq.length s == j - i) ) { unfold pts_to_range a i j #p s; with q. assert (token #(in_bounds i j a) q); elim_in_bounds a q; pts_to_len (array_slice a i j); fold pts_to_range a i j #p s; } ``` let pts_to_range_prop = pts_to_range_prop' ```pulse ghost fn pts_to_range_intro' (#elt: Type) (a: array elt) (p: perm) (s: Seq.seq elt) requires pts_to a #p s ensures pts_to_range a 0 (length a) #p s { rewrite each a as (array_slice a 0 (length a)); let q : in_bounds 0 (length a) a = (); fold (token #(in_bounds 0 (length a) a) q); fold (pts_to_range a 0 (length a) #p s); } ``` let pts_to_range_intro = pts_to_range_intro' ```pulse ghost fn pts_to_range_elim' (#elt: Type) (a: array elt) (p: perm) (s: Seq.seq elt) requires pts_to_range a 0 (length a) #p s ensures pts_to a #p s { unfold (pts_to_range a 0 (length a) #p s); unfold (token #(in_bounds 0 (length a) a) _); rewrite each (array_slice a 0 (length a)) as a; }

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Pulse.Lib.HigherArray.array elt -> p: PulseCore.FractionalPermission.perm -> s: FStar.Seq.Base.seq elt -> Pulse.Lib.Core.stt_ghost Prims.unit (Pulse.Lib.HigherArray.pts_to_range a 0 (Pulse.Lib.HigherArray.length a) s) (fun _ -> Pulse.Lib.HigherArray.pts_to a s)

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.pts_to_range_elim'" ]

[]

false

let pts_to_range_elim =

pts_to_range_elim'

false

MiniParse.Tac.Base.fst

MiniParse.Tac.Base.pack_nat

val pack_nat (n: nat) : T.Tac T.term

let pack_nat (n: nat) : T.Tac T.term = T.pack (T.Tv_Const (T.C_Int n))

{ "file_name": "examples/miniparse/MiniParse.Tac.Base.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 33, "end_line": 22, "start_col": 0, "start_line": 21 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module MiniParse.Tac.Base module T = FStar.Tactics.V2 module L = FStar.List.Tot

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Squash.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.List.Tot.fst.checked" ], "interface_file": false, "source_file": "MiniParse.Tac.Base.fst" }

[ { "abbrev": true, "full_module": "FStar.List.Tot", "short_module": "L" }, { "abbrev": true, "full_module": "FStar.Tactics.V2", "short_module": "T" }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

n: Prims.nat -> FStar.Tactics.Effect.Tac FStar.Tactics.NamedView.term

FStar.Tactics.Effect.Tac

[]

[ "Prims.nat", "FStar.Tactics.NamedView.pack", "FStar.Tactics.NamedView.Tv_Const", "FStar.Stubs.Reflection.V2.Data.C_Int", "FStar.Tactics.NamedView.term" ]

[]

false

true

false

let pack_nat (n: nat) : T.Tac T.term =

T.pack (T.Tv_Const (T.C_Int n))

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.token

val token : x: 'a -> Pulse.Lib.Core.vprop

let token (x:'a) = emp

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 22, "end_line": 494, "start_col": 0, "start_line": 494 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one)) let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a ) let mk_array (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) : array elt = { p = { base_len; base; offset} ; length = Ghost.hide (SZ.v base_len - offset) } ```pulse ghost fn fold_pts_to (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) (#p: perm { p `lesser_equal_perm` full_perm}) (s: Seq.seq elt { Seq.length s == SZ.v base_len - offset}) requires pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p) ensures pts_to (mk_array base_len base offset) #p s { let a = (mk_array base_len base offset); rewrite (pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p)) as pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p); fold (pts_to a #p s); rewrite (pts_to a #p s) as (pts_to (mk_array base_len base offset) #p s); } ``` ```pulse ghost fn pts_to_len' (#elt: Type u#1) (a:array elt) (#p:perm) (#x:Seq.seq elt) requires pts_to a #p x ensures pts_to a #p x ** pure (length a == Seq.length x) { unfold pts_to a #p x; fold pts_to a #p x; } ``` let pts_to_len = pts_to_len' ```pulse fn alloc' (#elt: Type u#1) (x: elt) (n: SZ.t) requires emp returns a:array elt ensures pts_to a (Seq.create (SZ.v n) x) ** pure (length a == SZ.v n /\ is_full_array a) { let v = (mk_carrier (SZ.v n) 0 (Seq.create (SZ.v n) x) full_perm); FStar.PCM.compatible_refl (PA.pcm elt (SZ.v n)) v; let b = Pulse.Lib.Core.alloc #_ #(PA.pcm elt (SZ.v n)) v; pts_to_not_null b _; fold_pts_to n b 0 #full_perm (Seq.create (SZ.v n) x); mk_array n b 0; } ``` let alloc = alloc' ```pulse fn read (#t: Type) (a: array t) (i: SZ.t) (#p: perm) (#s: Ghost.erased (Seq.seq t){SZ.v i < Seq.length s}) requires pts_to a #p s returns res:t ensures pts_to a #p s ** pure (res == Seq.index s (SZ.v i)) { unfold pts_to a #p s; with w. assert (pcm_pts_to (ptr_of a).base w); let v = Pulse.Lib.Core.read (ptr_of a).base w (fun _ -> w); fold (pts_to a #p s); fst (Some?.v (FStar.Map.sel v ((ptr_of a).offset + SZ.v i))); } ``` let op_Array_Access = read let mk_carrier_upd (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (i: nat) (v: elt) (_: squash ( offset + Seq.length s <= len /\ i < Seq.length s )) : Lemma (ensures ( let o = mk_carrier len offset s full_perm in let o' = mk_carrier len offset (Seq.upd s i v) full_perm in o' `Map.equal` Map.upd o (offset + i) (Some (v, full_perm)) )) = () ```pulse fn write (#t: Type) (a: array t) (i: SZ.t) (v: t) (#s: Ghost.erased (Seq.seq t) {SZ.v i < Seq.length s}) requires pts_to a s ensures pts_to a (Seq.upd s (SZ.v i) v) { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); mk_carrier_upd (SZ.v (ptr_of a).base_len) ((ptr_of a).offset) s (SZ.v i) v (); Pulse.Lib.Core.write (ptr_of a).base w _ (PM.lift_frame_preserving_upd _ _ (Frac.mk_frame_preserving_upd (Seq.index s (SZ.v i)) v ) _ ((ptr_of a).offset + SZ.v i)); fold (pts_to a #full_perm (Seq.upd s (SZ.v i) v)); } ``` let op_Array_Assignment = write (* let frame_preserving_upd_one (#elt:Type) (n:erased nat) (s:erased (Seq.seq elt) { Seq.length s == reveal n }) : FStar.PCM.frame_preserving_upd (PA.pcm elt n) (mk_carrier n 0 s full_perm) (PA.one #elt #n) = fun _ -> admit(); (PA.one #elt #n) *) ```pulse fn free' (#elt: Type) (a: array elt) (#s: Ghost.erased (Seq.seq elt)) requires pts_to a s ** pure (is_full_array a) ensures emp { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); // Pulse.Lib.Core.write (ptr_of a).base w (PA.one #elt #(length a)) (frame_preserving_upd_one #elt (length a) s); drop_ (pcm_pts_to (ptr_of a).base _) } ``` let free = free' let valid_sum_perm (len: nat) (offset: nat) (slice_len: nat) (p1 p2: perm) : Tot prop = let open FStar.Real in valid_perm len offset slice_len (sum_perm p1 p2) ```pulse ghost fn mk_carrier_share (#elt: Type u#1) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) (_:squash (valid_sum_perm len offset (Seq.length s) p1 p2)) requires emp ensures ( // let c1 = (mk_carrier len offset s p1) in pure ( composable (mk_carrier len offset s p1) (mk_carrier len offset s p2) /\ mk_carrier len offset s (p1 `sum_perm` p2) `Map.equal` ((mk_carrier len offset s p1) `compose` (mk_carrier len offset s p2)) ) ) { () } ``` ```pulse ghost fn share' (#elt:Type) (arr:array elt) (#s:Ghost.erased (Seq.seq elt)) (#p:perm) requires pts_to arr #p s ensures pts_to arr #(half_perm p) s ** pts_to arr #(half_perm p) s { unfold pts_to arr #p s; with w. assert (pcm_pts_to (ptr_of arr).base w); mk_carrier_share (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p) (half_perm p) (); Pulse.Lib.Core.share (ptr_of arr).base (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)) (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)); fold pts_to arr #(half_perm p) s; fold pts_to arr #(half_perm p) s; } ``` let share = share' let mk_carrier_gather (#elt: Type) (len: nat) (offset: nat) (s1 s2: Seq.seq elt) (p1 p2: perm) (_:squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ Seq.length s1 == Seq.length s2 /\ offset + Seq.length s1 <= len )) : squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ mk_carrier len offset s1 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ mk_carrier len offset s2 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ s1 == s2 ) = let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in assert (composable c1 c2); assert (mk_carrier len offset s1 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); assert (mk_carrier len offset s2 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); mk_carrier_inj len offset s1 s2 (p1 `sum_perm` p2) (p1 `sum_perm` p2) let mk_carrier_valid_sum_perm (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) : squash (let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in composable c1 c2 <==> valid_sum_perm len offset (Seq.length s) p1 p2) = let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in if Seq.length s > 0 && offset + Seq.length s <= len then let open FStar.Real in assert (Frac.composable (Map.sel c1 offset) (Map.sel c2 offset) <==> valid_perm len offset (Seq.length s) (sum_perm p1 p2)) else () ```pulse ghost fn of_squash (#p:prop) (s:squash p) requires emp ensures pure p { () } ``` ```pulse ghost fn gather' (#a:Type) (arr:array a) (#s0 #s1:Ghost.erased (Seq.seq a)) (#p0 #p1:perm) requires pts_to arr #p0 s0 ** pts_to arr #p1 s1 ensures pts_to arr #(sum_perm p0 p1) s0 ** pure (s0 == s1) { unfold pts_to arr #p0 s0; with w0. assert (pcm_pts_to (ptr_of arr).base w0); unfold pts_to arr #p1 s1; with w1. assert (pcm_pts_to (ptr_of arr).base w1); Pulse.Lib.Core.gather (ptr_of arr).base w0 w1; of_squash (mk_carrier_gather (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 s1 p0 p1 ()); of_squash (mk_carrier_valid_sum_perm (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 p0 p1); fold pts_to arr #(sum_perm p0 p1) s0; } ``` let gather = gather' let ptr_shift (#elt: Type) (p: ptr elt) (off: nat {offset p + off <= base_len (base p)}) : ptr elt = { base_len = p.base_len; base = p.base; offset = p.offset + off; } let split_l' (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : array elt = { p = ptr_of a; length=i } irreducible let split_l (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : x:array elt { x == split_l' a i } = split_l' a i let split_r' (#elt: Type) (a: array elt) (i: nat {i <= length a}) : array elt = { p= ptr_shift (ptr_of a) i; length=Ghost.hide (length a - i) } irreducible let split_r (#elt: Type) (a: array elt) (i: nat {i <= length a}) : x:array elt { x == split_r' a i } = split_r' a i let array_slice (#elt: Type) (a: array elt) (i:nat) (j: nat {i <= j /\ j <= length a}) : GTot (array elt) = split_l (split_r a i) (j - i) let in_bounds (i j:nat) (s:array 'a) = squash (i <= j /\ j <= length s) ```pulse ghost fn elim_in_bounds (#elt:Type) (#i #j:nat) (s:array elt) (p:in_bounds i j s) requires emp ensures pure (i <= j /\ j <= length s) { () } ```

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

x: 'a -> Pulse.Lib.Core.vprop

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.Core.emp", "Pulse.Lib.Core.vprop" ]

[]

false

true

false

let token (x: 'a) =

emp

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.pts_to_range_intro

val pts_to_range_intro (#elt: Type) (a: array elt) (p: perm) (s: Seq.seq elt) : stt_ghost unit (pts_to a #p s) (fun _ -> pts_to_range a 0 (length a) #p s)

let pts_to_range_intro = pts_to_range_intro'

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 44, "end_line": 544, "start_col": 0, "start_line": 544 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one)) let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a ) let mk_array (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) : array elt = { p = { base_len; base; offset} ; length = Ghost.hide (SZ.v base_len - offset) } ```pulse ghost fn fold_pts_to (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) (#p: perm { p `lesser_equal_perm` full_perm}) (s: Seq.seq elt { Seq.length s == SZ.v base_len - offset}) requires pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p) ensures pts_to (mk_array base_len base offset) #p s { let a = (mk_array base_len base offset); rewrite (pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p)) as pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p); fold (pts_to a #p s); rewrite (pts_to a #p s) as (pts_to (mk_array base_len base offset) #p s); } ``` ```pulse ghost fn pts_to_len' (#elt: Type u#1) (a:array elt) (#p:perm) (#x:Seq.seq elt) requires pts_to a #p x ensures pts_to a #p x ** pure (length a == Seq.length x) { unfold pts_to a #p x; fold pts_to a #p x; } ``` let pts_to_len = pts_to_len' ```pulse fn alloc' (#elt: Type u#1) (x: elt) (n: SZ.t) requires emp returns a:array elt ensures pts_to a (Seq.create (SZ.v n) x) ** pure (length a == SZ.v n /\ is_full_array a) { let v = (mk_carrier (SZ.v n) 0 (Seq.create (SZ.v n) x) full_perm); FStar.PCM.compatible_refl (PA.pcm elt (SZ.v n)) v; let b = Pulse.Lib.Core.alloc #_ #(PA.pcm elt (SZ.v n)) v; pts_to_not_null b _; fold_pts_to n b 0 #full_perm (Seq.create (SZ.v n) x); mk_array n b 0; } ``` let alloc = alloc' ```pulse fn read (#t: Type) (a: array t) (i: SZ.t) (#p: perm) (#s: Ghost.erased (Seq.seq t){SZ.v i < Seq.length s}) requires pts_to a #p s returns res:t ensures pts_to a #p s ** pure (res == Seq.index s (SZ.v i)) { unfold pts_to a #p s; with w. assert (pcm_pts_to (ptr_of a).base w); let v = Pulse.Lib.Core.read (ptr_of a).base w (fun _ -> w); fold (pts_to a #p s); fst (Some?.v (FStar.Map.sel v ((ptr_of a).offset + SZ.v i))); } ``` let op_Array_Access = read let mk_carrier_upd (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (i: nat) (v: elt) (_: squash ( offset + Seq.length s <= len /\ i < Seq.length s )) : Lemma (ensures ( let o = mk_carrier len offset s full_perm in let o' = mk_carrier len offset (Seq.upd s i v) full_perm in o' `Map.equal` Map.upd o (offset + i) (Some (v, full_perm)) )) = () ```pulse fn write (#t: Type) (a: array t) (i: SZ.t) (v: t) (#s: Ghost.erased (Seq.seq t) {SZ.v i < Seq.length s}) requires pts_to a s ensures pts_to a (Seq.upd s (SZ.v i) v) { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); mk_carrier_upd (SZ.v (ptr_of a).base_len) ((ptr_of a).offset) s (SZ.v i) v (); Pulse.Lib.Core.write (ptr_of a).base w _ (PM.lift_frame_preserving_upd _ _ (Frac.mk_frame_preserving_upd (Seq.index s (SZ.v i)) v ) _ ((ptr_of a).offset + SZ.v i)); fold (pts_to a #full_perm (Seq.upd s (SZ.v i) v)); } ``` let op_Array_Assignment = write (* let frame_preserving_upd_one (#elt:Type) (n:erased nat) (s:erased (Seq.seq elt) { Seq.length s == reveal n }) : FStar.PCM.frame_preserving_upd (PA.pcm elt n) (mk_carrier n 0 s full_perm) (PA.one #elt #n) = fun _ -> admit(); (PA.one #elt #n) *) ```pulse fn free' (#elt: Type) (a: array elt) (#s: Ghost.erased (Seq.seq elt)) requires pts_to a s ** pure (is_full_array a) ensures emp { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); // Pulse.Lib.Core.write (ptr_of a).base w (PA.one #elt #(length a)) (frame_preserving_upd_one #elt (length a) s); drop_ (pcm_pts_to (ptr_of a).base _) } ``` let free = free' let valid_sum_perm (len: nat) (offset: nat) (slice_len: nat) (p1 p2: perm) : Tot prop = let open FStar.Real in valid_perm len offset slice_len (sum_perm p1 p2) ```pulse ghost fn mk_carrier_share (#elt: Type u#1) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) (_:squash (valid_sum_perm len offset (Seq.length s) p1 p2)) requires emp ensures ( // let c1 = (mk_carrier len offset s p1) in pure ( composable (mk_carrier len offset s p1) (mk_carrier len offset s p2) /\ mk_carrier len offset s (p1 `sum_perm` p2) `Map.equal` ((mk_carrier len offset s p1) `compose` (mk_carrier len offset s p2)) ) ) { () } ``` ```pulse ghost fn share' (#elt:Type) (arr:array elt) (#s:Ghost.erased (Seq.seq elt)) (#p:perm) requires pts_to arr #p s ensures pts_to arr #(half_perm p) s ** pts_to arr #(half_perm p) s { unfold pts_to arr #p s; with w. assert (pcm_pts_to (ptr_of arr).base w); mk_carrier_share (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p) (half_perm p) (); Pulse.Lib.Core.share (ptr_of arr).base (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)) (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)); fold pts_to arr #(half_perm p) s; fold pts_to arr #(half_perm p) s; } ``` let share = share' let mk_carrier_gather (#elt: Type) (len: nat) (offset: nat) (s1 s2: Seq.seq elt) (p1 p2: perm) (_:squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ Seq.length s1 == Seq.length s2 /\ offset + Seq.length s1 <= len )) : squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ mk_carrier len offset s1 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ mk_carrier len offset s2 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ s1 == s2 ) = let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in assert (composable c1 c2); assert (mk_carrier len offset s1 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); assert (mk_carrier len offset s2 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); mk_carrier_inj len offset s1 s2 (p1 `sum_perm` p2) (p1 `sum_perm` p2) let mk_carrier_valid_sum_perm (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) : squash (let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in composable c1 c2 <==> valid_sum_perm len offset (Seq.length s) p1 p2) = let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in if Seq.length s > 0 && offset + Seq.length s <= len then let open FStar.Real in assert (Frac.composable (Map.sel c1 offset) (Map.sel c2 offset) <==> valid_perm len offset (Seq.length s) (sum_perm p1 p2)) else () ```pulse ghost fn of_squash (#p:prop) (s:squash p) requires emp ensures pure p { () } ``` ```pulse ghost fn gather' (#a:Type) (arr:array a) (#s0 #s1:Ghost.erased (Seq.seq a)) (#p0 #p1:perm) requires pts_to arr #p0 s0 ** pts_to arr #p1 s1 ensures pts_to arr #(sum_perm p0 p1) s0 ** pure (s0 == s1) { unfold pts_to arr #p0 s0; with w0. assert (pcm_pts_to (ptr_of arr).base w0); unfold pts_to arr #p1 s1; with w1. assert (pcm_pts_to (ptr_of arr).base w1); Pulse.Lib.Core.gather (ptr_of arr).base w0 w1; of_squash (mk_carrier_gather (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 s1 p0 p1 ()); of_squash (mk_carrier_valid_sum_perm (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 p0 p1); fold pts_to arr #(sum_perm p0 p1) s0; } ``` let gather = gather' let ptr_shift (#elt: Type) (p: ptr elt) (off: nat {offset p + off <= base_len (base p)}) : ptr elt = { base_len = p.base_len; base = p.base; offset = p.offset + off; } let split_l' (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : array elt = { p = ptr_of a; length=i } irreducible let split_l (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : x:array elt { x == split_l' a i } = split_l' a i let split_r' (#elt: Type) (a: array elt) (i: nat {i <= length a}) : array elt = { p= ptr_shift (ptr_of a) i; length=Ghost.hide (length a - i) } irreducible let split_r (#elt: Type) (a: array elt) (i: nat {i <= length a}) : x:array elt { x == split_r' a i } = split_r' a i let array_slice (#elt: Type) (a: array elt) (i:nat) (j: nat {i <= j /\ j <= length a}) : GTot (array elt) = split_l (split_r a i) (j - i) let in_bounds (i j:nat) (s:array 'a) = squash (i <= j /\ j <= length s) ```pulse ghost fn elim_in_bounds (#elt:Type) (#i #j:nat) (s:array elt) (p:in_bounds i j s) requires emp ensures pure (i <= j /\ j <= length s) { () } ``` let token (x:'a) = emp let pts_to_range (#a:Type) (x:array a) ([@@@ equate_by_smt] i:nat) ([@@@ equate_by_smt] j: nat) (#[exact (`full_perm)] p:perm) ([@@@ equate_by_smt] s: Seq.seq a) : vprop = exists* (q:in_bounds i j x). pts_to (array_slice x i j) #p s ** token q ```pulse ghost fn pts_to_range_prop' (#elt: Type) (a: array elt) (#i #j: nat) (#p: perm) (#s: Seq.seq elt) requires pts_to_range a i j #p s ensures pts_to_range a i j #p s ** pure ( (i <= j /\ j <= length a /\ Seq.length s == j - i) ) { unfold pts_to_range a i j #p s; with q. assert (token #(in_bounds i j a) q); elim_in_bounds a q; pts_to_len (array_slice a i j); fold pts_to_range a i j #p s; } ``` let pts_to_range_prop = pts_to_range_prop' ```pulse ghost fn pts_to_range_intro' (#elt: Type) (a: array elt) (p: perm) (s: Seq.seq elt) requires pts_to a #p s ensures pts_to_range a 0 (length a) #p s { rewrite each a as (array_slice a 0 (length a)); let q : in_bounds 0 (length a) a = (); fold (token #(in_bounds 0 (length a) a) q); fold (pts_to_range a 0 (length a) #p s); }

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Pulse.Lib.HigherArray.array elt -> p: PulseCore.FractionalPermission.perm -> s: FStar.Seq.Base.seq elt -> Pulse.Lib.Core.stt_ghost Prims.unit (Pulse.Lib.HigherArray.pts_to a s) (fun _ -> Pulse.Lib.HigherArray.pts_to_range a 0 (Pulse.Lib.HigherArray.length a) s)

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.pts_to_range_intro'" ]

[]

false

let pts_to_range_intro =

pts_to_range_intro'

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.split_l

val split_l (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : x: array elt {x == split_l' a i}

let split_l (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : x:array elt { x == split_l' a i } = split_l' a i

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 14, "end_line": 459, "start_col": 0, "start_line": 454 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one)) let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a ) let mk_array (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) : array elt = { p = { base_len; base; offset} ; length = Ghost.hide (SZ.v base_len - offset) } ```pulse ghost fn fold_pts_to (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) (#p: perm { p `lesser_equal_perm` full_perm}) (s: Seq.seq elt { Seq.length s == SZ.v base_len - offset}) requires pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p) ensures pts_to (mk_array base_len base offset) #p s { let a = (mk_array base_len base offset); rewrite (pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p)) as pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p); fold (pts_to a #p s); rewrite (pts_to a #p s) as (pts_to (mk_array base_len base offset) #p s); } ``` ```pulse ghost fn pts_to_len' (#elt: Type u#1) (a:array elt) (#p:perm) (#x:Seq.seq elt) requires pts_to a #p x ensures pts_to a #p x ** pure (length a == Seq.length x) { unfold pts_to a #p x; fold pts_to a #p x; } ``` let pts_to_len = pts_to_len' ```pulse fn alloc' (#elt: Type u#1) (x: elt) (n: SZ.t) requires emp returns a:array elt ensures pts_to a (Seq.create (SZ.v n) x) ** pure (length a == SZ.v n /\ is_full_array a) { let v = (mk_carrier (SZ.v n) 0 (Seq.create (SZ.v n) x) full_perm); FStar.PCM.compatible_refl (PA.pcm elt (SZ.v n)) v; let b = Pulse.Lib.Core.alloc #_ #(PA.pcm elt (SZ.v n)) v; pts_to_not_null b _; fold_pts_to n b 0 #full_perm (Seq.create (SZ.v n) x); mk_array n b 0; } ``` let alloc = alloc' ```pulse fn read (#t: Type) (a: array t) (i: SZ.t) (#p: perm) (#s: Ghost.erased (Seq.seq t){SZ.v i < Seq.length s}) requires pts_to a #p s returns res:t ensures pts_to a #p s ** pure (res == Seq.index s (SZ.v i)) { unfold pts_to a #p s; with w. assert (pcm_pts_to (ptr_of a).base w); let v = Pulse.Lib.Core.read (ptr_of a).base w (fun _ -> w); fold (pts_to a #p s); fst (Some?.v (FStar.Map.sel v ((ptr_of a).offset + SZ.v i))); } ``` let op_Array_Access = read let mk_carrier_upd (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (i: nat) (v: elt) (_: squash ( offset + Seq.length s <= len /\ i < Seq.length s )) : Lemma (ensures ( let o = mk_carrier len offset s full_perm in let o' = mk_carrier len offset (Seq.upd s i v) full_perm in o' `Map.equal` Map.upd o (offset + i) (Some (v, full_perm)) )) = () ```pulse fn write (#t: Type) (a: array t) (i: SZ.t) (v: t) (#s: Ghost.erased (Seq.seq t) {SZ.v i < Seq.length s}) requires pts_to a s ensures pts_to a (Seq.upd s (SZ.v i) v) { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); mk_carrier_upd (SZ.v (ptr_of a).base_len) ((ptr_of a).offset) s (SZ.v i) v (); Pulse.Lib.Core.write (ptr_of a).base w _ (PM.lift_frame_preserving_upd _ _ (Frac.mk_frame_preserving_upd (Seq.index s (SZ.v i)) v ) _ ((ptr_of a).offset + SZ.v i)); fold (pts_to a #full_perm (Seq.upd s (SZ.v i) v)); } ``` let op_Array_Assignment = write (* let frame_preserving_upd_one (#elt:Type) (n:erased nat) (s:erased (Seq.seq elt) { Seq.length s == reveal n }) : FStar.PCM.frame_preserving_upd (PA.pcm elt n) (mk_carrier n 0 s full_perm) (PA.one #elt #n) = fun _ -> admit(); (PA.one #elt #n) *) ```pulse fn free' (#elt: Type) (a: array elt) (#s: Ghost.erased (Seq.seq elt)) requires pts_to a s ** pure (is_full_array a) ensures emp { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); // Pulse.Lib.Core.write (ptr_of a).base w (PA.one #elt #(length a)) (frame_preserving_upd_one #elt (length a) s); drop_ (pcm_pts_to (ptr_of a).base _) } ``` let free = free' let valid_sum_perm (len: nat) (offset: nat) (slice_len: nat) (p1 p2: perm) : Tot prop = let open FStar.Real in valid_perm len offset slice_len (sum_perm p1 p2) ```pulse ghost fn mk_carrier_share (#elt: Type u#1) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) (_:squash (valid_sum_perm len offset (Seq.length s) p1 p2)) requires emp ensures ( // let c1 = (mk_carrier len offset s p1) in pure ( composable (mk_carrier len offset s p1) (mk_carrier len offset s p2) /\ mk_carrier len offset s (p1 `sum_perm` p2) `Map.equal` ((mk_carrier len offset s p1) `compose` (mk_carrier len offset s p2)) ) ) { () } ``` ```pulse ghost fn share' (#elt:Type) (arr:array elt) (#s:Ghost.erased (Seq.seq elt)) (#p:perm) requires pts_to arr #p s ensures pts_to arr #(half_perm p) s ** pts_to arr #(half_perm p) s { unfold pts_to arr #p s; with w. assert (pcm_pts_to (ptr_of arr).base w); mk_carrier_share (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p) (half_perm p) (); Pulse.Lib.Core.share (ptr_of arr).base (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)) (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)); fold pts_to arr #(half_perm p) s; fold pts_to arr #(half_perm p) s; } ``` let share = share' let mk_carrier_gather (#elt: Type) (len: nat) (offset: nat) (s1 s2: Seq.seq elt) (p1 p2: perm) (_:squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ Seq.length s1 == Seq.length s2 /\ offset + Seq.length s1 <= len )) : squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ mk_carrier len offset s1 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ mk_carrier len offset s2 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ s1 == s2 ) = let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in assert (composable c1 c2); assert (mk_carrier len offset s1 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); assert (mk_carrier len offset s2 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); mk_carrier_inj len offset s1 s2 (p1 `sum_perm` p2) (p1 `sum_perm` p2) let mk_carrier_valid_sum_perm (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) : squash (let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in composable c1 c2 <==> valid_sum_perm len offset (Seq.length s) p1 p2) = let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in if Seq.length s > 0 && offset + Seq.length s <= len then let open FStar.Real in assert (Frac.composable (Map.sel c1 offset) (Map.sel c2 offset) <==> valid_perm len offset (Seq.length s) (sum_perm p1 p2)) else () ```pulse ghost fn of_squash (#p:prop) (s:squash p) requires emp ensures pure p { () } ``` ```pulse ghost fn gather' (#a:Type) (arr:array a) (#s0 #s1:Ghost.erased (Seq.seq a)) (#p0 #p1:perm) requires pts_to arr #p0 s0 ** pts_to arr #p1 s1 ensures pts_to arr #(sum_perm p0 p1) s0 ** pure (s0 == s1) { unfold pts_to arr #p0 s0; with w0. assert (pcm_pts_to (ptr_of arr).base w0); unfold pts_to arr #p1 s1; with w1. assert (pcm_pts_to (ptr_of arr).base w1); Pulse.Lib.Core.gather (ptr_of arr).base w0 w1; of_squash (mk_carrier_gather (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 s1 p0 p1 ()); of_squash (mk_carrier_valid_sum_perm (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 p0 p1); fold pts_to arr #(sum_perm p0 p1) s0; } ``` let gather = gather' let ptr_shift (#elt: Type) (p: ptr elt) (off: nat {offset p + off <= base_len (base p)}) : ptr elt = { base_len = p.base_len; base = p.base; offset = p.offset + off; } let split_l' (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : array elt = { p = ptr_of a; length=i }

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a: Pulse.Lib.HigherArray.array elt -> i: FStar.Ghost.erased Prims.nat {FStar.Ghost.reveal i <= Pulse.Lib.HigherArray.length a} -> x: Pulse.Lib.HigherArray.array elt {x == Pulse.Lib.HigherArray.split_l' a i}

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.array", "FStar.Ghost.erased", "Prims.nat", "Prims.b2t", "Prims.op_LessThanOrEqual", "FStar.Ghost.reveal", "Pulse.Lib.HigherArray.length", "Pulse.Lib.HigherArray.split_l'", "Prims.eq2" ]

[]

false

let split_l (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : x: array elt {x == split_l' a i} =

split_l' a i

false

MiniParse.Tac.Base.fst

MiniParse.Tac.Base.unfold_term

val unfold_term (t: T.term) : T.Tac T.term

let unfold_term (t: T.term) : T.Tac T.term = match T.inspect t with | T.Tv_FVar v -> unfold_fv v | _ -> tfail "Not a global variable"

{ "file_name": "examples/miniparse/MiniParse.Tac.Base.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 38, "end_line": 90, "start_col": 0, "start_line": 87 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module MiniParse.Tac.Base module T = FStar.Tactics.V2 module L = FStar.List.Tot let pack_nat (n: nat) : T.Tac T.term = T.pack (T.Tv_Const (T.C_Int n)) let rec app_head_rev_tail (t: T.term) : T.Tac (T.term * list T.argv) = let ins = T.inspect t in if T.Tv_App? ins then let (T.Tv_App u v) = ins in let (x, l) = app_head_rev_tail u in (x, v :: l) else (t, []) let app_head_tail (t: T.term) : T.Tac (T.term * list T.argv) = let (x, l) = app_head_rev_tail t in (x, L.rev l) inline_for_extraction let ctest (v: bool) (test: bool) : Tot Type = squash (test == v) inline_for_extraction let mk_if_t (#t: Type) (test: bool) (x1: (ctest true test -> Tot t)) (x2: (ctest false test -> Tot t)) : Tot t = if test then x1 () else x2 () let mk_if (test ty e_true e_false: T.term) : T.Tac T.term = let bt = T.fresh_binder (T.mk_app (`(ctest true)) [test, T.Q_Explicit]) in let bf = T.fresh_binder (T.mk_app (`(ctest false)) [test, T.Q_Explicit]) in let ft = T.pack (T.Tv_Abs bt e_true) in let ff = T.pack (T.Tv_Abs bf e_false) in T.mk_app (`(mk_if_t)) [ ty, T.Q_Implicit; test, T.Q_Explicit; ft, T.Q_Explicit; ff, T.Q_Explicit; ] let tfail (#a: Type) (s: Prims.string) : T.Tac a = T.debug ("Tactic failure: " ^ s); T.fail s let rec string_of_name (n: T.name) : Tot string = match n with | [] -> "" | [a] -> a | a :: b -> a ^ "." ^ string_of_name b let unfold_fv (t: T.fv) : T.Tac T.term = let env = T.cur_env () in let n = T.inspect_fv t in match T.lookup_typ env n with | Some s -> begin match T.inspect_sigelt s with | T.Sg_Let {isrec=false; lbs=[lb]} -> let nm = string_of_name n in T.debug ("Unfolded definition: " ^ nm); T.(lb.lb_def) | _ -> let nm = string_of_name n in tfail (nm ^ ": not a non-recursive let definition") end | _ -> tfail "Definition not found"

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Squash.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.List.Tot.fst.checked" ], "interface_file": false, "source_file": "MiniParse.Tac.Base.fst" }

[ { "abbrev": true, "full_module": "FStar.List.Tot", "short_module": "L" }, { "abbrev": true, "full_module": "FStar.Tactics.V2", "short_module": "T" }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

t: FStar.Tactics.NamedView.term -> FStar.Tactics.Effect.Tac FStar.Tactics.NamedView.term

FStar.Tactics.Effect.Tac

[]

[ "FStar.Tactics.NamedView.term", "FStar.Stubs.Reflection.Types.fv", "MiniParse.Tac.Base.unfold_fv", "FStar.Tactics.NamedView.named_term_view", "MiniParse.Tac.Base.tfail", "FStar.Tactics.NamedView.inspect" ]

[]

false

true

false

let unfold_term (t: T.term) : T.Tac T.term =

match T.inspect t with | T.Tv_FVar v -> unfold_fv v | _ -> tfail "Not a global variable"

false

MiniParse.Tac.Base.fst

MiniParse.Tac.Base.mk_if

val mk_if (test ty e_true e_false: T.term) : T.Tac T.term

let mk_if (test ty e_true e_false: T.term) : T.Tac T.term = let bt = T.fresh_binder (T.mk_app (`(ctest true)) [test, T.Q_Explicit]) in let bf = T.fresh_binder (T.mk_app (`(ctest false)) [test, T.Q_Explicit]) in let ft = T.pack (T.Tv_Abs bt e_true) in let ff = T.pack (T.Tv_Abs bf e_false) in T.mk_app (`(mk_if_t)) [ ty, T.Q_Implicit; test, T.Q_Explicit; ft, T.Q_Explicit; ff, T.Q_Explicit; ]

{ "file_name": "examples/miniparse/MiniParse.Tac.Base.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 3, "end_line": 59, "start_col": 0, "start_line": 49 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module MiniParse.Tac.Base module T = FStar.Tactics.V2 module L = FStar.List.Tot let pack_nat (n: nat) : T.Tac T.term = T.pack (T.Tv_Const (T.C_Int n)) let rec app_head_rev_tail (t: T.term) : T.Tac (T.term * list T.argv) = let ins = T.inspect t in if T.Tv_App? ins then let (T.Tv_App u v) = ins in let (x, l) = app_head_rev_tail u in (x, v :: l) else (t, []) let app_head_tail (t: T.term) : T.Tac (T.term * list T.argv) = let (x, l) = app_head_rev_tail t in (x, L.rev l) inline_for_extraction let ctest (v: bool) (test: bool) : Tot Type = squash (test == v) inline_for_extraction let mk_if_t (#t: Type) (test: bool) (x1: (ctest true test -> Tot t)) (x2: (ctest false test -> Tot t)) : Tot t = if test then x1 () else x2 ()

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Squash.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.List.Tot.fst.checked" ], "interface_file": false, "source_file": "MiniParse.Tac.Base.fst" }

[ { "abbrev": true, "full_module": "FStar.List.Tot", "short_module": "L" }, { "abbrev": true, "full_module": "FStar.Tactics.V2", "short_module": "T" }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

test: FStar.Tactics.NamedView.term -> ty: FStar.Tactics.NamedView.term -> e_true: FStar.Tactics.NamedView.term -> e_false: FStar.Tactics.NamedView.term -> FStar.Tactics.Effect.Tac FStar.Tactics.NamedView.term

FStar.Tactics.Effect.Tac

[]

[ "FStar.Tactics.NamedView.term", "FStar.Reflection.V2.Derived.mk_app", "Prims.Cons", "FStar.Stubs.Reflection.V2.Data.argv", "FStar.Pervasives.Native.Mktuple2", "FStar.Stubs.Reflection.Types.term", "FStar.Stubs.Reflection.V2.Data.aqualv", "FStar.Stubs.Reflection.V2.Data.Q_Implicit", "FStar.Stubs.Reflection.V2.Data.Q_Explicit", "Prims.Nil", "FStar.Tactics.NamedView.pack", "FStar.Tactics.NamedView.Tv_Abs", "FStar.Tactics.NamedView.simple_binder", "FStar.Tactics.V2.Derived.fresh_binder" ]

[]

false

true

false

let mk_if (test ty e_true e_false: T.term) : T.Tac T.term =

let bt = T.fresh_binder (T.mk_app (`(ctest true)) [test, T.Q_Explicit]) in let bf = T.fresh_binder (T.mk_app (`(ctest false)) [test, T.Q_Explicit]) in let ft = T.pack (T.Tv_Abs bt e_true) in let ff = T.pack (T.Tv_Abs bf e_false) in T.mk_app (`(mk_if_t)) [ty, T.Q_Implicit; test, T.Q_Explicit; ft, T.Q_Explicit; ff, T.Q_Explicit]

false

MiniParse.Tac.Base.fst

MiniParse.Tac.Base.unfold_fv

val unfold_fv (t: T.fv) : T.Tac T.term

let unfold_fv (t: T.fv) : T.Tac T.term = let env = T.cur_env () in let n = T.inspect_fv t in match T.lookup_typ env n with | Some s -> begin match T.inspect_sigelt s with | T.Sg_Let {isrec=false; lbs=[lb]} -> let nm = string_of_name n in T.debug ("Unfolded definition: " ^ nm); T.(lb.lb_def) | _ -> let nm = string_of_name n in tfail (nm ^ ": not a non-recursive let definition") end | _ -> tfail "Definition not found"

{ "file_name": "examples/miniparse/MiniParse.Tac.Base.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 37, "end_line": 85, "start_col": 0, "start_line": 71 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module MiniParse.Tac.Base module T = FStar.Tactics.V2 module L = FStar.List.Tot let pack_nat (n: nat) : T.Tac T.term = T.pack (T.Tv_Const (T.C_Int n)) let rec app_head_rev_tail (t: T.term) : T.Tac (T.term * list T.argv) = let ins = T.inspect t in if T.Tv_App? ins then let (T.Tv_App u v) = ins in let (x, l) = app_head_rev_tail u in (x, v :: l) else (t, []) let app_head_tail (t: T.term) : T.Tac (T.term * list T.argv) = let (x, l) = app_head_rev_tail t in (x, L.rev l) inline_for_extraction let ctest (v: bool) (test: bool) : Tot Type = squash (test == v) inline_for_extraction let mk_if_t (#t: Type) (test: bool) (x1: (ctest true test -> Tot t)) (x2: (ctest false test -> Tot t)) : Tot t = if test then x1 () else x2 () let mk_if (test ty e_true e_false: T.term) : T.Tac T.term = let bt = T.fresh_binder (T.mk_app (`(ctest true)) [test, T.Q_Explicit]) in let bf = T.fresh_binder (T.mk_app (`(ctest false)) [test, T.Q_Explicit]) in let ft = T.pack (T.Tv_Abs bt e_true) in let ff = T.pack (T.Tv_Abs bf e_false) in T.mk_app (`(mk_if_t)) [ ty, T.Q_Implicit; test, T.Q_Explicit; ft, T.Q_Explicit; ff, T.Q_Explicit; ] let tfail (#a: Type) (s: Prims.string) : T.Tac a = T.debug ("Tactic failure: " ^ s); T.fail s let rec string_of_name (n: T.name) : Tot string = match n with | [] -> "" | [a] -> a | a :: b -> a ^ "." ^ string_of_name b

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Squash.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.List.Tot.fst.checked" ], "interface_file": false, "source_file": "MiniParse.Tac.Base.fst" }

[ { "abbrev": true, "full_module": "FStar.List.Tot", "short_module": "L" }, { "abbrev": true, "full_module": "FStar.Tactics.V2", "short_module": "T" }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

t: FStar.Stubs.Reflection.Types.fv -> FStar.Tactics.Effect.Tac FStar.Tactics.NamedView.term

FStar.Tactics.Effect.Tac

[]

[ "FStar.Stubs.Reflection.Types.fv", "FStar.Stubs.Reflection.V2.Builtins.lookup_typ", "FStar.Stubs.Reflection.Types.sigelt", "FStar.Tactics.NamedView.letbinding", "FStar.Tactics.NamedView.__proj__Mkletbinding__item__lb_def", "FStar.Tactics.NamedView.term", "Prims.unit", "FStar.Tactics.V2.Derived.debug", "Prims.op_Hat", "Prims.string", "MiniParse.Tac.Base.string_of_name", "FStar.Tactics.NamedView.named_sigelt_view", "MiniParse.Tac.Base.tfail", "FStar.Tactics.NamedView.inspect_sigelt", "FStar.Pervasives.Native.option", "FStar.Stubs.Reflection.Types.name", "FStar.Stubs.Reflection.V2.Builtins.inspect_fv", "FStar.Stubs.Reflection.Types.env", "FStar.Tactics.V2.Derived.cur_env" ]

[]

false

true

false

let unfold_fv (t: T.fv) : T.Tac T.term =

let env = T.cur_env () in let n = T.inspect_fv t in match T.lookup_typ env n with | Some s -> (match T.inspect_sigelt s with | T.Sg_Let { isrec = false ; lbs = [lb] } -> let nm = string_of_name n in T.debug ("Unfolded definition: " ^ nm); let open T in lb.lb_def | _ -> let nm = string_of_name n in tfail (nm ^ ": not a non-recursive let definition")) | _ -> tfail "Definition not found"

false

MiniParse.Tac.Base.fst

MiniParse.Tac.Base.imm_solve_goal

val imm_solve_goal (l: list (unit -> T.Tac unit)) : T.Tac unit

let rec imm_solve_goal (l: list (unit -> T.Tac unit)) : T.Tac unit = T.first (List.Tot.append l [ (fun () -> T.trivial (); tsuccess "trivial" ); (fun () -> T.trefl (); tsuccess "reflexivity" ); (fun () -> T.assumption (); tsuccess "assumption" ); (fun () -> T.norm [delta; zeta; iota; primops]; T.trivial (); tsuccess "norm trivial" ); (fun () -> T.apply (`(FStar.Squash.return_squash)); to_all_goals (fun () -> imm_solve_goal l); tsuccess "return_squash imm_solve" ); ])

{ "file_name": "examples/miniparse/MiniParse.Tac.Base.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 4, "end_line": 128, "start_col": 0, "start_line": 104 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module MiniParse.Tac.Base module T = FStar.Tactics.V2 module L = FStar.List.Tot let pack_nat (n: nat) : T.Tac T.term = T.pack (T.Tv_Const (T.C_Int n)) let rec app_head_rev_tail (t: T.term) : T.Tac (T.term * list T.argv) = let ins = T.inspect t in if T.Tv_App? ins then let (T.Tv_App u v) = ins in let (x, l) = app_head_rev_tail u in (x, v :: l) else (t, []) let app_head_tail (t: T.term) : T.Tac (T.term * list T.argv) = let (x, l) = app_head_rev_tail t in (x, L.rev l) inline_for_extraction let ctest (v: bool) (test: bool) : Tot Type = squash (test == v) inline_for_extraction let mk_if_t (#t: Type) (test: bool) (x1: (ctest true test -> Tot t)) (x2: (ctest false test -> Tot t)) : Tot t = if test then x1 () else x2 () let mk_if (test ty e_true e_false: T.term) : T.Tac T.term = let bt = T.fresh_binder (T.mk_app (`(ctest true)) [test, T.Q_Explicit]) in let bf = T.fresh_binder (T.mk_app (`(ctest false)) [test, T.Q_Explicit]) in let ft = T.pack (T.Tv_Abs bt e_true) in let ff = T.pack (T.Tv_Abs bf e_false) in T.mk_app (`(mk_if_t)) [ ty, T.Q_Implicit; test, T.Q_Explicit; ft, T.Q_Explicit; ff, T.Q_Explicit; ] let tfail (#a: Type) (s: Prims.string) : T.Tac a = T.debug ("Tactic failure: " ^ s); T.fail s let rec string_of_name (n: T.name) : Tot string = match n with | [] -> "" | [a] -> a | a :: b -> a ^ "." ^ string_of_name b let unfold_fv (t: T.fv) : T.Tac T.term = let env = T.cur_env () in let n = T.inspect_fv t in match T.lookup_typ env n with | Some s -> begin match T.inspect_sigelt s with | T.Sg_Let {isrec=false; lbs=[lb]} -> let nm = string_of_name n in T.debug ("Unfolded definition: " ^ nm); T.(lb.lb_def) | _ -> let nm = string_of_name n in tfail (nm ^ ": not a non-recursive let definition") end | _ -> tfail "Definition not found" let unfold_term (t: T.term) : T.Tac T.term = match T.inspect t with | T.Tv_FVar v -> unfold_fv v | _ -> tfail "Not a global variable" let tsuccess (s: string) : T.Tac unit = T.debug ("Checking success for: " ^ s); T.qed (); T.debug ("Success: " ^ s) let rec to_all_goals (t: unit -> T.Tac unit) : T.Tac unit = if T.ngoals () = 0 then () else let _ = T.divide 1 t (fun () -> to_all_goals t) in ()

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Squash.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.List.Tot.fst.checked" ], "interface_file": false, "source_file": "MiniParse.Tac.Base.fst" }

[ { "abbrev": true, "full_module": "FStar.List.Tot", "short_module": "L" }, { "abbrev": true, "full_module": "FStar.Tactics.V2", "short_module": "T" }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

l: Prims.list (_: Prims.unit -> FStar.Tactics.Effect.Tac Prims.unit) -> FStar.Tactics.Effect.Tac Prims.unit

FStar.Tactics.Effect.Tac

[]

[ "Prims.list", "Prims.unit", "FStar.Tactics.V2.Derived.first", "FStar.List.Tot.Base.append", "Prims.Cons", "MiniParse.Tac.Base.tsuccess", "FStar.Tactics.V2.Derived.trivial", "FStar.Tactics.V2.Derived.trefl", "FStar.Tactics.V2.Derived.assumption", "FStar.Stubs.Tactics.V2.Builtins.norm", "FStar.Pervasives.norm_step", "FStar.Pervasives.delta", "FStar.Pervasives.zeta", "FStar.Pervasives.iota", "FStar.Pervasives.primops", "Prims.Nil", "MiniParse.Tac.Base.to_all_goals", "MiniParse.Tac.Base.imm_solve_goal", "FStar.Tactics.V2.Derived.apply" ]

[ "recursion" ]

false

true

false

let rec imm_solve_goal (l: list (unit -> T.Tac unit)) : T.Tac unit =

T.first (List.Tot.append l [ (fun () -> T.trivial (); tsuccess "trivial"); (fun () -> T.trefl (); tsuccess "reflexivity"); (fun () -> T.assumption (); tsuccess "assumption"); (fun () -> T.norm [delta; zeta; iota; primops]; T.trivial (); tsuccess "norm trivial"); (fun () -> T.apply (`(FStar.Squash.return_squash)); to_all_goals (fun () -> imm_solve_goal l); tsuccess "return_squash imm_solve") ])

false

MiniParse.Tac.Base.fst

MiniParse.Tac.Base.tsuccess

val tsuccess (s: string) : T.Tac unit

let tsuccess (s: string) : T.Tac unit = T.debug ("Checking success for: " ^ s); T.qed (); T.debug ("Success: " ^ s)

{ "file_name": "examples/miniparse/MiniParse.Tac.Base.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 27, "end_line": 95, "start_col": 0, "start_line": 92 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module MiniParse.Tac.Base module T = FStar.Tactics.V2 module L = FStar.List.Tot let pack_nat (n: nat) : T.Tac T.term = T.pack (T.Tv_Const (T.C_Int n)) let rec app_head_rev_tail (t: T.term) : T.Tac (T.term * list T.argv) = let ins = T.inspect t in if T.Tv_App? ins then let (T.Tv_App u v) = ins in let (x, l) = app_head_rev_tail u in (x, v :: l) else (t, []) let app_head_tail (t: T.term) : T.Tac (T.term * list T.argv) = let (x, l) = app_head_rev_tail t in (x, L.rev l) inline_for_extraction let ctest (v: bool) (test: bool) : Tot Type = squash (test == v) inline_for_extraction let mk_if_t (#t: Type) (test: bool) (x1: (ctest true test -> Tot t)) (x2: (ctest false test -> Tot t)) : Tot t = if test then x1 () else x2 () let mk_if (test ty e_true e_false: T.term) : T.Tac T.term = let bt = T.fresh_binder (T.mk_app (`(ctest true)) [test, T.Q_Explicit]) in let bf = T.fresh_binder (T.mk_app (`(ctest false)) [test, T.Q_Explicit]) in let ft = T.pack (T.Tv_Abs bt e_true) in let ff = T.pack (T.Tv_Abs bf e_false) in T.mk_app (`(mk_if_t)) [ ty, T.Q_Implicit; test, T.Q_Explicit; ft, T.Q_Explicit; ff, T.Q_Explicit; ] let tfail (#a: Type) (s: Prims.string) : T.Tac a = T.debug ("Tactic failure: " ^ s); T.fail s let rec string_of_name (n: T.name) : Tot string = match n with | [] -> "" | [a] -> a | a :: b -> a ^ "." ^ string_of_name b let unfold_fv (t: T.fv) : T.Tac T.term = let env = T.cur_env () in let n = T.inspect_fv t in match T.lookup_typ env n with | Some s -> begin match T.inspect_sigelt s with | T.Sg_Let {isrec=false; lbs=[lb]} -> let nm = string_of_name n in T.debug ("Unfolded definition: " ^ nm); T.(lb.lb_def) | _ -> let nm = string_of_name n in tfail (nm ^ ": not a non-recursive let definition") end | _ -> tfail "Definition not found" let unfold_term (t: T.term) : T.Tac T.term = match T.inspect t with | T.Tv_FVar v -> unfold_fv v | _ -> tfail "Not a global variable"

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Squash.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.List.Tot.fst.checked" ], "interface_file": false, "source_file": "MiniParse.Tac.Base.fst" }

[ { "abbrev": true, "full_module": "FStar.List.Tot", "short_module": "L" }, { "abbrev": true, "full_module": "FStar.Tactics.V2", "short_module": "T" }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

s: Prims.string -> FStar.Tactics.Effect.Tac Prims.unit

FStar.Tactics.Effect.Tac

[]

[ "Prims.string", "FStar.Tactics.V2.Derived.debug", "Prims.op_Hat", "Prims.unit", "FStar.Tactics.V2.Derived.qed" ]

[]

false

true

false

let tsuccess (s: string) : T.Tac unit =

T.debug ("Checking success for: " ^ s); T.qed (); T.debug ("Success: " ^ s)

false

MiniParse.Tac.Base.fst

MiniParse.Tac.Base.tfail

val tfail (#a: Type) (s: Prims.string) : T.Tac a

let tfail (#a: Type) (s: Prims.string) : T.Tac a = T.debug ("Tactic failure: " ^ s); T.fail s

{ "file_name": "examples/miniparse/MiniParse.Tac.Base.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 10, "end_line": 63, "start_col": 0, "start_line": 61 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module MiniParse.Tac.Base module T = FStar.Tactics.V2 module L = FStar.List.Tot let pack_nat (n: nat) : T.Tac T.term = T.pack (T.Tv_Const (T.C_Int n)) let rec app_head_rev_tail (t: T.term) : T.Tac (T.term * list T.argv) = let ins = T.inspect t in if T.Tv_App? ins then let (T.Tv_App u v) = ins in let (x, l) = app_head_rev_tail u in (x, v :: l) else (t, []) let app_head_tail (t: T.term) : T.Tac (T.term * list T.argv) = let (x, l) = app_head_rev_tail t in (x, L.rev l) inline_for_extraction let ctest (v: bool) (test: bool) : Tot Type = squash (test == v) inline_for_extraction let mk_if_t (#t: Type) (test: bool) (x1: (ctest true test -> Tot t)) (x2: (ctest false test -> Tot t)) : Tot t = if test then x1 () else x2 () let mk_if (test ty e_true e_false: T.term) : T.Tac T.term = let bt = T.fresh_binder (T.mk_app (`(ctest true)) [test, T.Q_Explicit]) in let bf = T.fresh_binder (T.mk_app (`(ctest false)) [test, T.Q_Explicit]) in let ft = T.pack (T.Tv_Abs bt e_true) in let ff = T.pack (T.Tv_Abs bf e_false) in T.mk_app (`(mk_if_t)) [ ty, T.Q_Implicit; test, T.Q_Explicit; ft, T.Q_Explicit; ff, T.Q_Explicit; ]

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Squash.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.List.Tot.fst.checked" ], "interface_file": false, "source_file": "MiniParse.Tac.Base.fst" }

[ { "abbrev": true, "full_module": "FStar.List.Tot", "short_module": "L" }, { "abbrev": true, "full_module": "FStar.Tactics.V2", "short_module": "T" }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

s: Prims.string -> FStar.Tactics.Effect.Tac a

FStar.Tactics.Effect.Tac

[]

[ "Prims.string", "FStar.Tactics.V2.Derived.fail", "Prims.unit", "FStar.Tactics.V2.Derived.debug", "Prims.op_Hat" ]

[]

false

true

false

let tfail (#a: Type) (s: Prims.string) : T.Tac a =

T.debug ("Tactic failure: " ^ s); T.fail s

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.adjacent

val adjacent (#elt: Type) (a1 a2: array elt) : Tot prop

let adjacent (#elt: Type) (a1 a2: array elt) : Tot prop = base (ptr_of a1) == base (ptr_of a2) /\ offset (ptr_of a1) + (length a1) == offset (ptr_of a2)

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 56, "end_line": 721, "start_col": 0, "start_line": 719 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one)) let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a ) let mk_array (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) : array elt = { p = { base_len; base; offset} ; length = Ghost.hide (SZ.v base_len - offset) } ```pulse ghost fn fold_pts_to (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) (#p: perm { p `lesser_equal_perm` full_perm}) (s: Seq.seq elt { Seq.length s == SZ.v base_len - offset}) requires pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p) ensures pts_to (mk_array base_len base offset) #p s { let a = (mk_array base_len base offset); rewrite (pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p)) as pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p); fold (pts_to a #p s); rewrite (pts_to a #p s) as (pts_to (mk_array base_len base offset) #p s); } ``` ```pulse ghost fn pts_to_len' (#elt: Type u#1) (a:array elt) (#p:perm) (#x:Seq.seq elt) requires pts_to a #p x ensures pts_to a #p x ** pure (length a == Seq.length x) { unfold pts_to a #p x; fold pts_to a #p x; } ``` let pts_to_len = pts_to_len' ```pulse fn alloc' (#elt: Type u#1) (x: elt) (n: SZ.t) requires emp returns a:array elt ensures pts_to a (Seq.create (SZ.v n) x) ** pure (length a == SZ.v n /\ is_full_array a) { let v = (mk_carrier (SZ.v n) 0 (Seq.create (SZ.v n) x) full_perm); FStar.PCM.compatible_refl (PA.pcm elt (SZ.v n)) v; let b = Pulse.Lib.Core.alloc #_ #(PA.pcm elt (SZ.v n)) v; pts_to_not_null b _; fold_pts_to n b 0 #full_perm (Seq.create (SZ.v n) x); mk_array n b 0; } ``` let alloc = alloc' ```pulse fn read (#t: Type) (a: array t) (i: SZ.t) (#p: perm) (#s: Ghost.erased (Seq.seq t){SZ.v i < Seq.length s}) requires pts_to a #p s returns res:t ensures pts_to a #p s ** pure (res == Seq.index s (SZ.v i)) { unfold pts_to a #p s; with w. assert (pcm_pts_to (ptr_of a).base w); let v = Pulse.Lib.Core.read (ptr_of a).base w (fun _ -> w); fold (pts_to a #p s); fst (Some?.v (FStar.Map.sel v ((ptr_of a).offset + SZ.v i))); } ``` let op_Array_Access = read let mk_carrier_upd (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (i: nat) (v: elt) (_: squash ( offset + Seq.length s <= len /\ i < Seq.length s )) : Lemma (ensures ( let o = mk_carrier len offset s full_perm in let o' = mk_carrier len offset (Seq.upd s i v) full_perm in o' `Map.equal` Map.upd o (offset + i) (Some (v, full_perm)) )) = () ```pulse fn write (#t: Type) (a: array t) (i: SZ.t) (v: t) (#s: Ghost.erased (Seq.seq t) {SZ.v i < Seq.length s}) requires pts_to a s ensures pts_to a (Seq.upd s (SZ.v i) v) { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); mk_carrier_upd (SZ.v (ptr_of a).base_len) ((ptr_of a).offset) s (SZ.v i) v (); Pulse.Lib.Core.write (ptr_of a).base w _ (PM.lift_frame_preserving_upd _ _ (Frac.mk_frame_preserving_upd (Seq.index s (SZ.v i)) v ) _ ((ptr_of a).offset + SZ.v i)); fold (pts_to a #full_perm (Seq.upd s (SZ.v i) v)); } ``` let op_Array_Assignment = write (* let frame_preserving_upd_one (#elt:Type) (n:erased nat) (s:erased (Seq.seq elt) { Seq.length s == reveal n }) : FStar.PCM.frame_preserving_upd (PA.pcm elt n) (mk_carrier n 0 s full_perm) (PA.one #elt #n) = fun _ -> admit(); (PA.one #elt #n) *) ```pulse fn free' (#elt: Type) (a: array elt) (#s: Ghost.erased (Seq.seq elt)) requires pts_to a s ** pure (is_full_array a) ensures emp { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); // Pulse.Lib.Core.write (ptr_of a).base w (PA.one #elt #(length a)) (frame_preserving_upd_one #elt (length a) s); drop_ (pcm_pts_to (ptr_of a).base _) } ``` let free = free' let valid_sum_perm (len: nat) (offset: nat) (slice_len: nat) (p1 p2: perm) : Tot prop = let open FStar.Real in valid_perm len offset slice_len (sum_perm p1 p2) ```pulse ghost fn mk_carrier_share (#elt: Type u#1) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) (_:squash (valid_sum_perm len offset (Seq.length s) p1 p2)) requires emp ensures ( // let c1 = (mk_carrier len offset s p1) in pure ( composable (mk_carrier len offset s p1) (mk_carrier len offset s p2) /\ mk_carrier len offset s (p1 `sum_perm` p2) `Map.equal` ((mk_carrier len offset s p1) `compose` (mk_carrier len offset s p2)) ) ) { () } ``` ```pulse ghost fn share' (#elt:Type) (arr:array elt) (#s:Ghost.erased (Seq.seq elt)) (#p:perm) requires pts_to arr #p s ensures pts_to arr #(half_perm p) s ** pts_to arr #(half_perm p) s { unfold pts_to arr #p s; with w. assert (pcm_pts_to (ptr_of arr).base w); mk_carrier_share (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p) (half_perm p) (); Pulse.Lib.Core.share (ptr_of arr).base (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)) (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)); fold pts_to arr #(half_perm p) s; fold pts_to arr #(half_perm p) s; } ``` let share = share' let mk_carrier_gather (#elt: Type) (len: nat) (offset: nat) (s1 s2: Seq.seq elt) (p1 p2: perm) (_:squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ Seq.length s1 == Seq.length s2 /\ offset + Seq.length s1 <= len )) : squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ mk_carrier len offset s1 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ mk_carrier len offset s2 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ s1 == s2 ) = let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in assert (composable c1 c2); assert (mk_carrier len offset s1 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); assert (mk_carrier len offset s2 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); mk_carrier_inj len offset s1 s2 (p1 `sum_perm` p2) (p1 `sum_perm` p2) let mk_carrier_valid_sum_perm (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) : squash (let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in composable c1 c2 <==> valid_sum_perm len offset (Seq.length s) p1 p2) = let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in if Seq.length s > 0 && offset + Seq.length s <= len then let open FStar.Real in assert (Frac.composable (Map.sel c1 offset) (Map.sel c2 offset) <==> valid_perm len offset (Seq.length s) (sum_perm p1 p2)) else () ```pulse ghost fn of_squash (#p:prop) (s:squash p) requires emp ensures pure p { () } ``` ```pulse ghost fn gather' (#a:Type) (arr:array a) (#s0 #s1:Ghost.erased (Seq.seq a)) (#p0 #p1:perm) requires pts_to arr #p0 s0 ** pts_to arr #p1 s1 ensures pts_to arr #(sum_perm p0 p1) s0 ** pure (s0 == s1) { unfold pts_to arr #p0 s0; with w0. assert (pcm_pts_to (ptr_of arr).base w0); unfold pts_to arr #p1 s1; with w1. assert (pcm_pts_to (ptr_of arr).base w1); Pulse.Lib.Core.gather (ptr_of arr).base w0 w1; of_squash (mk_carrier_gather (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 s1 p0 p1 ()); of_squash (mk_carrier_valid_sum_perm (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 p0 p1); fold pts_to arr #(sum_perm p0 p1) s0; } ``` let gather = gather' let ptr_shift (#elt: Type) (p: ptr elt) (off: nat {offset p + off <= base_len (base p)}) : ptr elt = { base_len = p.base_len; base = p.base; offset = p.offset + off; } let split_l' (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : array elt = { p = ptr_of a; length=i } irreducible let split_l (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : x:array elt { x == split_l' a i } = split_l' a i let split_r' (#elt: Type) (a: array elt) (i: nat {i <= length a}) : array elt = { p= ptr_shift (ptr_of a) i; length=Ghost.hide (length a - i) } irreducible let split_r (#elt: Type) (a: array elt) (i: nat {i <= length a}) : x:array elt { x == split_r' a i } = split_r' a i let array_slice (#elt: Type) (a: array elt) (i:nat) (j: nat {i <= j /\ j <= length a}) : GTot (array elt) = split_l (split_r a i) (j - i) let in_bounds (i j:nat) (s:array 'a) = squash (i <= j /\ j <= length s) ```pulse ghost fn elim_in_bounds (#elt:Type) (#i #j:nat) (s:array elt) (p:in_bounds i j s) requires emp ensures pure (i <= j /\ j <= length s) { () } ``` let token (x:'a) = emp let pts_to_range (#a:Type) (x:array a) ([@@@ equate_by_smt] i:nat) ([@@@ equate_by_smt] j: nat) (#[exact (`full_perm)] p:perm) ([@@@ equate_by_smt] s: Seq.seq a) : vprop = exists* (q:in_bounds i j x). pts_to (array_slice x i j) #p s ** token q ```pulse ghost fn pts_to_range_prop' (#elt: Type) (a: array elt) (#i #j: nat) (#p: perm) (#s: Seq.seq elt) requires pts_to_range a i j #p s ensures pts_to_range a i j #p s ** pure ( (i <= j /\ j <= length a /\ Seq.length s == j - i) ) { unfold pts_to_range a i j #p s; with q. assert (token #(in_bounds i j a) q); elim_in_bounds a q; pts_to_len (array_slice a i j); fold pts_to_range a i j #p s; } ``` let pts_to_range_prop = pts_to_range_prop' ```pulse ghost fn pts_to_range_intro' (#elt: Type) (a: array elt) (p: perm) (s: Seq.seq elt) requires pts_to a #p s ensures pts_to_range a 0 (length a) #p s { rewrite each a as (array_slice a 0 (length a)); let q : in_bounds 0 (length a) a = (); fold (token #(in_bounds 0 (length a) a) q); fold (pts_to_range a 0 (length a) #p s); } ``` let pts_to_range_intro = pts_to_range_intro' ```pulse ghost fn pts_to_range_elim' (#elt: Type) (a: array elt) (p: perm) (s: Seq.seq elt) requires pts_to_range a 0 (length a) #p s ensures pts_to a #p s { unfold (pts_to_range a 0 (length a) #p s); unfold (token #(in_bounds 0 (length a) a) _); rewrite each (array_slice a 0 (length a)) as a; } ``` let pts_to_range_elim = pts_to_range_elim' let mk_carrier_split (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (p: perm) (i: nat) (_:squash ( offset + Seq.length s <= len /\ i <= Seq.length s )) : squash ( let c1 = mk_carrier len offset (Seq.slice s 0 i) p in let c2 = mk_carrier len (offset + i) (Seq.slice s i (Seq.length s)) p in composable c1 c2 /\ mk_carrier len offset s p `Map.equal` (c1 `compose` c2) ) = () ```pulse ghost fn use_squash (#p:prop) (s:squash p) requires emp ensures pure p { () } ``` ```pulse ghost fn ghost_split (#elt: Type) (#x: Seq.seq elt) (#p: perm) (a: array elt) (i: nat {i <= length a}) requires pts_to a #p x returns _: squash (i <= length a /\ i <= Seq.length x) ensures pts_to (split_r a i) #p (Seq.slice x i (Seq.length x)) ** pts_to (split_l a i) #p (Seq.slice x 0 i) ** pure (x `Seq.equal` Seq.append (Seq.slice x 0 i) (Seq.slice x i (Seq.length x))) { unfold (pts_to a #p x); use_squash (mk_carrier_split (SZ.v (ptr_of a).base_len) (ptr_of a).offset x p i ()); let xl = Seq.slice x 0 i; let xr = Seq.slice x i (Seq.length x); let vl = mk_carrier (SZ.v (ptr_of a).base_len) ((ptr_of a).offset) xl p; let vr = mk_carrier (SZ.v (ptr_of a).base_len) ((ptr_of a).offset + i) xr p; Pulse.Lib.Core.share (ptr_of a).base vl vr; rewrite pcm_pts_to (ptr_of a).base vl as pcm_pts_to (ptr_of (split_l a i)).base vl; rewrite pcm_pts_to (ptr_of a).base vr as pcm_pts_to (ptr_of (split_r a i)).base vr; fold (pts_to (split_l a i) #p xl); fold (pts_to (split_r a i) #p xr); } ``` let vprop_equiv_refl_eq (v0 v1:vprop) (_:squash (v0 == v1)) : vprop_equiv v0 v1 = vprop_equiv_refl v0 let equiv () : FStar.Tactics.Tac unit = let open FStar.Tactics in mapply (`vprop_equiv_refl_eq); smt() ```pulse ghost fn split_l_slice #elt (a : array elt) (i m j: nat) (#s:Seq.seq elt) (_:squash (i <= m /\ m <= j /\ j <= length a)) requires pts_to (split_l (array_slice a i j) (m - i)) #p s ensures pts_to (array_slice a i m) #p s { rewrite each (split_l (array_slice a i j) (m - i)) as (array_slice a i m); } ``` ```pulse ghost fn split_r_slice #elt (a:array elt) (i m j: nat) (#s:Seq.seq elt) (_:squash (i <= m /\ m <= j /\ j <= length a)) requires pts_to (split_r (array_slice a i j) (m - i)) #p s ensures pts_to (array_slice a m j) #p s { rewrite each (split_r (array_slice a i j) (m - i)) as (array_slice a m j); } ``` ```pulse ghost fn pts_to_range_split' (#elt: Type) (a: array elt) (i m j: nat) (#p: perm) (#s: Seq.seq elt) requires pts_to_range a i j #p s ** pure (i <= m /\ m <= j) ensures exists* s1 s2. pts_to_range a i m #p s1 ** pts_to_range a m j #p s2 ** pure ( i <= m /\ m <= j /\ j <= length a /\ eq2 #int (Seq.length s) (j - i) /\ s1 == Seq.slice s 0 (m - i) /\ s2 == Seq.slice s (m - i) (Seq.length s) /\ s == Seq.append s1 s2 ) { pts_to_range_prop a; unfold pts_to_range a i j #p s; unfold (token #(in_bounds i j a) _); ghost_split (array_slice a i j) (m - i); split_r_slice a i m j #(Seq.slice s (m - i) (Seq.length s)) (); split_l_slice a i m j (); let q1 : in_bounds i m a = (); let q2 : in_bounds m j a = (); fold (token #(in_bounds i m a) q1); fold (token #(in_bounds m j a) q2); fold (pts_to_range a i m #p (Seq.slice s 0 (m - i))); fold (pts_to_range a m j #p (Seq.slice s (m - i) (Seq.length s))); assert pure (s `Seq.equal` Seq.append (Seq.slice s 0 (m - i)) (Seq.slice s (m - i) (Seq.length s))); } ``` let pts_to_range_split = pts_to_range_split' let mk_carrier_merge (#elt: Type) (len: nat) (offset: nat) (s1 s2: Seq.seq elt) (p: perm) (_:squash ( offset + Seq.length s1 + Seq.length s2 <= len )) : squash ( let c1 = mk_carrier len offset s1 p in let c2 = mk_carrier len (offset + Seq.length s1) s2 p in composable c1 c2 /\ mk_carrier len offset (s1 `Seq.append` s2) p `Map.equal` (c1 `compose` c2) ) = ()

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

a1: Pulse.Lib.HigherArray.array elt -> a2: Pulse.Lib.HigherArray.array elt -> Prims.prop

Prims.Tot

[ "total" ]

[]

[ "Pulse.Lib.HigherArray.array", "Prims.l_and", "Prims.eq2", "Pulse.Lib.HigherArray.base_t", "Pulse.Lib.HigherArray.base", "Pulse.Lib.HigherArray.ptr_of", "Prims.int", "Prims.op_Addition", "Pulse.Lib.HigherArray.offset", "Pulse.Lib.HigherArray.length", "Prims.prop" ]

[]

false

true

let adjacent (#elt: Type) (a1 a2: array elt) : Tot prop =

base (ptr_of a1) == base (ptr_of a2) /\ offset (ptr_of a1) + (length a1) == offset (ptr_of a2)

false

Pulse.Lib.HigherArray.fst

Pulse.Lib.HigherArray.equiv

val equiv: Prims.unit -> FStar.Tactics.Tac unit

let equiv () : FStar.Tactics.Tac unit = let open FStar.Tactics in mapply (`vprop_equiv_refl_eq); smt()

{ "file_name": "share/steel/examples/pulse/lib/Pulse.Lib.HigherArray.fst", "git_rev": "f984200f79bdc452374ae994a5ca837496476c41", "git_url": "https://github.com/FStarLang/steel.git", "project_name": "steel" }

{ "end_col": 7, "end_line": 630, "start_col": 0, "start_line": 627 }

(* Copyright 2023 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module Pulse.Lib.HigherArray open Pulse.Main open FStar.Tactics.V2 open Pulse.Lib.Core open PulseCore.FractionalPermission open FStar.Ghost module SZ = FStar.SizeT module Seq = FStar.Seq open FStar.PCM module Frac = Pulse.Lib.PCM.Fraction module PM = Pulse.Lib.PCM.Map open Pulse.Lib.PCM.Array module PA = Pulse.Lib.PCM.Array /// An abstract type to represent a base array (whole allocation /// unit), exposed for proof purposes only [@@erasable] let base_t (elt: Type u#a) : Tot Type0 = Ghost.erased (base_len: SZ.t & pcm_ref (PA.pcm elt (SZ.v base_len))) let base_len (#elt: Type) (b: base_t elt) : GTot nat = SZ.v (dfst b) /// An abstract type to represent a C pointer, as a base and an offset /// into its base let l_pcm_ref (elt:Type u#a) (base_len:SZ.t) = r:pcm_ref (PA.pcm elt (SZ.v base_len)){ is_pcm_ref_null r = false || base_len = 0sz } noeq type ptr ([@@@strictly_positive]elt: Type u#a) : Type0 = { base_len: Ghost.erased SZ.t; base: l_pcm_ref elt base_len; offset: (offset: nat { offset <= SZ.v base_len }); } let null_ptr (a:Type u#a) : ptr a = { base_len = 0sz; base = pcm_ref_null (PA.pcm a 0) ; offset = 0 } let is_null_ptr (#elt: Type u#a) (p: ptr elt) : Pure bool (requires True) (ensures (fun res -> res == true <==> p == null_ptr elt)) = is_pcm_ref_null p.base let base (#elt: Type) (p: ptr elt) : Tot (base_t elt) = (| Ghost.reveal p.base_len, p.base |) let offset (#elt: Type) (p: ptr elt) : Ghost nat (requires True) (ensures (fun offset -> offset <= base_len (base p))) = p.offset let ptr_base_offset_inj (#elt: Type) (p1 p2: ptr elt) : Lemma (requires ( base p1 == base p2 /\ offset p1 == offset p2 )) (ensures ( p1 == p2 )) = () let base_len_null_ptr (elt: Type u#a) : Lemma (base_len (base (null_ptr elt)) == 0) [SMTPat (base_len (base (null_ptr elt)))] = () noeq type array ([@@@strictly_positive] elt: Type u#1) : Type0 = { p: ptr elt; length: (l:Ghost.erased nat {offset p + l <= base_len (base p)}) } let length (#elt: Type) (a: array elt) : GTot nat = a.length let ptr_of (#elt: Type) (a: array elt) : Tot (ptr elt) = a.p let is_full_array (#elt: Type) (a: array elt) : Tot prop = length a == base_len (base (ptr_of a)) let null (#a: Type u#1) : array a = { p = null_ptr a; length =Ghost.hide 0 } let length_fits #elt a = () let valid_perm (len: nat) (offset: nat) (slice_len: nat) (p: perm) : prop = let open FStar.Real in ((offset + slice_len <= len /\ slice_len > 0) ==> (p.v <=. one)) let pts_to (#elt: Type u#1) (a: array elt) (#p: perm) (s: Seq.seq elt) : Tot vprop = pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p) ** pure ( valid_perm (SZ.v (ptr_of a).base_len) (ptr_of a).offset (Seq.length s) p /\ Seq.length s == length a ) let mk_array (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) : array elt = { p = { base_len; base; offset} ; length = Ghost.hide (SZ.v base_len - offset) } ```pulse ghost fn fold_pts_to (#elt: Type u#1) (base_len: SZ.t) (base:l_pcm_ref elt base_len) (offset:nat { offset <= SZ.v base_len}) (#p: perm { p `lesser_equal_perm` full_perm}) (s: Seq.seq elt { Seq.length s == SZ.v base_len - offset}) requires pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p) ensures pts_to (mk_array base_len base offset) #p s { let a = (mk_array base_len base offset); rewrite (pcm_pts_to base (mk_carrier (SZ.v base_len) offset s p)) as pcm_pts_to (ptr_of a).base (mk_carrier (SZ.v (ptr_of a).base_len) (ptr_of a).offset s p); fold (pts_to a #p s); rewrite (pts_to a #p s) as (pts_to (mk_array base_len base offset) #p s); } ``` ```pulse ghost fn pts_to_len' (#elt: Type u#1) (a:array elt) (#p:perm) (#x:Seq.seq elt) requires pts_to a #p x ensures pts_to a #p x ** pure (length a == Seq.length x) { unfold pts_to a #p x; fold pts_to a #p x; } ``` let pts_to_len = pts_to_len' ```pulse fn alloc' (#elt: Type u#1) (x: elt) (n: SZ.t) requires emp returns a:array elt ensures pts_to a (Seq.create (SZ.v n) x) ** pure (length a == SZ.v n /\ is_full_array a) { let v = (mk_carrier (SZ.v n) 0 (Seq.create (SZ.v n) x) full_perm); FStar.PCM.compatible_refl (PA.pcm elt (SZ.v n)) v; let b = Pulse.Lib.Core.alloc #_ #(PA.pcm elt (SZ.v n)) v; pts_to_not_null b _; fold_pts_to n b 0 #full_perm (Seq.create (SZ.v n) x); mk_array n b 0; } ``` let alloc = alloc' ```pulse fn read (#t: Type) (a: array t) (i: SZ.t) (#p: perm) (#s: Ghost.erased (Seq.seq t){SZ.v i < Seq.length s}) requires pts_to a #p s returns res:t ensures pts_to a #p s ** pure (res == Seq.index s (SZ.v i)) { unfold pts_to a #p s; with w. assert (pcm_pts_to (ptr_of a).base w); let v = Pulse.Lib.Core.read (ptr_of a).base w (fun _ -> w); fold (pts_to a #p s); fst (Some?.v (FStar.Map.sel v ((ptr_of a).offset + SZ.v i))); } ``` let op_Array_Access = read let mk_carrier_upd (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (i: nat) (v: elt) (_: squash ( offset + Seq.length s <= len /\ i < Seq.length s )) : Lemma (ensures ( let o = mk_carrier len offset s full_perm in let o' = mk_carrier len offset (Seq.upd s i v) full_perm in o' `Map.equal` Map.upd o (offset + i) (Some (v, full_perm)) )) = () ```pulse fn write (#t: Type) (a: array t) (i: SZ.t) (v: t) (#s: Ghost.erased (Seq.seq t) {SZ.v i < Seq.length s}) requires pts_to a s ensures pts_to a (Seq.upd s (SZ.v i) v) { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); mk_carrier_upd (SZ.v (ptr_of a).base_len) ((ptr_of a).offset) s (SZ.v i) v (); Pulse.Lib.Core.write (ptr_of a).base w _ (PM.lift_frame_preserving_upd _ _ (Frac.mk_frame_preserving_upd (Seq.index s (SZ.v i)) v ) _ ((ptr_of a).offset + SZ.v i)); fold (pts_to a #full_perm (Seq.upd s (SZ.v i) v)); } ``` let op_Array_Assignment = write (* let frame_preserving_upd_one (#elt:Type) (n:erased nat) (s:erased (Seq.seq elt) { Seq.length s == reveal n }) : FStar.PCM.frame_preserving_upd (PA.pcm elt n) (mk_carrier n 0 s full_perm) (PA.one #elt #n) = fun _ -> admit(); (PA.one #elt #n) *) ```pulse fn free' (#elt: Type) (a: array elt) (#s: Ghost.erased (Seq.seq elt)) requires pts_to a s ** pure (is_full_array a) ensures emp { unfold pts_to a #full_perm s; with w. assert (pcm_pts_to (ptr_of a).base w); // Pulse.Lib.Core.write (ptr_of a).base w (PA.one #elt #(length a)) (frame_preserving_upd_one #elt (length a) s); drop_ (pcm_pts_to (ptr_of a).base _) } ``` let free = free' let valid_sum_perm (len: nat) (offset: nat) (slice_len: nat) (p1 p2: perm) : Tot prop = let open FStar.Real in valid_perm len offset slice_len (sum_perm p1 p2) ```pulse ghost fn mk_carrier_share (#elt: Type u#1) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) (_:squash (valid_sum_perm len offset (Seq.length s) p1 p2)) requires emp ensures ( // let c1 = (mk_carrier len offset s p1) in pure ( composable (mk_carrier len offset s p1) (mk_carrier len offset s p2) /\ mk_carrier len offset s (p1 `sum_perm` p2) `Map.equal` ((mk_carrier len offset s p1) `compose` (mk_carrier len offset s p2)) ) ) { () } ``` ```pulse ghost fn share' (#elt:Type) (arr:array elt) (#s:Ghost.erased (Seq.seq elt)) (#p:perm) requires pts_to arr #p s ensures pts_to arr #(half_perm p) s ** pts_to arr #(half_perm p) s { unfold pts_to arr #p s; with w. assert (pcm_pts_to (ptr_of arr).base w); mk_carrier_share (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p) (half_perm p) (); Pulse.Lib.Core.share (ptr_of arr).base (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)) (mk_carrier (SZ.v (ptr_of arr).base_len) (ptr_of arr).offset s (half_perm p)); fold pts_to arr #(half_perm p) s; fold pts_to arr #(half_perm p) s; } ``` let share = share' let mk_carrier_gather (#elt: Type) (len: nat) (offset: nat) (s1 s2: Seq.seq elt) (p1 p2: perm) (_:squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ Seq.length s1 == Seq.length s2 /\ offset + Seq.length s1 <= len )) : squash ( let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in composable c1 c2 /\ mk_carrier len offset s1 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ mk_carrier len offset s2 (p1 `sum_perm` p2) == (c1 `compose` c2) /\ s1 == s2 ) = let c1 = mk_carrier len offset s1 p1 in let c2 = mk_carrier len offset s2 p2 in assert (composable c1 c2); assert (mk_carrier len offset s1 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); assert (mk_carrier len offset s2 (p1 `sum_perm` p2) `Map.equal` (c1 `compose` c2)); mk_carrier_inj len offset s1 s2 (p1 `sum_perm` p2) (p1 `sum_perm` p2) let mk_carrier_valid_sum_perm (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (p1 p2: perm) : squash (let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in composable c1 c2 <==> valid_sum_perm len offset (Seq.length s) p1 p2) = let c1 = mk_carrier len offset s p1 in let c2 = mk_carrier len offset s p2 in if Seq.length s > 0 && offset + Seq.length s <= len then let open FStar.Real in assert (Frac.composable (Map.sel c1 offset) (Map.sel c2 offset) <==> valid_perm len offset (Seq.length s) (sum_perm p1 p2)) else () ```pulse ghost fn of_squash (#p:prop) (s:squash p) requires emp ensures pure p { () } ``` ```pulse ghost fn gather' (#a:Type) (arr:array a) (#s0 #s1:Ghost.erased (Seq.seq a)) (#p0 #p1:perm) requires pts_to arr #p0 s0 ** pts_to arr #p1 s1 ensures pts_to arr #(sum_perm p0 p1) s0 ** pure (s0 == s1) { unfold pts_to arr #p0 s0; with w0. assert (pcm_pts_to (ptr_of arr).base w0); unfold pts_to arr #p1 s1; with w1. assert (pcm_pts_to (ptr_of arr).base w1); Pulse.Lib.Core.gather (ptr_of arr).base w0 w1; of_squash (mk_carrier_gather (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 s1 p0 p1 ()); of_squash (mk_carrier_valid_sum_perm (SZ.v (ptr_of arr).base_len) ((ptr_of arr).offset) s0 p0 p1); fold pts_to arr #(sum_perm p0 p1) s0; } ``` let gather = gather' let ptr_shift (#elt: Type) (p: ptr elt) (off: nat {offset p + off <= base_len (base p)}) : ptr elt = { base_len = p.base_len; base = p.base; offset = p.offset + off; } let split_l' (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : array elt = { p = ptr_of a; length=i } irreducible let split_l (#elt: Type) (a: array elt) (i: erased nat {i <= length a}) : x:array elt { x == split_l' a i } = split_l' a i let split_r' (#elt: Type) (a: array elt) (i: nat {i <= length a}) : array elt = { p= ptr_shift (ptr_of a) i; length=Ghost.hide (length a - i) } irreducible let split_r (#elt: Type) (a: array elt) (i: nat {i <= length a}) : x:array elt { x == split_r' a i } = split_r' a i let array_slice (#elt: Type) (a: array elt) (i:nat) (j: nat {i <= j /\ j <= length a}) : GTot (array elt) = split_l (split_r a i) (j - i) let in_bounds (i j:nat) (s:array 'a) = squash (i <= j /\ j <= length s) ```pulse ghost fn elim_in_bounds (#elt:Type) (#i #j:nat) (s:array elt) (p:in_bounds i j s) requires emp ensures pure (i <= j /\ j <= length s) { () } ``` let token (x:'a) = emp let pts_to_range (#a:Type) (x:array a) ([@@@ equate_by_smt] i:nat) ([@@@ equate_by_smt] j: nat) (#[exact (`full_perm)] p:perm) ([@@@ equate_by_smt] s: Seq.seq a) : vprop = exists* (q:in_bounds i j x). pts_to (array_slice x i j) #p s ** token q ```pulse ghost fn pts_to_range_prop' (#elt: Type) (a: array elt) (#i #j: nat) (#p: perm) (#s: Seq.seq elt) requires pts_to_range a i j #p s ensures pts_to_range a i j #p s ** pure ( (i <= j /\ j <= length a /\ Seq.length s == j - i) ) { unfold pts_to_range a i j #p s; with q. assert (token #(in_bounds i j a) q); elim_in_bounds a q; pts_to_len (array_slice a i j); fold pts_to_range a i j #p s; } ``` let pts_to_range_prop = pts_to_range_prop' ```pulse ghost fn pts_to_range_intro' (#elt: Type) (a: array elt) (p: perm) (s: Seq.seq elt) requires pts_to a #p s ensures pts_to_range a 0 (length a) #p s { rewrite each a as (array_slice a 0 (length a)); let q : in_bounds 0 (length a) a = (); fold (token #(in_bounds 0 (length a) a) q); fold (pts_to_range a 0 (length a) #p s); } ``` let pts_to_range_intro = pts_to_range_intro' ```pulse ghost fn pts_to_range_elim' (#elt: Type) (a: array elt) (p: perm) (s: Seq.seq elt) requires pts_to_range a 0 (length a) #p s ensures pts_to a #p s { unfold (pts_to_range a 0 (length a) #p s); unfold (token #(in_bounds 0 (length a) a) _); rewrite each (array_slice a 0 (length a)) as a; } ``` let pts_to_range_elim = pts_to_range_elim' let mk_carrier_split (#elt: Type) (len: nat) (offset: nat) (s: Seq.seq elt) (p: perm) (i: nat) (_:squash ( offset + Seq.length s <= len /\ i <= Seq.length s )) : squash ( let c1 = mk_carrier len offset (Seq.slice s 0 i) p in let c2 = mk_carrier len (offset + i) (Seq.slice s i (Seq.length s)) p in composable c1 c2 /\ mk_carrier len offset s p `Map.equal` (c1 `compose` c2) ) = () ```pulse ghost fn use_squash (#p:prop) (s:squash p) requires emp ensures pure p { () } ``` ```pulse ghost fn ghost_split (#elt: Type) (#x: Seq.seq elt) (#p: perm) (a: array elt) (i: nat {i <= length a}) requires pts_to a #p x returns _: squash (i <= length a /\ i <= Seq.length x) ensures pts_to (split_r a i) #p (Seq.slice x i (Seq.length x)) ** pts_to (split_l a i) #p (Seq.slice x 0 i) ** pure (x `Seq.equal` Seq.append (Seq.slice x 0 i) (Seq.slice x i (Seq.length x))) { unfold (pts_to a #p x); use_squash (mk_carrier_split (SZ.v (ptr_of a).base_len) (ptr_of a).offset x p i ()); let xl = Seq.slice x 0 i; let xr = Seq.slice x i (Seq.length x); let vl = mk_carrier (SZ.v (ptr_of a).base_len) ((ptr_of a).offset) xl p; let vr = mk_carrier (SZ.v (ptr_of a).base_len) ((ptr_of a).offset + i) xr p; Pulse.Lib.Core.share (ptr_of a).base vl vr; rewrite pcm_pts_to (ptr_of a).base vl as pcm_pts_to (ptr_of (split_l a i)).base vl; rewrite pcm_pts_to (ptr_of a).base vr as pcm_pts_to (ptr_of (split_r a i)).base vr; fold (pts_to (split_l a i) #p xl); fold (pts_to (split_r a i) #p xr); } ``` let vprop_equiv_refl_eq (v0 v1:vprop) (_:squash (v0 == v1)) : vprop_equiv v0 v1 = vprop_equiv_refl v0

{ "checked_file": "/", "dependencies": [ "PulseCore.FractionalPermission.fst.checked", "Pulse.Main.fsti.checked", "Pulse.Lib.PCM.Map.fst.checked", "Pulse.Lib.PCM.Fraction.fst.checked", "Pulse.Lib.PCM.Array.fst.checked", "Pulse.Lib.Core.fsti.checked", "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Tactics.fst.checked", "FStar.SizeT.fsti.checked", "FStar.Seq.fst.checked", "FStar.Real.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.PCM.fst.checked", "FStar.Map.fsti.checked", "FStar.Ghost.fsti.checked" ], "interface_file": true, "source_file": "Pulse.Lib.HigherArray.fst" }

[ { "abbrev": true, "full_module": "Pulse.Lib.PCM.Array", "short_module": "PA" }, { "abbrev": false, "full_module": "Pulse.Lib.PCM.Array", "short_module": null }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Map", "short_module": "PM" }, { "abbrev": true, "full_module": "Pulse.Lib.PCM.Fraction", "short_module": "Frac" }, { "abbrev": false, "full_module": "FStar.PCM", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Main", "short_module": null }, { "abbrev": true, "full_module": "FStar.Seq", "short_module": "Seq" }, { "abbrev": true, "full_module": "FStar.SizeT", "short_module": "SZ" }, { "abbrev": false, "full_module": "FStar.Ghost", "short_module": null }, { "abbrev": false, "full_module": "PulseCore.FractionalPermission", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib.Core", "short_module": null }, { "abbrev": false, "full_module": "FStar.Tactics.V2", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "Pulse.Lib", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

_: Prims.unit -> FStar.Tactics.Effect.Tac Prims.unit

FStar.Tactics.Effect.Tac

[]

[ "Prims.unit", "FStar.Tactics.V1.Derived.smt", "FStar.Tactics.V1.Derived.mapply" ]

[]

false

true

false

let equiv () : FStar.Tactics.Tac unit =

let open FStar.Tactics in mapply (`vprop_equiv_refl_eq); smt ()

false

MiniParse.Tac.Base.fst

MiniParse.Tac.Base.tforall_intro

val tforall_intro : _: Prims.unit -> FStar.Tactics.Effect.Tac FStar.Tactics.NamedView.binding

let tforall_intro () = T.forall_intro ()

{ "file_name": "examples/miniparse/MiniParse.Tac.Base.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 40, "end_line": 130, "start_col": 0, "start_line": 130 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module MiniParse.Tac.Base module T = FStar.Tactics.V2 module L = FStar.List.Tot let pack_nat (n: nat) : T.Tac T.term = T.pack (T.Tv_Const (T.C_Int n)) let rec app_head_rev_tail (t: T.term) : T.Tac (T.term * list T.argv) = let ins = T.inspect t in if T.Tv_App? ins then let (T.Tv_App u v) = ins in let (x, l) = app_head_rev_tail u in (x, v :: l) else (t, []) let app_head_tail (t: T.term) : T.Tac (T.term * list T.argv) = let (x, l) = app_head_rev_tail t in (x, L.rev l) inline_for_extraction let ctest (v: bool) (test: bool) : Tot Type = squash (test == v) inline_for_extraction let mk_if_t (#t: Type) (test: bool) (x1: (ctest true test -> Tot t)) (x2: (ctest false test -> Tot t)) : Tot t = if test then x1 () else x2 () let mk_if (test ty e_true e_false: T.term) : T.Tac T.term = let bt = T.fresh_binder (T.mk_app (`(ctest true)) [test, T.Q_Explicit]) in let bf = T.fresh_binder (T.mk_app (`(ctest false)) [test, T.Q_Explicit]) in let ft = T.pack (T.Tv_Abs bt e_true) in let ff = T.pack (T.Tv_Abs bf e_false) in T.mk_app (`(mk_if_t)) [ ty, T.Q_Implicit; test, T.Q_Explicit; ft, T.Q_Explicit; ff, T.Q_Explicit; ] let tfail (#a: Type) (s: Prims.string) : T.Tac a = T.debug ("Tactic failure: " ^ s); T.fail s let rec string_of_name (n: T.name) : Tot string = match n with | [] -> "" | [a] -> a | a :: b -> a ^ "." ^ string_of_name b let unfold_fv (t: T.fv) : T.Tac T.term = let env = T.cur_env () in let n = T.inspect_fv t in match T.lookup_typ env n with | Some s -> begin match T.inspect_sigelt s with | T.Sg_Let {isrec=false; lbs=[lb]} -> let nm = string_of_name n in T.debug ("Unfolded definition: " ^ nm); T.(lb.lb_def) | _ -> let nm = string_of_name n in tfail (nm ^ ": not a non-recursive let definition") end | _ -> tfail "Definition not found" let unfold_term (t: T.term) : T.Tac T.term = match T.inspect t with | T.Tv_FVar v -> unfold_fv v | _ -> tfail "Not a global variable" let tsuccess (s: string) : T.Tac unit = T.debug ("Checking success for: " ^ s); T.qed (); T.debug ("Success: " ^ s) let rec to_all_goals (t: unit -> T.Tac unit) : T.Tac unit = if T.ngoals () = 0 then () else let _ = T.divide 1 t (fun () -> to_all_goals t) in () let rec imm_solve_goal (l: list (unit -> T.Tac unit)) : T.Tac unit = T.first (List.Tot.append l [ (fun () -> T.trivial (); tsuccess "trivial" ); (fun () -> T.trefl (); tsuccess "reflexivity" ); (fun () -> T.assumption (); tsuccess "assumption" ); (fun () -> T.norm [delta; zeta; iota; primops]; T.trivial (); tsuccess "norm trivial" ); (fun () -> T.apply (`(FStar.Squash.return_squash)); to_all_goals (fun () -> imm_solve_goal l); tsuccess "return_squash imm_solve" ); ])

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Squash.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.List.Tot.fst.checked" ], "interface_file": false, "source_file": "MiniParse.Tac.Base.fst" }

[ { "abbrev": true, "full_module": "FStar.List.Tot", "short_module": "L" }, { "abbrev": true, "full_module": "FStar.Tactics.V2", "short_module": "T" }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

_: Prims.unit -> FStar.Tactics.Effect.Tac FStar.Tactics.NamedView.binding

FStar.Tactics.Effect.Tac

[]

[ "Prims.unit", "FStar.Tactics.V2.Logic.forall_intro", "FStar.Tactics.NamedView.binding" ]

[]

false

true

false

let tforall_intro () =

T.forall_intro ()

false

MiniParse.Tac.Base.fst

MiniParse.Tac.Base.to_all_goals

val to_all_goals (t: (unit -> T.Tac unit)) : T.Tac unit

let rec to_all_goals (t: unit -> T.Tac unit) : T.Tac unit = if T.ngoals () = 0 then () else let _ = T.divide 1 t (fun () -> to_all_goals t) in ()

{ "file_name": "examples/miniparse/MiniParse.Tac.Base.fst", "git_rev": "10183ea187da8e8c426b799df6c825e24c0767d3", "git_url": "https://github.com/FStarLang/FStar.git", "project_name": "FStar" }

{ "end_col": 6, "end_line": 102, "start_col": 0, "start_line": 97 }

(* Copyright 2008-2018 Microsoft Research Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. *) module MiniParse.Tac.Base module T = FStar.Tactics.V2 module L = FStar.List.Tot let pack_nat (n: nat) : T.Tac T.term = T.pack (T.Tv_Const (T.C_Int n)) let rec app_head_rev_tail (t: T.term) : T.Tac (T.term * list T.argv) = let ins = T.inspect t in if T.Tv_App? ins then let (T.Tv_App u v) = ins in let (x, l) = app_head_rev_tail u in (x, v :: l) else (t, []) let app_head_tail (t: T.term) : T.Tac (T.term * list T.argv) = let (x, l) = app_head_rev_tail t in (x, L.rev l) inline_for_extraction let ctest (v: bool) (test: bool) : Tot Type = squash (test == v) inline_for_extraction let mk_if_t (#t: Type) (test: bool) (x1: (ctest true test -> Tot t)) (x2: (ctest false test -> Tot t)) : Tot t = if test then x1 () else x2 () let mk_if (test ty e_true e_false: T.term) : T.Tac T.term = let bt = T.fresh_binder (T.mk_app (`(ctest true)) [test, T.Q_Explicit]) in let bf = T.fresh_binder (T.mk_app (`(ctest false)) [test, T.Q_Explicit]) in let ft = T.pack (T.Tv_Abs bt e_true) in let ff = T.pack (T.Tv_Abs bf e_false) in T.mk_app (`(mk_if_t)) [ ty, T.Q_Implicit; test, T.Q_Explicit; ft, T.Q_Explicit; ff, T.Q_Explicit; ] let tfail (#a: Type) (s: Prims.string) : T.Tac a = T.debug ("Tactic failure: " ^ s); T.fail s let rec string_of_name (n: T.name) : Tot string = match n with | [] -> "" | [a] -> a | a :: b -> a ^ "." ^ string_of_name b let unfold_fv (t: T.fv) : T.Tac T.term = let env = T.cur_env () in let n = T.inspect_fv t in match T.lookup_typ env n with | Some s -> begin match T.inspect_sigelt s with | T.Sg_Let {isrec=false; lbs=[lb]} -> let nm = string_of_name n in T.debug ("Unfolded definition: " ^ nm); T.(lb.lb_def) | _ -> let nm = string_of_name n in tfail (nm ^ ": not a non-recursive let definition") end | _ -> tfail "Definition not found" let unfold_term (t: T.term) : T.Tac T.term = match T.inspect t with | T.Tv_FVar v -> unfold_fv v | _ -> tfail "Not a global variable" let tsuccess (s: string) : T.Tac unit = T.debug ("Checking success for: " ^ s); T.qed (); T.debug ("Success: " ^ s)

{ "checked_file": "/", "dependencies": [ "prims.fst.checked", "FStar.Tactics.V2.fst.checked", "FStar.Squash.fsti.checked", "FStar.Pervasives.Native.fst.checked", "FStar.Pervasives.fsti.checked", "FStar.List.Tot.fst.checked" ], "interface_file": false, "source_file": "MiniParse.Tac.Base.fst" }

[ { "abbrev": true, "full_module": "FStar.List.Tot", "short_module": "L" }, { "abbrev": true, "full_module": "FStar.Tactics.V2", "short_module": "T" }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "MiniParse.Tac", "short_module": null }, { "abbrev": false, "full_module": "FStar.Pervasives", "short_module": null }, { "abbrev": false, "full_module": "Prims", "short_module": null }, { "abbrev": false, "full_module": "FStar", "short_module": null } ]

{ "detail_errors": false, "detail_hint_replay": false, "initial_fuel": 2, "initial_ifuel": 1, "max_fuel": 8, "max_ifuel": 2, "no_plugins": false, "no_smt": false, "no_tactics": false, "quake_hi": 1, "quake_keep": false, "quake_lo": 1, "retry": false, "reuse_hint_for": null, "smtencoding_elim_box": false, "smtencoding_l_arith_repr": "boxwrap", "smtencoding_nl_arith_repr": "boxwrap", "smtencoding_valid_elim": false, "smtencoding_valid_intro": true, "tcnorm": true, "trivial_pre_for_unannotated_effectful_fns": true, "z3cliopt": [], "z3refresh": false, "z3rlimit": 5, "z3rlimit_factor": 1, "z3seed": 0, "z3smtopt": [], "z3version": "4.8.5" }

false

t: (_: Prims.unit -> FStar.Tactics.Effect.Tac Prims.unit) -> FStar.Tactics.Effect.Tac Prims.unit

FStar.Tactics.Effect.Tac

[]

[ "Prims.unit", "Prims.bool", "FStar.Pervasives.Native.tuple2", "FStar.Tactics.V2.Derived.divide", "MiniParse.Tac.Base.to_all_goals", "Prims.op_Equality", "Prims.int", "FStar.Tactics.V2.Derived.ngoals" ]

[ "recursion" ]

false

true

false

let rec to_all_goals (t: (unit -> T.Tac unit)) : T.Tac unit =

if T.ngoals () = 0 then () else let _ = T.divide 1 t (fun () -> to_all_goals t) in ()

false