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|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Prims.Tot | val choose: ('a -> Tot (option 'b)) -> list 'a -> Tot (list 'b) | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let rec choose f l = match l with
| [] -> []
| hd::tl ->
match f hd with
| Some x -> x::(choose f tl)
| None -> choose f tl | val choose: ('a -> Tot (option 'b)) -> list 'a -> Tot (list 'b)
let rec choose f l = | false | null | false | match l with
| [] -> []
| hd :: tl ->
match f hd with
| Some x -> x :: (choose f tl)
| None -> choose f tl | {
"checked_file": "FStar.List.Tot.Base.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.List.Tot.Base.fst"
} | [
"total"
] | [
"FStar.Pervasives.Native.option",
"Prims.list",
"Prims.Nil",
"Prims.Cons",
"FStar.List.Tot.Base.choose"
] | [] | (*
Copyright 2008-2014 Nikhil Swamy and Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
(**
This module defines all pure and total operations on lists that can be
used in specifications. It is implemented by FStar_List_Tot_Base.ml, any
functional change and/or the addition of new functions MUST be reflected
there.
@summary Pure total operations on lists
*)
module FStar.List.Tot.Base
(**
Base operations
*)
(** [isEmpty l] returns [true] if and only if [l] is empty *)
val isEmpty: list 'a -> Tot bool
let isEmpty l = match l with
| [] -> true
| _ -> false
(** [hd l] returns the first element of [l]. Requires [l] to be
nonempty, at type-checking time. Named as in: OCaml, F#, Coq *)
val hd: l:list 'a{Cons? l} -> Tot 'a
let hd = function
| hd::_ -> hd
(** [tail l] returns [l] without its first element. Requires, at
type-checking time, that [l] be nonempty. Similar to: tl in OCaml, F#, Coq
*)
val tail: l:list 'a {Cons? l} -> Tot (list 'a)
let tail = function
| _::tl -> tl
(** [tl l] returns [l] without its first element. Requires, at
type-checking time, that [l] be nonempty. Named as in: OCaml, F#, Coq
*)
val tl: l:list 'a {Cons? l} -> Tot (list 'a)
let tl = tail
(** [last l] returns the last element of [l]. Requires, at
type-checking time, that [l] be nonempty. Named as in: Haskell
*)
val last: l:list 'a {Cons? l} -> Tot 'a
let rec last = function
| [hd] -> hd
| _::tl -> last tl
(** [init l] returns [l] without its last element. Requires, at
type-checking time, that [l] be nonempty. Named as in: Haskell
*)
val init: l:list 'a {Cons? l} -> Tot (list 'a)
let rec init = function
| [_] -> []
| hd::tl -> hd::(init tl)
(** [length l] returns the total number of elements in [l]. Named as
in: OCaml, F#, Coq *)
val length: list 'a -> Tot nat
let rec length = function
| [] -> 0
| _::tl -> 1 + length tl
(** [nth l n] returns the [n]-th element in list [l] (with the first
element being the 0-th) if [l] is long enough, or [None]
otherwise. Named as in: OCaml, F#, Coq *)
val nth: list 'a -> nat -> Tot (option 'a)
let rec nth l n = match l with
| [] -> None
| hd::tl -> if n = 0 then Some hd else nth tl (n - 1)
(** [index l n] returns the [n]-th element in list [l] (with the first
element being the 0-th). Requires, at type-checking time, that [l] be
of length at least [n+1]. *)
val index: #a:Type -> l:list a -> i:nat{i < length l} -> Tot a
let rec index #a (l: list a) (i:nat{i < length l}): Tot a =
if i = 0 then
hd l
else
index (tl l) (i - 1)
(** [count x l] returns the number of occurrences of [x] in
[l]. Requires, at type-checking time, the type of [a] to have equality
defined. Similar to: [List.count_occ] in Coq. *)
val count: #a:eqtype -> a -> list a -> Tot nat
let rec count #a x = function
| [] -> 0
| hd::tl -> if x=hd then 1 + count x tl else count x tl
(** [rev_acc l1 l2] appends the elements of [l1] to the beginning of
[l2], in reverse order. It is equivalent to [append (rev l1) l2], but
is tail-recursive. Similar to: [List.rev_append] in OCaml, Coq. *)
val rev_acc: list 'a -> list 'a -> Tot (list 'a)
let rec rev_acc l acc = match l with
| [] -> acc
| hd::tl -> rev_acc tl (hd::acc)
(** [rev l] returns the list [l] in reverse order. Named as in: OCaml,
F#, Coq. *)
val rev: list 'a -> Tot (list 'a)
let rev l = rev_acc l []
(** [append l1 l2] appends the elements of [l2] to the end of [l1]. Named as: OCaml, F#. Similar to: [List.app] in Coq. *)
val append: list 'a -> list 'a -> Tot (list 'a)
let rec append x y = match x with
| [] -> y
| a::tl -> a::append tl y
(** Defines notation [@@] for [append], as in OCaml, F# . *)
let op_At x y = append x y
(** [snoc (l, x)] adds [x] to the end of the list [l].
Note: We use an uncurried [snoc (l, x)] instead of the curried
[snoc l x]. This is intentional. If [snoc] takes a pair instead
of 2 arguments, it allows for a better pattern on
[lemma_unsnoc_snoc], which connects [snoc] and [unsnoc]. In
particular, if we had two arguments, then either the pattern would
either be too restrictive or would lead to over-triggering. More
context for this can be seen in the (collapsed and uncollapsed)
comments at https://github.com/FStarLang/FStar/pull/1560 *)
val snoc: (list 'a * 'a) -> Tot (list 'a)
let snoc (l, x) = append l [x]
(** [flatten l], where [l] is a list of lists, returns the list of the
elements of the lists in [l], preserving their order. Named as in:
OCaml, Coq. *)
val flatten: list (list 'a) -> Tot (list 'a)
let rec flatten l = match l with
| [] -> []
| hd::tl -> append hd (flatten tl)
(** [map f l] applies [f] to each element of [l] and returns the list
of results, in the order of the original elements in [l]. Requires, at
type-checking time, [f] to be a pure total function. Named as in: OCaml, Coq, F# *)
val map: ('a -> Tot 'b) -> list 'a -> Tot (list 'b)
let rec map f x = match x with
| [] -> []
| a::tl -> f a::map f tl
(** [mapi_init f l n] applies, for each [k], [f (n+k)] to the [k]-th
element of [l] and returns the list of results, in the order of the
original elements in [l]. Requires, at type-checking time, [f] to be a
pure total function. *)
val mapi_init: (int -> 'a -> Tot 'b) -> list 'a -> int -> Tot (list 'b)
let rec mapi_init f l i = match l with
| [] -> []
| hd::tl -> (f i hd)::(mapi_init f tl (i+1))
(** [mapi f l] applies, for each [k], [f k] to the [k]-th element of
[l] and returns the list of results, in the order of the original
elements in [l]. Requires, at type-checking time, [f] to be a pure
total function. Named as in: OCaml *)
val mapi: (int -> 'a -> Tot 'b) -> list 'a -> Tot (list 'b)
let mapi f l = mapi_init f l 0
(** [concatMap f l] applies [f] to each element of [l] and returns the
concatenation of the results, in the order of the original elements of
[l]. This is equivalent to [flatten (map f l)]. Requires, at
type-checking time, [f] to be a pure total function. *)
val concatMap: ('a -> Tot (list 'b)) -> list 'a -> Tot (list 'b)
let rec concatMap f = function
| [] -> []
| a::tl ->
let fa = f a in
let ftl = concatMap f tl in
append fa ftl
(** [fold_left f x [y1; y2; ...; yn]] computes (f (... (f x y1) y2)
... yn). Requires, at type-checking time, [f] to be a pure total
function. Named as in: OCaml, Coq. *)
val fold_left: ('a -> 'b -> Tot 'a) -> 'a -> l:list 'b -> Tot 'a (decreases l)
let rec fold_left f x l = match l with
| [] -> x
| hd::tl -> fold_left f (f x hd) tl
(** [fold_right f [x1; x2; ...; xn] y] computes (f x1 (f x2 (... (f xn
y)) ... )). Requires, at type-checking time, [f] to be a pure total
function. Named as in: OCaml, Coq *)
val fold_right: ('a -> 'b -> Tot 'b) -> list 'a -> 'b -> Tot 'b
let rec fold_right f l x = match l with
| [] -> x
| hd::tl -> f hd (fold_right f tl x)
(** [fold_right_gtot] is just like [fold_right], except `f` is
a ghost function **)
let rec fold_right_gtot (#a:Type) (#b:Type) (l:list a) (f:a -> b -> GTot b) (x:b)
: GTot b
= match l with
| [] -> x
| hd::tl -> f hd (fold_right_gtot tl f x)
(* We define map in terms of fold, to share simple lemmas *)
let map_gtot #a #b (f:a -> GTot b) (x:list a)
: GTot (list b)
= fold_right_gtot x (fun x tl -> f x :: tl) []
(** [fold_left2 f x [y1; y2; ...; yn] [z1; z2; ...; zn]] computes (f
(... (f x y1 z1) y2 z2) ... yn zn). Requires, at type-checking time,
[f] to be a pure total function, and the lists [y1; y2; ...; yn] and
[z1; z2; ...; zn] to have the same lengths. Named as in: OCaml *)
val fold_left2 : f:('a -> 'b -> 'c -> Tot 'a) -> accu:'a -> l1:(list 'b) -> l2:(list 'c) ->
Pure 'a (requires (length l1 == length l2)) (ensures (fun _ -> True)) (decreases l1)
let rec fold_left2 f accu l1 l2 =
match (l1, l2) with
| ([], []) -> accu
| (a1::l1, a2::l2) -> fold_left2 f (f accu a1 a2) l1 l2
(** Propositional membership (as in Coq). Does not require decidable
equality. *)
(** [memP x l] holds if, and only if, [x] appears as an
element of [l]. Similar to: List.In in Coq. *)
let rec memP (#a: Type) (x: a) (l: list a) : Tot Type0 =
match l with
| [] -> False
| y :: q -> x == y \/ memP x q
(** List searching **)
(** [mem x l] returns [true] if, and only if, [x] appears as an
element of [l]. Requires, at type-checking time, the type of elements
of [l] to have decidable equality. Named as in: OCaml. See also:
List.In in Coq, which is propositional. *)
val mem: #a:eqtype -> a -> list a -> Tot bool
let rec mem #a x = function
| [] -> false
| hd::tl -> if hd = x then true else mem x tl
(** [contains x l] returns [true] if, and only if, [x] appears as an
element of [l]. Requires, at type-checking time, the type of elements
of [l] to have decidable equality. It is equivalent to: [mem x
l]. TODO: should we rather swap the order of arguments? *)
let contains : #a:eqtype -> a -> list a -> Tot bool = mem
(** [existsb f l] returns [true] if, and only if, there exists some
element [x] in [l] such that [f x] holds. *)
val existsb: #a:Type
-> f:(a -> Tot bool)
-> list a
-> Tot bool
let rec existsb #a f l = match l with
| [] -> false
| hd::tl -> if f hd then true else existsb f tl
(** [find f l] returns [Some x] for some element [x] appearing in [l]
such that [f x] holds, or [None] only if no such [x] exists. *)
val find: #a:Type
-> f:(a -> Tot bool)
-> list a
-> Tot (option (x:a{f x}))
let rec find #a f l = match l with
| [] -> None #(x:a{f x}) //These type annotations are only present because it makes bootstrapping go much faster
| hd::tl -> if f hd then Some #(x:a{f x}) hd else find f tl
(** Filtering elements of a list [l] through a Boolean pure total
predicate [f] *)
(** [filter f l] returns [l] with all elements [x] such that [f x]
does not hold removed. Requires, at type-checking time, [f] to be a
pure total function. Named as in: OCaml, Coq *)
val filter : #a: Type -> f:(a -> Tot bool) -> l: list a -> Tot (m:list a{forall x. memP x m ==> f x})
let rec filter #a f = function
| [] -> []
| hd::tl -> if f hd then hd::filter f tl else filter f tl
(** Postcondition on [filter f l]: for any element [x] of [filter f l],
[f x] holds. Requires, at type-checking time, [f] to be a pure total
function.*)
val mem_filter (#a:Type) (f: (a -> Tot bool)) (l: list a) (x: a) : Lemma
(requires (memP x (filter f l)))
(ensures (f x))
let mem_filter f l x = ()
(** Postcondition on [filter f l]: stated with [forall]: for any element
[x] of [filter f l], [f x] holds. Requires, at type-checking time, [f]
to be a pure total function. *)
val mem_filter_forall (#a:Type) (f: (a -> Tot bool)) (l: list a) : Lemma
(requires True)
(ensures (forall x . memP x (filter f l) ==> f x))
[SMTPat (filter f l)]
let mem_filter_forall f l = FStar.Classical.ghost_lemma (mem_filter f l)
(** [for_all f l] returns [true] if, and only if, for all elements [x]
appearing in [l], [f x] holds. Requires, at type-checking time, [f] to
be a pure total function. Named as in: OCaml. Similar to: List.forallb
in Coq *)
val for_all: ('a -> Tot bool) -> list 'a -> Tot bool
let rec for_all f l = match l with
| [] -> true
| hd::tl -> if f hd then for_all f tl else false
(** Specification for [for_all f l] vs. mem *)
let rec for_all_mem
(#a: Type)
(f: (a -> Tot bool))
(l: list a)
: Lemma
(for_all f l <==> (forall x . memP x l ==> f x))
= match l with
| [] -> ()
| _ :: q -> for_all_mem f q
(** [collect f l] applies [f] to each element of [l] and returns the
concatenation of the results, in the order of the original elements of
[l]. It is equivalent to [flatten (map f l)]. Requires, at
type-checking time, [f] to be a pure total function. TODO: what is
the difference with [concatMap]? *)
val collect: ('a -> Tot (list 'b)) -> list 'a -> Tot (list 'b)
let rec collect f l = match l with
| [] -> []
| hd::tl -> append (f hd) (collect f tl)
(** [tryFind f l] returns [Some x] for some element [x] appearing in
[l] such that [f x] holds, or [None] only if no such [x]
exists. Requires, at type-checking time, [f] to be a pure total
function. Contrary to [find], [tryFind] provides no postcondition on
its result. *)
val tryFind: ('a -> Tot bool) -> list 'a -> Tot (option 'a)
let rec tryFind p l = match l with
| [] -> None
| hd::tl -> if p hd then Some hd else tryFind p tl
(** [tryPick f l] returns [y] for some element [x] appearing in [l]
such that [f x = Some y] for some y, or [None] only if [f x = None]
for all elements [x] of [l]. Requires, at type-checking time, [f] to
be a pure total function. *)
val tryPick: ('a -> Tot (option 'b)) -> list 'a -> Tot (option 'b)
let rec tryPick f l = match l with
| [] -> None
| hd::tl ->
match f hd with
| Some x -> Some x
| None -> tryPick f tl
(** [choose f l] returns the list of [y] for all elements [x]
appearing in [l] such that [f x = Some y] for some [y]. Requires, at
type-checking time, [f] to be a pure total function. *) | false | false | FStar.List.Tot.Base.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val choose: ('a -> Tot (option 'b)) -> list 'a -> Tot (list 'b) | [
"recursion"
] | FStar.List.Tot.Base.choose | {
"file_name": "ulib/FStar.List.Tot.Base.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | f: (_: 'a -> FStar.Pervasives.Native.option 'b) -> l: Prims.list 'a -> Prims.list 'b | {
"end_col": 30,
"end_line": 359,
"start_col": 21,
"start_line": 354
} |
Prims.Pure | val strict_suffix_of (#a: Type) (l1 l2: list a)
: Pure Type0 (requires True) (ensures (fun _ -> True)) (decreases l2) | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let rec strict_suffix_of (#a: Type) (l1 l2: list a)
: Pure Type0
(requires True)
(ensures (fun _ -> True))
(decreases l2)
= match l2 with
| [] -> False
| _ :: q -> l1 == q \/ l1 `strict_suffix_of` q | val strict_suffix_of (#a: Type) (l1 l2: list a)
: Pure Type0 (requires True) (ensures (fun _ -> True)) (decreases l2)
let rec strict_suffix_of (#a: Type) (l1 l2: list a)
: Pure Type0 (requires True) (ensures (fun _ -> True)) (decreases l2) = | false | null | false | match l2 with
| [] -> False
| _ :: q -> l1 == q \/ l1 `strict_suffix_of` q | {
"checked_file": "FStar.List.Tot.Base.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.List.Tot.Base.fst"
} | [
""
] | [
"Prims.list",
"Prims.l_False",
"Prims.l_or",
"Prims.eq2",
"FStar.List.Tot.Base.strict_suffix_of",
"Prims.l_True"
] | [] | (*
Copyright 2008-2014 Nikhil Swamy and Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
(**
This module defines all pure and total operations on lists that can be
used in specifications. It is implemented by FStar_List_Tot_Base.ml, any
functional change and/or the addition of new functions MUST be reflected
there.
@summary Pure total operations on lists
*)
module FStar.List.Tot.Base
(**
Base operations
*)
(** [isEmpty l] returns [true] if and only if [l] is empty *)
val isEmpty: list 'a -> Tot bool
let isEmpty l = match l with
| [] -> true
| _ -> false
(** [hd l] returns the first element of [l]. Requires [l] to be
nonempty, at type-checking time. Named as in: OCaml, F#, Coq *)
val hd: l:list 'a{Cons? l} -> Tot 'a
let hd = function
| hd::_ -> hd
(** [tail l] returns [l] without its first element. Requires, at
type-checking time, that [l] be nonempty. Similar to: tl in OCaml, F#, Coq
*)
val tail: l:list 'a {Cons? l} -> Tot (list 'a)
let tail = function
| _::tl -> tl
(** [tl l] returns [l] without its first element. Requires, at
type-checking time, that [l] be nonempty. Named as in: OCaml, F#, Coq
*)
val tl: l:list 'a {Cons? l} -> Tot (list 'a)
let tl = tail
(** [last l] returns the last element of [l]. Requires, at
type-checking time, that [l] be nonempty. Named as in: Haskell
*)
val last: l:list 'a {Cons? l} -> Tot 'a
let rec last = function
| [hd] -> hd
| _::tl -> last tl
(** [init l] returns [l] without its last element. Requires, at
type-checking time, that [l] be nonempty. Named as in: Haskell
*)
val init: l:list 'a {Cons? l} -> Tot (list 'a)
let rec init = function
| [_] -> []
| hd::tl -> hd::(init tl)
(** [length l] returns the total number of elements in [l]. Named as
in: OCaml, F#, Coq *)
val length: list 'a -> Tot nat
let rec length = function
| [] -> 0
| _::tl -> 1 + length tl
(** [nth l n] returns the [n]-th element in list [l] (with the first
element being the 0-th) if [l] is long enough, or [None]
otherwise. Named as in: OCaml, F#, Coq *)
val nth: list 'a -> nat -> Tot (option 'a)
let rec nth l n = match l with
| [] -> None
| hd::tl -> if n = 0 then Some hd else nth tl (n - 1)
(** [index l n] returns the [n]-th element in list [l] (with the first
element being the 0-th). Requires, at type-checking time, that [l] be
of length at least [n+1]. *)
val index: #a:Type -> l:list a -> i:nat{i < length l} -> Tot a
let rec index #a (l: list a) (i:nat{i < length l}): Tot a =
if i = 0 then
hd l
else
index (tl l) (i - 1)
(** [count x l] returns the number of occurrences of [x] in
[l]. Requires, at type-checking time, the type of [a] to have equality
defined. Similar to: [List.count_occ] in Coq. *)
val count: #a:eqtype -> a -> list a -> Tot nat
let rec count #a x = function
| [] -> 0
| hd::tl -> if x=hd then 1 + count x tl else count x tl
(** [rev_acc l1 l2] appends the elements of [l1] to the beginning of
[l2], in reverse order. It is equivalent to [append (rev l1) l2], but
is tail-recursive. Similar to: [List.rev_append] in OCaml, Coq. *)
val rev_acc: list 'a -> list 'a -> Tot (list 'a)
let rec rev_acc l acc = match l with
| [] -> acc
| hd::tl -> rev_acc tl (hd::acc)
(** [rev l] returns the list [l] in reverse order. Named as in: OCaml,
F#, Coq. *)
val rev: list 'a -> Tot (list 'a)
let rev l = rev_acc l []
(** [append l1 l2] appends the elements of [l2] to the end of [l1]. Named as: OCaml, F#. Similar to: [List.app] in Coq. *)
val append: list 'a -> list 'a -> Tot (list 'a)
let rec append x y = match x with
| [] -> y
| a::tl -> a::append tl y
(** Defines notation [@@] for [append], as in OCaml, F# . *)
let op_At x y = append x y
(** [snoc (l, x)] adds [x] to the end of the list [l].
Note: We use an uncurried [snoc (l, x)] instead of the curried
[snoc l x]. This is intentional. If [snoc] takes a pair instead
of 2 arguments, it allows for a better pattern on
[lemma_unsnoc_snoc], which connects [snoc] and [unsnoc]. In
particular, if we had two arguments, then either the pattern would
either be too restrictive or would lead to over-triggering. More
context for this can be seen in the (collapsed and uncollapsed)
comments at https://github.com/FStarLang/FStar/pull/1560 *)
val snoc: (list 'a * 'a) -> Tot (list 'a)
let snoc (l, x) = append l [x]
(** [flatten l], where [l] is a list of lists, returns the list of the
elements of the lists in [l], preserving their order. Named as in:
OCaml, Coq. *)
val flatten: list (list 'a) -> Tot (list 'a)
let rec flatten l = match l with
| [] -> []
| hd::tl -> append hd (flatten tl)
(** [map f l] applies [f] to each element of [l] and returns the list
of results, in the order of the original elements in [l]. Requires, at
type-checking time, [f] to be a pure total function. Named as in: OCaml, Coq, F# *)
val map: ('a -> Tot 'b) -> list 'a -> Tot (list 'b)
let rec map f x = match x with
| [] -> []
| a::tl -> f a::map f tl
(** [mapi_init f l n] applies, for each [k], [f (n+k)] to the [k]-th
element of [l] and returns the list of results, in the order of the
original elements in [l]. Requires, at type-checking time, [f] to be a
pure total function. *)
val mapi_init: (int -> 'a -> Tot 'b) -> list 'a -> int -> Tot (list 'b)
let rec mapi_init f l i = match l with
| [] -> []
| hd::tl -> (f i hd)::(mapi_init f tl (i+1))
(** [mapi f l] applies, for each [k], [f k] to the [k]-th element of
[l] and returns the list of results, in the order of the original
elements in [l]. Requires, at type-checking time, [f] to be a pure
total function. Named as in: OCaml *)
val mapi: (int -> 'a -> Tot 'b) -> list 'a -> Tot (list 'b)
let mapi f l = mapi_init f l 0
(** [concatMap f l] applies [f] to each element of [l] and returns the
concatenation of the results, in the order of the original elements of
[l]. This is equivalent to [flatten (map f l)]. Requires, at
type-checking time, [f] to be a pure total function. *)
val concatMap: ('a -> Tot (list 'b)) -> list 'a -> Tot (list 'b)
let rec concatMap f = function
| [] -> []
| a::tl ->
let fa = f a in
let ftl = concatMap f tl in
append fa ftl
(** [fold_left f x [y1; y2; ...; yn]] computes (f (... (f x y1) y2)
... yn). Requires, at type-checking time, [f] to be a pure total
function. Named as in: OCaml, Coq. *)
val fold_left: ('a -> 'b -> Tot 'a) -> 'a -> l:list 'b -> Tot 'a (decreases l)
let rec fold_left f x l = match l with
| [] -> x
| hd::tl -> fold_left f (f x hd) tl
(** [fold_right f [x1; x2; ...; xn] y] computes (f x1 (f x2 (... (f xn
y)) ... )). Requires, at type-checking time, [f] to be a pure total
function. Named as in: OCaml, Coq *)
val fold_right: ('a -> 'b -> Tot 'b) -> list 'a -> 'b -> Tot 'b
let rec fold_right f l x = match l with
| [] -> x
| hd::tl -> f hd (fold_right f tl x)
(** [fold_right_gtot] is just like [fold_right], except `f` is
a ghost function **)
let rec fold_right_gtot (#a:Type) (#b:Type) (l:list a) (f:a -> b -> GTot b) (x:b)
: GTot b
= match l with
| [] -> x
| hd::tl -> f hd (fold_right_gtot tl f x)
(* We define map in terms of fold, to share simple lemmas *)
let map_gtot #a #b (f:a -> GTot b) (x:list a)
: GTot (list b)
= fold_right_gtot x (fun x tl -> f x :: tl) []
(** [fold_left2 f x [y1; y2; ...; yn] [z1; z2; ...; zn]] computes (f
(... (f x y1 z1) y2 z2) ... yn zn). Requires, at type-checking time,
[f] to be a pure total function, and the lists [y1; y2; ...; yn] and
[z1; z2; ...; zn] to have the same lengths. Named as in: OCaml *)
val fold_left2 : f:('a -> 'b -> 'c -> Tot 'a) -> accu:'a -> l1:(list 'b) -> l2:(list 'c) ->
Pure 'a (requires (length l1 == length l2)) (ensures (fun _ -> True)) (decreases l1)
let rec fold_left2 f accu l1 l2 =
match (l1, l2) with
| ([], []) -> accu
| (a1::l1, a2::l2) -> fold_left2 f (f accu a1 a2) l1 l2
(** Propositional membership (as in Coq). Does not require decidable
equality. *)
(** [memP x l] holds if, and only if, [x] appears as an
element of [l]. Similar to: List.In in Coq. *)
let rec memP (#a: Type) (x: a) (l: list a) : Tot Type0 =
match l with
| [] -> False
| y :: q -> x == y \/ memP x q
(** List searching **)
(** [mem x l] returns [true] if, and only if, [x] appears as an
element of [l]. Requires, at type-checking time, the type of elements
of [l] to have decidable equality. Named as in: OCaml. See also:
List.In in Coq, which is propositional. *)
val mem: #a:eqtype -> a -> list a -> Tot bool
let rec mem #a x = function
| [] -> false
| hd::tl -> if hd = x then true else mem x tl
(** [contains x l] returns [true] if, and only if, [x] appears as an
element of [l]. Requires, at type-checking time, the type of elements
of [l] to have decidable equality. It is equivalent to: [mem x
l]. TODO: should we rather swap the order of arguments? *)
let contains : #a:eqtype -> a -> list a -> Tot bool = mem
(** [existsb f l] returns [true] if, and only if, there exists some
element [x] in [l] such that [f x] holds. *)
val existsb: #a:Type
-> f:(a -> Tot bool)
-> list a
-> Tot bool
let rec existsb #a f l = match l with
| [] -> false
| hd::tl -> if f hd then true else existsb f tl
(** [find f l] returns [Some x] for some element [x] appearing in [l]
such that [f x] holds, or [None] only if no such [x] exists. *)
val find: #a:Type
-> f:(a -> Tot bool)
-> list a
-> Tot (option (x:a{f x}))
let rec find #a f l = match l with
| [] -> None #(x:a{f x}) //These type annotations are only present because it makes bootstrapping go much faster
| hd::tl -> if f hd then Some #(x:a{f x}) hd else find f tl
(** Filtering elements of a list [l] through a Boolean pure total
predicate [f] *)
(** [filter f l] returns [l] with all elements [x] such that [f x]
does not hold removed. Requires, at type-checking time, [f] to be a
pure total function. Named as in: OCaml, Coq *)
val filter : #a: Type -> f:(a -> Tot bool) -> l: list a -> Tot (m:list a{forall x. memP x m ==> f x})
let rec filter #a f = function
| [] -> []
| hd::tl -> if f hd then hd::filter f tl else filter f tl
(** Postcondition on [filter f l]: for any element [x] of [filter f l],
[f x] holds. Requires, at type-checking time, [f] to be a pure total
function.*)
val mem_filter (#a:Type) (f: (a -> Tot bool)) (l: list a) (x: a) : Lemma
(requires (memP x (filter f l)))
(ensures (f x))
let mem_filter f l x = ()
(** Postcondition on [filter f l]: stated with [forall]: for any element
[x] of [filter f l], [f x] holds. Requires, at type-checking time, [f]
to be a pure total function. *)
val mem_filter_forall (#a:Type) (f: (a -> Tot bool)) (l: list a) : Lemma
(requires True)
(ensures (forall x . memP x (filter f l) ==> f x))
[SMTPat (filter f l)]
let mem_filter_forall f l = FStar.Classical.ghost_lemma (mem_filter f l)
(** [for_all f l] returns [true] if, and only if, for all elements [x]
appearing in [l], [f x] holds. Requires, at type-checking time, [f] to
be a pure total function. Named as in: OCaml. Similar to: List.forallb
in Coq *)
val for_all: ('a -> Tot bool) -> list 'a -> Tot bool
let rec for_all f l = match l with
| [] -> true
| hd::tl -> if f hd then for_all f tl else false
(** Specification for [for_all f l] vs. mem *)
let rec for_all_mem
(#a: Type)
(f: (a -> Tot bool))
(l: list a)
: Lemma
(for_all f l <==> (forall x . memP x l ==> f x))
= match l with
| [] -> ()
| _ :: q -> for_all_mem f q
(** [collect f l] applies [f] to each element of [l] and returns the
concatenation of the results, in the order of the original elements of
[l]. It is equivalent to [flatten (map f l)]. Requires, at
type-checking time, [f] to be a pure total function. TODO: what is
the difference with [concatMap]? *)
val collect: ('a -> Tot (list 'b)) -> list 'a -> Tot (list 'b)
let rec collect f l = match l with
| [] -> []
| hd::tl -> append (f hd) (collect f tl)
(** [tryFind f l] returns [Some x] for some element [x] appearing in
[l] such that [f x] holds, or [None] only if no such [x]
exists. Requires, at type-checking time, [f] to be a pure total
function. Contrary to [find], [tryFind] provides no postcondition on
its result. *)
val tryFind: ('a -> Tot bool) -> list 'a -> Tot (option 'a)
let rec tryFind p l = match l with
| [] -> None
| hd::tl -> if p hd then Some hd else tryFind p tl
(** [tryPick f l] returns [y] for some element [x] appearing in [l]
such that [f x = Some y] for some y, or [None] only if [f x = None]
for all elements [x] of [l]. Requires, at type-checking time, [f] to
be a pure total function. *)
val tryPick: ('a -> Tot (option 'b)) -> list 'a -> Tot (option 'b)
let rec tryPick f l = match l with
| [] -> None
| hd::tl ->
match f hd with
| Some x -> Some x
| None -> tryPick f tl
(** [choose f l] returns the list of [y] for all elements [x]
appearing in [l] such that [f x = Some y] for some [y]. Requires, at
type-checking time, [f] to be a pure total function. *)
val choose: ('a -> Tot (option 'b)) -> list 'a -> Tot (list 'b)
let rec choose f l = match l with
| [] -> []
| hd::tl ->
match f hd with
| Some x -> x::(choose f tl)
| None -> choose f tl
(** [partition f l] returns the pair of lists [(l1, l2)] where all
elements [x] of [l] are in [l1] if [f x] holds, and in [l2]
otherwise. Both [l1] and [l2] retain the original order of
[l]. Requires, at type-checking time, [f] to be a pure total
function. *)
val partition: f:('a -> Tot bool) -> list 'a -> Tot (list 'a * list 'a)
let rec partition f = function
| [] -> [], []
| hd::tl ->
let l1, l2 = partition f tl in
if f hd
then hd::l1, l2
else l1, hd::l2
(** [subset la lb] is true if and only if all the elements from [la]
are also in [lb]. Requires, at type-checking time, the type of
elements of [la] and [lb] to have decidable equality. *)
val subset: #a:eqtype -> list a -> list a -> Tot bool
let rec subset #a la lb =
match la with
| [] -> true
| h :: tl -> mem h lb && subset tl lb
(** [noRepeats l] returns [true] if, and only if, no element of [l]
appears in [l] more than once. Requires, at type-checking time, the
type of elements of [la] and [lb] to have decidable equality. *)
val noRepeats : #a:eqtype -> list a -> Tot bool
let rec noRepeats #a la =
match la with
| [] -> true
| h :: tl -> not(mem h tl) && noRepeats tl
(** [no_repeats_p l] valid if, and only if, no element of [l]
appears in [l] more than once. *)
val no_repeats_p : #a:Type -> list a -> Tot prop
let rec no_repeats_p #a la =
match la with
| [] -> True
| h :: tl -> ~(memP h tl) /\ no_repeats_p tl
(** List of tuples **)
(** [assoc x l] returns [Some y] where [(x, y)] is the first element
of [l] whose first element is [x], or [None] only if no such element
exists. Requires, at type-checking time, the type of [x] to have
decidable equality. Named as in: OCaml. *)
val assoc: #a:eqtype -> #b:Type -> a -> list (a * b) -> Tot (option b)
let rec assoc #a #b x = function
| [] -> None
| (x', y)::tl -> if x=x' then Some y else assoc x tl
(** [split] takes a list of pairs [(x1, y1), ..., (xn, yn)] and
returns the pair of lists ([x1, ..., xn], [y1, ..., yn]). Named as in:
OCaml *)
val split: list ('a * 'b) -> Tot (list 'a * list 'b)
let rec split l = match l with
| [] -> ([],[])
| (hd1,hd2)::tl ->
let (tl1,tl2) = split tl in
(hd1::tl1,hd2::tl2)
(** [unzip] takes a list of pairs [(x1, y1), ..., (xn, yn)] and
returns the pair of lists ([x1, ..., xn], [y1, ..., yn]). Named as in:
Haskell *)
let unzip l = split l
(** [unzip3] takes a list of triples [(x1, y1, z1), ..., (xn, yn, zn)]
and returns the triple of lists ([x1, ..., xn], [y1, ..., yn], [z1,
..., zn]). Named as in: Haskell *)
val unzip3: list ('a * 'b * 'c) -> Tot (list 'a * list 'b * list 'c)
let rec unzip3 l = match l with
| [] -> ([],[],[])
| (hd1,hd2,hd3)::tl ->
let (tl1,tl2,tl3) = unzip3 tl in
(hd1::tl1,hd2::tl2,hd3::tl3)
(** Splitting a list at some index **)
(** [splitAt] takes a natural number n and a list and returns a pair
of the maximal prefix of l of size smaller than n and the rest of
the list *)
let rec splitAt (#a:Type) (n:nat) (l:list a) : Tot (list a * list a) =
if n = 0 then [], l
else
match l with
| [] -> [], l
| x :: xs -> let l1, l2 = splitAt (n-1) xs in x :: l1, l2
let rec lemma_splitAt_snd_length (#a:Type) (n:nat) (l:list a) :
Lemma
(requires (n <= length l))
(ensures (length (snd (splitAt n l)) = length l - n)) =
match n, l with
| 0, _ -> ()
| _, [] -> ()
| _, _ :: l' -> lemma_splitAt_snd_length (n - 1) l'
(** [unsnoc] is an inverse of [snoc]. It splits a list into
all-elements-except-last and last element. *)
val unsnoc: #a:Type -> l:list a{length l > 0} -> Tot (list a * a)
let unsnoc #a l =
let l1, l2 = splitAt (length l - 1) l in
lemma_splitAt_snd_length (length l - 1) l;
l1, hd l2
(** [split3] splits a list into 3 parts. This allows easy access to
the part of the list before and after the element, as well as the
element itself. *)
val split3: #a:Type -> l:list a -> i:nat{i < length l} -> Tot (list a * a * list a)
let split3 #a l i =
let a, rest = splitAt i l in
lemma_splitAt_snd_length i l;
let b :: c = rest in
a, b, c
(** Sorting (implemented as quicksort) **)
(** [partition] splits a list [l] into two lists, the sum of whose
lengths is the length of [l]. *)
val partition_length: f:('a -> Tot bool)
-> l:list 'a
-> Lemma (requires True)
(ensures (length (fst (partition f l))
+ length (snd (partition f l)) = length l))
let rec partition_length f l = match l with
| [] -> ()
| hd::tl -> partition_length f tl
(** [bool_of_compare] turns a comparison function into a strict
order. More precisely, [bool_of_compare compare x y] returns true
if, and only if, [compare x y] is negative, meaning [x] precedes
[y] in the ordering defined by compare.
This is used in sorting, and is defined to be consistent with
OCaml and F#, where sorting is performed in ascending order.
*)
val bool_of_compare : #a:Type -> (a -> a -> Tot int) -> a -> a -> Tot bool
let bool_of_compare #a f x y = f x y < 0
(** [compare_of_bool] turns a strict order into a comparison
function. More precisely, [compare_of_bool rel x y] returns a positive
number if, and only if, x `rel` y holds. Inspired from OCaml, where
polymorphic comparison using both the [compare] function and the (>)
infix operator are such that [compare x y] is positive if, and only
if, x > y. Requires, at type-checking time, [rel] to be a pure total
function. *)
val compare_of_bool : #a:eqtype -> (a -> a -> Tot bool) -> a -> a -> Tot int
let compare_of_bool #a rel x y =
if x `rel` y then -1
else if x = y then 0
else 1
let compare_of_bool_of_compare (#a:eqtype) (f:a -> a -> Tot bool)
: Lemma (forall x y. bool_of_compare (compare_of_bool f) x y == f x y)
= ()
(** [sortWith compare l] returns the list [l'] containing the elements
of [l] sorted along the comparison function [compare], in such a
way that if [compare x y > 0], then [x] appears before [y] in
[l']. Sorts in ascending order *)
val sortWith: ('a -> 'a -> Tot int) -> l:list 'a -> Tot (list 'a) (decreases (length l))
let rec sortWith f = function
| [] -> []
| pivot::tl ->
let hi, lo = partition (bool_of_compare f pivot) tl in
partition_length (bool_of_compare f pivot) tl;
append (sortWith f lo) (pivot::sortWith f hi)
(** A l1 is a strict suffix of l2. *)
let rec strict_suffix_of (#a: Type) (l1 l2: list a)
: Pure Type0
(requires True)
(ensures (fun _ -> True)) | false | false | FStar.List.Tot.Base.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val strict_suffix_of (#a: Type) (l1 l2: list a)
: Pure Type0 (requires True) (ensures (fun _ -> True)) (decreases l2) | [
"recursion"
] | FStar.List.Tot.Base.strict_suffix_of | {
"file_name": "ulib/FStar.List.Tot.Base.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | l1: Prims.list a -> l2: Prims.list a -> Prims.Pure Type0 | {
"end_col": 48,
"end_line": 538,
"start_col": 2,
"start_line": 536
} |
FStar.Pervasives.Lemma | val partition_length: f:('a -> Tot bool)
-> l:list 'a
-> Lemma (requires True)
(ensures (length (fst (partition f l))
+ length (snd (partition f l)) = length l)) | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let rec partition_length f l = match l with
| [] -> ()
| hd::tl -> partition_length f tl | val partition_length: f:('a -> Tot bool)
-> l:list 'a
-> Lemma (requires True)
(ensures (length (fst (partition f l))
+ length (snd (partition f l)) = length l))
let rec partition_length f l = | false | null | true | match l with
| [] -> ()
| hd :: tl -> partition_length f tl | {
"checked_file": "FStar.List.Tot.Base.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.List.Tot.Base.fst"
} | [
"lemma"
] | [
"Prims.bool",
"Prims.list",
"FStar.List.Tot.Base.partition_length",
"Prims.unit"
] | [] | (*
Copyright 2008-2014 Nikhil Swamy and Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
(**
This module defines all pure and total operations on lists that can be
used in specifications. It is implemented by FStar_List_Tot_Base.ml, any
functional change and/or the addition of new functions MUST be reflected
there.
@summary Pure total operations on lists
*)
module FStar.List.Tot.Base
(**
Base operations
*)
(** [isEmpty l] returns [true] if and only if [l] is empty *)
val isEmpty: list 'a -> Tot bool
let isEmpty l = match l with
| [] -> true
| _ -> false
(** [hd l] returns the first element of [l]. Requires [l] to be
nonempty, at type-checking time. Named as in: OCaml, F#, Coq *)
val hd: l:list 'a{Cons? l} -> Tot 'a
let hd = function
| hd::_ -> hd
(** [tail l] returns [l] without its first element. Requires, at
type-checking time, that [l] be nonempty. Similar to: tl in OCaml, F#, Coq
*)
val tail: l:list 'a {Cons? l} -> Tot (list 'a)
let tail = function
| _::tl -> tl
(** [tl l] returns [l] without its first element. Requires, at
type-checking time, that [l] be nonempty. Named as in: OCaml, F#, Coq
*)
val tl: l:list 'a {Cons? l} -> Tot (list 'a)
let tl = tail
(** [last l] returns the last element of [l]. Requires, at
type-checking time, that [l] be nonempty. Named as in: Haskell
*)
val last: l:list 'a {Cons? l} -> Tot 'a
let rec last = function
| [hd] -> hd
| _::tl -> last tl
(** [init l] returns [l] without its last element. Requires, at
type-checking time, that [l] be nonempty. Named as in: Haskell
*)
val init: l:list 'a {Cons? l} -> Tot (list 'a)
let rec init = function
| [_] -> []
| hd::tl -> hd::(init tl)
(** [length l] returns the total number of elements in [l]. Named as
in: OCaml, F#, Coq *)
val length: list 'a -> Tot nat
let rec length = function
| [] -> 0
| _::tl -> 1 + length tl
(** [nth l n] returns the [n]-th element in list [l] (with the first
element being the 0-th) if [l] is long enough, or [None]
otherwise. Named as in: OCaml, F#, Coq *)
val nth: list 'a -> nat -> Tot (option 'a)
let rec nth l n = match l with
| [] -> None
| hd::tl -> if n = 0 then Some hd else nth tl (n - 1)
(** [index l n] returns the [n]-th element in list [l] (with the first
element being the 0-th). Requires, at type-checking time, that [l] be
of length at least [n+1]. *)
val index: #a:Type -> l:list a -> i:nat{i < length l} -> Tot a
let rec index #a (l: list a) (i:nat{i < length l}): Tot a =
if i = 0 then
hd l
else
index (tl l) (i - 1)
(** [count x l] returns the number of occurrences of [x] in
[l]. Requires, at type-checking time, the type of [a] to have equality
defined. Similar to: [List.count_occ] in Coq. *)
val count: #a:eqtype -> a -> list a -> Tot nat
let rec count #a x = function
| [] -> 0
| hd::tl -> if x=hd then 1 + count x tl else count x tl
(** [rev_acc l1 l2] appends the elements of [l1] to the beginning of
[l2], in reverse order. It is equivalent to [append (rev l1) l2], but
is tail-recursive. Similar to: [List.rev_append] in OCaml, Coq. *)
val rev_acc: list 'a -> list 'a -> Tot (list 'a)
let rec rev_acc l acc = match l with
| [] -> acc
| hd::tl -> rev_acc tl (hd::acc)
(** [rev l] returns the list [l] in reverse order. Named as in: OCaml,
F#, Coq. *)
val rev: list 'a -> Tot (list 'a)
let rev l = rev_acc l []
(** [append l1 l2] appends the elements of [l2] to the end of [l1]. Named as: OCaml, F#. Similar to: [List.app] in Coq. *)
val append: list 'a -> list 'a -> Tot (list 'a)
let rec append x y = match x with
| [] -> y
| a::tl -> a::append tl y
(** Defines notation [@@] for [append], as in OCaml, F# . *)
let op_At x y = append x y
(** [snoc (l, x)] adds [x] to the end of the list [l].
Note: We use an uncurried [snoc (l, x)] instead of the curried
[snoc l x]. This is intentional. If [snoc] takes a pair instead
of 2 arguments, it allows for a better pattern on
[lemma_unsnoc_snoc], which connects [snoc] and [unsnoc]. In
particular, if we had two arguments, then either the pattern would
either be too restrictive or would lead to over-triggering. More
context for this can be seen in the (collapsed and uncollapsed)
comments at https://github.com/FStarLang/FStar/pull/1560 *)
val snoc: (list 'a * 'a) -> Tot (list 'a)
let snoc (l, x) = append l [x]
(** [flatten l], where [l] is a list of lists, returns the list of the
elements of the lists in [l], preserving their order. Named as in:
OCaml, Coq. *)
val flatten: list (list 'a) -> Tot (list 'a)
let rec flatten l = match l with
| [] -> []
| hd::tl -> append hd (flatten tl)
(** [map f l] applies [f] to each element of [l] and returns the list
of results, in the order of the original elements in [l]. Requires, at
type-checking time, [f] to be a pure total function. Named as in: OCaml, Coq, F# *)
val map: ('a -> Tot 'b) -> list 'a -> Tot (list 'b)
let rec map f x = match x with
| [] -> []
| a::tl -> f a::map f tl
(** [mapi_init f l n] applies, for each [k], [f (n+k)] to the [k]-th
element of [l] and returns the list of results, in the order of the
original elements in [l]. Requires, at type-checking time, [f] to be a
pure total function. *)
val mapi_init: (int -> 'a -> Tot 'b) -> list 'a -> int -> Tot (list 'b)
let rec mapi_init f l i = match l with
| [] -> []
| hd::tl -> (f i hd)::(mapi_init f tl (i+1))
(** [mapi f l] applies, for each [k], [f k] to the [k]-th element of
[l] and returns the list of results, in the order of the original
elements in [l]. Requires, at type-checking time, [f] to be a pure
total function. Named as in: OCaml *)
val mapi: (int -> 'a -> Tot 'b) -> list 'a -> Tot (list 'b)
let mapi f l = mapi_init f l 0
(** [concatMap f l] applies [f] to each element of [l] and returns the
concatenation of the results, in the order of the original elements of
[l]. This is equivalent to [flatten (map f l)]. Requires, at
type-checking time, [f] to be a pure total function. *)
val concatMap: ('a -> Tot (list 'b)) -> list 'a -> Tot (list 'b)
let rec concatMap f = function
| [] -> []
| a::tl ->
let fa = f a in
let ftl = concatMap f tl in
append fa ftl
(** [fold_left f x [y1; y2; ...; yn]] computes (f (... (f x y1) y2)
... yn). Requires, at type-checking time, [f] to be a pure total
function. Named as in: OCaml, Coq. *)
val fold_left: ('a -> 'b -> Tot 'a) -> 'a -> l:list 'b -> Tot 'a (decreases l)
let rec fold_left f x l = match l with
| [] -> x
| hd::tl -> fold_left f (f x hd) tl
(** [fold_right f [x1; x2; ...; xn] y] computes (f x1 (f x2 (... (f xn
y)) ... )). Requires, at type-checking time, [f] to be a pure total
function. Named as in: OCaml, Coq *)
val fold_right: ('a -> 'b -> Tot 'b) -> list 'a -> 'b -> Tot 'b
let rec fold_right f l x = match l with
| [] -> x
| hd::tl -> f hd (fold_right f tl x)
(** [fold_right_gtot] is just like [fold_right], except `f` is
a ghost function **)
let rec fold_right_gtot (#a:Type) (#b:Type) (l:list a) (f:a -> b -> GTot b) (x:b)
: GTot b
= match l with
| [] -> x
| hd::tl -> f hd (fold_right_gtot tl f x)
(* We define map in terms of fold, to share simple lemmas *)
let map_gtot #a #b (f:a -> GTot b) (x:list a)
: GTot (list b)
= fold_right_gtot x (fun x tl -> f x :: tl) []
(** [fold_left2 f x [y1; y2; ...; yn] [z1; z2; ...; zn]] computes (f
(... (f x y1 z1) y2 z2) ... yn zn). Requires, at type-checking time,
[f] to be a pure total function, and the lists [y1; y2; ...; yn] and
[z1; z2; ...; zn] to have the same lengths. Named as in: OCaml *)
val fold_left2 : f:('a -> 'b -> 'c -> Tot 'a) -> accu:'a -> l1:(list 'b) -> l2:(list 'c) ->
Pure 'a (requires (length l1 == length l2)) (ensures (fun _ -> True)) (decreases l1)
let rec fold_left2 f accu l1 l2 =
match (l1, l2) with
| ([], []) -> accu
| (a1::l1, a2::l2) -> fold_left2 f (f accu a1 a2) l1 l2
(** Propositional membership (as in Coq). Does not require decidable
equality. *)
(** [memP x l] holds if, and only if, [x] appears as an
element of [l]. Similar to: List.In in Coq. *)
let rec memP (#a: Type) (x: a) (l: list a) : Tot Type0 =
match l with
| [] -> False
| y :: q -> x == y \/ memP x q
(** List searching **)
(** [mem x l] returns [true] if, and only if, [x] appears as an
element of [l]. Requires, at type-checking time, the type of elements
of [l] to have decidable equality. Named as in: OCaml. See also:
List.In in Coq, which is propositional. *)
val mem: #a:eqtype -> a -> list a -> Tot bool
let rec mem #a x = function
| [] -> false
| hd::tl -> if hd = x then true else mem x tl
(** [contains x l] returns [true] if, and only if, [x] appears as an
element of [l]. Requires, at type-checking time, the type of elements
of [l] to have decidable equality. It is equivalent to: [mem x
l]. TODO: should we rather swap the order of arguments? *)
let contains : #a:eqtype -> a -> list a -> Tot bool = mem
(** [existsb f l] returns [true] if, and only if, there exists some
element [x] in [l] such that [f x] holds. *)
val existsb: #a:Type
-> f:(a -> Tot bool)
-> list a
-> Tot bool
let rec existsb #a f l = match l with
| [] -> false
| hd::tl -> if f hd then true else existsb f tl
(** [find f l] returns [Some x] for some element [x] appearing in [l]
such that [f x] holds, or [None] only if no such [x] exists. *)
val find: #a:Type
-> f:(a -> Tot bool)
-> list a
-> Tot (option (x:a{f x}))
let rec find #a f l = match l with
| [] -> None #(x:a{f x}) //These type annotations are only present because it makes bootstrapping go much faster
| hd::tl -> if f hd then Some #(x:a{f x}) hd else find f tl
(** Filtering elements of a list [l] through a Boolean pure total
predicate [f] *)
(** [filter f l] returns [l] with all elements [x] such that [f x]
does not hold removed. Requires, at type-checking time, [f] to be a
pure total function. Named as in: OCaml, Coq *)
val filter : #a: Type -> f:(a -> Tot bool) -> l: list a -> Tot (m:list a{forall x. memP x m ==> f x})
let rec filter #a f = function
| [] -> []
| hd::tl -> if f hd then hd::filter f tl else filter f tl
(** Postcondition on [filter f l]: for any element [x] of [filter f l],
[f x] holds. Requires, at type-checking time, [f] to be a pure total
function.*)
val mem_filter (#a:Type) (f: (a -> Tot bool)) (l: list a) (x: a) : Lemma
(requires (memP x (filter f l)))
(ensures (f x))
let mem_filter f l x = ()
(** Postcondition on [filter f l]: stated with [forall]: for any element
[x] of [filter f l], [f x] holds. Requires, at type-checking time, [f]
to be a pure total function. *)
val mem_filter_forall (#a:Type) (f: (a -> Tot bool)) (l: list a) : Lemma
(requires True)
(ensures (forall x . memP x (filter f l) ==> f x))
[SMTPat (filter f l)]
let mem_filter_forall f l = FStar.Classical.ghost_lemma (mem_filter f l)
(** [for_all f l] returns [true] if, and only if, for all elements [x]
appearing in [l], [f x] holds. Requires, at type-checking time, [f] to
be a pure total function. Named as in: OCaml. Similar to: List.forallb
in Coq *)
val for_all: ('a -> Tot bool) -> list 'a -> Tot bool
let rec for_all f l = match l with
| [] -> true
| hd::tl -> if f hd then for_all f tl else false
(** Specification for [for_all f l] vs. mem *)
let rec for_all_mem
(#a: Type)
(f: (a -> Tot bool))
(l: list a)
: Lemma
(for_all f l <==> (forall x . memP x l ==> f x))
= match l with
| [] -> ()
| _ :: q -> for_all_mem f q
(** [collect f l] applies [f] to each element of [l] and returns the
concatenation of the results, in the order of the original elements of
[l]. It is equivalent to [flatten (map f l)]. Requires, at
type-checking time, [f] to be a pure total function. TODO: what is
the difference with [concatMap]? *)
val collect: ('a -> Tot (list 'b)) -> list 'a -> Tot (list 'b)
let rec collect f l = match l with
| [] -> []
| hd::tl -> append (f hd) (collect f tl)
(** [tryFind f l] returns [Some x] for some element [x] appearing in
[l] such that [f x] holds, or [None] only if no such [x]
exists. Requires, at type-checking time, [f] to be a pure total
function. Contrary to [find], [tryFind] provides no postcondition on
its result. *)
val tryFind: ('a -> Tot bool) -> list 'a -> Tot (option 'a)
let rec tryFind p l = match l with
| [] -> None
| hd::tl -> if p hd then Some hd else tryFind p tl
(** [tryPick f l] returns [y] for some element [x] appearing in [l]
such that [f x = Some y] for some y, or [None] only if [f x = None]
for all elements [x] of [l]. Requires, at type-checking time, [f] to
be a pure total function. *)
val tryPick: ('a -> Tot (option 'b)) -> list 'a -> Tot (option 'b)
let rec tryPick f l = match l with
| [] -> None
| hd::tl ->
match f hd with
| Some x -> Some x
| None -> tryPick f tl
(** [choose f l] returns the list of [y] for all elements [x]
appearing in [l] such that [f x = Some y] for some [y]. Requires, at
type-checking time, [f] to be a pure total function. *)
val choose: ('a -> Tot (option 'b)) -> list 'a -> Tot (list 'b)
let rec choose f l = match l with
| [] -> []
| hd::tl ->
match f hd with
| Some x -> x::(choose f tl)
| None -> choose f tl
(** [partition f l] returns the pair of lists [(l1, l2)] where all
elements [x] of [l] are in [l1] if [f x] holds, and in [l2]
otherwise. Both [l1] and [l2] retain the original order of
[l]. Requires, at type-checking time, [f] to be a pure total
function. *)
val partition: f:('a -> Tot bool) -> list 'a -> Tot (list 'a * list 'a)
let rec partition f = function
| [] -> [], []
| hd::tl ->
let l1, l2 = partition f tl in
if f hd
then hd::l1, l2
else l1, hd::l2
(** [subset la lb] is true if and only if all the elements from [la]
are also in [lb]. Requires, at type-checking time, the type of
elements of [la] and [lb] to have decidable equality. *)
val subset: #a:eqtype -> list a -> list a -> Tot bool
let rec subset #a la lb =
match la with
| [] -> true
| h :: tl -> mem h lb && subset tl lb
(** [noRepeats l] returns [true] if, and only if, no element of [l]
appears in [l] more than once. Requires, at type-checking time, the
type of elements of [la] and [lb] to have decidable equality. *)
val noRepeats : #a:eqtype -> list a -> Tot bool
let rec noRepeats #a la =
match la with
| [] -> true
| h :: tl -> not(mem h tl) && noRepeats tl
(** [no_repeats_p l] valid if, and only if, no element of [l]
appears in [l] more than once. *)
val no_repeats_p : #a:Type -> list a -> Tot prop
let rec no_repeats_p #a la =
match la with
| [] -> True
| h :: tl -> ~(memP h tl) /\ no_repeats_p tl
(** List of tuples **)
(** [assoc x l] returns [Some y] where [(x, y)] is the first element
of [l] whose first element is [x], or [None] only if no such element
exists. Requires, at type-checking time, the type of [x] to have
decidable equality. Named as in: OCaml. *)
val assoc: #a:eqtype -> #b:Type -> a -> list (a * b) -> Tot (option b)
let rec assoc #a #b x = function
| [] -> None
| (x', y)::tl -> if x=x' then Some y else assoc x tl
(** [split] takes a list of pairs [(x1, y1), ..., (xn, yn)] and
returns the pair of lists ([x1, ..., xn], [y1, ..., yn]). Named as in:
OCaml *)
val split: list ('a * 'b) -> Tot (list 'a * list 'b)
let rec split l = match l with
| [] -> ([],[])
| (hd1,hd2)::tl ->
let (tl1,tl2) = split tl in
(hd1::tl1,hd2::tl2)
(** [unzip] takes a list of pairs [(x1, y1), ..., (xn, yn)] and
returns the pair of lists ([x1, ..., xn], [y1, ..., yn]). Named as in:
Haskell *)
let unzip l = split l
(** [unzip3] takes a list of triples [(x1, y1, z1), ..., (xn, yn, zn)]
and returns the triple of lists ([x1, ..., xn], [y1, ..., yn], [z1,
..., zn]). Named as in: Haskell *)
val unzip3: list ('a * 'b * 'c) -> Tot (list 'a * list 'b * list 'c)
let rec unzip3 l = match l with
| [] -> ([],[],[])
| (hd1,hd2,hd3)::tl ->
let (tl1,tl2,tl3) = unzip3 tl in
(hd1::tl1,hd2::tl2,hd3::tl3)
(** Splitting a list at some index **)
(** [splitAt] takes a natural number n and a list and returns a pair
of the maximal prefix of l of size smaller than n and the rest of
the list *)
let rec splitAt (#a:Type) (n:nat) (l:list a) : Tot (list a * list a) =
if n = 0 then [], l
else
match l with
| [] -> [], l
| x :: xs -> let l1, l2 = splitAt (n-1) xs in x :: l1, l2
let rec lemma_splitAt_snd_length (#a:Type) (n:nat) (l:list a) :
Lemma
(requires (n <= length l))
(ensures (length (snd (splitAt n l)) = length l - n)) =
match n, l with
| 0, _ -> ()
| _, [] -> ()
| _, _ :: l' -> lemma_splitAt_snd_length (n - 1) l'
(** [unsnoc] is an inverse of [snoc]. It splits a list into
all-elements-except-last and last element. *)
val unsnoc: #a:Type -> l:list a{length l > 0} -> Tot (list a * a)
let unsnoc #a l =
let l1, l2 = splitAt (length l - 1) l in
lemma_splitAt_snd_length (length l - 1) l;
l1, hd l2
(** [split3] splits a list into 3 parts. This allows easy access to
the part of the list before and after the element, as well as the
element itself. *)
val split3: #a:Type -> l:list a -> i:nat{i < length l} -> Tot (list a * a * list a)
let split3 #a l i =
let a, rest = splitAt i l in
lemma_splitAt_snd_length i l;
let b :: c = rest in
a, b, c
(** Sorting (implemented as quicksort) **)
(** [partition] splits a list [l] into two lists, the sum of whose
lengths is the length of [l]. *)
val partition_length: f:('a -> Tot bool)
-> l:list 'a
-> Lemma (requires True)
(ensures (length (fst (partition f l)) | false | false | FStar.List.Tot.Base.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val partition_length: f:('a -> Tot bool)
-> l:list 'a
-> Lemma (requires True)
(ensures (length (fst (partition f l))
+ length (snd (partition f l)) = length l)) | [
"recursion"
] | FStar.List.Tot.Base.partition_length | {
"file_name": "ulib/FStar.List.Tot.Base.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | f: (_: 'a -> Prims.bool) -> l: Prims.list 'a
-> FStar.Pervasives.Lemma
(ensures
FStar.List.Tot.Base.length (FStar.Pervasives.Native.fst (FStar.List.Tot.Base.partition f l)) +
FStar.List.Tot.Base.length (FStar.Pervasives.Native.snd (FStar.List.Tot.Base.partition f l)) =
FStar.List.Tot.Base.length l) | {
"end_col": 35,
"end_line": 488,
"start_col": 31,
"start_line": 486
} |
Prims.Tot | val subset: #a:eqtype -> list a -> list a -> Tot bool | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let rec subset #a la lb =
match la with
| [] -> true
| h :: tl -> mem h lb && subset tl lb | val subset: #a:eqtype -> list a -> list a -> Tot bool
let rec subset #a la lb = | false | null | false | match la with
| [] -> true
| h :: tl -> mem h lb && subset tl lb | {
"checked_file": "FStar.List.Tot.Base.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.List.Tot.Base.fst"
} | [
"total"
] | [
"Prims.eqtype",
"Prims.list",
"Prims.op_AmpAmp",
"FStar.List.Tot.Base.mem",
"FStar.List.Tot.Base.subset",
"Prims.bool"
] | [] | (*
Copyright 2008-2014 Nikhil Swamy and Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
(**
This module defines all pure and total operations on lists that can be
used in specifications. It is implemented by FStar_List_Tot_Base.ml, any
functional change and/or the addition of new functions MUST be reflected
there.
@summary Pure total operations on lists
*)
module FStar.List.Tot.Base
(**
Base operations
*)
(** [isEmpty l] returns [true] if and only if [l] is empty *)
val isEmpty: list 'a -> Tot bool
let isEmpty l = match l with
| [] -> true
| _ -> false
(** [hd l] returns the first element of [l]. Requires [l] to be
nonempty, at type-checking time. Named as in: OCaml, F#, Coq *)
val hd: l:list 'a{Cons? l} -> Tot 'a
let hd = function
| hd::_ -> hd
(** [tail l] returns [l] without its first element. Requires, at
type-checking time, that [l] be nonempty. Similar to: tl in OCaml, F#, Coq
*)
val tail: l:list 'a {Cons? l} -> Tot (list 'a)
let tail = function
| _::tl -> tl
(** [tl l] returns [l] without its first element. Requires, at
type-checking time, that [l] be nonempty. Named as in: OCaml, F#, Coq
*)
val tl: l:list 'a {Cons? l} -> Tot (list 'a)
let tl = tail
(** [last l] returns the last element of [l]. Requires, at
type-checking time, that [l] be nonempty. Named as in: Haskell
*)
val last: l:list 'a {Cons? l} -> Tot 'a
let rec last = function
| [hd] -> hd
| _::tl -> last tl
(** [init l] returns [l] without its last element. Requires, at
type-checking time, that [l] be nonempty. Named as in: Haskell
*)
val init: l:list 'a {Cons? l} -> Tot (list 'a)
let rec init = function
| [_] -> []
| hd::tl -> hd::(init tl)
(** [length l] returns the total number of elements in [l]. Named as
in: OCaml, F#, Coq *)
val length: list 'a -> Tot nat
let rec length = function
| [] -> 0
| _::tl -> 1 + length tl
(** [nth l n] returns the [n]-th element in list [l] (with the first
element being the 0-th) if [l] is long enough, or [None]
otherwise. Named as in: OCaml, F#, Coq *)
val nth: list 'a -> nat -> Tot (option 'a)
let rec nth l n = match l with
| [] -> None
| hd::tl -> if n = 0 then Some hd else nth tl (n - 1)
(** [index l n] returns the [n]-th element in list [l] (with the first
element being the 0-th). Requires, at type-checking time, that [l] be
of length at least [n+1]. *)
val index: #a:Type -> l:list a -> i:nat{i < length l} -> Tot a
let rec index #a (l: list a) (i:nat{i < length l}): Tot a =
if i = 0 then
hd l
else
index (tl l) (i - 1)
(** [count x l] returns the number of occurrences of [x] in
[l]. Requires, at type-checking time, the type of [a] to have equality
defined. Similar to: [List.count_occ] in Coq. *)
val count: #a:eqtype -> a -> list a -> Tot nat
let rec count #a x = function
| [] -> 0
| hd::tl -> if x=hd then 1 + count x tl else count x tl
(** [rev_acc l1 l2] appends the elements of [l1] to the beginning of
[l2], in reverse order. It is equivalent to [append (rev l1) l2], but
is tail-recursive. Similar to: [List.rev_append] in OCaml, Coq. *)
val rev_acc: list 'a -> list 'a -> Tot (list 'a)
let rec rev_acc l acc = match l with
| [] -> acc
| hd::tl -> rev_acc tl (hd::acc)
(** [rev l] returns the list [l] in reverse order. Named as in: OCaml,
F#, Coq. *)
val rev: list 'a -> Tot (list 'a)
let rev l = rev_acc l []
(** [append l1 l2] appends the elements of [l2] to the end of [l1]. Named as: OCaml, F#. Similar to: [List.app] in Coq. *)
val append: list 'a -> list 'a -> Tot (list 'a)
let rec append x y = match x with
| [] -> y
| a::tl -> a::append tl y
(** Defines notation [@@] for [append], as in OCaml, F# . *)
let op_At x y = append x y
(** [snoc (l, x)] adds [x] to the end of the list [l].
Note: We use an uncurried [snoc (l, x)] instead of the curried
[snoc l x]. This is intentional. If [snoc] takes a pair instead
of 2 arguments, it allows for a better pattern on
[lemma_unsnoc_snoc], which connects [snoc] and [unsnoc]. In
particular, if we had two arguments, then either the pattern would
either be too restrictive or would lead to over-triggering. More
context for this can be seen in the (collapsed and uncollapsed)
comments at https://github.com/FStarLang/FStar/pull/1560 *)
val snoc: (list 'a * 'a) -> Tot (list 'a)
let snoc (l, x) = append l [x]
(** [flatten l], where [l] is a list of lists, returns the list of the
elements of the lists in [l], preserving their order. Named as in:
OCaml, Coq. *)
val flatten: list (list 'a) -> Tot (list 'a)
let rec flatten l = match l with
| [] -> []
| hd::tl -> append hd (flatten tl)
(** [map f l] applies [f] to each element of [l] and returns the list
of results, in the order of the original elements in [l]. Requires, at
type-checking time, [f] to be a pure total function. Named as in: OCaml, Coq, F# *)
val map: ('a -> Tot 'b) -> list 'a -> Tot (list 'b)
let rec map f x = match x with
| [] -> []
| a::tl -> f a::map f tl
(** [mapi_init f l n] applies, for each [k], [f (n+k)] to the [k]-th
element of [l] and returns the list of results, in the order of the
original elements in [l]. Requires, at type-checking time, [f] to be a
pure total function. *)
val mapi_init: (int -> 'a -> Tot 'b) -> list 'a -> int -> Tot (list 'b)
let rec mapi_init f l i = match l with
| [] -> []
| hd::tl -> (f i hd)::(mapi_init f tl (i+1))
(** [mapi f l] applies, for each [k], [f k] to the [k]-th element of
[l] and returns the list of results, in the order of the original
elements in [l]. Requires, at type-checking time, [f] to be a pure
total function. Named as in: OCaml *)
val mapi: (int -> 'a -> Tot 'b) -> list 'a -> Tot (list 'b)
let mapi f l = mapi_init f l 0
(** [concatMap f l] applies [f] to each element of [l] and returns the
concatenation of the results, in the order of the original elements of
[l]. This is equivalent to [flatten (map f l)]. Requires, at
type-checking time, [f] to be a pure total function. *)
val concatMap: ('a -> Tot (list 'b)) -> list 'a -> Tot (list 'b)
let rec concatMap f = function
| [] -> []
| a::tl ->
let fa = f a in
let ftl = concatMap f tl in
append fa ftl
(** [fold_left f x [y1; y2; ...; yn]] computes (f (... (f x y1) y2)
... yn). Requires, at type-checking time, [f] to be a pure total
function. Named as in: OCaml, Coq. *)
val fold_left: ('a -> 'b -> Tot 'a) -> 'a -> l:list 'b -> Tot 'a (decreases l)
let rec fold_left f x l = match l with
| [] -> x
| hd::tl -> fold_left f (f x hd) tl
(** [fold_right f [x1; x2; ...; xn] y] computes (f x1 (f x2 (... (f xn
y)) ... )). Requires, at type-checking time, [f] to be a pure total
function. Named as in: OCaml, Coq *)
val fold_right: ('a -> 'b -> Tot 'b) -> list 'a -> 'b -> Tot 'b
let rec fold_right f l x = match l with
| [] -> x
| hd::tl -> f hd (fold_right f tl x)
(** [fold_right_gtot] is just like [fold_right], except `f` is
a ghost function **)
let rec fold_right_gtot (#a:Type) (#b:Type) (l:list a) (f:a -> b -> GTot b) (x:b)
: GTot b
= match l with
| [] -> x
| hd::tl -> f hd (fold_right_gtot tl f x)
(* We define map in terms of fold, to share simple lemmas *)
let map_gtot #a #b (f:a -> GTot b) (x:list a)
: GTot (list b)
= fold_right_gtot x (fun x tl -> f x :: tl) []
(** [fold_left2 f x [y1; y2; ...; yn] [z1; z2; ...; zn]] computes (f
(... (f x y1 z1) y2 z2) ... yn zn). Requires, at type-checking time,
[f] to be a pure total function, and the lists [y1; y2; ...; yn] and
[z1; z2; ...; zn] to have the same lengths. Named as in: OCaml *)
val fold_left2 : f:('a -> 'b -> 'c -> Tot 'a) -> accu:'a -> l1:(list 'b) -> l2:(list 'c) ->
Pure 'a (requires (length l1 == length l2)) (ensures (fun _ -> True)) (decreases l1)
let rec fold_left2 f accu l1 l2 =
match (l1, l2) with
| ([], []) -> accu
| (a1::l1, a2::l2) -> fold_left2 f (f accu a1 a2) l1 l2
(** Propositional membership (as in Coq). Does not require decidable
equality. *)
(** [memP x l] holds if, and only if, [x] appears as an
element of [l]. Similar to: List.In in Coq. *)
let rec memP (#a: Type) (x: a) (l: list a) : Tot Type0 =
match l with
| [] -> False
| y :: q -> x == y \/ memP x q
(** List searching **)
(** [mem x l] returns [true] if, and only if, [x] appears as an
element of [l]. Requires, at type-checking time, the type of elements
of [l] to have decidable equality. Named as in: OCaml. See also:
List.In in Coq, which is propositional. *)
val mem: #a:eqtype -> a -> list a -> Tot bool
let rec mem #a x = function
| [] -> false
| hd::tl -> if hd = x then true else mem x tl
(** [contains x l] returns [true] if, and only if, [x] appears as an
element of [l]. Requires, at type-checking time, the type of elements
of [l] to have decidable equality. It is equivalent to: [mem x
l]. TODO: should we rather swap the order of arguments? *)
let contains : #a:eqtype -> a -> list a -> Tot bool = mem
(** [existsb f l] returns [true] if, and only if, there exists some
element [x] in [l] such that [f x] holds. *)
val existsb: #a:Type
-> f:(a -> Tot bool)
-> list a
-> Tot bool
let rec existsb #a f l = match l with
| [] -> false
| hd::tl -> if f hd then true else existsb f tl
(** [find f l] returns [Some x] for some element [x] appearing in [l]
such that [f x] holds, or [None] only if no such [x] exists. *)
val find: #a:Type
-> f:(a -> Tot bool)
-> list a
-> Tot (option (x:a{f x}))
let rec find #a f l = match l with
| [] -> None #(x:a{f x}) //These type annotations are only present because it makes bootstrapping go much faster
| hd::tl -> if f hd then Some #(x:a{f x}) hd else find f tl
(** Filtering elements of a list [l] through a Boolean pure total
predicate [f] *)
(** [filter f l] returns [l] with all elements [x] such that [f x]
does not hold removed. Requires, at type-checking time, [f] to be a
pure total function. Named as in: OCaml, Coq *)
val filter : #a: Type -> f:(a -> Tot bool) -> l: list a -> Tot (m:list a{forall x. memP x m ==> f x})
let rec filter #a f = function
| [] -> []
| hd::tl -> if f hd then hd::filter f tl else filter f tl
(** Postcondition on [filter f l]: for any element [x] of [filter f l],
[f x] holds. Requires, at type-checking time, [f] to be a pure total
function.*)
val mem_filter (#a:Type) (f: (a -> Tot bool)) (l: list a) (x: a) : Lemma
(requires (memP x (filter f l)))
(ensures (f x))
let mem_filter f l x = ()
(** Postcondition on [filter f l]: stated with [forall]: for any element
[x] of [filter f l], [f x] holds. Requires, at type-checking time, [f]
to be a pure total function. *)
val mem_filter_forall (#a:Type) (f: (a -> Tot bool)) (l: list a) : Lemma
(requires True)
(ensures (forall x . memP x (filter f l) ==> f x))
[SMTPat (filter f l)]
let mem_filter_forall f l = FStar.Classical.ghost_lemma (mem_filter f l)
(** [for_all f l] returns [true] if, and only if, for all elements [x]
appearing in [l], [f x] holds. Requires, at type-checking time, [f] to
be a pure total function. Named as in: OCaml. Similar to: List.forallb
in Coq *)
val for_all: ('a -> Tot bool) -> list 'a -> Tot bool
let rec for_all f l = match l with
| [] -> true
| hd::tl -> if f hd then for_all f tl else false
(** Specification for [for_all f l] vs. mem *)
let rec for_all_mem
(#a: Type)
(f: (a -> Tot bool))
(l: list a)
: Lemma
(for_all f l <==> (forall x . memP x l ==> f x))
= match l with
| [] -> ()
| _ :: q -> for_all_mem f q
(** [collect f l] applies [f] to each element of [l] and returns the
concatenation of the results, in the order of the original elements of
[l]. It is equivalent to [flatten (map f l)]. Requires, at
type-checking time, [f] to be a pure total function. TODO: what is
the difference with [concatMap]? *)
val collect: ('a -> Tot (list 'b)) -> list 'a -> Tot (list 'b)
let rec collect f l = match l with
| [] -> []
| hd::tl -> append (f hd) (collect f tl)
(** [tryFind f l] returns [Some x] for some element [x] appearing in
[l] such that [f x] holds, or [None] only if no such [x]
exists. Requires, at type-checking time, [f] to be a pure total
function. Contrary to [find], [tryFind] provides no postcondition on
its result. *)
val tryFind: ('a -> Tot bool) -> list 'a -> Tot (option 'a)
let rec tryFind p l = match l with
| [] -> None
| hd::tl -> if p hd then Some hd else tryFind p tl
(** [tryPick f l] returns [y] for some element [x] appearing in [l]
such that [f x = Some y] for some y, or [None] only if [f x = None]
for all elements [x] of [l]. Requires, at type-checking time, [f] to
be a pure total function. *)
val tryPick: ('a -> Tot (option 'b)) -> list 'a -> Tot (option 'b)
let rec tryPick f l = match l with
| [] -> None
| hd::tl ->
match f hd with
| Some x -> Some x
| None -> tryPick f tl
(** [choose f l] returns the list of [y] for all elements [x]
appearing in [l] such that [f x = Some y] for some [y]. Requires, at
type-checking time, [f] to be a pure total function. *)
val choose: ('a -> Tot (option 'b)) -> list 'a -> Tot (list 'b)
let rec choose f l = match l with
| [] -> []
| hd::tl ->
match f hd with
| Some x -> x::(choose f tl)
| None -> choose f tl
(** [partition f l] returns the pair of lists [(l1, l2)] where all
elements [x] of [l] are in [l1] if [f x] holds, and in [l2]
otherwise. Both [l1] and [l2] retain the original order of
[l]. Requires, at type-checking time, [f] to be a pure total
function. *)
val partition: f:('a -> Tot bool) -> list 'a -> Tot (list 'a * list 'a)
let rec partition f = function
| [] -> [], []
| hd::tl ->
let l1, l2 = partition f tl in
if f hd
then hd::l1, l2
else l1, hd::l2
(** [subset la lb] is true if and only if all the elements from [la]
are also in [lb]. Requires, at type-checking time, the type of
elements of [la] and [lb] to have decidable equality. *)
val subset: #a:eqtype -> list a -> list a -> Tot bool | false | false | FStar.List.Tot.Base.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val subset: #a:eqtype -> list a -> list a -> Tot bool | [
"recursion"
] | FStar.List.Tot.Base.subset | {
"file_name": "ulib/FStar.List.Tot.Base.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | la: Prims.list a -> lb: Prims.list a -> Prims.bool | {
"end_col": 40,
"end_line": 382,
"start_col": 2,
"start_line": 380
} |
Prims.Tot | val no_repeats_p : #a:Type -> list a -> Tot prop | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let rec no_repeats_p #a la =
match la with
| [] -> True
| h :: tl -> ~(memP h tl) /\ no_repeats_p tl | val no_repeats_p : #a:Type -> list a -> Tot prop
let rec no_repeats_p #a la = | false | null | false | match la with
| [] -> True
| h :: tl -> ~(memP h tl) /\ no_repeats_p tl | {
"checked_file": "FStar.List.Tot.Base.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Classical.fsti.checked"
],
"interface_file": false,
"source_file": "FStar.List.Tot.Base.fst"
} | [
"total"
] | [
"Prims.list",
"Prims.l_True",
"Prims.l_and",
"Prims.l_not",
"FStar.List.Tot.Base.memP",
"FStar.List.Tot.Base.no_repeats_p",
"Prims.prop"
] | [] | (*
Copyright 2008-2014 Nikhil Swamy and Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
(**
This module defines all pure and total operations on lists that can be
used in specifications. It is implemented by FStar_List_Tot_Base.ml, any
functional change and/or the addition of new functions MUST be reflected
there.
@summary Pure total operations on lists
*)
module FStar.List.Tot.Base
(**
Base operations
*)
(** [isEmpty l] returns [true] if and only if [l] is empty *)
val isEmpty: list 'a -> Tot bool
let isEmpty l = match l with
| [] -> true
| _ -> false
(** [hd l] returns the first element of [l]. Requires [l] to be
nonempty, at type-checking time. Named as in: OCaml, F#, Coq *)
val hd: l:list 'a{Cons? l} -> Tot 'a
let hd = function
| hd::_ -> hd
(** [tail l] returns [l] without its first element. Requires, at
type-checking time, that [l] be nonempty. Similar to: tl in OCaml, F#, Coq
*)
val tail: l:list 'a {Cons? l} -> Tot (list 'a)
let tail = function
| _::tl -> tl
(** [tl l] returns [l] without its first element. Requires, at
type-checking time, that [l] be nonempty. Named as in: OCaml, F#, Coq
*)
val tl: l:list 'a {Cons? l} -> Tot (list 'a)
let tl = tail
(** [last l] returns the last element of [l]. Requires, at
type-checking time, that [l] be nonempty. Named as in: Haskell
*)
val last: l:list 'a {Cons? l} -> Tot 'a
let rec last = function
| [hd] -> hd
| _::tl -> last tl
(** [init l] returns [l] without its last element. Requires, at
type-checking time, that [l] be nonempty. Named as in: Haskell
*)
val init: l:list 'a {Cons? l} -> Tot (list 'a)
let rec init = function
| [_] -> []
| hd::tl -> hd::(init tl)
(** [length l] returns the total number of elements in [l]. Named as
in: OCaml, F#, Coq *)
val length: list 'a -> Tot nat
let rec length = function
| [] -> 0
| _::tl -> 1 + length tl
(** [nth l n] returns the [n]-th element in list [l] (with the first
element being the 0-th) if [l] is long enough, or [None]
otherwise. Named as in: OCaml, F#, Coq *)
val nth: list 'a -> nat -> Tot (option 'a)
let rec nth l n = match l with
| [] -> None
| hd::tl -> if n = 0 then Some hd else nth tl (n - 1)
(** [index l n] returns the [n]-th element in list [l] (with the first
element being the 0-th). Requires, at type-checking time, that [l] be
of length at least [n+1]. *)
val index: #a:Type -> l:list a -> i:nat{i < length l} -> Tot a
let rec index #a (l: list a) (i:nat{i < length l}): Tot a =
if i = 0 then
hd l
else
index (tl l) (i - 1)
(** [count x l] returns the number of occurrences of [x] in
[l]. Requires, at type-checking time, the type of [a] to have equality
defined. Similar to: [List.count_occ] in Coq. *)
val count: #a:eqtype -> a -> list a -> Tot nat
let rec count #a x = function
| [] -> 0
| hd::tl -> if x=hd then 1 + count x tl else count x tl
(** [rev_acc l1 l2] appends the elements of [l1] to the beginning of
[l2], in reverse order. It is equivalent to [append (rev l1) l2], but
is tail-recursive. Similar to: [List.rev_append] in OCaml, Coq. *)
val rev_acc: list 'a -> list 'a -> Tot (list 'a)
let rec rev_acc l acc = match l with
| [] -> acc
| hd::tl -> rev_acc tl (hd::acc)
(** [rev l] returns the list [l] in reverse order. Named as in: OCaml,
F#, Coq. *)
val rev: list 'a -> Tot (list 'a)
let rev l = rev_acc l []
(** [append l1 l2] appends the elements of [l2] to the end of [l1]. Named as: OCaml, F#. Similar to: [List.app] in Coq. *)
val append: list 'a -> list 'a -> Tot (list 'a)
let rec append x y = match x with
| [] -> y
| a::tl -> a::append tl y
(** Defines notation [@@] for [append], as in OCaml, F# . *)
let op_At x y = append x y
(** [snoc (l, x)] adds [x] to the end of the list [l].
Note: We use an uncurried [snoc (l, x)] instead of the curried
[snoc l x]. This is intentional. If [snoc] takes a pair instead
of 2 arguments, it allows for a better pattern on
[lemma_unsnoc_snoc], which connects [snoc] and [unsnoc]. In
particular, if we had two arguments, then either the pattern would
either be too restrictive or would lead to over-triggering. More
context for this can be seen in the (collapsed and uncollapsed)
comments at https://github.com/FStarLang/FStar/pull/1560 *)
val snoc: (list 'a * 'a) -> Tot (list 'a)
let snoc (l, x) = append l [x]
(** [flatten l], where [l] is a list of lists, returns the list of the
elements of the lists in [l], preserving their order. Named as in:
OCaml, Coq. *)
val flatten: list (list 'a) -> Tot (list 'a)
let rec flatten l = match l with
| [] -> []
| hd::tl -> append hd (flatten tl)
(** [map f l] applies [f] to each element of [l] and returns the list
of results, in the order of the original elements in [l]. Requires, at
type-checking time, [f] to be a pure total function. Named as in: OCaml, Coq, F# *)
val map: ('a -> Tot 'b) -> list 'a -> Tot (list 'b)
let rec map f x = match x with
| [] -> []
| a::tl -> f a::map f tl
(** [mapi_init f l n] applies, for each [k], [f (n+k)] to the [k]-th
element of [l] and returns the list of results, in the order of the
original elements in [l]. Requires, at type-checking time, [f] to be a
pure total function. *)
val mapi_init: (int -> 'a -> Tot 'b) -> list 'a -> int -> Tot (list 'b)
let rec mapi_init f l i = match l with
| [] -> []
| hd::tl -> (f i hd)::(mapi_init f tl (i+1))
(** [mapi f l] applies, for each [k], [f k] to the [k]-th element of
[l] and returns the list of results, in the order of the original
elements in [l]. Requires, at type-checking time, [f] to be a pure
total function. Named as in: OCaml *)
val mapi: (int -> 'a -> Tot 'b) -> list 'a -> Tot (list 'b)
let mapi f l = mapi_init f l 0
(** [concatMap f l] applies [f] to each element of [l] and returns the
concatenation of the results, in the order of the original elements of
[l]. This is equivalent to [flatten (map f l)]. Requires, at
type-checking time, [f] to be a pure total function. *)
val concatMap: ('a -> Tot (list 'b)) -> list 'a -> Tot (list 'b)
let rec concatMap f = function
| [] -> []
| a::tl ->
let fa = f a in
let ftl = concatMap f tl in
append fa ftl
(** [fold_left f x [y1; y2; ...; yn]] computes (f (... (f x y1) y2)
... yn). Requires, at type-checking time, [f] to be a pure total
function. Named as in: OCaml, Coq. *)
val fold_left: ('a -> 'b -> Tot 'a) -> 'a -> l:list 'b -> Tot 'a (decreases l)
let rec fold_left f x l = match l with
| [] -> x
| hd::tl -> fold_left f (f x hd) tl
(** [fold_right f [x1; x2; ...; xn] y] computes (f x1 (f x2 (... (f xn
y)) ... )). Requires, at type-checking time, [f] to be a pure total
function. Named as in: OCaml, Coq *)
val fold_right: ('a -> 'b -> Tot 'b) -> list 'a -> 'b -> Tot 'b
let rec fold_right f l x = match l with
| [] -> x
| hd::tl -> f hd (fold_right f tl x)
(** [fold_right_gtot] is just like [fold_right], except `f` is
a ghost function **)
let rec fold_right_gtot (#a:Type) (#b:Type) (l:list a) (f:a -> b -> GTot b) (x:b)
: GTot b
= match l with
| [] -> x
| hd::tl -> f hd (fold_right_gtot tl f x)
(* We define map in terms of fold, to share simple lemmas *)
let map_gtot #a #b (f:a -> GTot b) (x:list a)
: GTot (list b)
= fold_right_gtot x (fun x tl -> f x :: tl) []
(** [fold_left2 f x [y1; y2; ...; yn] [z1; z2; ...; zn]] computes (f
(... (f x y1 z1) y2 z2) ... yn zn). Requires, at type-checking time,
[f] to be a pure total function, and the lists [y1; y2; ...; yn] and
[z1; z2; ...; zn] to have the same lengths. Named as in: OCaml *)
val fold_left2 : f:('a -> 'b -> 'c -> Tot 'a) -> accu:'a -> l1:(list 'b) -> l2:(list 'c) ->
Pure 'a (requires (length l1 == length l2)) (ensures (fun _ -> True)) (decreases l1)
let rec fold_left2 f accu l1 l2 =
match (l1, l2) with
| ([], []) -> accu
| (a1::l1, a2::l2) -> fold_left2 f (f accu a1 a2) l1 l2
(** Propositional membership (as in Coq). Does not require decidable
equality. *)
(** [memP x l] holds if, and only if, [x] appears as an
element of [l]. Similar to: List.In in Coq. *)
let rec memP (#a: Type) (x: a) (l: list a) : Tot Type0 =
match l with
| [] -> False
| y :: q -> x == y \/ memP x q
(** List searching **)
(** [mem x l] returns [true] if, and only if, [x] appears as an
element of [l]. Requires, at type-checking time, the type of elements
of [l] to have decidable equality. Named as in: OCaml. See also:
List.In in Coq, which is propositional. *)
val mem: #a:eqtype -> a -> list a -> Tot bool
let rec mem #a x = function
| [] -> false
| hd::tl -> if hd = x then true else mem x tl
(** [contains x l] returns [true] if, and only if, [x] appears as an
element of [l]. Requires, at type-checking time, the type of elements
of [l] to have decidable equality. It is equivalent to: [mem x
l]. TODO: should we rather swap the order of arguments? *)
let contains : #a:eqtype -> a -> list a -> Tot bool = mem
(** [existsb f l] returns [true] if, and only if, there exists some
element [x] in [l] such that [f x] holds. *)
val existsb: #a:Type
-> f:(a -> Tot bool)
-> list a
-> Tot bool
let rec existsb #a f l = match l with
| [] -> false
| hd::tl -> if f hd then true else existsb f tl
(** [find f l] returns [Some x] for some element [x] appearing in [l]
such that [f x] holds, or [None] only if no such [x] exists. *)
val find: #a:Type
-> f:(a -> Tot bool)
-> list a
-> Tot (option (x:a{f x}))
let rec find #a f l = match l with
| [] -> None #(x:a{f x}) //These type annotations are only present because it makes bootstrapping go much faster
| hd::tl -> if f hd then Some #(x:a{f x}) hd else find f tl
(** Filtering elements of a list [l] through a Boolean pure total
predicate [f] *)
(** [filter f l] returns [l] with all elements [x] such that [f x]
does not hold removed. Requires, at type-checking time, [f] to be a
pure total function. Named as in: OCaml, Coq *)
val filter : #a: Type -> f:(a -> Tot bool) -> l: list a -> Tot (m:list a{forall x. memP x m ==> f x})
let rec filter #a f = function
| [] -> []
| hd::tl -> if f hd then hd::filter f tl else filter f tl
(** Postcondition on [filter f l]: for any element [x] of [filter f l],
[f x] holds. Requires, at type-checking time, [f] to be a pure total
function.*)
val mem_filter (#a:Type) (f: (a -> Tot bool)) (l: list a) (x: a) : Lemma
(requires (memP x (filter f l)))
(ensures (f x))
let mem_filter f l x = ()
(** Postcondition on [filter f l]: stated with [forall]: for any element
[x] of [filter f l], [f x] holds. Requires, at type-checking time, [f]
to be a pure total function. *)
val mem_filter_forall (#a:Type) (f: (a -> Tot bool)) (l: list a) : Lemma
(requires True)
(ensures (forall x . memP x (filter f l) ==> f x))
[SMTPat (filter f l)]
let mem_filter_forall f l = FStar.Classical.ghost_lemma (mem_filter f l)
(** [for_all f l] returns [true] if, and only if, for all elements [x]
appearing in [l], [f x] holds. Requires, at type-checking time, [f] to
be a pure total function. Named as in: OCaml. Similar to: List.forallb
in Coq *)
val for_all: ('a -> Tot bool) -> list 'a -> Tot bool
let rec for_all f l = match l with
| [] -> true
| hd::tl -> if f hd then for_all f tl else false
(** Specification for [for_all f l] vs. mem *)
let rec for_all_mem
(#a: Type)
(f: (a -> Tot bool))
(l: list a)
: Lemma
(for_all f l <==> (forall x . memP x l ==> f x))
= match l with
| [] -> ()
| _ :: q -> for_all_mem f q
(** [collect f l] applies [f] to each element of [l] and returns the
concatenation of the results, in the order of the original elements of
[l]. It is equivalent to [flatten (map f l)]. Requires, at
type-checking time, [f] to be a pure total function. TODO: what is
the difference with [concatMap]? *)
val collect: ('a -> Tot (list 'b)) -> list 'a -> Tot (list 'b)
let rec collect f l = match l with
| [] -> []
| hd::tl -> append (f hd) (collect f tl)
(** [tryFind f l] returns [Some x] for some element [x] appearing in
[l] such that [f x] holds, or [None] only if no such [x]
exists. Requires, at type-checking time, [f] to be a pure total
function. Contrary to [find], [tryFind] provides no postcondition on
its result. *)
val tryFind: ('a -> Tot bool) -> list 'a -> Tot (option 'a)
let rec tryFind p l = match l with
| [] -> None
| hd::tl -> if p hd then Some hd else tryFind p tl
(** [tryPick f l] returns [y] for some element [x] appearing in [l]
such that [f x = Some y] for some y, or [None] only if [f x = None]
for all elements [x] of [l]. Requires, at type-checking time, [f] to
be a pure total function. *)
val tryPick: ('a -> Tot (option 'b)) -> list 'a -> Tot (option 'b)
let rec tryPick f l = match l with
| [] -> None
| hd::tl ->
match f hd with
| Some x -> Some x
| None -> tryPick f tl
(** [choose f l] returns the list of [y] for all elements [x]
appearing in [l] such that [f x = Some y] for some [y]. Requires, at
type-checking time, [f] to be a pure total function. *)
val choose: ('a -> Tot (option 'b)) -> list 'a -> Tot (list 'b)
let rec choose f l = match l with
| [] -> []
| hd::tl ->
match f hd with
| Some x -> x::(choose f tl)
| None -> choose f tl
(** [partition f l] returns the pair of lists [(l1, l2)] where all
elements [x] of [l] are in [l1] if [f x] holds, and in [l2]
otherwise. Both [l1] and [l2] retain the original order of
[l]. Requires, at type-checking time, [f] to be a pure total
function. *)
val partition: f:('a -> Tot bool) -> list 'a -> Tot (list 'a * list 'a)
let rec partition f = function
| [] -> [], []
| hd::tl ->
let l1, l2 = partition f tl in
if f hd
then hd::l1, l2
else l1, hd::l2
(** [subset la lb] is true if and only if all the elements from [la]
are also in [lb]. Requires, at type-checking time, the type of
elements of [la] and [lb] to have decidable equality. *)
val subset: #a:eqtype -> list a -> list a -> Tot bool
let rec subset #a la lb =
match la with
| [] -> true
| h :: tl -> mem h lb && subset tl lb
(** [noRepeats l] returns [true] if, and only if, no element of [l]
appears in [l] more than once. Requires, at type-checking time, the
type of elements of [la] and [lb] to have decidable equality. *)
val noRepeats : #a:eqtype -> list a -> Tot bool
let rec noRepeats #a la =
match la with
| [] -> true
| h :: tl -> not(mem h tl) && noRepeats tl
(** [no_repeats_p l] valid if, and only if, no element of [l]
appears in [l] more than once. *)
val no_repeats_p : #a:Type -> list a -> Tot prop | false | false | FStar.List.Tot.Base.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val no_repeats_p : #a:Type -> list a -> Tot prop | [
"recursion"
] | FStar.List.Tot.Base.no_repeats_p | {
"file_name": "ulib/FStar.List.Tot.Base.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | la: Prims.list a -> Prims.prop | {
"end_col": 46,
"end_line": 400,
"start_col": 2,
"start_line": 398
} |
Prims.Tot | val va_ens_Fmul
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))) | val va_ens_Fmul
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop
let va_ens_Fmul
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop = | false | null | false | (va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR15 va_s0 in
let inB_in:nat64 = va_get_reg64 rRcx va_s0 in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in
let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in
let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in
let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
d `op_Modulus` prime == (va_mul_nat a b) `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM
(va_update_mem_layout va_sM
(va_update_mem_heaplet 0
va_sM
(va_update_flags va_sM
(va_update_reg64 rR14
va_sM
(va_update_reg64 rR13
va_sM
(va_update_reg64 rR11
va_sM
(va_update_reg64 rR10
va_sM
(va_update_reg64 rR9
va_sM
(va_update_reg64 rR8
va_sM
(va_update_reg64 rRsi
va_sM
(va_update_reg64 rRdi
va_sM
(va_update_reg64 rRdx
va_sM
(va_update_reg64 rRcx
va_sM
(va_update_reg64 rRbx
va_sM
(va_update_reg64 rRax
va_sM
(va_update_ok va_sM
(va_update_mem va_sM va_s0))))))
)))))))))))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_fuel",
"Prims.l_and",
"Vale.Curve25519.X64.FastWide.va_req_Fmul",
"Vale.X64.Decls.va_ensure_total",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.X64.Decls.modifies_buffer_2",
"Vale.X64.Decls.va_get_mem",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.buffer64_read",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Decls.va_state_eq",
"Vale.X64.Decls.va_update_mem_layout",
"Vale.X64.Decls.va_update_mem_heaplet",
"Vale.X64.Decls.va_update_flags",
"Vale.X64.Decls.va_update_reg64",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_update_ok",
"Vale.X64.Decls.va_update_mem",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_ens_Fmul
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [] | Vale.Curve25519.X64.FastWide.va_ens_Fmul | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64 ->
va_sM: Vale.X64.Decls.va_state ->
va_fM: Vale.X64.Decls.va_fuel
-> Prims.prop | {
"end_col": 33,
"end_line": 63,
"start_col": 2,
"start_line": 39
} |
Prims.Tot | val va_req_Fmul (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b inB_b: buffer64) : prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)) | val va_req_Fmul (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b inB_b: buffer64) : prop
let va_req_Fmul (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b inB_b: buffer64) : prop = | false | null | false | (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR15 va_s0 in
let inB_in:nat64 = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inB_in
inB_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
8
(va_get_mem_layout va_s0)
Secret)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Vale.X64.Memory.buffer64",
"Prims.l_and",
"Vale.X64.Decls.va_require_total",
"Vale.Curve25519.X64.FastWide.va_code_Fmul",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Prims.eq2",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_req_Fmul (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b inB_b: buffer64) : prop | [] | Vale.Curve25519.X64.FastWide.va_req_Fmul | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64
-> Prims.prop | {
"end_col": 46,
"end_line": 36,
"start_col": 2,
"start_line": 24
} |
Prims.Tot | val va_wp_Fmul
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) | val va_wp_Fmul
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Fmul
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR15 va_s0 in
let inB_in:nat64 = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inB_in
inB_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
8
(va_get_mem_layout va_s0)
Secret) /\
(forall (va_x_mem: vale_heap) (va_x_rax: nat64) (va_x_rbx: nat64) (va_x_rcx: nat64)
(va_x_rdx: nat64) (va_x_rdi: nat64) (va_x_rsi: nat64) (va_x_r8: nat64) (va_x_r9: nat64)
(va_x_r10: nat64) (va_x_r11: nat64) (va_x_r13: nat64) (va_x_r14: nat64)
(va_x_efl: Vale.X64.Flags.t) (va_x_heap0: vale_heap) (va_x_memLayout: vale_heap_layout).
let va_sM =
va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0
va_x_heap0
(va_upd_flags va_x_efl
(va_upd_reg64 rR14
va_x_r14
(va_upd_reg64 rR13
va_x_r13
(va_upd_reg64 rR11
va_x_r11
(va_upd_reg64 rR10
va_x_r10
(va_upd_reg64 rR9
va_x_r9
(va_upd_reg64 rR8
va_x_r8
(va_upd_reg64 rRsi
va_x_rsi
(va_upd_reg64 rRdi
va_x_rdi
(va_upd_reg64 rRdx
va_x_rdx
(va_upd_reg64 rRcx
va_x_rcx
(va_upd_reg64 rRbx
va_x_rbx
(va_upd_reg64 rRax
va_x_rax
(va_upd_mem va_x_mem va_s0))))))))
)))))))
in
va_get_ok va_sM /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR15 va_s0 in
let inB_in:nat64 = va_get_reg64 rRcx va_s0 in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in
let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in
let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in
let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
d `op_Modulus` prime == (va_mul_nat a b) `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Prims.eq2",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Prims.l_Forall",
"Vale.X64.InsBasic.vale_heap",
"Vale.X64.Memory.nat64",
"Vale.X64.Flags.t",
"Vale.Arch.HeapImpl.vale_heap_layout",
"Prims.l_imp",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.X64.Decls.modifies_buffer_2",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.X64.Decls.buffer64_read",
"Vale.X64.State.vale_state",
"Vale.X64.Decls.va_upd_mem_layout",
"Vale.X64.Decls.va_upd_mem_heaplet",
"Vale.X64.Decls.va_upd_flags",
"Vale.X64.Decls.va_upd_reg64",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_upd_mem"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Fmul
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.Curve25519.X64.FastWide.va_wp_Fmul | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64 ->
va_s0: Vale.X64.Decls.va_state ->
va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 64,
"end_line": 147,
"start_col": 2,
"start_line": 109
} |
Prims.Tot | val va_req_Fmul2 (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b inB_b: buffer64) : prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)) | val va_req_Fmul2 (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b inB_b: buffer64) : prop
let va_req_Fmul2 (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b inB_b: buffer64) : prop = | false | null | false | (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR15 va_s0 in
let inB_in:nat64 = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inB_in
inB_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
16
(va_get_mem_layout va_s0)
Secret)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Vale.X64.Memory.buffer64",
"Prims.l_and",
"Vale.X64.Decls.va_require_total",
"Vale.Curve25519.X64.FastWide.va_code_Fmul2",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Prims.eq2",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_req_Fmul2 (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b inB_b: buffer64) : prop | [] | Vale.Curve25519.X64.FastWide.va_req_Fmul2 | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64
-> Prims.prop | {
"end_col": 47,
"end_line": 396,
"start_col": 2,
"start_line": 384
} |
Prims.Tot | val va_ens_Fmul2
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))) | val va_ens_Fmul2
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop
let va_ens_Fmul2
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop = | false | null | false | (va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR15 va_s0 in
let inB_in:nat64 = va_get_reg64 rRcx va_s0 in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in
let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in
let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in
let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in
let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in
let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in
let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in
let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in
let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in
let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in
let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in
let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in
let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in
let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in
let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in
let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in
let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in
let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in
d `op_Modulus` prime == (va_mul_nat a b) `op_Modulus` prime /\
d' `op_Modulus` prime == (va_mul_nat a' b') `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM
(va_update_mem_layout va_sM
(va_update_mem_heaplet 0
va_sM
(va_update_flags va_sM
(va_update_reg64 rR14
va_sM
(va_update_reg64 rR13
va_sM
(va_update_reg64 rR11
va_sM
(va_update_reg64 rR10
va_sM
(va_update_reg64 rR9
va_sM
(va_update_reg64 rR8
va_sM
(va_update_reg64 rRsi
va_sM
(va_update_reg64 rRdi
va_sM
(va_update_reg64 rRdx
va_sM
(va_update_reg64 rRcx
va_sM
(va_update_reg64 rRbx
va_sM
(va_update_reg64 rRax
va_sM
(va_update_ok va_sM
(va_update_mem va_sM va_s0))))))
)))))))))))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_fuel",
"Prims.l_and",
"Vale.Curve25519.X64.FastWide.va_req_Fmul2",
"Vale.X64.Decls.va_ensure_total",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.X64.Decls.modifies_buffer_2",
"Vale.X64.Decls.va_get_mem",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.buffer64_read",
"Prims.op_Addition",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Decls.va_state_eq",
"Vale.X64.Decls.va_update_mem_layout",
"Vale.X64.Decls.va_update_mem_heaplet",
"Vale.X64.Decls.va_update_flags",
"Vale.X64.Decls.va_update_reg64",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_update_ok",
"Vale.X64.Decls.va_update_mem",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_ens_Fmul2
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [] | Vale.Curve25519.X64.FastWide.va_ens_Fmul2 | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64 ->
va_sM: Vale.X64.Decls.va_state ->
va_fM: Vale.X64.Decls.va_fuel
-> Prims.prop | {
"end_col": 68,
"end_line": 436,
"start_col": 2,
"start_line": 399
} |
Prims.Tot | val va_wp_Fmul2
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (()))) | val va_wp_Fmul2
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Fmul2
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR15 va_s0 in
let inB_in:nat64 = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inB_in
inB_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
16
(va_get_mem_layout va_s0)
Secret) /\
(forall (va_x_mem: vale_heap) (va_x_rax: nat64) (va_x_rbx: nat64) (va_x_rcx: nat64)
(va_x_rdx: nat64) (va_x_rdi: nat64) (va_x_rsi: nat64) (va_x_r8: nat64) (va_x_r9: nat64)
(va_x_r10: nat64) (va_x_r11: nat64) (va_x_r13: nat64) (va_x_r14: nat64)
(va_x_efl: Vale.X64.Flags.t) (va_x_heap0: vale_heap) (va_x_memLayout: vale_heap_layout).
let va_sM =
va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0
va_x_heap0
(va_upd_flags va_x_efl
(va_upd_reg64 rR14
va_x_r14
(va_upd_reg64 rR13
va_x_r13
(va_upd_reg64 rR11
va_x_r11
(va_upd_reg64 rR10
va_x_r10
(va_upd_reg64 rR9
va_x_r9
(va_upd_reg64 rR8
va_x_r8
(va_upd_reg64 rRsi
va_x_rsi
(va_upd_reg64 rRdi
va_x_rdi
(va_upd_reg64 rRdx
va_x_rdx
(va_upd_reg64 rRcx
va_x_rcx
(va_upd_reg64 rRbx
va_x_rbx
(va_upd_reg64 rRax
va_x_rax
(va_upd_mem va_x_mem va_s0))))))))
)))))))
in
va_get_ok va_sM /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR15 va_s0 in
let inB_in:nat64 = va_get_reg64 rRcx va_s0 in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in
let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in
let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in
let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in
let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in
let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in
let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in
let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in
let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in
let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in
let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in
let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in
let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in
let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in
let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in
let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in
let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in
let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in
d `op_Modulus` prime == (va_mul_nat a b) `op_Modulus` prime /\
d' `op_Modulus` prime == (va_mul_nat a' b') `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Prims.eq2",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Prims.l_Forall",
"Vale.X64.InsBasic.vale_heap",
"Vale.X64.Memory.nat64",
"Vale.X64.Flags.t",
"Vale.Arch.HeapImpl.vale_heap_layout",
"Prims.l_imp",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.X64.Decls.modifies_buffer_2",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.X64.Decls.buffer64_read",
"Prims.op_Addition",
"Vale.X64.State.vale_state",
"Vale.X64.Decls.va_upd_mem_layout",
"Vale.X64.Decls.va_upd_mem_heaplet",
"Vale.X64.Decls.va_upd_flags",
"Vale.X64.Decls.va_upd_reg64",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_upd_mem"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Fmul2
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.Curve25519.X64.FastWide.va_wp_Fmul2 | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64 ->
va_s0: Vale.X64.Decls.va_state ->
va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 16,
"end_line": 547,
"start_col": 2,
"start_line": 495
} |
Prims.Tot | val va_req_Fsqr (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b: buffer64) : prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)) | val va_req_Fsqr (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b: buffer64) : prop
let va_req_Fsqr (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b: buffer64) : prop = | false | null | false | (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR12 va_s0 in
adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
8
(va_get_mem_layout va_s0)
Secret)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Vale.X64.Memory.buffer64",
"Prims.l_and",
"Vale.X64.Decls.va_require_total",
"Vale.Curve25519.X64.FastWide.va_code_Fsqr",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Prims.eq2",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rR12",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_req_Fsqr (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b: buffer64) : prop | [] | Vale.Curve25519.X64.FastWide.va_req_Fsqr | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64
-> Prims.prop | {
"end_col": 12,
"end_line": 832,
"start_col": 2,
"start_line": 823
} |
Prims.Tot | val va_ens_Fsqr
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) | val va_ens_Fsqr
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop
let va_ens_Fsqr
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop = | false | null | false | (va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR12 va_s0 in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM
(va_update_mem_layout va_sM
(va_update_mem_heaplet 0
va_sM
(va_update_flags va_sM
(va_update_reg64 rR15
va_sM
(va_update_reg64 rR14
va_sM
(va_update_reg64 rR13
va_sM
(va_update_reg64 rR11
va_sM
(va_update_reg64 rR10
va_sM
(va_update_reg64 rR9
va_sM
(va_update_reg64 rR8
va_sM
(va_update_reg64 rRsi
va_sM
(va_update_reg64 rRdi
va_sM
(va_update_reg64 rRdx
va_sM
(va_update_reg64 rRcx
va_sM
(va_update_reg64 rRbx
va_sM
(va_update_reg64 rRax
va_sM
(va_update_ok va_sM
(va_update_mem va_sM va_s0))
))))))))))))))))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_fuel",
"Prims.l_and",
"Vale.Curve25519.X64.FastWide.va_req_Fsqr",
"Vale.X64.Decls.va_ensure_total",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.Def.Types_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rR12",
"Vale.X64.Decls.modifies_buffer_2",
"Vale.X64.Decls.va_get_mem",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.buffer64_read",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Decls.va_state_eq",
"Vale.X64.Decls.va_update_mem_layout",
"Vale.X64.Decls.va_update_mem_heaplet",
"Vale.X64.Decls.va_update_flags",
"Vale.X64.Decls.va_update_reg64",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_update_ok",
"Vale.X64.Decls.va_update_mem",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_ens_Fsqr
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [] | Vale.Curve25519.X64.FastWide.va_ens_Fsqr | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
va_sM: Vale.X64.Decls.va_state ->
va_fM: Vale.X64.Decls.va_fuel
-> Prims.prop | {
"end_col": 69,
"end_line": 855,
"start_col": 2,
"start_line": 835
} |
Prims.Tot | val va_wp_Fsqr (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) | val va_wp_Fsqr (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Fsqr (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR12 va_s0 in
adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
8
(va_get_mem_layout va_s0)
Secret) /\
(forall (va_x_mem: vale_heap) (va_x_rax: nat64) (va_x_rbx: nat64) (va_x_rcx: nat64)
(va_x_rdx: nat64) (va_x_rdi: nat64) (va_x_rsi: nat64) (va_x_r8: nat64) (va_x_r9: nat64)
(va_x_r10: nat64) (va_x_r11: nat64) (va_x_r13: nat64) (va_x_r14: nat64) (va_x_r15: nat64)
(va_x_efl: Vale.X64.Flags.t) (va_x_heap0: vale_heap) (va_x_memLayout: vale_heap_layout).
let va_sM =
va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0
va_x_heap0
(va_upd_flags va_x_efl
(va_upd_reg64 rR15
va_x_r15
(va_upd_reg64 rR14
va_x_r14
(va_upd_reg64 rR13
va_x_r13
(va_upd_reg64 rR11
va_x_r11
(va_upd_reg64 rR10
va_x_r10
(va_upd_reg64 rR9
va_x_r9
(va_upd_reg64 rR8
va_x_r8
(va_upd_reg64 rRsi
va_x_rsi
(va_upd_reg64 rRdi
va_x_rdi
(va_upd_reg64 rRdx
va_x_rdx
(va_upd_reg64 rRcx
va_x_rcx
(va_upd_reg64 rRbx
va_x_rbx
(va_upd_reg64 rRax
va_x_rax
(va_upd_mem va_x_mem va_s0))))
))))))))))))
in
va_get_ok va_sM /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR12 va_s0 in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Prims.eq2",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rR12",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Prims.l_Forall",
"Vale.X64.InsBasic.vale_heap",
"Vale.X64.Memory.nat64",
"Vale.X64.Flags.t",
"Vale.Arch.HeapImpl.vale_heap_layout",
"Prims.l_imp",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.Def.Types_s.nat64",
"Vale.X64.Decls.modifies_buffer_2",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.X64.Decls.buffer64_read",
"Vale.X64.State.vale_state",
"Vale.X64.Decls.va_upd_mem_layout",
"Vale.X64.Decls.va_upd_mem_heaplet",
"Vale.X64.Decls.va_upd_flags",
"Vale.X64.Decls.va_upd_reg64",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_upd_mem"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Fsqr (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.Curve25519.X64.FastWide.va_wp_Fsqr | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
va_s0: Vale.X64.Decls.va_state ->
va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 52,
"end_line": 925,
"start_col": 2,
"start_line": 894
} |
Prims.Tot | val va_ens_Fsqr2
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))) | val va_ens_Fsqr2
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop
let va_ens_Fsqr2
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop = | false | null | false | (va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR12 va_s0 in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in
let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in
let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in
let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in
let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in
let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in
let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in
d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\
d' `op_Modulus` prime == (va_mul_nat a' a') `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM
(va_update_mem_layout va_sM
(va_update_mem_heaplet 0
va_sM
(va_update_flags va_sM
(va_update_reg64 rR15
va_sM
(va_update_reg64 rR14
va_sM
(va_update_reg64 rR13
va_sM
(va_update_reg64 rR11
va_sM
(va_update_reg64 rR10
va_sM
(va_update_reg64 rR9
va_sM
(va_update_reg64 rR8
va_sM
(va_update_reg64 rRsi
va_sM
(va_update_reg64 rRdi
va_sM
(va_update_reg64 rRdx
va_sM
(va_update_reg64 rRcx
va_sM
(va_update_reg64 rRbx
va_sM
(va_update_reg64 rRax
va_sM
(va_update_ok va_sM
(va_update_mem va_sM va_s0))
))))))))))))))))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_fuel",
"Prims.l_and",
"Vale.Curve25519.X64.FastWide.va_req_Fsqr2",
"Vale.X64.Decls.va_ensure_total",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.Def.Types_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rR12",
"Vale.X64.Decls.modifies_buffer_2",
"Vale.X64.Decls.va_get_mem",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.buffer64_read",
"Prims.op_Addition",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Decls.va_state_eq",
"Vale.X64.Decls.va_update_mem_layout",
"Vale.X64.Decls.va_update_mem_heaplet",
"Vale.X64.Decls.va_update_flags",
"Vale.X64.Decls.va_update_reg64",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_update_ok",
"Vale.X64.Decls.va_update_mem",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr ())) =
(va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64
rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64
rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b))
//--
//-- Fsqr_stdcall
val va_code_Fsqr_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM
/\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 ==
Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64)
(va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64
rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx
va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax
(va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0)
(fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let
(dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0)
(fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem
va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) :
(va_quickCode unit (va_code_Fsqr_stdcall win)) =
(va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8;
va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win
tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b))
//--
//-- Fsqr2
val va_code_Fsqr2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_ens_Fsqr2
(va_b0: va_code)
(va_s0: va_state)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [] | Vale.Curve25519.X64.FastWide.va_ens_Fsqr2 | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
va_sM: Vale.X64.Decls.va_state ->
va_fM: Vale.X64.Decls.va_fuel
-> Prims.prop | {
"end_col": 69,
"end_line": 1182,
"start_col": 2,
"start_line": 1152
} |
Prims.Tot | val va_req_Fsqr2 (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b: buffer64) : prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret)) | val va_req_Fsqr2 (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b: buffer64) : prop
let va_req_Fsqr2 (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b: buffer64) : prop = | false | null | false | (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR12 va_s0 in
adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
16
(va_get_mem_layout va_s0)
Secret)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Vale.X64.Memory.buffer64",
"Prims.l_and",
"Vale.X64.Decls.va_require_total",
"Vale.Curve25519.X64.FastWide.va_code_Fsqr2",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Prims.eq2",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rR12",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr ())) =
(va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64
rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64
rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b))
//--
//-- Fsqr_stdcall
val va_code_Fsqr_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM
/\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 ==
Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64)
(va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64
rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx
va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax
(va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0)
(fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let
(dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0)
(fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem
va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) :
(va_quickCode unit (va_code_Fsqr_stdcall win)) =
(va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8;
va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win
tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b))
//--
//-- Fsqr2
val va_code_Fsqr2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_req_Fsqr2 (va_b0: va_code) (va_s0: va_state) (tmp_b inA_b dst_b: buffer64) : prop | [] | Vale.Curve25519.X64.FastWide.va_req_Fsqr2 | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64
-> Prims.prop | {
"end_col": 12,
"end_line": 1149,
"start_col": 2,
"start_line": 1140
} |
Prims.Tot | val va_wp_Fsqr2 (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (()))) | val va_wp_Fsqr2 (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Fsqr2 (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR12 va_s0 in
adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
16
(va_get_mem_layout va_s0)
Secret) /\
(forall (va_x_mem: vale_heap) (va_x_rax: nat64) (va_x_rbx: nat64) (va_x_rcx: nat64)
(va_x_rdx: nat64) (va_x_rdi: nat64) (va_x_rsi: nat64) (va_x_r8: nat64) (va_x_r9: nat64)
(va_x_r10: nat64) (va_x_r11: nat64) (va_x_r13: nat64) (va_x_r14: nat64) (va_x_r15: nat64)
(va_x_efl: Vale.X64.Flags.t) (va_x_heap0: vale_heap) (va_x_memLayout: vale_heap_layout).
let va_sM =
va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0
va_x_heap0
(va_upd_flags va_x_efl
(va_upd_reg64 rR15
va_x_r15
(va_upd_reg64 rR14
va_x_r14
(va_upd_reg64 rR13
va_x_r13
(va_upd_reg64 rR11
va_x_r11
(va_upd_reg64 rR10
va_x_r10
(va_upd_reg64 rR9
va_x_r9
(va_upd_reg64 rR8
va_x_r8
(va_upd_reg64 rRsi
va_x_rsi
(va_upd_reg64 rRdi
va_x_rdi
(va_upd_reg64 rRdx
va_x_rdx
(va_upd_reg64 rRcx
va_x_rcx
(va_upd_reg64 rRbx
va_x_rbx
(va_upd_reg64 rRax
va_x_rax
(va_upd_mem va_x_mem va_s0))))
))))))))))))
in
va_get_ok va_sM /\
(let tmp_in:nat64 = va_get_reg64 rRdi va_s0 in
let inA_in:nat64 = va_get_reg64 rRsi va_s0 in
let dst_in:nat64 = va_get_reg64 rR12 va_s0 in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in
let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in
let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in
let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in
let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in
let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in
let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in
d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\
d' `op_Modulus` prime == (va_mul_nat a' a') `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Prims.eq2",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rR12",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Prims.l_Forall",
"Vale.X64.InsBasic.vale_heap",
"Vale.X64.Memory.nat64",
"Vale.X64.Flags.t",
"Vale.Arch.HeapImpl.vale_heap_layout",
"Prims.l_imp",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.Def.Types_s.nat64",
"Vale.X64.Decls.modifies_buffer_2",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.X64.Decls.buffer64_read",
"Prims.op_Addition",
"Vale.X64.State.vale_state",
"Vale.X64.Decls.va_upd_mem_layout",
"Vale.X64.Decls.va_upd_mem_heaplet",
"Vale.X64.Decls.va_upd_flags",
"Vale.X64.Decls.va_upd_reg64",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_upd_mem"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr ())) =
(va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64
rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64
rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b))
//--
//-- Fsqr_stdcall
val va_code_Fsqr_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM
/\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 ==
Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64)
(va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64
rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx
va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax
(va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0)
(fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let
(dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0)
(fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem
va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) :
(va_quickCode unit (va_code_Fsqr_stdcall win)) =
(va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8;
va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win
tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b))
//--
//-- Fsqr2
val va_code_Fsqr2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Fsqr2 (tmp_b inA_b dst_b: buffer64) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.Curve25519.X64.FastWide.va_wp_Fsqr2 | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
va_s0: Vale.X64.Decls.va_state ->
va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 70,
"end_line": 1272,
"start_col": 2,
"start_line": 1231
} |
Prims.Tot | val va_quick_Fmul (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul ())) | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b)) | val va_quick_Fmul (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul ()))
let va_quick_Fmul (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul ())) = | false | null | false | (va_QProc (va_code_Fmul ())
([
va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx;
va_Mod_reg64 rRax; va_Mod_mem
])
(va_wp_Fmul tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul tmp_b inA_b dst_b inB_b)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Memory.buffer64",
"Vale.X64.QuickCode.va_QProc",
"Prims.unit",
"Vale.Curve25519.X64.FastWide.va_code_Fmul",
"Prims.Cons",
"Vale.X64.QuickCode.mod_t",
"Vale.X64.QuickCode.va_Mod_mem_layout",
"Vale.X64.QuickCode.va_Mod_mem_heaplet",
"Vale.X64.QuickCode.va_Mod_flags",
"Vale.X64.QuickCode.va_Mod_reg64",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.QuickCode.va_Mod_mem",
"Prims.Nil",
"Vale.Curve25519.X64.FastWide.va_wp_Fmul",
"Vale.Curve25519.X64.FastWide.va_wpProof_Fmul",
"Vale.X64.QuickCode.va_quickCode"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : | false | false | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Fmul (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul ())) | [] | Vale.Curve25519.X64.FastWide.va_quick_Fmul | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64
-> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.Curve25519.X64.FastWide.va_code_Fmul ()) | {
"end_col": 29,
"end_line": 165,
"start_col": 2,
"start_line": 161
} |
Prims.Tot | val va_req_Fmul_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
: prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)) | val va_req_Fmul_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
: prop
let va_req_Fmul_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
: prop = | false | null | false | (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0)
in
let inB_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0)
in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inB_in
inB_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
8
(va_get_mem_layout va_s0)
Secret)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Prims.l_and",
"Vale.X64.Decls.va_require_total",
"Vale.Curve25519.X64.FastWide.va_code_Fmul_stdcall",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Stack_i.init_rsp",
"Vale.X64.Decls.va_get_stack",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.X64.Decls.va_int_range",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_req_Fmul_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
: prop | [] | Vale.Curve25519.X64.FastWide.va_req_Fmul_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64
-> Prims.prop | {
"end_col": 46,
"end_line": 190,
"start_col": 2,
"start_line": 174
} |
Prims.Tot | val va_quick_Fmul_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64)
: (va_quickCode unit (va_code_Fmul_stdcall win)) | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) | val va_quick_Fmul_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64)
: (va_quickCode unit (va_code_Fmul_stdcall win))
let va_quick_Fmul_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64)
: (va_quickCode unit (va_code_Fmul_stdcall win)) = | false | null | false | (va_QProc (va_code_Fmul_stdcall win)
([
va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp;
va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem
])
(va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Vale.X64.QuickCode.va_QProc",
"Prims.unit",
"Vale.Curve25519.X64.FastWide.va_code_Fmul_stdcall",
"Prims.Cons",
"Vale.X64.QuickCode.mod_t",
"Vale.X64.QuickCode.va_Mod_stackTaint",
"Vale.X64.QuickCode.va_Mod_stack",
"Vale.X64.QuickCode.va_Mod_mem_layout",
"Vale.X64.QuickCode.va_Mod_mem_heaplet",
"Vale.X64.QuickCode.va_Mod_flags",
"Vale.X64.QuickCode.va_Mod_reg64",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Machine_s.rRbp",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.QuickCode.va_Mod_mem",
"Prims.Nil",
"Vale.Curve25519.X64.FastWide.va_wp_Fmul_stdcall",
"Vale.Curve25519.X64.FastWide.va_wpProof_Fmul_stdcall",
"Vale.X64.QuickCode.va_quickCode"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) | false | false | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Fmul_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64)
: (va_quickCode unit (va_code_Fmul_stdcall win)) | [] | Vale.Curve25519.X64.FastWide.va_quick_Fmul_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64
-> Vale.X64.QuickCode.va_quickCode Prims.unit
(Vale.Curve25519.X64.FastWide.va_code_Fmul_stdcall win) | {
"end_col": 65,
"end_line": 375,
"start_col": 2,
"start_line": 370
} |
Prims.Tot | val va_ens_Fmul_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))) | val va_ens_Fmul_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop
let va_ens_Fmul_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop = | false | null | false | (va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\
va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0)
in
let inB_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0)
in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in
let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in
let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in
let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
d `op_Modulus` prime == (va_mul_nat a b) `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\
(win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\
(win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
(win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
(~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM
(va_update_stackTaint va_sM
(va_update_stack va_sM
(va_update_mem_layout va_sM
(va_update_mem_heaplet 0
va_sM
(va_update_flags va_sM
(va_update_reg64 rR15
va_sM
(va_update_reg64 rR14
va_sM
(va_update_reg64 rR13
va_sM
(va_update_reg64 rR11
va_sM
(va_update_reg64 rR10
va_sM
(va_update_reg64 rR9
va_sM
(va_update_reg64 rR8
va_sM
(va_update_reg64 rRsp
va_sM
(va_update_reg64 rRbp
va_sM
(va_update_reg64 rRdi
va_sM
(va_update_reg64 rRsi
va_sM
(va_update_reg64 rRdx
va_sM
(va_update_reg64 rRcx
va_sM
(va_update_reg64 rRbx
va_sM
(va_update_reg64 rRax
va_sM
(va_update_ok va_sM
(va_update_mem
va_sM
va_s0)))
)))))))))))))))))))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_fuel",
"Prims.l_and",
"Vale.Curve25519.X64.FastWide.va_req_Fmul_stdcall",
"Vale.X64.Decls.va_ensure_total",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.X64.Decls.modifies_buffer_2",
"Vale.X64.Decls.va_get_mem",
"Prims.l_imp",
"Vale.Def.Types_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRbp",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR15",
"Prims.l_not",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.buffer64_read",
"Vale.X64.Decls.va_int_range",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Decls.va_state_eq",
"Vale.X64.Decls.va_update_stackTaint",
"Vale.X64.Decls.va_update_stack",
"Vale.X64.Decls.va_update_mem_layout",
"Vale.X64.Decls.va_update_mem_heaplet",
"Vale.X64.Decls.va_update_flags",
"Vale.X64.Decls.va_update_reg64",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_update_ok",
"Vale.X64.Decls.va_update_mem",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_ens_Fmul_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [] | Vale.Curve25519.X64.FastWide.va_ens_Fmul_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64 ->
va_sM: Vale.X64.Decls.va_state ->
va_fM: Vale.X64.Decls.va_fuel
-> Prims.prop | {
"end_col": 38,
"end_line": 231,
"start_col": 2,
"start_line": 193
} |
Prims.Tot | val va_quick_Fmul2 (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul2 ())) | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) | val va_quick_Fmul2 (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul2 ()))
let va_quick_Fmul2 (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul2 ())) = | false | null | false | (va_QProc (va_code_Fmul2 ())
([
va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx;
va_Mod_reg64 rRax; va_Mod_mem
])
(va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Memory.buffer64",
"Vale.X64.QuickCode.va_QProc",
"Prims.unit",
"Vale.Curve25519.X64.FastWide.va_code_Fmul2",
"Prims.Cons",
"Vale.X64.QuickCode.mod_t",
"Vale.X64.QuickCode.va_Mod_mem_layout",
"Vale.X64.QuickCode.va_Mod_mem_heaplet",
"Vale.X64.QuickCode.va_Mod_flags",
"Vale.X64.QuickCode.va_Mod_reg64",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.QuickCode.va_Mod_mem",
"Prims.Nil",
"Vale.Curve25519.X64.FastWide.va_wp_Fmul2",
"Vale.Curve25519.X64.FastWide.va_wpProof_Fmul2",
"Vale.X64.QuickCode.va_quickCode"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : | false | false | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Fmul2 (tmp_b inA_b dst_b inB_b: buffer64) : (va_quickCode unit (va_code_Fmul2 ())) | [] | Vale.Curve25519.X64.FastWide.va_quick_Fmul2 | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64
-> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.Curve25519.X64.FastWide.va_code_Fmul2 ()) | {
"end_col": 47,
"end_line": 565,
"start_col": 2,
"start_line": 561
} |
Prims.Tot | val va_req_Fmul2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
: prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)) | val va_req_Fmul2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
: prop
let va_req_Fmul2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
: prop = | false | null | false | (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0)
in
let inB_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0)
in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inB_in
inB_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
16
(va_get_mem_layout va_s0)
Secret)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Prims.l_and",
"Vale.X64.Decls.va_require_total",
"Vale.Curve25519.X64.FastWide.va_code_Fmul2_stdcall",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Stack_i.init_rsp",
"Vale.X64.Decls.va_get_stack",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.X64.Decls.va_int_range",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_req_Fmul2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
: prop | [] | Vale.Curve25519.X64.FastWide.va_req_Fmul2_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64
-> Prims.prop | {
"end_col": 47,
"end_line": 590,
"start_col": 2,
"start_line": 574
} |
Prims.Tot | val va_quick_Fmul2_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64)
: (va_quickCode unit (va_code_Fmul2_stdcall win)) | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) | val va_quick_Fmul2_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64)
: (va_quickCode unit (va_code_Fmul2_stdcall win))
let va_quick_Fmul2_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64)
: (va_quickCode unit (va_code_Fmul2_stdcall win)) = | false | null | false | (va_QProc (va_code_Fmul2_stdcall win)
([
va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp;
va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem
])
(va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Vale.X64.QuickCode.va_QProc",
"Prims.unit",
"Vale.Curve25519.X64.FastWide.va_code_Fmul2_stdcall",
"Prims.Cons",
"Vale.X64.QuickCode.mod_t",
"Vale.X64.QuickCode.va_Mod_stackTaint",
"Vale.X64.QuickCode.va_Mod_stack",
"Vale.X64.QuickCode.va_Mod_mem_layout",
"Vale.X64.QuickCode.va_Mod_mem_heaplet",
"Vale.X64.QuickCode.va_Mod_flags",
"Vale.X64.QuickCode.va_Mod_reg64",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Machine_s.rRbp",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.QuickCode.va_Mod_mem",
"Prims.Nil",
"Vale.Curve25519.X64.FastWide.va_wp_Fmul2_stdcall",
"Vale.Curve25519.X64.FastWide.va_wpProof_Fmul2_stdcall",
"Vale.X64.QuickCode.va_quickCode"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) | false | false | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Fmul2_stdcall (win: bool) (tmp_b inA_b dst_b inB_b: buffer64)
: (va_quickCode unit (va_code_Fmul2_stdcall win)) | [] | Vale.Curve25519.X64.FastWide.va_quick_Fmul2_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64
-> Vale.X64.QuickCode.va_quickCode Prims.unit
(Vale.Curve25519.X64.FastWide.va_code_Fmul2_stdcall win) | {
"end_col": 66,
"end_line": 814,
"start_col": 2,
"start_line": 809
} |
Prims.Tot | val va_ens_Fmul2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))) | val va_ens_Fmul2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop
let va_ens_Fmul2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop = | false | null | false | (va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\
va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0)
in
let inB_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0)
in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in
let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in
let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in
let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in
let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in
let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in
let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in
let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in
let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in
let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in
let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in
let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in
let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in
let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in
let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in
let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in
let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in
let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in
d `op_Modulus` prime == (va_mul_nat a b) `op_Modulus` prime /\
d' `op_Modulus` prime == (va_mul_nat a' b') `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\
(win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\
(win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
(win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
(~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM
(va_update_stackTaint va_sM
(va_update_stack va_sM
(va_update_mem_layout va_sM
(va_update_mem_heaplet 0
va_sM
(va_update_flags va_sM
(va_update_reg64 rR15
va_sM
(va_update_reg64 rR14
va_sM
(va_update_reg64 rR13
va_sM
(va_update_reg64 rR11
va_sM
(va_update_reg64 rR10
va_sM
(va_update_reg64 rR9
va_sM
(va_update_reg64 rR8
va_sM
(va_update_reg64 rRsp
va_sM
(va_update_reg64 rRbp
va_sM
(va_update_reg64 rRdi
va_sM
(va_update_reg64 rRsi
va_sM
(va_update_reg64 rRdx
va_sM
(va_update_reg64 rRcx
va_sM
(va_update_reg64 rRbx
va_sM
(va_update_reg64 rRax
va_sM
(va_update_ok va_sM
(va_update_mem
va_sM
va_s0)))
)))))))))))))))))))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_fuel",
"Prims.l_and",
"Vale.Curve25519.X64.FastWide.va_req_Fmul2_stdcall",
"Vale.X64.Decls.va_ensure_total",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.X64.Decls.modifies_buffer_2",
"Vale.X64.Decls.va_get_mem",
"Prims.l_imp",
"Vale.Def.Types_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRbp",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR15",
"Prims.l_not",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.buffer64_read",
"Prims.op_Addition",
"Vale.X64.Decls.va_int_range",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Decls.va_state_eq",
"Vale.X64.Decls.va_update_stackTaint",
"Vale.X64.Decls.va_update_stack",
"Vale.X64.Decls.va_update_mem_layout",
"Vale.X64.Decls.va_update_mem_heaplet",
"Vale.X64.Decls.va_update_flags",
"Vale.X64.Decls.va_update_reg64",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_update_ok",
"Vale.X64.Decls.va_update_mem",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_ens_Fmul2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [] | Vale.Curve25519.X64.FastWide.va_ens_Fmul2_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64 ->
va_sM: Vale.X64.Decls.va_state ->
va_fM: Vale.X64.Decls.va_fuel
-> Prims.prop | {
"end_col": 73,
"end_line": 644,
"start_col": 2,
"start_line": 593
} |
Prims.Tot | val va_quick_Fsqr (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr ())) | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr ())) =
(va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64
rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64
rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b)) | val va_quick_Fsqr (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr ()))
let va_quick_Fsqr (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr ())) = | false | null | false | (va_QProc (va_code_Fsqr ())
([
va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14;
va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem
])
(va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Memory.buffer64",
"Vale.X64.QuickCode.va_QProc",
"Prims.unit",
"Vale.Curve25519.X64.FastWide.va_code_Fsqr",
"Prims.Cons",
"Vale.X64.QuickCode.mod_t",
"Vale.X64.QuickCode.va_Mod_mem_layout",
"Vale.X64.QuickCode.va_Mod_mem_heaplet",
"Vale.X64.QuickCode.va_Mod_flags",
"Vale.X64.QuickCode.va_Mod_reg64",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.QuickCode.va_Mod_mem",
"Prims.Nil",
"Vale.Curve25519.X64.FastWide.va_wp_Fsqr",
"Vale.Curve25519.X64.FastWide.va_wpProof_Fsqr",
"Vale.X64.QuickCode.va_quickCode"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit | false | false | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Fsqr (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr ())) | [] | Vale.Curve25519.X64.FastWide.va_quick_Fsqr | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64
-> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.Curve25519.X64.FastWide.va_code_Fsqr ()) | {
"end_col": 40,
"end_line": 943,
"start_col": 2,
"start_line": 939
} |
Prims.Tot | val va_req_Fsqr_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b: buffer64)
: prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)) | val va_req_Fsqr_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b: buffer64)
: prop
let va_req_Fsqr_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b: buffer64)
: prop = | false | null | false | (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0)
in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
8
(va_get_mem_layout va_s0)
Secret)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Prims.l_and",
"Vale.X64.Decls.va_require_total",
"Vale.Curve25519.X64.FastWide.va_code_Fsqr_stdcall",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Stack_i.init_rsp",
"Vale.X64.Decls.va_get_stack",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.X64.Decls.va_int_range",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRdi",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr ())) =
(va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64
rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64
rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b))
//--
//-- Fsqr_stdcall
val va_code_Fsqr_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_req_Fsqr_stdcall (va_b0: va_code) (va_s0: va_state) (win: bool) (tmp_b inA_b dst_b: buffer64)
: prop | [] | Vale.Curve25519.X64.FastWide.va_req_Fsqr_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64
-> Prims.prop | {
"end_col": 12,
"end_line": 965,
"start_col": 2,
"start_line": 952
} |
Prims.Tot | val va_wp_Fmul_stdcall
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (()))) | val va_wp_Fmul_stdcall
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Fmul_stdcall
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0)
in
let inB_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0)
in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inB_in
inB_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
8
(va_get_mem_layout va_s0)
Secret) /\
(forall (va_x_mem: vale_heap) (va_x_rax: nat64) (va_x_rbx: nat64) (va_x_rcx: nat64)
(va_x_rdx: nat64) (va_x_rsi: nat64) (va_x_rdi: nat64) (va_x_rbp: nat64) (va_x_rsp: nat64)
(va_x_r8: nat64) (va_x_r9: nat64) (va_x_r10: nat64) (va_x_r11: nat64) (va_x_r13: nat64)
(va_x_r14: nat64) (va_x_r15: nat64) (va_x_efl: Vale.X64.Flags.t) (va_x_heap0: vale_heap)
(va_x_memLayout: vale_heap_layout) (va_x_stack: vale_stack) (va_x_stackTaint: memtaint).
let va_sM =
va_upd_stackTaint va_x_stackTaint
(va_upd_stack va_x_stack
(va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0
va_x_heap0
(va_upd_flags va_x_efl
(va_upd_reg64 rR15
va_x_r15
(va_upd_reg64 rR14
va_x_r14
(va_upd_reg64 rR13
va_x_r13
(va_upd_reg64 rR11
va_x_r11
(va_upd_reg64 rR10
va_x_r10
(va_upd_reg64 rR9
va_x_r9
(va_upd_reg64 rR8
va_x_r8
(va_upd_reg64 rRsp
va_x_rsp
(va_upd_reg64 rRbp
va_x_rbp
(va_upd_reg64 rRdi
va_x_rdi
(va_upd_reg64 rRsi
va_x_rsi
(va_upd_reg64 rRdx
va_x_rdx
(va_upd_reg64 rRcx
va_x_rcx
(va_upd_reg64 rRbx
va_x_rbx
(va_upd_reg64 rRax
va_x_rax
(va_upd_mem va_x_mem
va_s0)))))
)))))))))))))))
in
va_get_ok va_sM /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0)
in
let inB_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0)
in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in
let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in
let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in
let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
d `op_Modulus` prime == (va_mul_nat a b) `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\
(win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\
(win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
(win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
(~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Stack_i.init_rsp",
"Vale.X64.Decls.va_get_stack",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.X64.Decls.va_int_range",
"Vale.X64.Decls.va_if",
"Vale.Def.Types_s.nat64",
"Vale.X64.Machine_s.rR9",
"Prims.l_not",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Prims.l_Forall",
"Vale.X64.InsBasic.vale_heap",
"Vale.X64.Memory.nat64",
"Vale.X64.Flags.t",
"Vale.Arch.HeapImpl.vale_heap_layout",
"Vale.X64.InsBasic.vale_stack",
"Vale.X64.Memory.memtaint",
"Prims.l_imp",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.X64.Decls.modifies_buffer_2",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRbp",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR15",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.X64.Decls.buffer64_read",
"Vale.X64.State.vale_state",
"Vale.X64.Decls.va_upd_stackTaint",
"Vale.X64.Decls.va_upd_stack",
"Vale.X64.Decls.va_upd_mem_layout",
"Vale.X64.Decls.va_upd_mem_heaplet",
"Vale.X64.Decls.va_upd_flags",
"Vale.X64.Decls.va_upd_reg64",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_upd_mem"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Fmul_stdcall
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.Curve25519.X64.FastWide.va_wp_Fmul_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64 ->
va_s0: Vale.X64.Decls.va_state ->
va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 21,
"end_line": 355,
"start_col": 2,
"start_line": 295
} |
Prims.Tot | val va_ens_Fsqr_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM
/\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) | val va_ens_Fsqr_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop
let va_ens_Fsqr_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop = | false | null | false | (va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0)
in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\
(win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\
(win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
(win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\
(win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
(~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\
(~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM
(va_update_stackTaint va_sM
(va_update_stack va_sM
(va_update_mem_layout va_sM
(va_update_mem_heaplet 0
va_sM
(va_update_flags va_sM
(va_update_reg64 rR15
va_sM
(va_update_reg64 rR14
va_sM
(va_update_reg64 rR13
va_sM
(va_update_reg64 rR12
va_sM
(va_update_reg64 rR11
va_sM
(va_update_reg64 rR10
va_sM
(va_update_reg64 rR9
va_sM
(va_update_reg64 rR8
va_sM
(va_update_reg64 rRsp
va_sM
(va_update_reg64 rRbp
va_sM
(va_update_reg64 rRdi
va_sM
(va_update_reg64 rRsi
va_sM
(va_update_reg64 rRdx
va_sM
(va_update_reg64 rRcx
va_sM
(va_update_reg64 rRbx
va_sM
(va_update_reg64
rRax
va_sM
(va_update_ok
va_sM
(va_update_mem
va_sM
va_s0
))))))
)))))))))))))))))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_fuel",
"Prims.l_and",
"Vale.Curve25519.X64.FastWide.va_req_Fsqr_stdcall",
"Vale.X64.Decls.va_ensure_total",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.X64.Decls.modifies_buffer_2",
"Vale.X64.Decls.va_get_mem",
"Prims.l_imp",
"Vale.Def.Types_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRbp",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Machine_s.rR12",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR15",
"Prims.l_not",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.buffer64_read",
"Vale.X64.Decls.va_int_range",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Decls.va_state_eq",
"Vale.X64.Decls.va_update_stackTaint",
"Vale.X64.Decls.va_update_stack",
"Vale.X64.Decls.va_update_mem_layout",
"Vale.X64.Decls.va_update_mem_heaplet",
"Vale.X64.Decls.va_update_flags",
"Vale.X64.Decls.va_update_reg64",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_update_ok",
"Vale.X64.Decls.va_update_mem",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr ())) =
(va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64
rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64
rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b))
//--
//-- Fsqr_stdcall
val va_code_Fsqr_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_ens_Fsqr_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [] | Vale.Curve25519.X64.FastWide.va_ens_Fsqr_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
va_sM: Vale.X64.Decls.va_state ->
va_fM: Vale.X64.Decls.va_fuel
-> Prims.prop | {
"end_col": 74,
"end_line": 1002,
"start_col": 2,
"start_line": 968
} |
Prims.Tot | val va_quick_Fsqr_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64)
: (va_quickCode unit (va_code_Fsqr_stdcall win)) | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) :
(va_quickCode unit (va_code_Fsqr_stdcall win)) =
(va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8;
va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win
tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b)) | val va_quick_Fsqr_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64)
: (va_quickCode unit (va_code_Fsqr_stdcall win))
let va_quick_Fsqr_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64)
: (va_quickCode unit (va_code_Fsqr_stdcall win)) = | false | null | false | (va_QProc (va_code_Fsqr_stdcall win)
([
va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem
])
(va_wp_Fsqr_stdcall win tmp_b inA_b dst_b)
(va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Vale.X64.QuickCode.va_QProc",
"Prims.unit",
"Vale.Curve25519.X64.FastWide.va_code_Fsqr_stdcall",
"Prims.Cons",
"Vale.X64.QuickCode.mod_t",
"Vale.X64.QuickCode.va_Mod_stackTaint",
"Vale.X64.QuickCode.va_Mod_stack",
"Vale.X64.QuickCode.va_Mod_mem_layout",
"Vale.X64.QuickCode.va_Mod_mem_heaplet",
"Vale.X64.QuickCode.va_Mod_flags",
"Vale.X64.QuickCode.va_Mod_reg64",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR12",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Machine_s.rRbp",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.QuickCode.va_Mod_mem",
"Prims.Nil",
"Vale.Curve25519.X64.FastWide.va_wp_Fsqr_stdcall",
"Vale.Curve25519.X64.FastWide.va_wpProof_Fsqr_stdcall",
"Vale.X64.QuickCode.va_quickCode"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr ())) =
(va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64
rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64
rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b))
//--
//-- Fsqr_stdcall
val va_code_Fsqr_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM
/\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 ==
Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64)
(va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64
rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx
va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax
(va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0)
(fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let
(dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0)
(fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem
va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : | false | false | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Fsqr_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64)
: (va_quickCode unit (va_code_Fsqr_stdcall win)) | [] | Vale.Curve25519.X64.FastWide.va_quick_Fsqr_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64
-> Vale.X64.QuickCode.va_quickCode Prims.unit
(Vale.Curve25519.X64.FastWide.va_code_Fsqr_stdcall win) | {
"end_col": 71,
"end_line": 1131,
"start_col": 2,
"start_line": 1126
} |
Prims.Tot | val va_quick_Fsqr2 (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr2 ())) | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr2 ())) =
(va_QProc (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr2 tmp_b inA_b
dst_b) (va_wpProof_Fsqr2 tmp_b inA_b dst_b)) | val va_quick_Fsqr2 (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr2 ()))
let va_quick_Fsqr2 (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr2 ())) = | false | null | false | (va_QProc (va_code_Fsqr2 ())
([
va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14;
va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem
])
(va_wp_Fsqr2 tmp_b inA_b dst_b)
(va_wpProof_Fsqr2 tmp_b inA_b dst_b)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Memory.buffer64",
"Vale.X64.QuickCode.va_QProc",
"Prims.unit",
"Vale.Curve25519.X64.FastWide.va_code_Fsqr2",
"Prims.Cons",
"Vale.X64.QuickCode.mod_t",
"Vale.X64.QuickCode.va_Mod_mem_layout",
"Vale.X64.QuickCode.va_Mod_mem_heaplet",
"Vale.X64.QuickCode.va_Mod_flags",
"Vale.X64.QuickCode.va_Mod_reg64",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.QuickCode.va_Mod_mem",
"Prims.Nil",
"Vale.Curve25519.X64.FastWide.va_wp_Fsqr2",
"Vale.Curve25519.X64.FastWide.va_wpProof_Fsqr2",
"Vale.X64.QuickCode.va_quickCode"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr ())) =
(va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64
rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64
rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b))
//--
//-- Fsqr_stdcall
val va_code_Fsqr_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM
/\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 ==
Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64)
(va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64
rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx
va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax
(va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0)
(fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let
(dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0)
(fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem
va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) :
(va_quickCode unit (va_code_Fsqr_stdcall win)) =
(va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8;
va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win
tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b))
//--
//-- Fsqr2
val va_code_Fsqr2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr2 tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit | false | false | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Fsqr2 (tmp_b inA_b dst_b: buffer64) : (va_quickCode unit (va_code_Fsqr2 ())) | [] | Vale.Curve25519.X64.FastWide.va_quick_Fsqr2 | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64
-> Vale.X64.QuickCode.va_quickCode Prims.unit (Vale.Curve25519.X64.FastWide.va_code_Fsqr2 ()) | {
"end_col": 48,
"end_line": 1290,
"start_col": 2,
"start_line": 1286
} |
Prims.Tot | val va_req_Fsqr2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b: buffer64)
: prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_req_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret)) | val va_req_Fsqr2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b: buffer64)
: prop
let va_req_Fsqr2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b: buffer64)
: prop = | false | null | false | (va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0)
in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
16
(va_get_mem_layout va_s0)
Secret)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Prims.l_and",
"Vale.X64.Decls.va_require_total",
"Vale.Curve25519.X64.FastWide.va_code_Fsqr2_stdcall",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Stack_i.init_rsp",
"Vale.X64.Decls.va_get_stack",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.X64.Decls.va_int_range",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRdi",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr ())) =
(va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64
rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64
rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b))
//--
//-- Fsqr_stdcall
val va_code_Fsqr_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM
/\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 ==
Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64)
(va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64
rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx
va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax
(va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0)
(fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let
(dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0)
(fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem
va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) :
(va_quickCode unit (va_code_Fsqr_stdcall win)) =
(va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8;
va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win
tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b))
//--
//-- Fsqr2
val va_code_Fsqr2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr2 tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr2 ())) =
(va_QProc (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr2 tmp_b inA_b
dst_b) (va_wpProof_Fsqr2 tmp_b inA_b dst_b))
//--
//-- Fsqr2_stdcall
val va_code_Fsqr2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr2_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_req_Fsqr2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b: buffer64)
: prop | [] | Vale.Curve25519.X64.FastWide.va_req_Fsqr2_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64
-> Prims.prop | {
"end_col": 12,
"end_line": 1312,
"start_col": 2,
"start_line": 1299
} |
Prims.Tot | val va_ens_Fsqr2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_ens_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))) | val va_ens_Fsqr2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop
let va_ens_Fsqr2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop = | false | null | false | (va_req_Fsqr2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
(if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0)
in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in
let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in
let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in
let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in
let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in
let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in
let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in
d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\
d' `op_Modulus` prime == (va_mul_nat a' a') `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\
(win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\
(win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
(win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\
(win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
(~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\
(~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM
(va_update_stackTaint va_sM
(va_update_stack va_sM
(va_update_mem_layout va_sM
(va_update_mem_heaplet 0
va_sM
(va_update_flags va_sM
(va_update_reg64 rR15
va_sM
(va_update_reg64 rR14
va_sM
(va_update_reg64 rR13
va_sM
(va_update_reg64 rR12
va_sM
(va_update_reg64 rR11
va_sM
(va_update_reg64 rR10
va_sM
(va_update_reg64 rR9
va_sM
(va_update_reg64 rR8
va_sM
(va_update_reg64 rRsp
va_sM
(va_update_reg64 rRbp
va_sM
(va_update_reg64 rRdi
va_sM
(va_update_reg64 rRsi
va_sM
(va_update_reg64 rRdx
va_sM
(va_update_reg64 rRcx
va_sM
(va_update_reg64 rRbx
va_sM
(va_update_reg64
rRax
va_sM
(va_update_ok
va_sM
(va_update_mem
va_sM
va_s0
))))))
)))))))))))))))))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Vale.X64.Decls.va_code",
"Vale.X64.Decls.va_state",
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_fuel",
"Prims.l_and",
"Vale.Curve25519.X64.FastWide.va_req_Fsqr2_stdcall",
"Vale.X64.Decls.va_ensure_total",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.X64.Decls.modifies_buffer_2",
"Vale.X64.Decls.va_get_mem",
"Prims.l_imp",
"Vale.Def.Types_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRbp",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Machine_s.rR12",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR15",
"Prims.l_not",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.buffer64_read",
"Prims.op_Addition",
"Vale.X64.Decls.va_int_range",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Decls.va_state_eq",
"Vale.X64.Decls.va_update_stackTaint",
"Vale.X64.Decls.va_update_stack",
"Vale.X64.Decls.va_update_mem_layout",
"Vale.X64.Decls.va_update_mem_heaplet",
"Vale.X64.Decls.va_update_flags",
"Vale.X64.Decls.va_update_reg64",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_update_ok",
"Vale.X64.Decls.va_update_mem",
"Prims.prop"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr ())) =
(va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64
rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64
rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b))
//--
//-- Fsqr_stdcall
val va_code_Fsqr_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM
/\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 ==
Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64)
(va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64
rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx
va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax
(va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0)
(fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let
(dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0)
(fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem
va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) :
(va_quickCode unit (va_code_Fsqr_stdcall win)) =
(va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8;
va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win
tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b))
//--
//-- Fsqr2
val va_code_Fsqr2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr2 tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr2 ())) =
(va_QProc (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr2 tmp_b inA_b
dst_b) (va_wpProof_Fsqr2 tmp_b inA_b dst_b))
//--
//-- Fsqr2_stdcall
val va_code_Fsqr2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr2_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_ens_Fsqr2_stdcall
(va_b0: va_code)
(va_s0: va_state)
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_sM: va_state)
(va_fM: va_fuel)
: prop | [] | Vale.Curve25519.X64.FastWide.va_ens_Fsqr2_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
va_b0: Vale.X64.Decls.va_code ->
va_s0: Vale.X64.Decls.va_state ->
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
va_sM: Vale.X64.Decls.va_state ->
va_fM: Vale.X64.Decls.va_fuel
-> Prims.prop | {
"end_col": 74,
"end_line": 1359,
"start_col": 2,
"start_line": 1315
} |
Prims.Tot | val va_quick_Fsqr2_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64)
: (va_quickCode unit (va_code_Fsqr2_stdcall win)) | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Fsqr2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) :
(va_quickCode unit (va_code_Fsqr2_stdcall win)) =
(va_QProc (va_code_Fsqr2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8;
va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr2_stdcall win
tmp_b inA_b dst_b) (va_wpProof_Fsqr2_stdcall win tmp_b inA_b dst_b)) | val va_quick_Fsqr2_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64)
: (va_quickCode unit (va_code_Fsqr2_stdcall win))
let va_quick_Fsqr2_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64)
: (va_quickCode unit (va_code_Fsqr2_stdcall win)) = | false | null | false | (va_QProc (va_code_Fsqr2_stdcall win)
([
va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem
])
(va_wp_Fsqr2_stdcall win tmp_b inA_b dst_b)
(va_wpProof_Fsqr2_stdcall win tmp_b inA_b dst_b)) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Vale.X64.QuickCode.va_QProc",
"Prims.unit",
"Vale.Curve25519.X64.FastWide.va_code_Fsqr2_stdcall",
"Prims.Cons",
"Vale.X64.QuickCode.mod_t",
"Vale.X64.QuickCode.va_Mod_stackTaint",
"Vale.X64.QuickCode.va_Mod_stack",
"Vale.X64.QuickCode.va_Mod_mem_layout",
"Vale.X64.QuickCode.va_Mod_mem_heaplet",
"Vale.X64.QuickCode.va_Mod_flags",
"Vale.X64.QuickCode.va_Mod_reg64",
"Vale.X64.Machine_s.rR15",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR12",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Machine_s.rRbp",
"Vale.X64.Machine_s.rRdi",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRax",
"Vale.X64.QuickCode.va_Mod_mem",
"Prims.Nil",
"Vale.Curve25519.X64.FastWide.va_wp_Fsqr2_stdcall",
"Vale.Curve25519.X64.FastWide.va_wpProof_Fsqr2_stdcall",
"Vale.X64.QuickCode.va_quickCode"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr ())) =
(va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64
rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64
rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b))
//--
//-- Fsqr_stdcall
val va_code_Fsqr_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM
/\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 ==
Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64)
(va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64
rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx
va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax
(va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0)
(fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let
(dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0)
(fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem
va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) :
(va_quickCode unit (va_code_Fsqr_stdcall win)) =
(va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8;
va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win
tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b))
//--
//-- Fsqr2
val va_code_Fsqr2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr2 tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr2 ())) =
(va_QProc (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr2 tmp_b inA_b
dst_b) (va_wpProof_Fsqr2 tmp_b inA_b dst_b))
//--
//-- Fsqr2_stdcall
val va_code_Fsqr2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr2_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
val va_lemma_Fsqr2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 ==
Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64)
(va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64
rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx
va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax
(va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0)
(fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let
(dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0)
(fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem
va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fsqr2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr2_stdcall win tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp;
va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx;
va_Mod_reg64 rRax; va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : | false | false | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Fsqr2_stdcall (win: bool) (tmp_b inA_b dst_b: buffer64)
: (va_quickCode unit (va_code_Fsqr2_stdcall win)) | [] | Vale.Curve25519.X64.FastWide.va_quick_Fsqr2_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64
-> Vale.X64.QuickCode.va_quickCode Prims.unit
(Vale.Curve25519.X64.FastWide.va_code_Fsqr2_stdcall win) | {
"end_col": 72,
"end_line": 1508,
"start_col": 2,
"start_line": 1503
} |
Prims.Tot | val va_wp_Fmul2_stdcall
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (()))) | val va_wp_Fmul2_stdcall
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Fmul2_stdcall
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0)
in
let inB_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0)
in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inB_in
inB_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
16
(va_get_mem_layout va_s0)
Secret) /\
(forall (va_x_mem: vale_heap) (va_x_rax: nat64) (va_x_rbx: nat64) (va_x_rcx: nat64)
(va_x_rdx: nat64) (va_x_rsi: nat64) (va_x_rdi: nat64) (va_x_rbp: nat64) (va_x_rsp: nat64)
(va_x_r8: nat64) (va_x_r9: nat64) (va_x_r10: nat64) (va_x_r11: nat64) (va_x_r13: nat64)
(va_x_r14: nat64) (va_x_r15: nat64) (va_x_efl: Vale.X64.Flags.t) (va_x_heap0: vale_heap)
(va_x_memLayout: vale_heap_layout) (va_x_stack: vale_stack) (va_x_stackTaint: memtaint).
let va_sM =
va_upd_stackTaint va_x_stackTaint
(va_upd_stack va_x_stack
(va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0
va_x_heap0
(va_upd_flags va_x_efl
(va_upd_reg64 rR15
va_x_r15
(va_upd_reg64 rR14
va_x_r14
(va_upd_reg64 rR13
va_x_r13
(va_upd_reg64 rR11
va_x_r11
(va_upd_reg64 rR10
va_x_r10
(va_upd_reg64 rR9
va_x_r9
(va_upd_reg64 rR8
va_x_r8
(va_upd_reg64 rRsp
va_x_rsp
(va_upd_reg64 rRbp
va_x_rbp
(va_upd_reg64 rRdi
va_x_rdi
(va_upd_reg64 rRsi
va_x_rsi
(va_upd_reg64 rRdx
va_x_rdx
(va_upd_reg64 rRcx
va_x_rcx
(va_upd_reg64 rRbx
va_x_rbx
(va_upd_reg64 rRax
va_x_rax
(va_upd_mem va_x_mem
va_s0)))))
)))))))))))))))
in
va_get_ok va_sM /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0)
in
let inB_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0)
in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let b0 = Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in
let b1 = Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in
let b2 = Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in
let b3 = Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let b = Vale.Curve25519.Fast_defs.pow2_four b0 b1 b2 b3 in
let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in
let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in
let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in
let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in
let b0' = Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in
let b1' = Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in
let b2' = Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in
let b3' = Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in
let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in
let b' = Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in
let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in
let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in
let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in
let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in
d `op_Modulus` prime == (va_mul_nat a b) `op_Modulus` prime /\
d' `op_Modulus` prime == (va_mul_nat a' b') `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\
(win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\
(win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
(win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
(~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Stack_i.init_rsp",
"Vale.X64.Decls.va_get_stack",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.X64.Decls.va_int_range",
"Vale.X64.Decls.va_if",
"Vale.Def.Types_s.nat64",
"Vale.X64.Machine_s.rR9",
"Prims.l_not",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rR8",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRdi",
"Prims.l_Forall",
"Vale.X64.InsBasic.vale_heap",
"Vale.X64.Memory.nat64",
"Vale.X64.Flags.t",
"Vale.Arch.HeapImpl.vale_heap_layout",
"Vale.X64.InsBasic.vale_stack",
"Vale.X64.Memory.memtaint",
"Prims.l_imp",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.X64.Decls.modifies_buffer_2",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRbp",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR15",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.X64.Decls.buffer64_read",
"Prims.op_Addition",
"Vale.X64.State.vale_state",
"Vale.X64.Decls.va_upd_stackTaint",
"Vale.X64.Decls.va_upd_stack",
"Vale.X64.Decls.va_upd_mem_layout",
"Vale.X64.Decls.va_upd_mem_heaplet",
"Vale.X64.Decls.va_upd_flags",
"Vale.X64.Decls.va_upd_reg64",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_upd_mem"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Fmul2_stdcall
(win: bool)
(tmp_b inA_b dst_b inB_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.Curve25519.X64.FastWide.va_wp_Fmul2_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
inB_b: Vale.X64.Memory.buffer64 ->
va_s0: Vale.X64.Decls.va_state ->
va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 77,
"end_line": 794,
"start_col": 2,
"start_line": 721
} |
Prims.Tot | val va_wp_Fsqr_stdcall
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 ==
Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64)
(va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64
rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx
va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax
(va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0)
(fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let
(dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0)
(fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem
va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (()))) | val va_wp_Fsqr_stdcall
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Fsqr_stdcall
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0)
in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
4
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
8
(va_get_mem_layout va_s0)
Secret) /\
(forall (va_x_mem: vale_heap) (va_x_rax: nat64) (va_x_rbx: nat64) (va_x_rcx: nat64)
(va_x_rdx: nat64) (va_x_rsi: nat64) (va_x_rdi: nat64) (va_x_rbp: nat64) (va_x_rsp: nat64)
(va_x_r8: nat64) (va_x_r9: nat64) (va_x_r10: nat64) (va_x_r11: nat64) (va_x_r12: nat64)
(va_x_r13: nat64) (va_x_r14: nat64) (va_x_r15: nat64) (va_x_efl: Vale.X64.Flags.t)
(va_x_heap0: vale_heap) (va_x_memLayout: vale_heap_layout) (va_x_stack: vale_stack)
(va_x_stackTaint: memtaint).
let va_sM =
va_upd_stackTaint va_x_stackTaint
(va_upd_stack va_x_stack
(va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0
va_x_heap0
(va_upd_flags va_x_efl
(va_upd_reg64 rR15
va_x_r15
(va_upd_reg64 rR14
va_x_r14
(va_upd_reg64 rR13
va_x_r13
(va_upd_reg64 rR12
va_x_r12
(va_upd_reg64 rR11
va_x_r11
(va_upd_reg64 rR10
va_x_r10
(va_upd_reg64 rR9
va_x_r9
(va_upd_reg64 rR8
va_x_r8
(va_upd_reg64 rRsp
va_x_rsp
(va_upd_reg64 rRbp
va_x_rbp
(va_upd_reg64 rRdi
va_x_rdi
(va_upd_reg64 rRsi
va_x_rsi
(va_upd_reg64 rRdx
va_x_rdx
(va_upd_reg64 rRcx
va_x_rcx
(va_upd_reg64 rRbx
va_x_rbx
(va_upd_reg64 rRax
va_x_rax
(va_upd_mem
va_x_mem
va_s0)
))))))))))))))
))))))
in
va_get_ok va_sM /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0)
in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\
(win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\
(win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
(win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\
(win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
(~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\
(~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Stack_i.init_rsp",
"Vale.X64.Decls.va_get_stack",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.X64.Decls.va_int_range",
"Vale.X64.Decls.va_if",
"Vale.Def.Types_s.nat64",
"Vale.X64.Machine_s.rR8",
"Prims.l_not",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRdi",
"Prims.l_Forall",
"Vale.X64.InsBasic.vale_heap",
"Vale.X64.Memory.nat64",
"Vale.X64.Flags.t",
"Vale.Arch.HeapImpl.vale_heap_layout",
"Vale.X64.InsBasic.vale_stack",
"Vale.X64.Memory.memtaint",
"Prims.l_imp",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.X64.Decls.modifies_buffer_2",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRbp",
"Vale.X64.Machine_s.rR12",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR15",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.X64.Decls.buffer64_read",
"Vale.X64.State.vale_state",
"Vale.X64.Decls.va_upd_stackTaint",
"Vale.X64.Decls.va_upd_stack",
"Vale.X64.Decls.va_upd_mem_layout",
"Vale.X64.Decls.va_upd_mem_heaplet",
"Vale.X64.Decls.va_upd_flags",
"Vale.X64.Decls.va_upd_reg64",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_upd_mem"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr ())) =
(va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64
rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64
rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b))
//--
//-- Fsqr_stdcall
val va_code_Fsqr_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM
/\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Fsqr_stdcall
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.Curve25519.X64.FastWide.va_wp_Fsqr_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
va_s0: Vale.X64.Decls.va_state ->
va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 21,
"end_line": 1111,
"start_col": 2,
"start_line": 1059
} |
Prims.Tot | val va_wp_Fsqr2_stdcall
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastHybrid",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastSqr",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64.FastMul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_lemmas_external",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CPU_Features_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.Fast_defs",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCodes",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsMem",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.InsBasic",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Stack_i",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Memory",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.HeapImpl",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Curve25519.X64",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Fsqr2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 ==
Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64)
(va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64
rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx
va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax
(va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0)
(fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let
(dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0)
(fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem
va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (()))) | val va_wp_Fsqr2_stdcall
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Fsqr2_stdcall
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_get_ok va_s0 /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0)
in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
dst_in
dst_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0)
inA_in
inA_b
8
(va_get_mem_layout va_s0)
Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0)
tmp_in
tmp_b
16
(va_get_mem_layout va_s0)
Secret) /\
(forall (va_x_mem: vale_heap) (va_x_rax: nat64) (va_x_rbx: nat64) (va_x_rcx: nat64)
(va_x_rdx: nat64) (va_x_rsi: nat64) (va_x_rdi: nat64) (va_x_rbp: nat64) (va_x_rsp: nat64)
(va_x_r8: nat64) (va_x_r9: nat64) (va_x_r10: nat64) (va_x_r11: nat64) (va_x_r12: nat64)
(va_x_r13: nat64) (va_x_r14: nat64) (va_x_r15: nat64) (va_x_efl: Vale.X64.Flags.t)
(va_x_heap0: vale_heap) (va_x_memLayout: vale_heap_layout) (va_x_stack: vale_stack)
(va_x_stackTaint: memtaint).
let va_sM =
va_upd_stackTaint va_x_stackTaint
(va_upd_stack va_x_stack
(va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0
va_x_heap0
(va_upd_flags va_x_efl
(va_upd_reg64 rR15
va_x_r15
(va_upd_reg64 rR14
va_x_r14
(va_upd_reg64 rR13
va_x_r13
(va_upd_reg64 rR12
va_x_r12
(va_upd_reg64 rR11
va_x_r11
(va_upd_reg64 rR10
va_x_r10
(va_upd_reg64 rR9
va_x_r9
(va_upd_reg64 rR8
va_x_r8
(va_upd_reg64 rRsp
va_x_rsp
(va_upd_reg64 rRbp
va_x_rbp
(va_upd_reg64 rRdi
va_x_rdi
(va_upd_reg64 rRsi
va_x_rsi
(va_upd_reg64 rRdx
va_x_rdx
(va_upd_reg64 rRcx
va_x_rcx
(va_upd_reg64 rRbx
va_x_rbx
(va_upd_reg64 rRax
va_x_rax
(va_upd_mem
va_x_mem
va_s0)
))))))))))))))
))))))
in
va_get_ok va_sM /\
(let tmp_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0)
in
let inA_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0)
in
let dst_in:(va_int_range 0 18446744073709551615) =
va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0)
in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in
let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in
let a3 = Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in
let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in
let a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in
let a2' = Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in
let a3' = Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in
let d0 = Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in
let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in
let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in
let d3 = Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in
let d0' = Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in
let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in
let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in
let d3' = Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in
let a = Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in
let a' = Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in
let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in
let d' = Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in
d `op_Modulus` prime == (va_mul_nat a a) `op_Modulus` prime /\
d' `op_Modulus` prime == (va_mul_nat a' a') `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\
(win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\
(win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
(win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\
(win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
(~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\
(~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\
(~win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12 va_s0) /\
(~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\
(~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.Curve25519.X64.FastWide.fsti.checked",
"dependencies": [
"Vale.X64.State.fsti.checked",
"Vale.X64.Stack_i.fsti.checked",
"Vale.X64.QuickCodes.fsti.checked",
"Vale.X64.QuickCode.fst.checked",
"Vale.X64.Memory.fsti.checked",
"Vale.X64.Machine_s.fst.checked",
"Vale.X64.InsStack.fsti.checked",
"Vale.X64.InsMem.fsti.checked",
"Vale.X64.InsBasic.fsti.checked",
"Vale.X64.Flags.fsti.checked",
"Vale.X64.Decls.fsti.checked",
"Vale.X64.CPU_Features_s.fst.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Curve25519.Fast_defs.fst.checked",
"Vale.Arch.Types.fsti.checked",
"Vale.Arch.HeapImpl.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Vale.Curve25519.X64.FastWide.fsti"
} | [
"total"
] | [
"Prims.bool",
"Vale.X64.Memory.buffer64",
"Vale.X64.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Prims.b2t",
"Vale.X64.Decls.va_get_ok",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.X64.Decls.va_get_reg64",
"Vale.X64.Machine_s.rRsp",
"Vale.X64.Stack_i.init_rsp",
"Vale.X64.Decls.va_get_stack",
"Vale.X64.Memory.is_initial_heap",
"Vale.X64.Decls.va_get_mem_layout",
"Vale.X64.Decls.va_get_mem",
"Vale.X64.CPU_Features_s.adx_enabled",
"Vale.X64.CPU_Features_s.bmi2_enabled",
"Prims.l_or",
"Vale.X64.Decls.buffers_disjoint",
"Vale.X64.Decls.validDstAddrs64",
"Vale.Arch.HeapTypes_s.Secret",
"Vale.X64.Decls.validSrcAddrs64",
"Vale.X64.Decls.va_int_range",
"Vale.X64.Decls.va_if",
"Vale.Def.Types_s.nat64",
"Vale.X64.Machine_s.rR8",
"Prims.l_not",
"Vale.X64.Machine_s.rRdx",
"Vale.X64.Machine_s.rRsi",
"Vale.X64.Machine_s.rRcx",
"Vale.X64.Machine_s.rRdi",
"Prims.l_Forall",
"Vale.X64.InsBasic.vale_heap",
"Vale.X64.Memory.nat64",
"Vale.X64.Flags.t",
"Vale.Arch.HeapImpl.vale_heap_layout",
"Vale.X64.InsBasic.vale_stack",
"Vale.X64.Memory.memtaint",
"Prims.l_imp",
"Prims.int",
"Prims.op_Modulus",
"Vale.Curve25519.Fast_defs.prime",
"Vale.X64.Decls.va_mul_nat",
"Vale.X64.Decls.modifies_buffer_2",
"Vale.X64.Machine_s.rRbx",
"Vale.X64.Machine_s.rRbp",
"Vale.X64.Machine_s.rR12",
"Vale.X64.Machine_s.rR13",
"Vale.X64.Machine_s.rR14",
"Vale.X64.Machine_s.rR15",
"Prims.nat",
"Vale.Curve25519.Fast_defs.pow2_four",
"Vale.X64.Decls.buffer64_read",
"Prims.op_Addition",
"Vale.X64.State.vale_state",
"Vale.X64.Decls.va_upd_stackTaint",
"Vale.X64.Decls.va_upd_stack",
"Vale.X64.Decls.va_upd_mem_layout",
"Vale.X64.Decls.va_upd_mem_heaplet",
"Vale.X64.Decls.va_upd_flags",
"Vale.X64.Decls.va_upd_reg64",
"Vale.X64.Machine_s.rR11",
"Vale.X64.Machine_s.rR10",
"Vale.X64.Machine_s.rR9",
"Vale.X64.Machine_s.rRax",
"Vale.X64.Decls.va_upd_mem"
] | [] | module Vale.Curve25519.X64.FastWide
open Vale.Def.Types_s
open Vale.Arch.Types
open Vale.Arch.HeapImpl
open Vale.X64.Machine_s
open Vale.X64.Memory
open Vale.X64.Stack_i
open Vale.X64.State
open Vale.X64.Decls
open Vale.X64.InsBasic
open Vale.X64.InsMem
open Vale.X64.InsStack
open Vale.X64.QuickCode
open Vale.X64.QuickCodes
open Vale.Curve25519.Fast_defs
open Vale.X64.CPU_Features_s
//-- Fmul
val va_code_Fmul : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul : va_dummy:unit -> Tot va_pbool
let va_req_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))
val va_lemma_Fmul : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR14 va_sM
(va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM
(va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM (va_update_reg64 rRsi va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fmul : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul ())) =
(va_QProc (va_code_Fmul ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64
rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64
rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul tmp_b inA_b dst_b inB_b) (va_wpProof_Fmul
tmp_b inA_b dst_b inB_b))
//--
//-- Fmul_stdcall
val va_code_Fmul_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM (va_update_reg64 rRdi va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM (va_update_reg64 rRcx va_sM
(va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM (va_update_ok va_sM (va_update_mem
va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 4
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 8 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in d `op_Modulus` prime
== va_mul_nat a b `op_Modulus` prime /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b
(va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx
va_s0) /\ (win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64
rRdi va_sM == va_get_reg64 rRdi va_s0) /\ (win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi
va_s0) /\ (win ==> va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64
rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14
va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fmul_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul_stdcall win)) =
(va_QProc (va_code_Fmul_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2
val va_code_Fmul2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fmul2 : va_dummy:unit -> Tot va_pbool
let va_req_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2 va_b0 va_s0 tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))
val va_lemma_Fmul2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0 in
adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0)
(va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64 rRcx va_s0
in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\
va_state_eq va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags
va_sM (va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) =
va_get_reg64 rRcx va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64)
(va_x_r14:nat64) (va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap)
(va_x_memLayout:vale_heap_layout) . let va_sM = va_upd_mem_layout va_x_memLayout
(va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags va_x_efl (va_upd_reg64 rR14 va_x_r14
(va_upd_reg64 rR13 va_x_r13 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64
rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx
va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem va_s0))))))))))))))) in va_get_ok
va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64
rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR15 va_s0 in let (inB_in:nat64) = va_get_reg64
rRcx va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k
va_sM (())))
val va_wpProof_Fmul2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2 tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11;
va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi;
va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) va_s0
va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) :
(va_quickCode unit (va_code_Fmul2 ())) =
(va_QProc (va_code_Fmul2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9;
va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2 tmp_b inA_b dst_b inB_b)
(va_wpProof_Fmul2 tmp_b inA_b dst_b inB_b))
//--
//-- Fmul2_stdcall
val va_code_Fmul2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fmul2_stdcall : win:bool -> Tot va_pbool
let va_req_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret))
let va_ens_Fmul2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (inB_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fmul2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b inB_b /\ va_ensure_total va_b0 va_s0
va_sM va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win
then va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rR9 va_s0 else va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read
inA_b 0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0)
in let a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))
val va_lemma_Fmul2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64 -> inB_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fmul2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack
va_s0) /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(adx_enabled /\ bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b ==
inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let (inB_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR9 va_s0 else
va_get_reg64 rRcx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\ va_state_eq va_sM (va_update_stackTaint
va_sM (va_update_stack va_sM (va_update_mem_layout va_sM (va_update_mem_heaplet 0 va_sM
(va_update_flags va_sM (va_update_reg64 rR15 va_sM (va_update_reg64 rR14 va_sM (va_update_reg64
rR13 va_sM (va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in let (inB_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64
rRcx va_s0) in va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b inB_b \/ dst_b == inB_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.buffers_disjoint tmp_b inB_b /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0)
Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout
va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64 (va_get_mem va_s0) inB_in inB_b 8
(va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in
tmp_b 16 (va_get_mem_layout va_s0) Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64)
(va_x_rbx:nat64) (va_x_rcx:nat64) (va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64)
(va_x_rbp:nat64) (va_x_rsp:nat64) (va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64)
(va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64 rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi
(va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx va_x_rdx (va_upd_reg64 rRcx va_x_rcx
(va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem va_x_mem
va_s0)))))))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64
rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64
rRdx va_s0) in let (inB_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR9 va_s0) (fun _ -> va_get_reg64 rRcx va_s0) in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let b0 =
Vale.X64.Decls.buffer64_read inB_b 0 (va_get_mem va_s0) in let b1 =
Vale.X64.Decls.buffer64_read inB_b 1 (va_get_mem va_s0) in let b2 =
Vale.X64.Decls.buffer64_read inB_b 2 (va_get_mem va_s0) in let b3 =
Vale.X64.Decls.buffer64_read inB_b 3 (va_get_mem va_s0) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let b = Vale.Curve25519.Fast_defs.pow2_four
b0 b1 b2 b3 in let a0' = Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let
a1' = Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let b0' =
Vale.X64.Decls.buffer64_read inB_b (0 + 4) (va_get_mem va_s0) in let b1' =
Vale.X64.Decls.buffer64_read inB_b (1 + 4) (va_get_mem va_s0) in let b2' =
Vale.X64.Decls.buffer64_read inB_b (2 + 4) (va_get_mem va_s0) in let b3' =
Vale.X64.Decls.buffer64_read inB_b (3 + 4) (va_get_mem va_s0) in let a' =
Vale.Curve25519.Fast_defs.pow2_four a0' a1' a2' a3' in let b' =
Vale.Curve25519.Fast_defs.pow2_four b0' b1' b2' b3' in let d0 = Vale.X64.Decls.buffer64_read
dst_b 0 (va_get_mem va_sM) in let d1 = Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM)
in let d2 = Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d =
Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d0' = Vale.X64.Decls.buffer64_read dst_b
(0 + 4) (va_get_mem va_sM) in let d1' = Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem
va_sM) in let d2' = Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a b
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' b' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13
va_s0) /\ (win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64
rR15 va_sM == va_get_reg64 rR15 va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64
rRbx va_s0) /\ (~win ==> va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==>
va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (~win ==> va_get_reg64 rR14 va_sM ==
va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15 va_s0) /\
va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==> va_k va_sM (())))
val va_wpProof_Fmul2_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
inB_b:buffer64 -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fmul2_stdcall win tmp_b inA_b dst_b inB_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fmul2_stdcall win)
([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fmul2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(inB_b:buffer64) : (va_quickCode unit (va_code_Fmul2_stdcall win)) =
(va_QProc (va_code_Fmul2_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp;
va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx;
va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fmul2_stdcall win tmp_b inA_b dst_b
inB_b) (va_wpProof_Fmul2_stdcall win tmp_b inA_b dst_b inB_b))
//--
//-- Fsqr
val va_code_Fsqr : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
: prop =
(va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\ va_get_reg64 rR12
va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem
va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr ())) =
(va_QProc (va_code_Fsqr ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64
rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64
rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64
rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr tmp_b inA_b dst_b)
(va_wpProof_Fsqr tmp_b inA_b dst_b))
//--
//-- Fsqr_stdcall
val va_code_Fsqr_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM
/\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
val va_lemma_Fsqr_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rRcx va_s0) (fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64
rRsi va_s0) in let (dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ ->
va_get_reg64 rR8 va_s0) (fun _ -> va_get_reg64 rRdx va_s0) in va_get_reg64 rRsp va_s0 ==
Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\ bmi2_enabled) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 4 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 4 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 8 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rsi:nat64) (va_x_rdi:nat64) (va_x_rbp:nat64) (va_x_rsp:nat64)
(va_x_r8:nat64) (va_x_r9:nat64) (va_x_r10:nat64) (va_x_r11:nat64) (va_x_r12:nat64)
(va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64) (va_x_efl:Vale.X64.Flags.t)
(va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) (va_x_stack:vale_stack)
(va_x_stackTaint:memtaint) . let va_sM = va_upd_stackTaint va_x_stackTaint (va_upd_stack
va_x_stack (va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR12 va_x_r12 (va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10
(va_upd_reg64 rR9 va_x_r9 (va_upd_reg64 rR8 va_x_r8 (va_upd_reg64 rRsp va_x_rsp (va_upd_reg64
rRbp va_x_rbp (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdx
va_x_rdx (va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax
(va_upd_mem va_x_mem va_s0))))))))))))))))))))) in va_get_ok va_sM /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rRcx va_s0)
(fun _ -> va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) =
va_if win (fun _ -> va_get_reg64 rRdx va_s0) (fun _ -> va_get_reg64 rRsi va_s0) in let
(dst_in:(va_int_range 0 18446744073709551615)) = va_if win (fun _ -> va_get_reg64 rR8 va_s0)
(fun _ -> va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem
va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let d = Vale.Curve25519.Fast_defs.pow2_four
d0 d1 d2 d3 in d `op_Modulus` prime == va_mul_nat a a `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) ==>
va_k va_sM (())))
val va_wpProof_Fsqr_stdcall : win:bool -> tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr_stdcall win tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint;
va_Mod_stack; va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15;
va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi;
va_Mod_reg64 rRsi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) :
(va_quickCode unit (va_code_Fsqr_stdcall win)) =
(va_QProc (va_code_Fsqr_stdcall win) ([va_Mod_stackTaint; va_Mod_stack; va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR12; va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8;
va_Mod_reg64 rRsp; va_Mod_reg64 rRbp; va_Mod_reg64 rRdi; va_Mod_reg64 rRsi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr_stdcall win
tmp_b inA_b dst_b) (va_wpProof_Fsqr_stdcall win tmp_b inA_b dst_b))
//--
//-- Fsqr2
val va_code_Fsqr2 : va_dummy:unit -> Tot va_code
val va_codegen_success_Fsqr2 : va_dummy:unit -> Tot va_pbool
let va_req_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let (tmp_in:nat64) =
va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) =
va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\ Vale.X64.Memory.is_initial_heap
(va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/
dst_b == inA_b) /\ (Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr2 (va_b0:va_code) (va_s0:va_state) (tmp_b:buffer64) (inA_b:buffer64)
(dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr2 va_b0 va_s0 tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM va_fM /\
va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 =
Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))
val va_lemma_Fsqr2 : va_b0:va_code -> va_s0:va_state -> tmp_b:buffer64 -> inA_b:buffer64 ->
dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr2 ()) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let
(dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\ bmi2_enabled /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0
in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b
0 (va_get_mem va_s0) in let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let
a2 = Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) /\ va_state_eq va_sM (va_update_mem_layout va_sM
(va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR11 va_sM
(va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM (va_update_reg64 rR8 va_sM
(va_update_reg64 rRsi va_sM (va_update_reg64 rRdi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_get_ok va_s0 /\ (let (tmp_in:nat64) = va_get_reg64 rRdi va_s0 in let (inA_in:nat64) =
va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12 va_s0 in adx_enabled /\
bmi2_enabled /\ Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\
(Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret) /\ (forall (va_x_mem:vale_heap) (va_x_rax:nat64) (va_x_rbx:nat64) (va_x_rcx:nat64)
(va_x_rdx:nat64) (va_x_rdi:nat64) (va_x_rsi:nat64) (va_x_r8:nat64) (va_x_r9:nat64)
(va_x_r10:nat64) (va_x_r11:nat64) (va_x_r13:nat64) (va_x_r14:nat64) (va_x_r15:nat64)
(va_x_efl:Vale.X64.Flags.t) (va_x_heap0:vale_heap) (va_x_memLayout:vale_heap_layout) . let
va_sM = va_upd_mem_layout va_x_memLayout (va_upd_mem_heaplet 0 va_x_heap0 (va_upd_flags
va_x_efl (va_upd_reg64 rR15 va_x_r15 (va_upd_reg64 rR14 va_x_r14 (va_upd_reg64 rR13 va_x_r13
(va_upd_reg64 rR11 va_x_r11 (va_upd_reg64 rR10 va_x_r10 (va_upd_reg64 rR9 va_x_r9 (va_upd_reg64
rR8 va_x_r8 (va_upd_reg64 rRsi va_x_rsi (va_upd_reg64 rRdi va_x_rdi (va_upd_reg64 rRdx va_x_rdx
(va_upd_reg64 rRcx va_x_rcx (va_upd_reg64 rRbx va_x_rbx (va_upd_reg64 rRax va_x_rax (va_upd_mem
va_x_mem va_s0)))))))))))))))) in va_get_ok va_sM /\ (let (tmp_in:nat64) = va_get_reg64 rRdi
va_s0 in let (inA_in:nat64) = va_get_reg64 rRsi va_s0 in let (dst_in:nat64) = va_get_reg64 rR12
va_s0 in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
va_get_reg64 rR12 va_s0 == va_get_reg64 rR12 va_sM /\ Vale.X64.Decls.modifies_buffer_2 dst_b
tmp_b (va_get_mem va_s0) (va_get_mem va_sM)) ==> va_k va_sM (())))
val va_wpProof_Fsqr2 : tmp_b:buffer64 -> inA_b:buffer64 -> dst_b:buffer64 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Fsqr2 tmp_b inA_b dst_b va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Fsqr2 ()) ([va_Mod_mem_layout;
va_Mod_mem_heaplet 0; va_Mod_flags; va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13;
va_Mod_reg64 rR11; va_Mod_reg64 rR10; va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi;
va_Mod_reg64 rRdi; va_Mod_reg64 rRdx; va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax;
va_Mod_mem]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Fsqr2 (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) : (va_quickCode unit
(va_code_Fsqr2 ())) =
(va_QProc (va_code_Fsqr2 ()) ([va_Mod_mem_layout; va_Mod_mem_heaplet 0; va_Mod_flags;
va_Mod_reg64 rR15; va_Mod_reg64 rR14; va_Mod_reg64 rR13; va_Mod_reg64 rR11; va_Mod_reg64 rR10;
va_Mod_reg64 rR9; va_Mod_reg64 rR8; va_Mod_reg64 rRsi; va_Mod_reg64 rRdi; va_Mod_reg64 rRdx;
va_Mod_reg64 rRcx; va_Mod_reg64 rRbx; va_Mod_reg64 rRax; va_Mod_mem]) (va_wp_Fsqr2 tmp_b inA_b
dst_b) (va_wpProof_Fsqr2 tmp_b inA_b dst_b))
//--
//-- Fsqr2_stdcall
val va_code_Fsqr2_stdcall : win:bool -> Tot va_code
val va_codegen_success_Fsqr2_stdcall : win:bool -> Tot va_pbool
let va_req_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) : prop =
(va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret))
let va_ens_Fsqr2_stdcall (va_b0:va_code) (va_s0:va_state) (win:bool) (tmp_b:buffer64)
(inA_b:buffer64) (dst_b:buffer64) (va_sM:va_state) (va_fM:va_fuel) : prop =
(va_req_Fsqr2_stdcall va_b0 va_s0 win tmp_b inA_b dst_b /\ va_ensure_total va_b0 va_s0 va_sM
va_fM /\ va_get_ok va_sM /\ (let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRcx va_s0 else va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in
let (dst_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else
va_get_reg64 rRdx va_s0) in let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in
let a1 = Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0))))))))))))))))))))))))
val va_lemma_Fsqr2_stdcall : va_b0:va_code -> va_s0:va_state -> win:bool -> tmp_b:buffer64 ->
inA_b:buffer64 -> dst_b:buffer64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Fsqr2_stdcall win) va_s0 /\ va_get_ok va_s0 /\ (let
(tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
va_get_reg64 rRsp va_s0 == Vale.X64.Stack_i.init_rsp (va_get_stack va_s0) /\
Vale.X64.Memory.is_initial_heap (va_get_mem_layout va_s0) (va_get_mem va_s0) /\ (adx_enabled /\
bmi2_enabled) /\ (Vale.X64.Decls.buffers_disjoint dst_b inA_b \/ dst_b == inA_b) /\
(Vale.X64.Decls.buffers_disjoint dst_b tmp_b \/ dst_b == tmp_b) /\
Vale.X64.Decls.buffers_disjoint tmp_b inA_b /\ Vale.X64.Decls.validDstAddrs64 (va_get_mem
va_s0) dst_in dst_b 8 (va_get_mem_layout va_s0) Secret /\ Vale.X64.Decls.validSrcAddrs64
(va_get_mem va_s0) inA_in inA_b 8 (va_get_mem_layout va_s0) Secret /\
Vale.X64.Decls.validDstAddrs64 (va_get_mem va_s0) tmp_in tmp_b 16 (va_get_mem_layout va_s0)
Secret)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
(let (tmp_in:(va_int_range 0 18446744073709551615)) = (if win then va_get_reg64 rRcx va_s0 else
va_get_reg64 rRdi va_s0) in let (inA_in:(va_int_range 0 18446744073709551615)) = (if win then
va_get_reg64 rRdx va_s0 else va_get_reg64 rRsi va_s0) in let (dst_in:(va_int_range 0
18446744073709551615)) = (if win then va_get_reg64 rR8 va_s0 else va_get_reg64 rRdx va_s0) in
let a0 = Vale.X64.Decls.buffer64_read inA_b 0 (va_get_mem va_s0) in let a1 =
Vale.X64.Decls.buffer64_read inA_b 1 (va_get_mem va_s0) in let a2 =
Vale.X64.Decls.buffer64_read inA_b 2 (va_get_mem va_s0) in let a3 =
Vale.X64.Decls.buffer64_read inA_b 3 (va_get_mem va_s0) in let a0' =
Vale.X64.Decls.buffer64_read inA_b (0 + 4) (va_get_mem va_s0) in let a1' =
Vale.X64.Decls.buffer64_read inA_b (1 + 4) (va_get_mem va_s0) in let a2' =
Vale.X64.Decls.buffer64_read inA_b (2 + 4) (va_get_mem va_s0) in let a3' =
Vale.X64.Decls.buffer64_read inA_b (3 + 4) (va_get_mem va_s0) in let d0 =
Vale.X64.Decls.buffer64_read dst_b 0 (va_get_mem va_sM) in let d1 =
Vale.X64.Decls.buffer64_read dst_b 1 (va_get_mem va_sM) in let d2 =
Vale.X64.Decls.buffer64_read dst_b 2 (va_get_mem va_sM) in let d3 =
Vale.X64.Decls.buffer64_read dst_b 3 (va_get_mem va_sM) in let d0' =
Vale.X64.Decls.buffer64_read dst_b (0 + 4) (va_get_mem va_sM) in let d1' =
Vale.X64.Decls.buffer64_read dst_b (1 + 4) (va_get_mem va_sM) in let d2' =
Vale.X64.Decls.buffer64_read dst_b (2 + 4) (va_get_mem va_sM) in let d3' =
Vale.X64.Decls.buffer64_read dst_b (3 + 4) (va_get_mem va_sM) in let a =
Vale.Curve25519.Fast_defs.pow2_four a0 a1 a2 a3 in let a' = Vale.Curve25519.Fast_defs.pow2_four
a0' a1' a2' a3' in let d = Vale.Curve25519.Fast_defs.pow2_four d0 d1 d2 d3 in let d' =
Vale.Curve25519.Fast_defs.pow2_four d0' d1' d2' d3' in d `op_Modulus` prime == va_mul_nat a a
`op_Modulus` prime /\ d' `op_Modulus` prime == va_mul_nat a' a' `op_Modulus` prime /\
Vale.X64.Decls.modifies_buffer_2 dst_b tmp_b (va_get_mem va_s0) (va_get_mem va_sM) /\ (win ==>
va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (win ==> va_get_reg64 rRbp va_sM ==
va_get_reg64 rRbp va_s0) /\ (win ==> va_get_reg64 rRdi va_sM == va_get_reg64 rRdi va_s0) /\
(win ==> va_get_reg64 rRsi va_sM == va_get_reg64 rRsi va_s0) /\ (win ==> va_get_reg64 rRsp
va_sM == va_get_reg64 rRsp va_s0) /\ (win ==> va_get_reg64 rR12 va_sM == va_get_reg64 rR12
va_s0) /\ (win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\ (win ==> va_get_reg64
rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (win ==> va_get_reg64 rR15 va_sM == va_get_reg64 rR15
va_s0) /\ (~win ==> va_get_reg64 rRbx va_sM == va_get_reg64 rRbx va_s0) /\ (~win ==>
va_get_reg64 rRbp va_sM == va_get_reg64 rRbp va_s0) /\ (~win ==> va_get_reg64 rR12 va_sM ==
va_get_reg64 rR12 va_s0) /\ (~win ==> va_get_reg64 rR13 va_sM == va_get_reg64 rR13 va_s0) /\
(~win ==> va_get_reg64 rR14 va_sM == va_get_reg64 rR14 va_s0) /\ (~win ==> va_get_reg64 rR15
va_sM == va_get_reg64 rR15 va_s0) /\ va_get_reg64 rRsp va_sM == va_get_reg64 rRsp va_s0) /\
va_state_eq va_sM (va_update_stackTaint va_sM (va_update_stack va_sM (va_update_mem_layout
va_sM (va_update_mem_heaplet 0 va_sM (va_update_flags va_sM (va_update_reg64 rR15 va_sM
(va_update_reg64 rR14 va_sM (va_update_reg64 rR13 va_sM (va_update_reg64 rR12 va_sM
(va_update_reg64 rR11 va_sM (va_update_reg64 rR10 va_sM (va_update_reg64 rR9 va_sM
(va_update_reg64 rR8 va_sM (va_update_reg64 rRsp va_sM (va_update_reg64 rRbp va_sM
(va_update_reg64 rRdi va_sM (va_update_reg64 rRsi va_sM (va_update_reg64 rRdx va_sM
(va_update_reg64 rRcx va_sM (va_update_reg64 rRbx va_sM (va_update_reg64 rRax va_sM
(va_update_ok va_sM (va_update_mem va_sM va_s0)))))))))))))))))))))))))
[@ va_qattr]
let va_wp_Fsqr2_stdcall (win:bool) (tmp_b:buffer64) (inA_b:buffer64) (dst_b:buffer64) | false | true | Vale.Curve25519.X64.FastWide.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Fsqr2_stdcall
(win: bool)
(tmp_b inA_b dst_b: buffer64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.Curve25519.X64.FastWide.va_wp_Fsqr2_stdcall | {
"file_name": "obj/Vale.Curve25519.X64.FastWide.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
win: Prims.bool ->
tmp_b: Vale.X64.Memory.buffer64 ->
inA_b: Vale.X64.Memory.buffer64 ->
dst_b: Vale.X64.Memory.buffer64 ->
va_s0: Vale.X64.Decls.va_state ->
va_k: (_: Vale.X64.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 21,
"end_line": 1488,
"start_col": 2,
"start_line": 1426
} |
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": true,
"full_module": "Pulse.RuntimeUtils",
"short_module": "RU"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.Reflection",
"short_module": "R"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": true,
"full_module": "FStar.Ghost",
"short_module": "G"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Stubs.Pprint",
"short_module": "Pprint"
},
{
"abbrev": true,
"full_module": "FStar.Tactics.V2",
"short_module": "T"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let pairwise_disjoint (g g' g'':env) =
disjoint g g' /\ disjoint g' g'' /\ disjoint g g'' | let pairwise_disjoint (g g' g'': env) = | false | null | false | disjoint g g' /\ disjoint g' g'' /\ disjoint g g'' | {
"checked_file": "Pulse.Typing.Env.fsti.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"Pulse.RuntimeUtils.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.V2.fst.checked",
"FStar.Tactics.Result.fsti.checked",
"FStar.Stubs.Pprint.fsti.checked",
"FStar.Set.fsti.checked",
"FStar.Reflection.Typing.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Map.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Issue.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Typing.Env.fsti"
} | [
"total"
] | [
"Pulse.Typing.Env.env",
"Prims.l_and",
"Pulse.Typing.Env.disjoint",
"Prims.logical"
] | [] | module Pulse.Typing.Env
open FStar.List.Tot
open Pulse.Syntax
module L = FStar.List.Tot
module RT = FStar.Reflection.Typing
module T = FStar.Tactics.V2
module Pprint = FStar.Stubs.Pprint
type binding = var & typ
type env_bindings = list binding
val env : Type0
val fstar_env (g:env) : RT.fstar_top_env
//
// most recent binding at the head of the list
//
val bindings (g:env) : env_bindings
val as_map (g:env) : Map.t var typ
let is_related_to (bs:list (var & typ)) (m:Map.t var typ) =
(forall (b:var & typ).{:pattern L.memP b bs}
L.memP b bs ==> (Map.contains m (fst b) /\
Map.sel m (fst b) == snd b)) /\
(forall (x:var).{:pattern Map.contains m x} Map.contains m x ==> (L.memP (x, Map.sel m x) bs))
val bindings_as_map (g:env)
: Lemma (bindings g `is_related_to` as_map g)
[SMTPat (bindings g); SMTPat (as_map g)]
let dom (g:env) : Set.set var = Map.domain (as_map g)
let equal (g1 g2:env) =
fstar_env g1 == fstar_env g2 /\
bindings g1 == bindings g2
val equal_elim (g1 g2:env)
: Lemma (requires equal g1 g2)
(ensures g1 == g2)
[SMTPat (equal g1 g2)]
val mk_env (f:RT.fstar_top_env) : g:env { fstar_env g == f }
val mk_env_bs (f:RT.fstar_top_env)
: Lemma (bindings (mk_env f) == [])
[SMTPat (bindings (mk_env f))]
val mk_env_dom (f:RT.fstar_top_env)
: Lemma (dom (mk_env f) == Set.empty)
[SMTPat (dom (mk_env f))]
val push_binding (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: g':env { fstar_env g' == fstar_env g }
let singleton_env (f:_) (x:var) (t:typ) = push_binding (mk_env f) x ppname_default t
let push_binding_def (g:env) (x:var { ~ (Set.mem x (dom g)) }) (t:typ)
= push_binding g x ppname_default t
val push_binding_bs (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: Lemma (bindings (push_binding g x n t) == (x, t) :: bindings g)
[SMTPat (bindings (push_binding g x n t))]
val push_binding_as_map (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: Lemma (as_map (push_binding g x n t) == Map.upd (as_map g) x t)
[SMTPat (as_map (push_binding g x n t))]
let lookup (g:env) (x:var) : option typ =
let m = as_map g in
if Map.contains m x then Some (Map.sel m x) else None
val fresh (g:env) : v:var { ~ (Set.mem v (dom g)) }
let contains (g:env) (x:var) = Map.contains (as_map g) x
let disjoint (g1 g2:env) =
fstar_env g1 == fstar_env g2 /\
Set.disjoint (dom g1) (dom g2) | false | true | Pulse.Typing.Env.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val pairwise_disjoint : g: Pulse.Typing.Env.env -> g': Pulse.Typing.Env.env -> g'': Pulse.Typing.Env.env -> Prims.logical | [] | Pulse.Typing.Env.pairwise_disjoint | {
"file_name": "lib/steel/pulse/Pulse.Typing.Env.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | g: Pulse.Typing.Env.env -> g': Pulse.Typing.Env.env -> g'': Pulse.Typing.Env.env -> Prims.logical | {
"end_col": 52,
"end_line": 88,
"start_col": 2,
"start_line": 88
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": true,
"full_module": "Pulse.RuntimeUtils",
"short_module": "RU"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.Reflection",
"short_module": "R"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": true,
"full_module": "FStar.Ghost",
"short_module": "G"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Stubs.Pprint",
"short_module": "Pprint"
},
{
"abbrev": true,
"full_module": "FStar.Tactics.V2",
"short_module": "T"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let env_extends (g1 g2:env) =
exists g3. extends_with g1 g2 g3 | let env_extends (g1 g2: env) = | false | null | false | exists g3. extends_with g1 g2 g3 | {
"checked_file": "Pulse.Typing.Env.fsti.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"Pulse.RuntimeUtils.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.V2.fst.checked",
"FStar.Tactics.Result.fsti.checked",
"FStar.Stubs.Pprint.fsti.checked",
"FStar.Set.fsti.checked",
"FStar.Reflection.Typing.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Map.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Issue.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Typing.Env.fsti"
} | [
"total"
] | [
"Pulse.Typing.Env.env",
"Prims.l_Exists",
"Pulse.Typing.Env.extends_with",
"Prims.logical"
] | [] | module Pulse.Typing.Env
open FStar.List.Tot
open Pulse.Syntax
module L = FStar.List.Tot
module RT = FStar.Reflection.Typing
module T = FStar.Tactics.V2
module Pprint = FStar.Stubs.Pprint
type binding = var & typ
type env_bindings = list binding
val env : Type0
val fstar_env (g:env) : RT.fstar_top_env
//
// most recent binding at the head of the list
//
val bindings (g:env) : env_bindings
val as_map (g:env) : Map.t var typ
let is_related_to (bs:list (var & typ)) (m:Map.t var typ) =
(forall (b:var & typ).{:pattern L.memP b bs}
L.memP b bs ==> (Map.contains m (fst b) /\
Map.sel m (fst b) == snd b)) /\
(forall (x:var).{:pattern Map.contains m x} Map.contains m x ==> (L.memP (x, Map.sel m x) bs))
val bindings_as_map (g:env)
: Lemma (bindings g `is_related_to` as_map g)
[SMTPat (bindings g); SMTPat (as_map g)]
let dom (g:env) : Set.set var = Map.domain (as_map g)
let equal (g1 g2:env) =
fstar_env g1 == fstar_env g2 /\
bindings g1 == bindings g2
val equal_elim (g1 g2:env)
: Lemma (requires equal g1 g2)
(ensures g1 == g2)
[SMTPat (equal g1 g2)]
val mk_env (f:RT.fstar_top_env) : g:env { fstar_env g == f }
val mk_env_bs (f:RT.fstar_top_env)
: Lemma (bindings (mk_env f) == [])
[SMTPat (bindings (mk_env f))]
val mk_env_dom (f:RT.fstar_top_env)
: Lemma (dom (mk_env f) == Set.empty)
[SMTPat (dom (mk_env f))]
val push_binding (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: g':env { fstar_env g' == fstar_env g }
let singleton_env (f:_) (x:var) (t:typ) = push_binding (mk_env f) x ppname_default t
let push_binding_def (g:env) (x:var { ~ (Set.mem x (dom g)) }) (t:typ)
= push_binding g x ppname_default t
val push_binding_bs (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: Lemma (bindings (push_binding g x n t) == (x, t) :: bindings g)
[SMTPat (bindings (push_binding g x n t))]
val push_binding_as_map (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: Lemma (as_map (push_binding g x n t) == Map.upd (as_map g) x t)
[SMTPat (as_map (push_binding g x n t))]
let lookup (g:env) (x:var) : option typ =
let m = as_map g in
if Map.contains m x then Some (Map.sel m x) else None
val fresh (g:env) : v:var { ~ (Set.mem v (dom g)) }
let contains (g:env) (x:var) = Map.contains (as_map g) x
let disjoint (g1 g2:env) =
fstar_env g1 == fstar_env g2 /\
Set.disjoint (dom g1) (dom g2)
let pairwise_disjoint (g g' g'':env) =
disjoint g g' /\ disjoint g' g'' /\ disjoint g g''
let disjoint_dom (g1 g2:env)
: Lemma (requires disjoint g1 g2)
(ensures dom g1 `Set.disjoint` dom g2) = ()
val push_env (g1:env) (g2:env { disjoint g1 g2 }) : env
val push_env_fstar_env (g1:env) (g2:env { disjoint g1 g2 })
: Lemma (fstar_env (push_env g1 g2) == fstar_env g1)
[SMTPat (fstar_env (push_env g1 g2))]
val push_env_bindings (g1 g2:env)
: Lemma (requires disjoint g1 g2)
(ensures bindings (push_env g1 g2) == bindings g2 @ bindings g1)
[SMTPat (bindings (push_env g1 g2))]
val push_env_as_map (g1 g2:env)
: Lemma (requires disjoint g1 g2)
(ensures as_map (push_env g1 g2) == Map.concat (as_map g2) (as_map g1))
[SMTPat (as_map (push_env g1 g2))]
val push_env_assoc (g1 g2 g3:env)
: Lemma (requires disjoint g1 g2 /\ disjoint g2 g3 /\ disjoint g3 g1)
(ensures push_env g1 (push_env g2 g3) == push_env (push_env g1 g2) g3)
val check_disjoint (g:env) (s:Set.set var) : b:bool { b ==> Set.disjoint s (dom g)}
// removes the binding that was added first
// leftmost when we write env on paper
val remove_binding (g:env { Cons? (bindings g) })
: Pure (var & typ & env)
(requires True)
(ensures fun r ->
let (x, t, g') = r in
fstar_env g' == fstar_env g /\
(~ (x `Set.mem` dom g')) /\
g == push_env (push_binding (mk_env (fstar_env g)) x ppname_default t) g')
val remove_latest_binding (g:env { Cons? (bindings g) })
: Pure (var & typ & env)
(requires True)
(ensures fun r ->
let (x, t, g') = r in
fstar_env g' == fstar_env g /\
(~ (x `Set.mem` dom g')) /\
g == push_binding g' x ppname_default t)
// g1 extends g2 with g3, i.e. g1.bs == g3.bs @ g2.bs (recall most recent binding at the head)
let extends_with (g1 g2 g3:env) =
disjoint g2 g3 /\
g1 == push_env g2 g3 | false | true | Pulse.Typing.Env.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val env_extends : g1: Pulse.Typing.Env.env -> g2: Pulse.Typing.Env.env -> Prims.logical | [] | Pulse.Typing.Env.env_extends | {
"file_name": "lib/steel/pulse/Pulse.Typing.Env.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | g1: Pulse.Typing.Env.env -> g2: Pulse.Typing.Env.env -> Prims.logical | {
"end_col": 34,
"end_line": 142,
"start_col": 2,
"start_line": 142
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": true,
"full_module": "Pulse.RuntimeUtils",
"short_module": "RU"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.Reflection",
"short_module": "R"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": true,
"full_module": "FStar.Ghost",
"short_module": "G"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Stubs.Pprint",
"short_module": "Pprint"
},
{
"abbrev": true,
"full_module": "FStar.Tactics.V2",
"short_module": "T"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let equal (g1 g2:env) =
fstar_env g1 == fstar_env g2 /\
bindings g1 == bindings g2 | let equal (g1 g2: env) = | false | null | false | fstar_env g1 == fstar_env g2 /\ bindings g1 == bindings g2 | {
"checked_file": "Pulse.Typing.Env.fsti.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"Pulse.RuntimeUtils.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.V2.fst.checked",
"FStar.Tactics.Result.fsti.checked",
"FStar.Stubs.Pprint.fsti.checked",
"FStar.Set.fsti.checked",
"FStar.Reflection.Typing.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Map.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Issue.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Typing.Env.fsti"
} | [
"total"
] | [
"Pulse.Typing.Env.env",
"Prims.l_and",
"Prims.eq2",
"FStar.Reflection.Typing.fstar_top_env",
"Pulse.Typing.Env.fstar_env",
"Pulse.Typing.Env.env_bindings",
"Pulse.Typing.Env.bindings",
"Prims.logical"
] | [] | module Pulse.Typing.Env
open FStar.List.Tot
open Pulse.Syntax
module L = FStar.List.Tot
module RT = FStar.Reflection.Typing
module T = FStar.Tactics.V2
module Pprint = FStar.Stubs.Pprint
type binding = var & typ
type env_bindings = list binding
val env : Type0
val fstar_env (g:env) : RT.fstar_top_env
//
// most recent binding at the head of the list
//
val bindings (g:env) : env_bindings
val as_map (g:env) : Map.t var typ
let is_related_to (bs:list (var & typ)) (m:Map.t var typ) =
(forall (b:var & typ).{:pattern L.memP b bs}
L.memP b bs ==> (Map.contains m (fst b) /\
Map.sel m (fst b) == snd b)) /\
(forall (x:var).{:pattern Map.contains m x} Map.contains m x ==> (L.memP (x, Map.sel m x) bs))
val bindings_as_map (g:env)
: Lemma (bindings g `is_related_to` as_map g)
[SMTPat (bindings g); SMTPat (as_map g)]
let dom (g:env) : Set.set var = Map.domain (as_map g) | false | true | Pulse.Typing.Env.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val equal : g1: Pulse.Typing.Env.env -> g2: Pulse.Typing.Env.env -> Prims.logical | [] | Pulse.Typing.Env.equal | {
"file_name": "lib/steel/pulse/Pulse.Typing.Env.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | g1: Pulse.Typing.Env.env -> g2: Pulse.Typing.Env.env -> Prims.logical | {
"end_col": 28,
"end_line": 42,
"start_col": 2,
"start_line": 41
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": true,
"full_module": "Pulse.RuntimeUtils",
"short_module": "RU"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.Reflection",
"short_module": "R"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": true,
"full_module": "FStar.Ghost",
"short_module": "G"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Stubs.Pprint",
"short_module": "Pprint"
},
{
"abbrev": true,
"full_module": "FStar.Tactics.V2",
"short_module": "T"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let extends_with (g1 g2 g3:env) =
disjoint g2 g3 /\
g1 == push_env g2 g3 | let extends_with (g1 g2 g3: env) = | false | null | false | disjoint g2 g3 /\ g1 == push_env g2 g3 | {
"checked_file": "Pulse.Typing.Env.fsti.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"Pulse.RuntimeUtils.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.V2.fst.checked",
"FStar.Tactics.Result.fsti.checked",
"FStar.Stubs.Pprint.fsti.checked",
"FStar.Set.fsti.checked",
"FStar.Reflection.Typing.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Map.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Issue.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Typing.Env.fsti"
} | [
"total"
] | [
"Pulse.Typing.Env.env",
"Prims.l_and",
"Pulse.Typing.Env.disjoint",
"Prims.eq2",
"Pulse.Typing.Env.push_env",
"Prims.logical"
] | [] | module Pulse.Typing.Env
open FStar.List.Tot
open Pulse.Syntax
module L = FStar.List.Tot
module RT = FStar.Reflection.Typing
module T = FStar.Tactics.V2
module Pprint = FStar.Stubs.Pprint
type binding = var & typ
type env_bindings = list binding
val env : Type0
val fstar_env (g:env) : RT.fstar_top_env
//
// most recent binding at the head of the list
//
val bindings (g:env) : env_bindings
val as_map (g:env) : Map.t var typ
let is_related_to (bs:list (var & typ)) (m:Map.t var typ) =
(forall (b:var & typ).{:pattern L.memP b bs}
L.memP b bs ==> (Map.contains m (fst b) /\
Map.sel m (fst b) == snd b)) /\
(forall (x:var).{:pattern Map.contains m x} Map.contains m x ==> (L.memP (x, Map.sel m x) bs))
val bindings_as_map (g:env)
: Lemma (bindings g `is_related_to` as_map g)
[SMTPat (bindings g); SMTPat (as_map g)]
let dom (g:env) : Set.set var = Map.domain (as_map g)
let equal (g1 g2:env) =
fstar_env g1 == fstar_env g2 /\
bindings g1 == bindings g2
val equal_elim (g1 g2:env)
: Lemma (requires equal g1 g2)
(ensures g1 == g2)
[SMTPat (equal g1 g2)]
val mk_env (f:RT.fstar_top_env) : g:env { fstar_env g == f }
val mk_env_bs (f:RT.fstar_top_env)
: Lemma (bindings (mk_env f) == [])
[SMTPat (bindings (mk_env f))]
val mk_env_dom (f:RT.fstar_top_env)
: Lemma (dom (mk_env f) == Set.empty)
[SMTPat (dom (mk_env f))]
val push_binding (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: g':env { fstar_env g' == fstar_env g }
let singleton_env (f:_) (x:var) (t:typ) = push_binding (mk_env f) x ppname_default t
let push_binding_def (g:env) (x:var { ~ (Set.mem x (dom g)) }) (t:typ)
= push_binding g x ppname_default t
val push_binding_bs (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: Lemma (bindings (push_binding g x n t) == (x, t) :: bindings g)
[SMTPat (bindings (push_binding g x n t))]
val push_binding_as_map (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: Lemma (as_map (push_binding g x n t) == Map.upd (as_map g) x t)
[SMTPat (as_map (push_binding g x n t))]
let lookup (g:env) (x:var) : option typ =
let m = as_map g in
if Map.contains m x then Some (Map.sel m x) else None
val fresh (g:env) : v:var { ~ (Set.mem v (dom g)) }
let contains (g:env) (x:var) = Map.contains (as_map g) x
let disjoint (g1 g2:env) =
fstar_env g1 == fstar_env g2 /\
Set.disjoint (dom g1) (dom g2)
let pairwise_disjoint (g g' g'':env) =
disjoint g g' /\ disjoint g' g'' /\ disjoint g g''
let disjoint_dom (g1 g2:env)
: Lemma (requires disjoint g1 g2)
(ensures dom g1 `Set.disjoint` dom g2) = ()
val push_env (g1:env) (g2:env { disjoint g1 g2 }) : env
val push_env_fstar_env (g1:env) (g2:env { disjoint g1 g2 })
: Lemma (fstar_env (push_env g1 g2) == fstar_env g1)
[SMTPat (fstar_env (push_env g1 g2))]
val push_env_bindings (g1 g2:env)
: Lemma (requires disjoint g1 g2)
(ensures bindings (push_env g1 g2) == bindings g2 @ bindings g1)
[SMTPat (bindings (push_env g1 g2))]
val push_env_as_map (g1 g2:env)
: Lemma (requires disjoint g1 g2)
(ensures as_map (push_env g1 g2) == Map.concat (as_map g2) (as_map g1))
[SMTPat (as_map (push_env g1 g2))]
val push_env_assoc (g1 g2 g3:env)
: Lemma (requires disjoint g1 g2 /\ disjoint g2 g3 /\ disjoint g3 g1)
(ensures push_env g1 (push_env g2 g3) == push_env (push_env g1 g2) g3)
val check_disjoint (g:env) (s:Set.set var) : b:bool { b ==> Set.disjoint s (dom g)}
// removes the binding that was added first
// leftmost when we write env on paper
val remove_binding (g:env { Cons? (bindings g) })
: Pure (var & typ & env)
(requires True)
(ensures fun r ->
let (x, t, g') = r in
fstar_env g' == fstar_env g /\
(~ (x `Set.mem` dom g')) /\
g == push_env (push_binding (mk_env (fstar_env g)) x ppname_default t) g')
val remove_latest_binding (g:env { Cons? (bindings g) })
: Pure (var & typ & env)
(requires True)
(ensures fun r ->
let (x, t, g') = r in
fstar_env g' == fstar_env g /\
(~ (x `Set.mem` dom g')) /\
g == push_binding g' x ppname_default t)
// g1 extends g2 with g3, i.e. g1.bs == g3.bs @ g2.bs (recall most recent binding at the head) | false | true | Pulse.Typing.Env.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val extends_with : g1: Pulse.Typing.Env.env -> g2: Pulse.Typing.Env.env -> g3: Pulse.Typing.Env.env -> Prims.logical | [] | Pulse.Typing.Env.extends_with | {
"file_name": "lib/steel/pulse/Pulse.Typing.Env.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | g1: Pulse.Typing.Env.env -> g2: Pulse.Typing.Env.env -> g3: Pulse.Typing.Env.env -> Prims.logical | {
"end_col": 22,
"end_line": 139,
"start_col": 2,
"start_line": 138
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": true,
"full_module": "Pulse.RuntimeUtils",
"short_module": "RU"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.Reflection",
"short_module": "R"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": true,
"full_module": "FStar.Ghost",
"short_module": "G"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Stubs.Pprint",
"short_module": "Pprint"
},
{
"abbrev": true,
"full_module": "FStar.Tactics.V2",
"short_module": "T"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let push_binding_def (g:env) (x:var { ~ (Set.mem x (dom g)) }) (t:typ)
= push_binding g x ppname_default t | let push_binding_def (g: env) (x: var{~(Set.mem x (dom g))}) (t: typ) = | false | null | false | push_binding g x ppname_default t | {
"checked_file": "Pulse.Typing.Env.fsti.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"Pulse.RuntimeUtils.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.V2.fst.checked",
"FStar.Tactics.Result.fsti.checked",
"FStar.Stubs.Pprint.fsti.checked",
"FStar.Set.fsti.checked",
"FStar.Reflection.Typing.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Map.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Issue.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Typing.Env.fsti"
} | [
"total"
] | [
"Pulse.Typing.Env.env",
"Pulse.Syntax.Base.var",
"Prims.l_not",
"Prims.b2t",
"FStar.Set.mem",
"Pulse.Typing.Env.dom",
"Pulse.Syntax.Base.typ",
"Pulse.Typing.Env.push_binding",
"Pulse.Syntax.Base.ppname_default",
"Prims.eq2",
"FStar.Reflection.Typing.fstar_top_env",
"Pulse.Typing.Env.fstar_env"
] | [] | module Pulse.Typing.Env
open FStar.List.Tot
open Pulse.Syntax
module L = FStar.List.Tot
module RT = FStar.Reflection.Typing
module T = FStar.Tactics.V2
module Pprint = FStar.Stubs.Pprint
type binding = var & typ
type env_bindings = list binding
val env : Type0
val fstar_env (g:env) : RT.fstar_top_env
//
// most recent binding at the head of the list
//
val bindings (g:env) : env_bindings
val as_map (g:env) : Map.t var typ
let is_related_to (bs:list (var & typ)) (m:Map.t var typ) =
(forall (b:var & typ).{:pattern L.memP b bs}
L.memP b bs ==> (Map.contains m (fst b) /\
Map.sel m (fst b) == snd b)) /\
(forall (x:var).{:pattern Map.contains m x} Map.contains m x ==> (L.memP (x, Map.sel m x) bs))
val bindings_as_map (g:env)
: Lemma (bindings g `is_related_to` as_map g)
[SMTPat (bindings g); SMTPat (as_map g)]
let dom (g:env) : Set.set var = Map.domain (as_map g)
let equal (g1 g2:env) =
fstar_env g1 == fstar_env g2 /\
bindings g1 == bindings g2
val equal_elim (g1 g2:env)
: Lemma (requires equal g1 g2)
(ensures g1 == g2)
[SMTPat (equal g1 g2)]
val mk_env (f:RT.fstar_top_env) : g:env { fstar_env g == f }
val mk_env_bs (f:RT.fstar_top_env)
: Lemma (bindings (mk_env f) == [])
[SMTPat (bindings (mk_env f))]
val mk_env_dom (f:RT.fstar_top_env)
: Lemma (dom (mk_env f) == Set.empty)
[SMTPat (dom (mk_env f))]
val push_binding (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: g':env { fstar_env g' == fstar_env g }
let singleton_env (f:_) (x:var) (t:typ) = push_binding (mk_env f) x ppname_default t | false | false | Pulse.Typing.Env.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val push_binding_def : g: Pulse.Typing.Env.env ->
x: Pulse.Syntax.Base.var{~(FStar.Set.mem x (Pulse.Typing.Env.dom g))} ->
t: Pulse.Syntax.Base.typ
-> g': Pulse.Typing.Env.env{Pulse.Typing.Env.fstar_env g' == Pulse.Typing.Env.fstar_env g} | [] | Pulse.Typing.Env.push_binding_def | {
"file_name": "lib/steel/pulse/Pulse.Typing.Env.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
g: Pulse.Typing.Env.env ->
x: Pulse.Syntax.Base.var{~(FStar.Set.mem x (Pulse.Typing.Env.dom g))} ->
t: Pulse.Syntax.Base.typ
-> g': Pulse.Typing.Env.env{Pulse.Typing.Env.fstar_env g' == Pulse.Typing.Env.fstar_env g} | {
"end_col": 37,
"end_line": 65,
"start_col": 4,
"start_line": 65
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": true,
"full_module": "Pulse.RuntimeUtils",
"short_module": "RU"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.Reflection",
"short_module": "R"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": true,
"full_module": "FStar.Ghost",
"short_module": "G"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Stubs.Pprint",
"short_module": "Pprint"
},
{
"abbrev": true,
"full_module": "FStar.Tactics.V2",
"short_module": "T"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let disjoint (g1 g2:env) =
fstar_env g1 == fstar_env g2 /\
Set.disjoint (dom g1) (dom g2) | let disjoint (g1 g2: env) = | false | null | false | fstar_env g1 == fstar_env g2 /\ Set.disjoint (dom g1) (dom g2) | {
"checked_file": "Pulse.Typing.Env.fsti.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"Pulse.RuntimeUtils.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.V2.fst.checked",
"FStar.Tactics.Result.fsti.checked",
"FStar.Stubs.Pprint.fsti.checked",
"FStar.Set.fsti.checked",
"FStar.Reflection.Typing.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Map.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Issue.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Typing.Env.fsti"
} | [
"total"
] | [
"Pulse.Typing.Env.env",
"Prims.l_and",
"Prims.eq2",
"FStar.Reflection.Typing.fstar_top_env",
"Pulse.Typing.Env.fstar_env",
"FStar.Set.disjoint",
"Pulse.Syntax.Base.var",
"Pulse.Typing.Env.dom",
"Prims.logical"
] | [] | module Pulse.Typing.Env
open FStar.List.Tot
open Pulse.Syntax
module L = FStar.List.Tot
module RT = FStar.Reflection.Typing
module T = FStar.Tactics.V2
module Pprint = FStar.Stubs.Pprint
type binding = var & typ
type env_bindings = list binding
val env : Type0
val fstar_env (g:env) : RT.fstar_top_env
//
// most recent binding at the head of the list
//
val bindings (g:env) : env_bindings
val as_map (g:env) : Map.t var typ
let is_related_to (bs:list (var & typ)) (m:Map.t var typ) =
(forall (b:var & typ).{:pattern L.memP b bs}
L.memP b bs ==> (Map.contains m (fst b) /\
Map.sel m (fst b) == snd b)) /\
(forall (x:var).{:pattern Map.contains m x} Map.contains m x ==> (L.memP (x, Map.sel m x) bs))
val bindings_as_map (g:env)
: Lemma (bindings g `is_related_to` as_map g)
[SMTPat (bindings g); SMTPat (as_map g)]
let dom (g:env) : Set.set var = Map.domain (as_map g)
let equal (g1 g2:env) =
fstar_env g1 == fstar_env g2 /\
bindings g1 == bindings g2
val equal_elim (g1 g2:env)
: Lemma (requires equal g1 g2)
(ensures g1 == g2)
[SMTPat (equal g1 g2)]
val mk_env (f:RT.fstar_top_env) : g:env { fstar_env g == f }
val mk_env_bs (f:RT.fstar_top_env)
: Lemma (bindings (mk_env f) == [])
[SMTPat (bindings (mk_env f))]
val mk_env_dom (f:RT.fstar_top_env)
: Lemma (dom (mk_env f) == Set.empty)
[SMTPat (dom (mk_env f))]
val push_binding (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: g':env { fstar_env g' == fstar_env g }
let singleton_env (f:_) (x:var) (t:typ) = push_binding (mk_env f) x ppname_default t
let push_binding_def (g:env) (x:var { ~ (Set.mem x (dom g)) }) (t:typ)
= push_binding g x ppname_default t
val push_binding_bs (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: Lemma (bindings (push_binding g x n t) == (x, t) :: bindings g)
[SMTPat (bindings (push_binding g x n t))]
val push_binding_as_map (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: Lemma (as_map (push_binding g x n t) == Map.upd (as_map g) x t)
[SMTPat (as_map (push_binding g x n t))]
let lookup (g:env) (x:var) : option typ =
let m = as_map g in
if Map.contains m x then Some (Map.sel m x) else None
val fresh (g:env) : v:var { ~ (Set.mem v (dom g)) }
let contains (g:env) (x:var) = Map.contains (as_map g) x | false | true | Pulse.Typing.Env.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val disjoint : g1: Pulse.Typing.Env.env -> g2: Pulse.Typing.Env.env -> Prims.logical | [] | Pulse.Typing.Env.disjoint | {
"file_name": "lib/steel/pulse/Pulse.Typing.Env.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | g1: Pulse.Typing.Env.env -> g2: Pulse.Typing.Env.env -> Prims.logical | {
"end_col": 32,
"end_line": 85,
"start_col": 2,
"start_line": 84
} |
|
Prims.Tot | val lookup (g: env) (x: var) : option typ | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": true,
"full_module": "Pulse.RuntimeUtils",
"short_module": "RU"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.Reflection",
"short_module": "R"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": true,
"full_module": "FStar.Ghost",
"short_module": "G"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Stubs.Pprint",
"short_module": "Pprint"
},
{
"abbrev": true,
"full_module": "FStar.Tactics.V2",
"short_module": "T"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let lookup (g:env) (x:var) : option typ =
let m = as_map g in
if Map.contains m x then Some (Map.sel m x) else None | val lookup (g: env) (x: var) : option typ
let lookup (g: env) (x: var) : option typ = | false | null | false | let m = as_map g in
if Map.contains m x then Some (Map.sel m x) else None | {
"checked_file": "Pulse.Typing.Env.fsti.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"Pulse.RuntimeUtils.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.V2.fst.checked",
"FStar.Tactics.Result.fsti.checked",
"FStar.Stubs.Pprint.fsti.checked",
"FStar.Set.fsti.checked",
"FStar.Reflection.Typing.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Map.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Issue.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Typing.Env.fsti"
} | [
"total"
] | [
"Pulse.Typing.Env.env",
"Pulse.Syntax.Base.var",
"FStar.Map.contains",
"Pulse.Syntax.Base.typ",
"FStar.Pervasives.Native.Some",
"FStar.Map.sel",
"Prims.bool",
"FStar.Pervasives.Native.None",
"FStar.Pervasives.Native.option",
"FStar.Map.t",
"Pulse.Typing.Env.as_map"
] | [] | module Pulse.Typing.Env
open FStar.List.Tot
open Pulse.Syntax
module L = FStar.List.Tot
module RT = FStar.Reflection.Typing
module T = FStar.Tactics.V2
module Pprint = FStar.Stubs.Pprint
type binding = var & typ
type env_bindings = list binding
val env : Type0
val fstar_env (g:env) : RT.fstar_top_env
//
// most recent binding at the head of the list
//
val bindings (g:env) : env_bindings
val as_map (g:env) : Map.t var typ
let is_related_to (bs:list (var & typ)) (m:Map.t var typ) =
(forall (b:var & typ).{:pattern L.memP b bs}
L.memP b bs ==> (Map.contains m (fst b) /\
Map.sel m (fst b) == snd b)) /\
(forall (x:var).{:pattern Map.contains m x} Map.contains m x ==> (L.memP (x, Map.sel m x) bs))
val bindings_as_map (g:env)
: Lemma (bindings g `is_related_to` as_map g)
[SMTPat (bindings g); SMTPat (as_map g)]
let dom (g:env) : Set.set var = Map.domain (as_map g)
let equal (g1 g2:env) =
fstar_env g1 == fstar_env g2 /\
bindings g1 == bindings g2
val equal_elim (g1 g2:env)
: Lemma (requires equal g1 g2)
(ensures g1 == g2)
[SMTPat (equal g1 g2)]
val mk_env (f:RT.fstar_top_env) : g:env { fstar_env g == f }
val mk_env_bs (f:RT.fstar_top_env)
: Lemma (bindings (mk_env f) == [])
[SMTPat (bindings (mk_env f))]
val mk_env_dom (f:RT.fstar_top_env)
: Lemma (dom (mk_env f) == Set.empty)
[SMTPat (dom (mk_env f))]
val push_binding (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: g':env { fstar_env g' == fstar_env g }
let singleton_env (f:_) (x:var) (t:typ) = push_binding (mk_env f) x ppname_default t
let push_binding_def (g:env) (x:var { ~ (Set.mem x (dom g)) }) (t:typ)
= push_binding g x ppname_default t
val push_binding_bs (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: Lemma (bindings (push_binding g x n t) == (x, t) :: bindings g)
[SMTPat (bindings (push_binding g x n t))]
val push_binding_as_map (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: Lemma (as_map (push_binding g x n t) == Map.upd (as_map g) x t)
[SMTPat (as_map (push_binding g x n t))] | false | true | Pulse.Typing.Env.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val lookup (g: env) (x: var) : option typ | [] | Pulse.Typing.Env.lookup | {
"file_name": "lib/steel/pulse/Pulse.Typing.Env.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | g: Pulse.Typing.Env.env -> x: Pulse.Syntax.Base.var
-> FStar.Pervasives.Native.option Pulse.Syntax.Base.typ | {
"end_col": 55,
"end_line": 77,
"start_col": 41,
"start_line": 75
} |
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": true,
"full_module": "Pulse.RuntimeUtils",
"short_module": "RU"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.Reflection",
"short_module": "R"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": true,
"full_module": "FStar.Ghost",
"short_module": "G"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Stubs.Pprint",
"short_module": "Pprint"
},
{
"abbrev": true,
"full_module": "FStar.Tactics.V2",
"short_module": "T"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let singleton_env (f:_) (x:var) (t:typ) = push_binding (mk_env f) x ppname_default t | let singleton_env (f: _) (x: var) (t: typ) = | false | null | false | push_binding (mk_env f) x ppname_default t | {
"checked_file": "Pulse.Typing.Env.fsti.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"Pulse.RuntimeUtils.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.V2.fst.checked",
"FStar.Tactics.Result.fsti.checked",
"FStar.Stubs.Pprint.fsti.checked",
"FStar.Set.fsti.checked",
"FStar.Reflection.Typing.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Map.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Issue.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Typing.Env.fsti"
} | [
"total"
] | [
"FStar.Reflection.Typing.fstar_top_env",
"Pulse.Syntax.Base.var",
"Pulse.Syntax.Base.typ",
"Pulse.Typing.Env.push_binding",
"Pulse.Typing.Env.mk_env",
"Pulse.Syntax.Base.ppname_default",
"Pulse.Typing.Env.env",
"Prims.eq2",
"Pulse.Typing.Env.fstar_env"
] | [] | module Pulse.Typing.Env
open FStar.List.Tot
open Pulse.Syntax
module L = FStar.List.Tot
module RT = FStar.Reflection.Typing
module T = FStar.Tactics.V2
module Pprint = FStar.Stubs.Pprint
type binding = var & typ
type env_bindings = list binding
val env : Type0
val fstar_env (g:env) : RT.fstar_top_env
//
// most recent binding at the head of the list
//
val bindings (g:env) : env_bindings
val as_map (g:env) : Map.t var typ
let is_related_to (bs:list (var & typ)) (m:Map.t var typ) =
(forall (b:var & typ).{:pattern L.memP b bs}
L.memP b bs ==> (Map.contains m (fst b) /\
Map.sel m (fst b) == snd b)) /\
(forall (x:var).{:pattern Map.contains m x} Map.contains m x ==> (L.memP (x, Map.sel m x) bs))
val bindings_as_map (g:env)
: Lemma (bindings g `is_related_to` as_map g)
[SMTPat (bindings g); SMTPat (as_map g)]
let dom (g:env) : Set.set var = Map.domain (as_map g)
let equal (g1 g2:env) =
fstar_env g1 == fstar_env g2 /\
bindings g1 == bindings g2
val equal_elim (g1 g2:env)
: Lemma (requires equal g1 g2)
(ensures g1 == g2)
[SMTPat (equal g1 g2)]
val mk_env (f:RT.fstar_top_env) : g:env { fstar_env g == f }
val mk_env_bs (f:RT.fstar_top_env)
: Lemma (bindings (mk_env f) == [])
[SMTPat (bindings (mk_env f))]
val mk_env_dom (f:RT.fstar_top_env)
: Lemma (dom (mk_env f) == Set.empty)
[SMTPat (dom (mk_env f))]
val push_binding (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: g':env { fstar_env g' == fstar_env g } | false | false | Pulse.Typing.Env.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val singleton_env : f: FStar.Reflection.Typing.fstar_top_env -> x: Pulse.Syntax.Base.var -> t: Pulse.Syntax.Base.typ
-> g':
Pulse.Typing.Env.env
{Pulse.Typing.Env.fstar_env g' == Pulse.Typing.Env.fstar_env (Pulse.Typing.Env.mk_env f)} | [] | Pulse.Typing.Env.singleton_env | {
"file_name": "lib/steel/pulse/Pulse.Typing.Env.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | f: FStar.Reflection.Typing.fstar_top_env -> x: Pulse.Syntax.Base.var -> t: Pulse.Syntax.Base.typ
-> g':
Pulse.Typing.Env.env
{Pulse.Typing.Env.fstar_env g' == Pulse.Typing.Env.fstar_env (Pulse.Typing.Env.mk_env f)} | {
"end_col": 84,
"end_line": 62,
"start_col": 42,
"start_line": 62
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": true,
"full_module": "Pulse.RuntimeUtils",
"short_module": "RU"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.Reflection",
"short_module": "R"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": true,
"full_module": "FStar.Ghost",
"short_module": "G"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Stubs.Pprint",
"short_module": "Pprint"
},
{
"abbrev": true,
"full_module": "FStar.Tactics.V2",
"short_module": "T"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let contains (g:env) (x:var) = Map.contains (as_map g) x | let contains (g: env) (x: var) = | false | null | false | Map.contains (as_map g) x | {
"checked_file": "Pulse.Typing.Env.fsti.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"Pulse.RuntimeUtils.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.V2.fst.checked",
"FStar.Tactics.Result.fsti.checked",
"FStar.Stubs.Pprint.fsti.checked",
"FStar.Set.fsti.checked",
"FStar.Reflection.Typing.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Map.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Issue.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Typing.Env.fsti"
} | [
"total"
] | [
"Pulse.Typing.Env.env",
"Pulse.Syntax.Base.var",
"FStar.Map.contains",
"Pulse.Syntax.Base.typ",
"Pulse.Typing.Env.as_map",
"Prims.bool"
] | [] | module Pulse.Typing.Env
open FStar.List.Tot
open Pulse.Syntax
module L = FStar.List.Tot
module RT = FStar.Reflection.Typing
module T = FStar.Tactics.V2
module Pprint = FStar.Stubs.Pprint
type binding = var & typ
type env_bindings = list binding
val env : Type0
val fstar_env (g:env) : RT.fstar_top_env
//
// most recent binding at the head of the list
//
val bindings (g:env) : env_bindings
val as_map (g:env) : Map.t var typ
let is_related_to (bs:list (var & typ)) (m:Map.t var typ) =
(forall (b:var & typ).{:pattern L.memP b bs}
L.memP b bs ==> (Map.contains m (fst b) /\
Map.sel m (fst b) == snd b)) /\
(forall (x:var).{:pattern Map.contains m x} Map.contains m x ==> (L.memP (x, Map.sel m x) bs))
val bindings_as_map (g:env)
: Lemma (bindings g `is_related_to` as_map g)
[SMTPat (bindings g); SMTPat (as_map g)]
let dom (g:env) : Set.set var = Map.domain (as_map g)
let equal (g1 g2:env) =
fstar_env g1 == fstar_env g2 /\
bindings g1 == bindings g2
val equal_elim (g1 g2:env)
: Lemma (requires equal g1 g2)
(ensures g1 == g2)
[SMTPat (equal g1 g2)]
val mk_env (f:RT.fstar_top_env) : g:env { fstar_env g == f }
val mk_env_bs (f:RT.fstar_top_env)
: Lemma (bindings (mk_env f) == [])
[SMTPat (bindings (mk_env f))]
val mk_env_dom (f:RT.fstar_top_env)
: Lemma (dom (mk_env f) == Set.empty)
[SMTPat (dom (mk_env f))]
val push_binding (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: g':env { fstar_env g' == fstar_env g }
let singleton_env (f:_) (x:var) (t:typ) = push_binding (mk_env f) x ppname_default t
let push_binding_def (g:env) (x:var { ~ (Set.mem x (dom g)) }) (t:typ)
= push_binding g x ppname_default t
val push_binding_bs (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: Lemma (bindings (push_binding g x n t) == (x, t) :: bindings g)
[SMTPat (bindings (push_binding g x n t))]
val push_binding_as_map (g:env) (x:var { ~ (Set.mem x (dom g)) }) (n:ppname) (t:typ)
: Lemma (as_map (push_binding g x n t) == Map.upd (as_map g) x t)
[SMTPat (as_map (push_binding g x n t))]
let lookup (g:env) (x:var) : option typ =
let m = as_map g in
if Map.contains m x then Some (Map.sel m x) else None
val fresh (g:env) : v:var { ~ (Set.mem v (dom g)) } | false | true | Pulse.Typing.Env.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val contains : g: Pulse.Typing.Env.env -> x: Pulse.Syntax.Base.var -> Prims.bool | [] | Pulse.Typing.Env.contains | {
"file_name": "lib/steel/pulse/Pulse.Typing.Env.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | g: Pulse.Typing.Env.env -> x: Pulse.Syntax.Base.var -> Prims.bool | {
"end_col": 56,
"end_line": 81,
"start_col": 31,
"start_line": 81
} |
|
Prims.Tot | val dom (g: env) : Set.set var | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": true,
"full_module": "Pulse.RuntimeUtils",
"short_module": "RU"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.Reflection",
"short_module": "R"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": true,
"full_module": "FStar.Ghost",
"short_module": "G"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Stubs.Pprint",
"short_module": "Pprint"
},
{
"abbrev": true,
"full_module": "FStar.Tactics.V2",
"short_module": "T"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let dom (g:env) : Set.set var = Map.domain (as_map g) | val dom (g: env) : Set.set var
let dom (g: env) : Set.set var = | false | null | false | Map.domain (as_map g) | {
"checked_file": "Pulse.Typing.Env.fsti.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"Pulse.RuntimeUtils.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.V2.fst.checked",
"FStar.Tactics.Result.fsti.checked",
"FStar.Stubs.Pprint.fsti.checked",
"FStar.Set.fsti.checked",
"FStar.Reflection.Typing.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Map.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Issue.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Typing.Env.fsti"
} | [
"total"
] | [
"Pulse.Typing.Env.env",
"FStar.Map.domain",
"Pulse.Syntax.Base.var",
"Pulse.Syntax.Base.typ",
"Pulse.Typing.Env.as_map",
"FStar.Set.set"
] | [] | module Pulse.Typing.Env
open FStar.List.Tot
open Pulse.Syntax
module L = FStar.List.Tot
module RT = FStar.Reflection.Typing
module T = FStar.Tactics.V2
module Pprint = FStar.Stubs.Pprint
type binding = var & typ
type env_bindings = list binding
val env : Type0
val fstar_env (g:env) : RT.fstar_top_env
//
// most recent binding at the head of the list
//
val bindings (g:env) : env_bindings
val as_map (g:env) : Map.t var typ
let is_related_to (bs:list (var & typ)) (m:Map.t var typ) =
(forall (b:var & typ).{:pattern L.memP b bs}
L.memP b bs ==> (Map.contains m (fst b) /\
Map.sel m (fst b) == snd b)) /\
(forall (x:var).{:pattern Map.contains m x} Map.contains m x ==> (L.memP (x, Map.sel m x) bs))
val bindings_as_map (g:env)
: Lemma (bindings g `is_related_to` as_map g)
[SMTPat (bindings g); SMTPat (as_map g)] | false | true | Pulse.Typing.Env.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val dom (g: env) : Set.set var | [] | Pulse.Typing.Env.dom | {
"file_name": "lib/steel/pulse/Pulse.Typing.Env.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | g: Pulse.Typing.Env.env -> FStar.Set.set Pulse.Syntax.Base.var | {
"end_col": 53,
"end_line": 38,
"start_col": 32,
"start_line": 38
} |
Prims.Tot | [
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": true,
"full_module": "Pulse.RuntimeUtils",
"short_module": "RU"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.Reflection",
"short_module": "R"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": true,
"full_module": "FStar.Ghost",
"short_module": "G"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.Stubs.Pprint",
"short_module": "Pprint"
},
{
"abbrev": true,
"full_module": "FStar.Tactics.V2",
"short_module": "T"
},
{
"abbrev": true,
"full_module": "FStar.Reflection.Typing",
"short_module": "RT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "L"
},
{
"abbrev": false,
"full_module": "Pulse.Syntax",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List.Tot",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "Pulse.Typing",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let is_related_to (bs:list (var & typ)) (m:Map.t var typ) =
(forall (b:var & typ).{:pattern L.memP b bs}
L.memP b bs ==> (Map.contains m (fst b) /\
Map.sel m (fst b) == snd b)) /\
(forall (x:var).{:pattern Map.contains m x} Map.contains m x ==> (L.memP (x, Map.sel m x) bs)) | let is_related_to (bs: list (var & typ)) (m: Map.t var typ) = | false | null | false | (forall (b: var & typ). {:pattern L.memP b bs}
L.memP b bs ==> (Map.contains m (fst b) /\ Map.sel m (fst b) == snd b)) /\
(forall (x: var). {:pattern Map.contains m x} Map.contains m x ==> (L.memP (x, Map.sel m x) bs)) | {
"checked_file": "Pulse.Typing.Env.fsti.checked",
"dependencies": [
"Pulse.Syntax.fst.checked",
"Pulse.RuntimeUtils.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.V2.fst.checked",
"FStar.Tactics.Result.fsti.checked",
"FStar.Stubs.Pprint.fsti.checked",
"FStar.Set.fsti.checked",
"FStar.Reflection.Typing.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Map.fsti.checked",
"FStar.List.Tot.fst.checked",
"FStar.Issue.fsti.checked"
],
"interface_file": false,
"source_file": "Pulse.Typing.Env.fsti"
} | [
"total"
] | [
"Prims.list",
"FStar.Pervasives.Native.tuple2",
"Pulse.Syntax.Base.var",
"Pulse.Syntax.Base.typ",
"FStar.Map.t",
"Prims.l_and",
"Prims.l_Forall",
"Prims.l_imp",
"FStar.List.Tot.Base.memP",
"Prims.b2t",
"FStar.Map.contains",
"FStar.Pervasives.Native.fst",
"Prims.eq2",
"FStar.Map.sel",
"FStar.Pervasives.Native.snd",
"FStar.Pervasives.Native.Mktuple2",
"Prims.logical"
] | [] | module Pulse.Typing.Env
open FStar.List.Tot
open Pulse.Syntax
module L = FStar.List.Tot
module RT = FStar.Reflection.Typing
module T = FStar.Tactics.V2
module Pprint = FStar.Stubs.Pprint
type binding = var & typ
type env_bindings = list binding
val env : Type0
val fstar_env (g:env) : RT.fstar_top_env
//
// most recent binding at the head of the list
//
val bindings (g:env) : env_bindings
val as_map (g:env) : Map.t var typ | false | true | Pulse.Typing.Env.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val is_related_to : bs: Prims.list (Pulse.Syntax.Base.var * Pulse.Syntax.Base.typ) ->
m: FStar.Map.t Pulse.Syntax.Base.var Pulse.Syntax.Base.typ
-> Prims.logical | [] | Pulse.Typing.Env.is_related_to | {
"file_name": "lib/steel/pulse/Pulse.Typing.Env.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
bs: Prims.list (Pulse.Syntax.Base.var * Pulse.Syntax.Base.typ) ->
m: FStar.Map.t Pulse.Syntax.Base.var Pulse.Syntax.Base.typ
-> Prims.logical | {
"end_col": 96,
"end_line": 32,
"start_col": 2,
"start_line": 28
} |
|
FStar.Pervasives.Lemma | val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536)
(ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb)) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.MathLemmas",
"short_module": "ML"
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let add5_lemma_last1 ma mb a b =
assert (v a + v b <= (ma + mb) * max48);
Math.Lemmas.lemma_mult_le_right max48 (ma + mb) 65536;
assert (v a + v b <= 65536 * max48);
assert_norm (65536 * max48 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64) | val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536)
(ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb))
let add5_lemma_last1 ma mb a b = | false | null | true | assert (v a + v b <= (ma + mb) * max48);
Math.Lemmas.lemma_mult_le_right max48 (ma + mb) 65536;
assert (v a + v b <= 65536 * max48);
assert_norm (65536 * max48 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64) | {
"checked_file": "Hacl.Spec.K256.Field52.Lemmas1.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.K256.MathLemmas.fst.checked",
"Hacl.Spec.K256.Field52.Definitions.fst.checked",
"Hacl.Spec.K256.Field52.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.Calc.fsti.checked"
],
"interface_file": false,
"source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst"
} | [
"lemma"
] | [
"Hacl.Spec.K256.Field52.Definitions.scale64_last",
"Lib.IntTypes.uint64",
"FStar.Math.Lemmas.small_mod",
"Prims.op_Addition",
"Lib.IntTypes.v",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"Prims.pow2",
"Prims.unit",
"FStar.Pervasives.assert_norm",
"Prims.b2t",
"Prims.op_LessThan",
"FStar.Mul.op_Star",
"Hacl.Spec.K256.Field52.Definitions.max48",
"Prims._assert",
"Prims.op_LessThanOrEqual",
"FStar.Math.Lemmas.lemma_mult_le_right"
] | [] | module Hacl.Spec.K256.Field52.Lemmas1
open FStar.Mul
open Lib.IntTypes
module S = Spec.K256
include Hacl.Spec.K256.Field52.Definitions
include Hacl.Spec.K256.Field52
module ML = Hacl.Spec.K256.MathLemmas
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
/// Load and store functions
val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s)
let load_felem5_lemma_as_nat s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
Math.Lemmas.euclidean_division_definition (v s0) (pow2 52);
assert_norm (pow2 12 * pow2 52 = pow2 64);
assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64);
Math.Lemmas.euclidean_division_definition (v s1) (pow2 40);
assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128);
assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128);
Math.Lemmas.euclidean_division_definition (v s2) (pow2 25);
assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192);
assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192);
Math.Lemmas.euclidean_division_definition (v s3) (pow2 16);
assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192)
val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1))
let load_felem5_lemma_fits s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
assert (v f0 < pow2 52);
Math.Lemmas.lemma_div_lt (v s0) 64 52;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12;
assert (v f1 < pow2 52);
Math.Lemmas.lemma_div_lt (v s1) 64 40;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24;
assert (v f2 < pow2 52);
Math.Lemmas.lemma_div_lt (v s2) 64 28;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36;
assert (v f3 < pow2 52);
assert (v f4 = v s3 / pow2 16);
Math.Lemmas.lemma_div_lt (v s3) 64 16;
assert (v f4 < pow2 48)
val load_felem5_lemma: s:felem4 ->
Lemma (let f = load_felem5 s in
felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s)
let load_felem5_lemma s =
assert_norm (v mask52 = pow2 52 - 1);
assert_norm (0xffffffffff = pow2 40 - 1);
assert_norm (0xfffffff = pow2 28 - 1);
assert_norm (0xffff = pow2 16 - 1);
let (s0,s1,s2,s3) = s in
let f0 = s0 &. mask52 in // s0 % pow2 52
mod_mask_lemma s0 52ul;
assert (v (mod_mask #U64 #SEC 52ul) == v mask52);
assert (v f0 = v s0 % pow2 52);
let f11 = s0 >>. 52ul in
let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in
let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12
Math.Lemmas.lemma_div_lt (v s0) 64 52;
//assert (v f11 < pow2 12);
mod_mask_lemma s1 40ul;
assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64;
//assert (v f12 == v s1 % pow2 40 * pow2 12);
Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12);
logor_disjoint f11 f12 12;
assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12);
let f21 = s1 >>. 40ul in
let f22 = (s2 &. u64 0xfffffff) <<. 24ul in
let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24
Math.Lemmas.lemma_div_lt (v s1) 64 40;
//assert (v f21 < pow2 24);
mod_mask_lemma s2 28ul;
assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64;
//assert (v f22 == v s2 % pow2 28 * pow2 24);
Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24);
logor_disjoint f21 f22 24;
assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24);
let f31 = s2 >>. 28ul in
let f32 = (s3 &. u64 0xffff) <<. 36ul in
let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36
Math.Lemmas.lemma_div_lt (v s2) 64 28;
//assert (v f31 < pow2 36);
mod_mask_lemma s3 16ul;
assert (v (mod_mask #U64 #SEC 16ul) == 0xffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64;
//assert (v f32 == v s3 % pow2 16 * pow2 36);
Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36);
logor_disjoint f31 f32 36;
assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36);
let f4 = s3 >>. 16ul in // s3 / pow2 16
assert (v f4 = v s3 / pow2 16);
let f = (f0,f1,f2,f3,f4) in
load_felem5_lemma_as_nat s f;
load_felem5_lemma_fits s f
val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma
(requires
(let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
felem_fits5 f (1,1,1,1,1) /\
v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\
v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\
v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\
v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16))
(ensures as_nat4 s == as_nat5 f)
let store_felem5_lemma_as_nat f s =
let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192);
calc (==) {
v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { }
v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 }
v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208;
(==) { Math.Lemmas.small_mod (v f4) (pow2 48) }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208;
}
val store_felem5_lemma: f:felem5 -> Lemma
(requires felem_fits5 f (1,1,1,1,1))
(ensures as_nat4 (store_felem5 f) == as_nat5 f)
let store_felem5_lemma f =
let (f0,f1,f2,f3,f4) = f in
let o0 = f0 |. (f1 <<. 52ul) in
//assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52;
//assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52);
Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52);
logor_disjoint f0 (f1 <<. 52ul) 52;
assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52);
let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in
//assert (v (f1 >>. 12ul) == v f1 / pow2 12);
Math.Lemmas.lemma_div_lt (v f1) 52 12;
//assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40;
assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40);
Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40);
logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40;
assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40);
let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in
Math.Lemmas.lemma_div_lt (v f2) 52 24;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28;
//assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28);
Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28);
logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28;
assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28);
let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in
Math.Lemmas.lemma_div_lt (v f3) 52 36;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16;
//assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16);
Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16);
logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16;
assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16);
store_felem5_lemma_as_nat f (o0,o1,o2,o3)
/// Addition and multiplication by a digit
val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096)
(ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb))
let add5_lemma1 ma mb a b =
assert (v a + v b <= (ma + mb) * max52);
Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096;
assert (v a + v b <= 4096 * max52);
assert_norm (4096 * max52 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64)
val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536)
(ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb)) | false | false | Hacl.Spec.K256.Field52.Lemmas1.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536)
(ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb)) | [] | Hacl.Spec.K256.Field52.Lemmas1.add5_lemma_last1 | {
"file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
ma: Hacl.Spec.K256.Field52.Definitions.scale64_last ->
mb: Hacl.Spec.K256.Field52.Definitions.scale64_last ->
a: Lib.IntTypes.uint64 ->
b: Lib.IntTypes.uint64
-> FStar.Pervasives.Lemma
(requires
Hacl.Spec.K256.Field52.Definitions.felem_fits_last1 a ma /\
Hacl.Spec.K256.Field52.Definitions.felem_fits_last1 b mb /\ ma + mb <= 65536)
(ensures
Lib.IntTypes.v (a +. b) == Lib.IntTypes.v a + Lib.IntTypes.v b /\
Hacl.Spec.K256.Field52.Definitions.felem_fits_last1 (a +. b) (ma + mb)) | {
"end_col": 45,
"end_line": 236,
"start_col": 2,
"start_line": 232
} |
FStar.Pervasives.Lemma | val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096)
(ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb)) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.MathLemmas",
"short_module": "ML"
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let add5_lemma1 ma mb a b =
assert (v a + v b <= (ma + mb) * max52);
Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096;
assert (v a + v b <= 4096 * max52);
assert_norm (4096 * max52 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64) | val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096)
(ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb))
let add5_lemma1 ma mb a b = | false | null | true | assert (v a + v b <= (ma + mb) * max52);
Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096;
assert (v a + v b <= 4096 * max52);
assert_norm (4096 * max52 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64) | {
"checked_file": "Hacl.Spec.K256.Field52.Lemmas1.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.K256.MathLemmas.fst.checked",
"Hacl.Spec.K256.Field52.Definitions.fst.checked",
"Hacl.Spec.K256.Field52.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.Calc.fsti.checked"
],
"interface_file": false,
"source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst"
} | [
"lemma"
] | [
"Hacl.Spec.K256.Field52.Definitions.scale64",
"Lib.IntTypes.uint64",
"FStar.Math.Lemmas.small_mod",
"Prims.op_Addition",
"Lib.IntTypes.v",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"Prims.pow2",
"Prims.unit",
"FStar.Pervasives.assert_norm",
"Prims.b2t",
"Prims.op_LessThan",
"FStar.Mul.op_Star",
"Hacl.Spec.K256.Field52.Definitions.max52",
"Prims._assert",
"Prims.op_LessThanOrEqual",
"FStar.Math.Lemmas.lemma_mult_le_right"
] | [] | module Hacl.Spec.K256.Field52.Lemmas1
open FStar.Mul
open Lib.IntTypes
module S = Spec.K256
include Hacl.Spec.K256.Field52.Definitions
include Hacl.Spec.K256.Field52
module ML = Hacl.Spec.K256.MathLemmas
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
/// Load and store functions
val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s)
let load_felem5_lemma_as_nat s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
Math.Lemmas.euclidean_division_definition (v s0) (pow2 52);
assert_norm (pow2 12 * pow2 52 = pow2 64);
assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64);
Math.Lemmas.euclidean_division_definition (v s1) (pow2 40);
assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128);
assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128);
Math.Lemmas.euclidean_division_definition (v s2) (pow2 25);
assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192);
assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192);
Math.Lemmas.euclidean_division_definition (v s3) (pow2 16);
assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192)
val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1))
let load_felem5_lemma_fits s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
assert (v f0 < pow2 52);
Math.Lemmas.lemma_div_lt (v s0) 64 52;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12;
assert (v f1 < pow2 52);
Math.Lemmas.lemma_div_lt (v s1) 64 40;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24;
assert (v f2 < pow2 52);
Math.Lemmas.lemma_div_lt (v s2) 64 28;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36;
assert (v f3 < pow2 52);
assert (v f4 = v s3 / pow2 16);
Math.Lemmas.lemma_div_lt (v s3) 64 16;
assert (v f4 < pow2 48)
val load_felem5_lemma: s:felem4 ->
Lemma (let f = load_felem5 s in
felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s)
let load_felem5_lemma s =
assert_norm (v mask52 = pow2 52 - 1);
assert_norm (0xffffffffff = pow2 40 - 1);
assert_norm (0xfffffff = pow2 28 - 1);
assert_norm (0xffff = pow2 16 - 1);
let (s0,s1,s2,s3) = s in
let f0 = s0 &. mask52 in // s0 % pow2 52
mod_mask_lemma s0 52ul;
assert (v (mod_mask #U64 #SEC 52ul) == v mask52);
assert (v f0 = v s0 % pow2 52);
let f11 = s0 >>. 52ul in
let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in
let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12
Math.Lemmas.lemma_div_lt (v s0) 64 52;
//assert (v f11 < pow2 12);
mod_mask_lemma s1 40ul;
assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64;
//assert (v f12 == v s1 % pow2 40 * pow2 12);
Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12);
logor_disjoint f11 f12 12;
assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12);
let f21 = s1 >>. 40ul in
let f22 = (s2 &. u64 0xfffffff) <<. 24ul in
let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24
Math.Lemmas.lemma_div_lt (v s1) 64 40;
//assert (v f21 < pow2 24);
mod_mask_lemma s2 28ul;
assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64;
//assert (v f22 == v s2 % pow2 28 * pow2 24);
Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24);
logor_disjoint f21 f22 24;
assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24);
let f31 = s2 >>. 28ul in
let f32 = (s3 &. u64 0xffff) <<. 36ul in
let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36
Math.Lemmas.lemma_div_lt (v s2) 64 28;
//assert (v f31 < pow2 36);
mod_mask_lemma s3 16ul;
assert (v (mod_mask #U64 #SEC 16ul) == 0xffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64;
//assert (v f32 == v s3 % pow2 16 * pow2 36);
Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36);
logor_disjoint f31 f32 36;
assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36);
let f4 = s3 >>. 16ul in // s3 / pow2 16
assert (v f4 = v s3 / pow2 16);
let f = (f0,f1,f2,f3,f4) in
load_felem5_lemma_as_nat s f;
load_felem5_lemma_fits s f
val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma
(requires
(let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
felem_fits5 f (1,1,1,1,1) /\
v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\
v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\
v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\
v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16))
(ensures as_nat4 s == as_nat5 f)
let store_felem5_lemma_as_nat f s =
let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192);
calc (==) {
v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { }
v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 }
v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208;
(==) { Math.Lemmas.small_mod (v f4) (pow2 48) }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208;
}
val store_felem5_lemma: f:felem5 -> Lemma
(requires felem_fits5 f (1,1,1,1,1))
(ensures as_nat4 (store_felem5 f) == as_nat5 f)
let store_felem5_lemma f =
let (f0,f1,f2,f3,f4) = f in
let o0 = f0 |. (f1 <<. 52ul) in
//assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52;
//assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52);
Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52);
logor_disjoint f0 (f1 <<. 52ul) 52;
assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52);
let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in
//assert (v (f1 >>. 12ul) == v f1 / pow2 12);
Math.Lemmas.lemma_div_lt (v f1) 52 12;
//assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40;
assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40);
Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40);
logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40;
assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40);
let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in
Math.Lemmas.lemma_div_lt (v f2) 52 24;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28;
//assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28);
Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28);
logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28;
assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28);
let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in
Math.Lemmas.lemma_div_lt (v f3) 52 36;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16;
//assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16);
Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16);
logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16;
assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16);
store_felem5_lemma_as_nat f (o0,o1,o2,o3)
/// Addition and multiplication by a digit
val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096)
(ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb)) | false | false | Hacl.Spec.K256.Field52.Lemmas1.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096)
(ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb)) | [] | Hacl.Spec.K256.Field52.Lemmas1.add5_lemma1 | {
"file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
ma: Hacl.Spec.K256.Field52.Definitions.scale64 ->
mb: Hacl.Spec.K256.Field52.Definitions.scale64 ->
a: Lib.IntTypes.uint64 ->
b: Lib.IntTypes.uint64
-> FStar.Pervasives.Lemma
(requires
Hacl.Spec.K256.Field52.Definitions.felem_fits1 a ma /\
Hacl.Spec.K256.Field52.Definitions.felem_fits1 b mb /\ ma + mb <= 4096)
(ensures
Lib.IntTypes.v (a +. b) == Lib.IntTypes.v a + Lib.IntTypes.v b /\
Hacl.Spec.K256.Field52.Definitions.felem_fits1 (a +. b) (ma + mb)) | {
"end_col": 45,
"end_line": 224,
"start_col": 2,
"start_line": 220
} |
FStar.Pervasives.Lemma | val mul15_fits_lemma: m1:scale64_5 -> m2:nat -> f:felem5 -> c:uint64 -> Lemma
(requires felem_fits5 f m1 /\ v c <= m2 /\ m1 ** mk_nat5 m2 <=* (4096,4096,4096,4096,65536))
(ensures felem_fits5 (mul15 f c) (m1 ** mk_nat5 m2)) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.MathLemmas",
"short_module": "ML"
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mul15_fits_lemma m1 m2 f c =
let (f0,f1,f2,f3,f4) = f in
let (mf0,mf1,mf2,mf3,mf4) = m1 in
let (r0,r1,r2,r3,r4) = mul15 f c in
mul15_lemma1 mf0 m2 f0 c;
assert (felem_fits1 r0 (mf0 * m2));
mul15_lemma1 mf1 m2 f1 c;
assert (felem_fits1 r1 (mf1 * m2));
mul15_lemma1 mf2 m2 f2 c;
assert (felem_fits1 r2 (mf2 * m2));
mul15_lemma1 mf3 m2 f3 c;
assert (felem_fits1 r3 (mf3 * m2));
mul15_lemma_last1 mf4 m2 f4 c;
assert (felem_fits_last1 r4 (mf4 * m2)) | val mul15_fits_lemma: m1:scale64_5 -> m2:nat -> f:felem5 -> c:uint64 -> Lemma
(requires felem_fits5 f m1 /\ v c <= m2 /\ m1 ** mk_nat5 m2 <=* (4096,4096,4096,4096,65536))
(ensures felem_fits5 (mul15 f c) (m1 ** mk_nat5 m2))
let mul15_fits_lemma m1 m2 f c = | false | null | true | let f0, f1, f2, f3, f4 = f in
let mf0, mf1, mf2, mf3, mf4 = m1 in
let r0, r1, r2, r3, r4 = mul15 f c in
mul15_lemma1 mf0 m2 f0 c;
assert (felem_fits1 r0 (mf0 * m2));
mul15_lemma1 mf1 m2 f1 c;
assert (felem_fits1 r1 (mf1 * m2));
mul15_lemma1 mf2 m2 f2 c;
assert (felem_fits1 r2 (mf2 * m2));
mul15_lemma1 mf3 m2 f3 c;
assert (felem_fits1 r3 (mf3 * m2));
mul15_lemma_last1 mf4 m2 f4 c;
assert (felem_fits_last1 r4 (mf4 * m2)) | {
"checked_file": "Hacl.Spec.K256.Field52.Lemmas1.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.K256.MathLemmas.fst.checked",
"Hacl.Spec.K256.Field52.Definitions.fst.checked",
"Hacl.Spec.K256.Field52.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.Calc.fsti.checked"
],
"interface_file": false,
"source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst"
} | [
"lemma"
] | [
"Hacl.Spec.K256.Field52.Definitions.scale64_5",
"Prims.nat",
"Hacl.Spec.K256.Field52.Definitions.felem5",
"Lib.IntTypes.uint64",
"Prims._assert",
"Prims.b2t",
"Hacl.Spec.K256.Field52.Definitions.felem_fits_last1",
"FStar.Mul.op_Star",
"Prims.unit",
"Hacl.Spec.K256.Field52.Lemmas1.mul15_lemma_last1",
"Hacl.Spec.K256.Field52.Definitions.felem_fits1",
"Hacl.Spec.K256.Field52.Lemmas1.mul15_lemma1",
"Hacl.Spec.K256.Field52.mul15"
] | [] | module Hacl.Spec.K256.Field52.Lemmas1
open FStar.Mul
open Lib.IntTypes
module S = Spec.K256
include Hacl.Spec.K256.Field52.Definitions
include Hacl.Spec.K256.Field52
module ML = Hacl.Spec.K256.MathLemmas
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
/// Load and store functions
val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s)
let load_felem5_lemma_as_nat s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
Math.Lemmas.euclidean_division_definition (v s0) (pow2 52);
assert_norm (pow2 12 * pow2 52 = pow2 64);
assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64);
Math.Lemmas.euclidean_division_definition (v s1) (pow2 40);
assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128);
assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128);
Math.Lemmas.euclidean_division_definition (v s2) (pow2 25);
assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192);
assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192);
Math.Lemmas.euclidean_division_definition (v s3) (pow2 16);
assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192)
val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1))
let load_felem5_lemma_fits s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
assert (v f0 < pow2 52);
Math.Lemmas.lemma_div_lt (v s0) 64 52;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12;
assert (v f1 < pow2 52);
Math.Lemmas.lemma_div_lt (v s1) 64 40;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24;
assert (v f2 < pow2 52);
Math.Lemmas.lemma_div_lt (v s2) 64 28;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36;
assert (v f3 < pow2 52);
assert (v f4 = v s3 / pow2 16);
Math.Lemmas.lemma_div_lt (v s3) 64 16;
assert (v f4 < pow2 48)
val load_felem5_lemma: s:felem4 ->
Lemma (let f = load_felem5 s in
felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s)
let load_felem5_lemma s =
assert_norm (v mask52 = pow2 52 - 1);
assert_norm (0xffffffffff = pow2 40 - 1);
assert_norm (0xfffffff = pow2 28 - 1);
assert_norm (0xffff = pow2 16 - 1);
let (s0,s1,s2,s3) = s in
let f0 = s0 &. mask52 in // s0 % pow2 52
mod_mask_lemma s0 52ul;
assert (v (mod_mask #U64 #SEC 52ul) == v mask52);
assert (v f0 = v s0 % pow2 52);
let f11 = s0 >>. 52ul in
let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in
let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12
Math.Lemmas.lemma_div_lt (v s0) 64 52;
//assert (v f11 < pow2 12);
mod_mask_lemma s1 40ul;
assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64;
//assert (v f12 == v s1 % pow2 40 * pow2 12);
Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12);
logor_disjoint f11 f12 12;
assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12);
let f21 = s1 >>. 40ul in
let f22 = (s2 &. u64 0xfffffff) <<. 24ul in
let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24
Math.Lemmas.lemma_div_lt (v s1) 64 40;
//assert (v f21 < pow2 24);
mod_mask_lemma s2 28ul;
assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64;
//assert (v f22 == v s2 % pow2 28 * pow2 24);
Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24);
logor_disjoint f21 f22 24;
assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24);
let f31 = s2 >>. 28ul in
let f32 = (s3 &. u64 0xffff) <<. 36ul in
let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36
Math.Lemmas.lemma_div_lt (v s2) 64 28;
//assert (v f31 < pow2 36);
mod_mask_lemma s3 16ul;
assert (v (mod_mask #U64 #SEC 16ul) == 0xffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64;
//assert (v f32 == v s3 % pow2 16 * pow2 36);
Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36);
logor_disjoint f31 f32 36;
assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36);
let f4 = s3 >>. 16ul in // s3 / pow2 16
assert (v f4 = v s3 / pow2 16);
let f = (f0,f1,f2,f3,f4) in
load_felem5_lemma_as_nat s f;
load_felem5_lemma_fits s f
val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma
(requires
(let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
felem_fits5 f (1,1,1,1,1) /\
v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\
v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\
v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\
v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16))
(ensures as_nat4 s == as_nat5 f)
let store_felem5_lemma_as_nat f s =
let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192);
calc (==) {
v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { }
v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 }
v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208;
(==) { Math.Lemmas.small_mod (v f4) (pow2 48) }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208;
}
val store_felem5_lemma: f:felem5 -> Lemma
(requires felem_fits5 f (1,1,1,1,1))
(ensures as_nat4 (store_felem5 f) == as_nat5 f)
let store_felem5_lemma f =
let (f0,f1,f2,f3,f4) = f in
let o0 = f0 |. (f1 <<. 52ul) in
//assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52;
//assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52);
Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52);
logor_disjoint f0 (f1 <<. 52ul) 52;
assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52);
let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in
//assert (v (f1 >>. 12ul) == v f1 / pow2 12);
Math.Lemmas.lemma_div_lt (v f1) 52 12;
//assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40;
assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40);
Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40);
logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40;
assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40);
let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in
Math.Lemmas.lemma_div_lt (v f2) 52 24;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28;
//assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28);
Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28);
logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28;
assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28);
let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in
Math.Lemmas.lemma_div_lt (v f3) 52 36;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16;
//assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16);
Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16);
logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16;
assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16);
store_felem5_lemma_as_nat f (o0,o1,o2,o3)
/// Addition and multiplication by a digit
val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096)
(ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb))
let add5_lemma1 ma mb a b =
assert (v a + v b <= (ma + mb) * max52);
Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096;
assert (v a + v b <= 4096 * max52);
assert_norm (4096 * max52 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64)
val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536)
(ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb))
let add5_lemma_last1 ma mb a b =
assert (v a + v b <= (ma + mb) * max48);
Math.Lemmas.lemma_mult_le_right max48 (ma + mb) 65536;
assert (v a + v b <= 65536 * max48);
assert_norm (65536 * max48 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64)
val add5_lemma: m1:scale64_5 -> m2:scale64_5 -> f1:felem5 -> f2:felem5 -> Lemma
(requires felem_fits5 f1 m1 /\ felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096,4096,4096,4096,65536))
(ensures (let r = add5 f1 f2 in
as_nat5 r == as_nat5 f1 + as_nat5 f2 /\ felem_fits5 r (m1 +* m2)))
let add5_lemma m1 m2 f1 f2 =
let (a0,a1,a2,a3,a4) = f1 in
let (b0,b1,b2,b3,b4) = f2 in
let (ma0,ma1,ma2,ma3,ma4) = m1 in
let (mb0,mb1,mb2,mb3,mb4) = m2 in
add5_lemma1 ma0 mb0 a0 b0;
add5_lemma1 ma1 mb1 a1 b1;
add5_lemma1 ma2 mb2 a2 b2;
add5_lemma1 ma3 mb3 a3 b3;
add5_lemma_last1 ma4 mb4 a4 b4
val mul15_lemma1: ma:scale64 -> mb:nat -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ v b <= mb /\ ma * mb <= 4096)
(ensures v (a *. b) == v a * v b /\ felem_fits1 (a *. b) (ma * mb))
let mul15_lemma1 ma mb a b =
assert (v a * v b <= (ma * mb) * max52);
Math.Lemmas.lemma_mult_le_right max52 (ma * mb) 4096;
assert (v a * v b <= 4096 * max52);
assert_norm (4096 * max52 < pow2 64);
Math.Lemmas.small_mod (v a * v b) (pow2 64)
val mul15_lemma_last1: ma:scale64_last -> mb:nat -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ v b <= mb /\ ma * mb <= 65536)
(ensures v (a *. b) == v a * v b /\ felem_fits_last1 (a *. b) (ma * mb))
let mul15_lemma_last1 ma mb a b =
assert (v a * v b <= (ma * mb) * max48);
Math.Lemmas.lemma_mult_le_right max48 (ma * mb) 65536;
assert (v a * v b <= 65536 * max48);
assert_norm (65536 * max48 < pow2 64);
Math.Lemmas.small_mod (v a * v b) (pow2 64)
val mul15_fits_lemma: m1:scale64_5 -> m2:nat -> f:felem5 -> c:uint64 -> Lemma
(requires felem_fits5 f m1 /\ v c <= m2 /\ m1 ** mk_nat5 m2 <=* (4096,4096,4096,4096,65536))
(ensures felem_fits5 (mul15 f c) (m1 ** mk_nat5 m2)) | false | false | Hacl.Spec.K256.Field52.Lemmas1.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mul15_fits_lemma: m1:scale64_5 -> m2:nat -> f:felem5 -> c:uint64 -> Lemma
(requires felem_fits5 f m1 /\ v c <= m2 /\ m1 ** mk_nat5 m2 <=* (4096,4096,4096,4096,65536))
(ensures felem_fits5 (mul15 f c) (m1 ** mk_nat5 m2)) | [] | Hacl.Spec.K256.Field52.Lemmas1.mul15_fits_lemma | {
"file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
m1: Hacl.Spec.K256.Field52.Definitions.scale64_5 ->
m2: Prims.nat ->
f: Hacl.Spec.K256.Field52.Definitions.felem5 ->
c: Lib.IntTypes.uint64
-> FStar.Pervasives.Lemma
(requires
Hacl.Spec.K256.Field52.Definitions.felem_fits5 f m1 /\ Lib.IntTypes.v c <= m2 /\
m1 ** Hacl.Spec.K256.Field52.Definitions.mk_nat5 m2 <=*
FStar.Pervasives.Native.Mktuple5 4096 4096 4096 4096 65536)
(ensures
Hacl.Spec.K256.Field52.Definitions.felem_fits5 (Hacl.Spec.K256.Field52.mul15 f c)
(m1 ** Hacl.Spec.K256.Field52.Definitions.mk_nat5 m2)) | {
"end_col": 41,
"end_line": 298,
"start_col": 32,
"start_line": 284
} |
FStar.Pervasives.Lemma | val store_felem5_lemma: f:felem5 -> Lemma
(requires felem_fits5 f (1,1,1,1,1))
(ensures as_nat4 (store_felem5 f) == as_nat5 f) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.MathLemmas",
"short_module": "ML"
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let store_felem5_lemma f =
let (f0,f1,f2,f3,f4) = f in
let o0 = f0 |. (f1 <<. 52ul) in
//assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52;
//assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52);
Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52);
logor_disjoint f0 (f1 <<. 52ul) 52;
assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52);
let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in
//assert (v (f1 >>. 12ul) == v f1 / pow2 12);
Math.Lemmas.lemma_div_lt (v f1) 52 12;
//assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40;
assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40);
Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40);
logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40;
assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40);
let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in
Math.Lemmas.lemma_div_lt (v f2) 52 24;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28;
//assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28);
Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28);
logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28;
assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28);
let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in
Math.Lemmas.lemma_div_lt (v f3) 52 36;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16;
//assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16);
Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16);
logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16;
assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16);
store_felem5_lemma_as_nat f (o0,o1,o2,o3) | val store_felem5_lemma: f:felem5 -> Lemma
(requires felem_fits5 f (1,1,1,1,1))
(ensures as_nat4 (store_felem5 f) == as_nat5 f)
let store_felem5_lemma f = | false | null | true | let f0, f1, f2, f3, f4 = f in
let o0 = f0 |. (f1 <<. 52ul) in
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52;
Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52);
logor_disjoint f0 (f1 <<. 52ul) 52;
assert (v o0 == v f0 + (v f1 % pow2 12) * pow2 52);
let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in
Math.Lemmas.lemma_div_lt (v f1) 52 12;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40;
assert (v (f2 <<. 40ul) == (v f2 % pow2 24) * pow2 40);
Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40);
logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40;
assert (v o1 == v f1 / pow2 12 + (v f2 % pow2 24) * pow2 40);
let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in
Math.Lemmas.lemma_div_lt (v f2) 52 24;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28;
Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28);
logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28;
assert (v o2 == v f2 / pow2 24 + (v f3 % pow2 36) * pow2 28);
let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in
Math.Lemmas.lemma_div_lt (v f3) 52 36;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16;
Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16);
logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16;
assert (v o3 == v f3 / pow2 36 + (v f4 % pow2 48) * pow2 16);
store_felem5_lemma_as_nat f (o0, o1, o2, o3) | {
"checked_file": "Hacl.Spec.K256.Field52.Lemmas1.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.K256.MathLemmas.fst.checked",
"Hacl.Spec.K256.Field52.Definitions.fst.checked",
"Hacl.Spec.K256.Field52.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.Calc.fsti.checked"
],
"interface_file": false,
"source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst"
} | [
"lemma"
] | [
"Hacl.Spec.K256.Field52.Definitions.felem5",
"Lib.IntTypes.uint64",
"Hacl.Spec.K256.Field52.Lemmas1.store_felem5_lemma_as_nat",
"FStar.Pervasives.Native.Mktuple4",
"Prims.unit",
"Prims._assert",
"Prims.eq2",
"Prims.int",
"Lib.IntTypes.v",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"Prims.op_Addition",
"Prims.op_Division",
"Prims.pow2",
"FStar.Mul.op_Star",
"Prims.op_Modulus",
"Lib.IntTypes.logor_disjoint",
"Lib.IntTypes.op_Greater_Greater_Dot",
"FStar.UInt32.__uint_to_t",
"Lib.IntTypes.op_Less_Less_Dot",
"FStar.Math.Lemmas.cancel_mul_mod",
"FStar.Math.Lemmas.pow2_multiplication_modulo_lemma_2",
"FStar.Math.Lemmas.lemma_div_lt",
"Lib.IntTypes.int_t",
"Lib.IntTypes.op_Bar_Dot"
] | [] | module Hacl.Spec.K256.Field52.Lemmas1
open FStar.Mul
open Lib.IntTypes
module S = Spec.K256
include Hacl.Spec.K256.Field52.Definitions
include Hacl.Spec.K256.Field52
module ML = Hacl.Spec.K256.MathLemmas
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
/// Load and store functions
val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s)
let load_felem5_lemma_as_nat s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
Math.Lemmas.euclidean_division_definition (v s0) (pow2 52);
assert_norm (pow2 12 * pow2 52 = pow2 64);
assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64);
Math.Lemmas.euclidean_division_definition (v s1) (pow2 40);
assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128);
assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128);
Math.Lemmas.euclidean_division_definition (v s2) (pow2 25);
assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192);
assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192);
Math.Lemmas.euclidean_division_definition (v s3) (pow2 16);
assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192)
val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1))
let load_felem5_lemma_fits s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
assert (v f0 < pow2 52);
Math.Lemmas.lemma_div_lt (v s0) 64 52;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12;
assert (v f1 < pow2 52);
Math.Lemmas.lemma_div_lt (v s1) 64 40;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24;
assert (v f2 < pow2 52);
Math.Lemmas.lemma_div_lt (v s2) 64 28;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36;
assert (v f3 < pow2 52);
assert (v f4 = v s3 / pow2 16);
Math.Lemmas.lemma_div_lt (v s3) 64 16;
assert (v f4 < pow2 48)
val load_felem5_lemma: s:felem4 ->
Lemma (let f = load_felem5 s in
felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s)
let load_felem5_lemma s =
assert_norm (v mask52 = pow2 52 - 1);
assert_norm (0xffffffffff = pow2 40 - 1);
assert_norm (0xfffffff = pow2 28 - 1);
assert_norm (0xffff = pow2 16 - 1);
let (s0,s1,s2,s3) = s in
let f0 = s0 &. mask52 in // s0 % pow2 52
mod_mask_lemma s0 52ul;
assert (v (mod_mask #U64 #SEC 52ul) == v mask52);
assert (v f0 = v s0 % pow2 52);
let f11 = s0 >>. 52ul in
let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in
let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12
Math.Lemmas.lemma_div_lt (v s0) 64 52;
//assert (v f11 < pow2 12);
mod_mask_lemma s1 40ul;
assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64;
//assert (v f12 == v s1 % pow2 40 * pow2 12);
Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12);
logor_disjoint f11 f12 12;
assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12);
let f21 = s1 >>. 40ul in
let f22 = (s2 &. u64 0xfffffff) <<. 24ul in
let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24
Math.Lemmas.lemma_div_lt (v s1) 64 40;
//assert (v f21 < pow2 24);
mod_mask_lemma s2 28ul;
assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64;
//assert (v f22 == v s2 % pow2 28 * pow2 24);
Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24);
logor_disjoint f21 f22 24;
assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24);
let f31 = s2 >>. 28ul in
let f32 = (s3 &. u64 0xffff) <<. 36ul in
let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36
Math.Lemmas.lemma_div_lt (v s2) 64 28;
//assert (v f31 < pow2 36);
mod_mask_lemma s3 16ul;
assert (v (mod_mask #U64 #SEC 16ul) == 0xffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64;
//assert (v f32 == v s3 % pow2 16 * pow2 36);
Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36);
logor_disjoint f31 f32 36;
assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36);
let f4 = s3 >>. 16ul in // s3 / pow2 16
assert (v f4 = v s3 / pow2 16);
let f = (f0,f1,f2,f3,f4) in
load_felem5_lemma_as_nat s f;
load_felem5_lemma_fits s f
val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma
(requires
(let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
felem_fits5 f (1,1,1,1,1) /\
v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\
v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\
v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\
v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16))
(ensures as_nat4 s == as_nat5 f)
let store_felem5_lemma_as_nat f s =
let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192);
calc (==) {
v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { }
v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 }
v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208;
(==) { Math.Lemmas.small_mod (v f4) (pow2 48) }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208;
}
val store_felem5_lemma: f:felem5 -> Lemma
(requires felem_fits5 f (1,1,1,1,1))
(ensures as_nat4 (store_felem5 f) == as_nat5 f) | false | false | Hacl.Spec.K256.Field52.Lemmas1.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val store_felem5_lemma: f:felem5 -> Lemma
(requires felem_fits5 f (1,1,1,1,1))
(ensures as_nat4 (store_felem5 f) == as_nat5 f) | [] | Hacl.Spec.K256.Field52.Lemmas1.store_felem5_lemma | {
"file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | f: Hacl.Spec.K256.Field52.Definitions.felem5
-> FStar.Pervasives.Lemma
(requires Hacl.Spec.K256.Field52.Definitions.felem_fits5 f (1, 1, 1, 1, 1))
(ensures
Hacl.Spec.K256.Field52.Definitions.as_nat4 (Hacl.Spec.K256.Field52.store_felem5 f) ==
Hacl.Spec.K256.Field52.Definitions.as_nat5 f) | {
"end_col": 43,
"end_line": 210,
"start_col": 26,
"start_line": 175
} |
FStar.Pervasives.Lemma | val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1)) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.MathLemmas",
"short_module": "ML"
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let load_felem5_lemma_fits s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
assert (v f0 < pow2 52);
Math.Lemmas.lemma_div_lt (v s0) 64 52;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12;
assert (v f1 < pow2 52);
Math.Lemmas.lemma_div_lt (v s1) 64 40;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24;
assert (v f2 < pow2 52);
Math.Lemmas.lemma_div_lt (v s2) 64 28;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36;
assert (v f3 < pow2 52);
assert (v f4 = v s3 / pow2 16);
Math.Lemmas.lemma_div_lt (v s3) 64 16;
assert (v f4 < pow2 48) | val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1))
let load_felem5_lemma_fits s f = | false | null | true | let s0, s1, s2, s3 = s in
let f0, f1, f2, f3, f4 = f in
assert (v f0 < pow2 52);
Math.Lemmas.lemma_div_lt (v s0) 64 52;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12;
assert (v f1 < pow2 52);
Math.Lemmas.lemma_div_lt (v s1) 64 40;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24;
assert (v f2 < pow2 52);
Math.Lemmas.lemma_div_lt (v s2) 64 28;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36;
assert (v f3 < pow2 52);
assert (v f4 = v s3 / pow2 16);
Math.Lemmas.lemma_div_lt (v s3) 64 16;
assert (v f4 < pow2 48) | {
"checked_file": "Hacl.Spec.K256.Field52.Lemmas1.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.K256.MathLemmas.fst.checked",
"Hacl.Spec.K256.Field52.Definitions.fst.checked",
"Hacl.Spec.K256.Field52.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.Calc.fsti.checked"
],
"interface_file": false,
"source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst"
} | [
"lemma"
] | [
"Hacl.Spec.K256.Field52.Definitions.felem4",
"Hacl.Spec.K256.Field52.Definitions.felem5",
"Lib.IntTypes.uint64",
"Prims._assert",
"Prims.b2t",
"Prims.op_LessThan",
"Lib.IntTypes.v",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"Prims.pow2",
"Prims.unit",
"FStar.Math.Lemmas.lemma_div_lt",
"Prims.op_Equality",
"Prims.int",
"Prims.op_Division",
"Hacl.Spec.K256.MathLemmas.lemma_a_div_b_plus_c_mod_d_mul_e"
] | [] | module Hacl.Spec.K256.Field52.Lemmas1
open FStar.Mul
open Lib.IntTypes
module S = Spec.K256
include Hacl.Spec.K256.Field52.Definitions
include Hacl.Spec.K256.Field52
module ML = Hacl.Spec.K256.MathLemmas
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
/// Load and store functions
val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s)
let load_felem5_lemma_as_nat s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
Math.Lemmas.euclidean_division_definition (v s0) (pow2 52);
assert_norm (pow2 12 * pow2 52 = pow2 64);
assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64);
Math.Lemmas.euclidean_division_definition (v s1) (pow2 40);
assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128);
assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128);
Math.Lemmas.euclidean_division_definition (v s2) (pow2 25);
assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192);
assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192);
Math.Lemmas.euclidean_division_definition (v s3) (pow2 16);
assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192)
val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1)) | false | false | Hacl.Spec.K256.Field52.Lemmas1.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1)) | [] | Hacl.Spec.K256.Field52.Lemmas1.load_felem5_lemma_fits | {
"file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | s: Hacl.Spec.K256.Field52.Definitions.felem4 -> f: Hacl.Spec.K256.Field52.Definitions.felem5
-> FStar.Pervasives.Lemma
(requires
(let _ = s in
(let FStar.Pervasives.Native.Mktuple4 #_ #_ #_ #_ s0 s1 s2 s3 = _ in
let _ = f in
(let FStar.Pervasives.Native.Mktuple5 #_ #_ #_ #_ #_ f0 f1 f2 f3 f4 = _ in
Lib.IntTypes.v f0 == Lib.IntTypes.v s0 % Prims.pow2 52 /\
Lib.IntTypes.v f1 ==
Lib.IntTypes.v s0 / Prims.pow2 52 +
(Lib.IntTypes.v s1 % Prims.pow2 40) * Prims.pow2 12 /\
Lib.IntTypes.v f2 =
Lib.IntTypes.v s1 / Prims.pow2 40 +
(Lib.IntTypes.v s2 % Prims.pow2 28) * Prims.pow2 24 /\
Lib.IntTypes.v f3 =
Lib.IntTypes.v s2 / Prims.pow2 28 +
(Lib.IntTypes.v s3 % Prims.pow2 16) * Prims.pow2 36 /\
Lib.IntTypes.v f4 = Lib.IntTypes.v s3 / Prims.pow2 16)
<:
Type0)
<:
Type0)) (ensures Hacl.Spec.K256.Field52.Definitions.felem_fits5 f (1, 1, 1, 1, 1)) | {
"end_col": 25,
"end_line": 74,
"start_col": 32,
"start_line": 55
} |
FStar.Pervasives.Lemma | val mul15_lemma_last1: ma:scale64_last -> mb:nat -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ v b <= mb /\ ma * mb <= 65536)
(ensures v (a *. b) == v a * v b /\ felem_fits_last1 (a *. b) (ma * mb)) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.MathLemmas",
"short_module": "ML"
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mul15_lemma_last1 ma mb a b =
assert (v a * v b <= (ma * mb) * max48);
Math.Lemmas.lemma_mult_le_right max48 (ma * mb) 65536;
assert (v a * v b <= 65536 * max48);
assert_norm (65536 * max48 < pow2 64);
Math.Lemmas.small_mod (v a * v b) (pow2 64) | val mul15_lemma_last1: ma:scale64_last -> mb:nat -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ v b <= mb /\ ma * mb <= 65536)
(ensures v (a *. b) == v a * v b /\ felem_fits_last1 (a *. b) (ma * mb))
let mul15_lemma_last1 ma mb a b = | false | null | true | assert (v a * v b <= (ma * mb) * max48);
Math.Lemmas.lemma_mult_le_right max48 (ma * mb) 65536;
assert (v a * v b <= 65536 * max48);
assert_norm (65536 * max48 < pow2 64);
Math.Lemmas.small_mod (v a * v b) (pow2 64) | {
"checked_file": "Hacl.Spec.K256.Field52.Lemmas1.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.K256.MathLemmas.fst.checked",
"Hacl.Spec.K256.Field52.Definitions.fst.checked",
"Hacl.Spec.K256.Field52.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.Calc.fsti.checked"
],
"interface_file": false,
"source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst"
} | [
"lemma"
] | [
"Hacl.Spec.K256.Field52.Definitions.scale64_last",
"Prims.nat",
"Lib.IntTypes.uint64",
"FStar.Math.Lemmas.small_mod",
"FStar.Mul.op_Star",
"Lib.IntTypes.v",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"Prims.pow2",
"Prims.unit",
"FStar.Pervasives.assert_norm",
"Prims.b2t",
"Prims.op_LessThan",
"Hacl.Spec.K256.Field52.Definitions.max48",
"Prims._assert",
"Prims.op_LessThanOrEqual",
"FStar.Math.Lemmas.lemma_mult_le_right"
] | [] | module Hacl.Spec.K256.Field52.Lemmas1
open FStar.Mul
open Lib.IntTypes
module S = Spec.K256
include Hacl.Spec.K256.Field52.Definitions
include Hacl.Spec.K256.Field52
module ML = Hacl.Spec.K256.MathLemmas
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
/// Load and store functions
val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s)
let load_felem5_lemma_as_nat s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
Math.Lemmas.euclidean_division_definition (v s0) (pow2 52);
assert_norm (pow2 12 * pow2 52 = pow2 64);
assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64);
Math.Lemmas.euclidean_division_definition (v s1) (pow2 40);
assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128);
assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128);
Math.Lemmas.euclidean_division_definition (v s2) (pow2 25);
assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192);
assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192);
Math.Lemmas.euclidean_division_definition (v s3) (pow2 16);
assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192)
val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1))
let load_felem5_lemma_fits s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
assert (v f0 < pow2 52);
Math.Lemmas.lemma_div_lt (v s0) 64 52;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12;
assert (v f1 < pow2 52);
Math.Lemmas.lemma_div_lt (v s1) 64 40;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24;
assert (v f2 < pow2 52);
Math.Lemmas.lemma_div_lt (v s2) 64 28;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36;
assert (v f3 < pow2 52);
assert (v f4 = v s3 / pow2 16);
Math.Lemmas.lemma_div_lt (v s3) 64 16;
assert (v f4 < pow2 48)
val load_felem5_lemma: s:felem4 ->
Lemma (let f = load_felem5 s in
felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s)
let load_felem5_lemma s =
assert_norm (v mask52 = pow2 52 - 1);
assert_norm (0xffffffffff = pow2 40 - 1);
assert_norm (0xfffffff = pow2 28 - 1);
assert_norm (0xffff = pow2 16 - 1);
let (s0,s1,s2,s3) = s in
let f0 = s0 &. mask52 in // s0 % pow2 52
mod_mask_lemma s0 52ul;
assert (v (mod_mask #U64 #SEC 52ul) == v mask52);
assert (v f0 = v s0 % pow2 52);
let f11 = s0 >>. 52ul in
let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in
let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12
Math.Lemmas.lemma_div_lt (v s0) 64 52;
//assert (v f11 < pow2 12);
mod_mask_lemma s1 40ul;
assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64;
//assert (v f12 == v s1 % pow2 40 * pow2 12);
Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12);
logor_disjoint f11 f12 12;
assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12);
let f21 = s1 >>. 40ul in
let f22 = (s2 &. u64 0xfffffff) <<. 24ul in
let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24
Math.Lemmas.lemma_div_lt (v s1) 64 40;
//assert (v f21 < pow2 24);
mod_mask_lemma s2 28ul;
assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64;
//assert (v f22 == v s2 % pow2 28 * pow2 24);
Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24);
logor_disjoint f21 f22 24;
assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24);
let f31 = s2 >>. 28ul in
let f32 = (s3 &. u64 0xffff) <<. 36ul in
let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36
Math.Lemmas.lemma_div_lt (v s2) 64 28;
//assert (v f31 < pow2 36);
mod_mask_lemma s3 16ul;
assert (v (mod_mask #U64 #SEC 16ul) == 0xffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64;
//assert (v f32 == v s3 % pow2 16 * pow2 36);
Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36);
logor_disjoint f31 f32 36;
assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36);
let f4 = s3 >>. 16ul in // s3 / pow2 16
assert (v f4 = v s3 / pow2 16);
let f = (f0,f1,f2,f3,f4) in
load_felem5_lemma_as_nat s f;
load_felem5_lemma_fits s f
val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma
(requires
(let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
felem_fits5 f (1,1,1,1,1) /\
v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\
v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\
v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\
v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16))
(ensures as_nat4 s == as_nat5 f)
let store_felem5_lemma_as_nat f s =
let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192);
calc (==) {
v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { }
v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 }
v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208;
(==) { Math.Lemmas.small_mod (v f4) (pow2 48) }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208;
}
val store_felem5_lemma: f:felem5 -> Lemma
(requires felem_fits5 f (1,1,1,1,1))
(ensures as_nat4 (store_felem5 f) == as_nat5 f)
let store_felem5_lemma f =
let (f0,f1,f2,f3,f4) = f in
let o0 = f0 |. (f1 <<. 52ul) in
//assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52;
//assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52);
Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52);
logor_disjoint f0 (f1 <<. 52ul) 52;
assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52);
let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in
//assert (v (f1 >>. 12ul) == v f1 / pow2 12);
Math.Lemmas.lemma_div_lt (v f1) 52 12;
//assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40;
assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40);
Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40);
logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40;
assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40);
let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in
Math.Lemmas.lemma_div_lt (v f2) 52 24;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28;
//assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28);
Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28);
logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28;
assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28);
let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in
Math.Lemmas.lemma_div_lt (v f3) 52 36;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16;
//assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16);
Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16);
logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16;
assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16);
store_felem5_lemma_as_nat f (o0,o1,o2,o3)
/// Addition and multiplication by a digit
val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096)
(ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb))
let add5_lemma1 ma mb a b =
assert (v a + v b <= (ma + mb) * max52);
Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096;
assert (v a + v b <= 4096 * max52);
assert_norm (4096 * max52 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64)
val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536)
(ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb))
let add5_lemma_last1 ma mb a b =
assert (v a + v b <= (ma + mb) * max48);
Math.Lemmas.lemma_mult_le_right max48 (ma + mb) 65536;
assert (v a + v b <= 65536 * max48);
assert_norm (65536 * max48 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64)
val add5_lemma: m1:scale64_5 -> m2:scale64_5 -> f1:felem5 -> f2:felem5 -> Lemma
(requires felem_fits5 f1 m1 /\ felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096,4096,4096,4096,65536))
(ensures (let r = add5 f1 f2 in
as_nat5 r == as_nat5 f1 + as_nat5 f2 /\ felem_fits5 r (m1 +* m2)))
let add5_lemma m1 m2 f1 f2 =
let (a0,a1,a2,a3,a4) = f1 in
let (b0,b1,b2,b3,b4) = f2 in
let (ma0,ma1,ma2,ma3,ma4) = m1 in
let (mb0,mb1,mb2,mb3,mb4) = m2 in
add5_lemma1 ma0 mb0 a0 b0;
add5_lemma1 ma1 mb1 a1 b1;
add5_lemma1 ma2 mb2 a2 b2;
add5_lemma1 ma3 mb3 a3 b3;
add5_lemma_last1 ma4 mb4 a4 b4
val mul15_lemma1: ma:scale64 -> mb:nat -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ v b <= mb /\ ma * mb <= 4096)
(ensures v (a *. b) == v a * v b /\ felem_fits1 (a *. b) (ma * mb))
let mul15_lemma1 ma mb a b =
assert (v a * v b <= (ma * mb) * max52);
Math.Lemmas.lemma_mult_le_right max52 (ma * mb) 4096;
assert (v a * v b <= 4096 * max52);
assert_norm (4096 * max52 < pow2 64);
Math.Lemmas.small_mod (v a * v b) (pow2 64)
val mul15_lemma_last1: ma:scale64_last -> mb:nat -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ v b <= mb /\ ma * mb <= 65536)
(ensures v (a *. b) == v a * v b /\ felem_fits_last1 (a *. b) (ma * mb)) | false | false | Hacl.Spec.K256.Field52.Lemmas1.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mul15_lemma_last1: ma:scale64_last -> mb:nat -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ v b <= mb /\ ma * mb <= 65536)
(ensures v (a *. b) == v a * v b /\ felem_fits_last1 (a *. b) (ma * mb)) | [] | Hacl.Spec.K256.Field52.Lemmas1.mul15_lemma_last1 | {
"file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
ma: Hacl.Spec.K256.Field52.Definitions.scale64_last ->
mb: Prims.nat ->
a: Lib.IntTypes.uint64 ->
b: Lib.IntTypes.uint64
-> FStar.Pervasives.Lemma
(requires
Hacl.Spec.K256.Field52.Definitions.felem_fits_last1 a ma /\ Lib.IntTypes.v b <= mb /\
ma * mb <= 65536)
(ensures
Lib.IntTypes.v (a *. b) == Lib.IntTypes.v a * Lib.IntTypes.v b /\
Hacl.Spec.K256.Field52.Definitions.felem_fits_last1 (a *. b) (ma * mb)) | {
"end_col": 45,
"end_line": 277,
"start_col": 2,
"start_line": 273
} |
FStar.Pervasives.Lemma | val mul15_lemma1: ma:scale64 -> mb:nat -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ v b <= mb /\ ma * mb <= 4096)
(ensures v (a *. b) == v a * v b /\ felem_fits1 (a *. b) (ma * mb)) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.MathLemmas",
"short_module": "ML"
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mul15_lemma1 ma mb a b =
assert (v a * v b <= (ma * mb) * max52);
Math.Lemmas.lemma_mult_le_right max52 (ma * mb) 4096;
assert (v a * v b <= 4096 * max52);
assert_norm (4096 * max52 < pow2 64);
Math.Lemmas.small_mod (v a * v b) (pow2 64) | val mul15_lemma1: ma:scale64 -> mb:nat -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ v b <= mb /\ ma * mb <= 4096)
(ensures v (a *. b) == v a * v b /\ felem_fits1 (a *. b) (ma * mb))
let mul15_lemma1 ma mb a b = | false | null | true | assert (v a * v b <= (ma * mb) * max52);
Math.Lemmas.lemma_mult_le_right max52 (ma * mb) 4096;
assert (v a * v b <= 4096 * max52);
assert_norm (4096 * max52 < pow2 64);
Math.Lemmas.small_mod (v a * v b) (pow2 64) | {
"checked_file": "Hacl.Spec.K256.Field52.Lemmas1.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.K256.MathLemmas.fst.checked",
"Hacl.Spec.K256.Field52.Definitions.fst.checked",
"Hacl.Spec.K256.Field52.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.Calc.fsti.checked"
],
"interface_file": false,
"source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst"
} | [
"lemma"
] | [
"Hacl.Spec.K256.Field52.Definitions.scale64",
"Prims.nat",
"Lib.IntTypes.uint64",
"FStar.Math.Lemmas.small_mod",
"FStar.Mul.op_Star",
"Lib.IntTypes.v",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"Prims.pow2",
"Prims.unit",
"FStar.Pervasives.assert_norm",
"Prims.b2t",
"Prims.op_LessThan",
"Hacl.Spec.K256.Field52.Definitions.max52",
"Prims._assert",
"Prims.op_LessThanOrEqual",
"FStar.Math.Lemmas.lemma_mult_le_right"
] | [] | module Hacl.Spec.K256.Field52.Lemmas1
open FStar.Mul
open Lib.IntTypes
module S = Spec.K256
include Hacl.Spec.K256.Field52.Definitions
include Hacl.Spec.K256.Field52
module ML = Hacl.Spec.K256.MathLemmas
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
/// Load and store functions
val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s)
let load_felem5_lemma_as_nat s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
Math.Lemmas.euclidean_division_definition (v s0) (pow2 52);
assert_norm (pow2 12 * pow2 52 = pow2 64);
assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64);
Math.Lemmas.euclidean_division_definition (v s1) (pow2 40);
assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128);
assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128);
Math.Lemmas.euclidean_division_definition (v s2) (pow2 25);
assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192);
assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192);
Math.Lemmas.euclidean_division_definition (v s3) (pow2 16);
assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192)
val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1))
let load_felem5_lemma_fits s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
assert (v f0 < pow2 52);
Math.Lemmas.lemma_div_lt (v s0) 64 52;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12;
assert (v f1 < pow2 52);
Math.Lemmas.lemma_div_lt (v s1) 64 40;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24;
assert (v f2 < pow2 52);
Math.Lemmas.lemma_div_lt (v s2) 64 28;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36;
assert (v f3 < pow2 52);
assert (v f4 = v s3 / pow2 16);
Math.Lemmas.lemma_div_lt (v s3) 64 16;
assert (v f4 < pow2 48)
val load_felem5_lemma: s:felem4 ->
Lemma (let f = load_felem5 s in
felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s)
let load_felem5_lemma s =
assert_norm (v mask52 = pow2 52 - 1);
assert_norm (0xffffffffff = pow2 40 - 1);
assert_norm (0xfffffff = pow2 28 - 1);
assert_norm (0xffff = pow2 16 - 1);
let (s0,s1,s2,s3) = s in
let f0 = s0 &. mask52 in // s0 % pow2 52
mod_mask_lemma s0 52ul;
assert (v (mod_mask #U64 #SEC 52ul) == v mask52);
assert (v f0 = v s0 % pow2 52);
let f11 = s0 >>. 52ul in
let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in
let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12
Math.Lemmas.lemma_div_lt (v s0) 64 52;
//assert (v f11 < pow2 12);
mod_mask_lemma s1 40ul;
assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64;
//assert (v f12 == v s1 % pow2 40 * pow2 12);
Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12);
logor_disjoint f11 f12 12;
assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12);
let f21 = s1 >>. 40ul in
let f22 = (s2 &. u64 0xfffffff) <<. 24ul in
let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24
Math.Lemmas.lemma_div_lt (v s1) 64 40;
//assert (v f21 < pow2 24);
mod_mask_lemma s2 28ul;
assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64;
//assert (v f22 == v s2 % pow2 28 * pow2 24);
Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24);
logor_disjoint f21 f22 24;
assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24);
let f31 = s2 >>. 28ul in
let f32 = (s3 &. u64 0xffff) <<. 36ul in
let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36
Math.Lemmas.lemma_div_lt (v s2) 64 28;
//assert (v f31 < pow2 36);
mod_mask_lemma s3 16ul;
assert (v (mod_mask #U64 #SEC 16ul) == 0xffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64;
//assert (v f32 == v s3 % pow2 16 * pow2 36);
Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36);
logor_disjoint f31 f32 36;
assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36);
let f4 = s3 >>. 16ul in // s3 / pow2 16
assert (v f4 = v s3 / pow2 16);
let f = (f0,f1,f2,f3,f4) in
load_felem5_lemma_as_nat s f;
load_felem5_lemma_fits s f
val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma
(requires
(let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
felem_fits5 f (1,1,1,1,1) /\
v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\
v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\
v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\
v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16))
(ensures as_nat4 s == as_nat5 f)
let store_felem5_lemma_as_nat f s =
let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192);
calc (==) {
v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { }
v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 }
v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208;
(==) { Math.Lemmas.small_mod (v f4) (pow2 48) }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208;
}
val store_felem5_lemma: f:felem5 -> Lemma
(requires felem_fits5 f (1,1,1,1,1))
(ensures as_nat4 (store_felem5 f) == as_nat5 f)
let store_felem5_lemma f =
let (f0,f1,f2,f3,f4) = f in
let o0 = f0 |. (f1 <<. 52ul) in
//assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52;
//assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52);
Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52);
logor_disjoint f0 (f1 <<. 52ul) 52;
assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52);
let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in
//assert (v (f1 >>. 12ul) == v f1 / pow2 12);
Math.Lemmas.lemma_div_lt (v f1) 52 12;
//assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40;
assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40);
Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40);
logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40;
assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40);
let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in
Math.Lemmas.lemma_div_lt (v f2) 52 24;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28;
//assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28);
Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28);
logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28;
assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28);
let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in
Math.Lemmas.lemma_div_lt (v f3) 52 36;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16;
//assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16);
Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16);
logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16;
assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16);
store_felem5_lemma_as_nat f (o0,o1,o2,o3)
/// Addition and multiplication by a digit
val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096)
(ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb))
let add5_lemma1 ma mb a b =
assert (v a + v b <= (ma + mb) * max52);
Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096;
assert (v a + v b <= 4096 * max52);
assert_norm (4096 * max52 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64)
val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536)
(ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb))
let add5_lemma_last1 ma mb a b =
assert (v a + v b <= (ma + mb) * max48);
Math.Lemmas.lemma_mult_le_right max48 (ma + mb) 65536;
assert (v a + v b <= 65536 * max48);
assert_norm (65536 * max48 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64)
val add5_lemma: m1:scale64_5 -> m2:scale64_5 -> f1:felem5 -> f2:felem5 -> Lemma
(requires felem_fits5 f1 m1 /\ felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096,4096,4096,4096,65536))
(ensures (let r = add5 f1 f2 in
as_nat5 r == as_nat5 f1 + as_nat5 f2 /\ felem_fits5 r (m1 +* m2)))
let add5_lemma m1 m2 f1 f2 =
let (a0,a1,a2,a3,a4) = f1 in
let (b0,b1,b2,b3,b4) = f2 in
let (ma0,ma1,ma2,ma3,ma4) = m1 in
let (mb0,mb1,mb2,mb3,mb4) = m2 in
add5_lemma1 ma0 mb0 a0 b0;
add5_lemma1 ma1 mb1 a1 b1;
add5_lemma1 ma2 mb2 a2 b2;
add5_lemma1 ma3 mb3 a3 b3;
add5_lemma_last1 ma4 mb4 a4 b4
val mul15_lemma1: ma:scale64 -> mb:nat -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ v b <= mb /\ ma * mb <= 4096)
(ensures v (a *. b) == v a * v b /\ felem_fits1 (a *. b) (ma * mb)) | false | false | Hacl.Spec.K256.Field52.Lemmas1.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mul15_lemma1: ma:scale64 -> mb:nat -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ v b <= mb /\ ma * mb <= 4096)
(ensures v (a *. b) == v a * v b /\ felem_fits1 (a *. b) (ma * mb)) | [] | Hacl.Spec.K256.Field52.Lemmas1.mul15_lemma1 | {
"file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
ma: Hacl.Spec.K256.Field52.Definitions.scale64 ->
mb: Prims.nat ->
a: Lib.IntTypes.uint64 ->
b: Lib.IntTypes.uint64
-> FStar.Pervasives.Lemma
(requires
Hacl.Spec.K256.Field52.Definitions.felem_fits1 a ma /\ Lib.IntTypes.v b <= mb /\
ma * mb <= 4096)
(ensures
Lib.IntTypes.v (a *. b) == Lib.IntTypes.v a * Lib.IntTypes.v b /\
Hacl.Spec.K256.Field52.Definitions.felem_fits1 (a *. b) (ma * mb)) | {
"end_col": 45,
"end_line": 265,
"start_col": 2,
"start_line": 261
} |
FStar.Pervasives.Lemma | val load_felem5_lemma: s:felem4 ->
Lemma (let f = load_felem5 s in
felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.MathLemmas",
"short_module": "ML"
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let load_felem5_lemma s =
assert_norm (v mask52 = pow2 52 - 1);
assert_norm (0xffffffffff = pow2 40 - 1);
assert_norm (0xfffffff = pow2 28 - 1);
assert_norm (0xffff = pow2 16 - 1);
let (s0,s1,s2,s3) = s in
let f0 = s0 &. mask52 in // s0 % pow2 52
mod_mask_lemma s0 52ul;
assert (v (mod_mask #U64 #SEC 52ul) == v mask52);
assert (v f0 = v s0 % pow2 52);
let f11 = s0 >>. 52ul in
let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in
let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12
Math.Lemmas.lemma_div_lt (v s0) 64 52;
//assert (v f11 < pow2 12);
mod_mask_lemma s1 40ul;
assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64;
//assert (v f12 == v s1 % pow2 40 * pow2 12);
Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12);
logor_disjoint f11 f12 12;
assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12);
let f21 = s1 >>. 40ul in
let f22 = (s2 &. u64 0xfffffff) <<. 24ul in
let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24
Math.Lemmas.lemma_div_lt (v s1) 64 40;
//assert (v f21 < pow2 24);
mod_mask_lemma s2 28ul;
assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64;
//assert (v f22 == v s2 % pow2 28 * pow2 24);
Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24);
logor_disjoint f21 f22 24;
assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24);
let f31 = s2 >>. 28ul in
let f32 = (s3 &. u64 0xffff) <<. 36ul in
let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36
Math.Lemmas.lemma_div_lt (v s2) 64 28;
//assert (v f31 < pow2 36);
mod_mask_lemma s3 16ul;
assert (v (mod_mask #U64 #SEC 16ul) == 0xffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64;
//assert (v f32 == v s3 % pow2 16 * pow2 36);
Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36);
logor_disjoint f31 f32 36;
assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36);
let f4 = s3 >>. 16ul in // s3 / pow2 16
assert (v f4 = v s3 / pow2 16);
let f = (f0,f1,f2,f3,f4) in
load_felem5_lemma_as_nat s f;
load_felem5_lemma_fits s f | val load_felem5_lemma: s:felem4 ->
Lemma (let f = load_felem5 s in
felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s)
let load_felem5_lemma s = | false | null | true | assert_norm (v mask52 = pow2 52 - 1);
assert_norm (0xffffffffff = pow2 40 - 1);
assert_norm (0xfffffff = pow2 28 - 1);
assert_norm (0xffff = pow2 16 - 1);
let s0, s1, s2, s3 = s in
let f0 = s0 &. mask52 in
mod_mask_lemma s0 52ul;
assert (v (mod_mask #U64 #SEC 52ul) == v mask52);
assert (v f0 = v s0 % pow2 52);
let f11 = s0 >>. 52ul in
let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in
let f1 = f11 |. f12 in
Math.Lemmas.lemma_div_lt (v s0) 64 52;
mod_mask_lemma s1 40ul;
assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64;
Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12);
logor_disjoint f11 f12 12;
assert (v f1 = v s0 / pow2 52 + (v s1 % pow2 40) * pow2 12);
let f21 = s1 >>. 40ul in
let f22 = (s2 &. u64 0xfffffff) <<. 24ul in
let f2 = f21 |. f22 in
Math.Lemmas.lemma_div_lt (v s1) 64 40;
mod_mask_lemma s2 28ul;
assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64;
Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24);
logor_disjoint f21 f22 24;
assert (v f2 = v s1 / pow2 40 + (v s2 % pow2 28) * pow2 24);
let f31 = s2 >>. 28ul in
let f32 = (s3 &. u64 0xffff) <<. 36ul in
let f3 = f31 |. f32 in
Math.Lemmas.lemma_div_lt (v s2) 64 28;
mod_mask_lemma s3 16ul;
assert (v (mod_mask #U64 #SEC 16ul) == 0xffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64;
Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36);
logor_disjoint f31 f32 36;
assert (v f3 = v s2 / pow2 28 + (v s3 % pow2 16) * pow2 36);
let f4 = s3 >>. 16ul in
assert (v f4 = v s3 / pow2 16);
let f = (f0, f1, f2, f3, f4) in
load_felem5_lemma_as_nat s f;
load_felem5_lemma_fits s f | {
"checked_file": "Hacl.Spec.K256.Field52.Lemmas1.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.K256.MathLemmas.fst.checked",
"Hacl.Spec.K256.Field52.Definitions.fst.checked",
"Hacl.Spec.K256.Field52.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.Calc.fsti.checked"
],
"interface_file": false,
"source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst"
} | [
"lemma"
] | [
"Hacl.Spec.K256.Field52.Definitions.felem4",
"Lib.IntTypes.uint64",
"Hacl.Spec.K256.Field52.Lemmas1.load_felem5_lemma_fits",
"Prims.unit",
"Hacl.Spec.K256.Field52.Lemmas1.load_felem5_lemma_as_nat",
"FStar.Pervasives.Native.tuple5",
"Lib.IntTypes.int_t",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"FStar.Pervasives.Native.Mktuple5",
"Prims._assert",
"Prims.b2t",
"Prims.op_Equality",
"Prims.int",
"Lib.IntTypes.v",
"Prims.op_Division",
"Prims.pow2",
"Lib.IntTypes.op_Greater_Greater_Dot",
"FStar.UInt32.__uint_to_t",
"Prims.op_Addition",
"FStar.Mul.op_Star",
"Prims.op_Modulus",
"Lib.IntTypes.logor_disjoint",
"FStar.Math.Lemmas.cancel_mul_mod",
"Hacl.Spec.K256.MathLemmas.lemma_a_mod_b_mul_c_mod_d",
"Prims.eq2",
"Lib.IntTypes.mod_mask",
"Lib.IntTypes.mod_mask_lemma",
"FStar.Math.Lemmas.lemma_div_lt",
"Lib.IntTypes.op_Bar_Dot",
"Lib.IntTypes.op_Less_Less_Dot",
"Lib.IntTypes.op_Amp_Dot",
"Lib.IntTypes.u64",
"Lib.IntTypes.range_t",
"Hacl.Spec.K256.Field52.Definitions.mask52",
"FStar.Pervasives.assert_norm",
"Prims.op_Subtraction"
] | [] | module Hacl.Spec.K256.Field52.Lemmas1
open FStar.Mul
open Lib.IntTypes
module S = Spec.K256
include Hacl.Spec.K256.Field52.Definitions
include Hacl.Spec.K256.Field52
module ML = Hacl.Spec.K256.MathLemmas
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
/// Load and store functions
val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s)
let load_felem5_lemma_as_nat s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
Math.Lemmas.euclidean_division_definition (v s0) (pow2 52);
assert_norm (pow2 12 * pow2 52 = pow2 64);
assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64);
Math.Lemmas.euclidean_division_definition (v s1) (pow2 40);
assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128);
assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128);
Math.Lemmas.euclidean_division_definition (v s2) (pow2 25);
assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192);
assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192);
Math.Lemmas.euclidean_division_definition (v s3) (pow2 16);
assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192)
val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1))
let load_felem5_lemma_fits s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
assert (v f0 < pow2 52);
Math.Lemmas.lemma_div_lt (v s0) 64 52;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12;
assert (v f1 < pow2 52);
Math.Lemmas.lemma_div_lt (v s1) 64 40;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24;
assert (v f2 < pow2 52);
Math.Lemmas.lemma_div_lt (v s2) 64 28;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36;
assert (v f3 < pow2 52);
assert (v f4 = v s3 / pow2 16);
Math.Lemmas.lemma_div_lt (v s3) 64 16;
assert (v f4 < pow2 48)
val load_felem5_lemma: s:felem4 ->
Lemma (let f = load_felem5 s in
felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s) | false | false | Hacl.Spec.K256.Field52.Lemmas1.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val load_felem5_lemma: s:felem4 ->
Lemma (let f = load_felem5 s in
felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s) | [] | Hacl.Spec.K256.Field52.Lemmas1.load_felem5_lemma | {
"file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | s: Hacl.Spec.K256.Field52.Definitions.felem4
-> FStar.Pervasives.Lemma
(ensures
(let f = Hacl.Spec.K256.Field52.load_felem5 s in
Hacl.Spec.K256.Field52.Definitions.felem_fits5 f (1, 1, 1, 1, 1) /\
Hacl.Spec.K256.Field52.Definitions.as_nat5 f == Hacl.Spec.K256.Field52.Definitions.as_nat4 s
)) | {
"end_col": 28,
"end_line": 137,
"start_col": 2,
"start_line": 82
} |
FStar.Pervasives.Lemma | val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.MathLemmas",
"short_module": "ML"
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let load_felem5_lemma_as_nat s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
Math.Lemmas.euclidean_division_definition (v s0) (pow2 52);
assert_norm (pow2 12 * pow2 52 = pow2 64);
assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64);
Math.Lemmas.euclidean_division_definition (v s1) (pow2 40);
assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128);
assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128);
Math.Lemmas.euclidean_division_definition (v s2) (pow2 25);
assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192);
assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192);
Math.Lemmas.euclidean_division_definition (v s3) (pow2 16);
assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192) | val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s)
let load_felem5_lemma_as_nat s f = | false | null | true | let s0, s1, s2, s3 = s in
let f0, f1, f2, f3, f4 = f in
Math.Lemmas.euclidean_division_definition (v s0) (pow2 52);
assert_norm (pow2 12 * pow2 52 = pow2 64);
assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64);
Math.Lemmas.euclidean_division_definition (v s1) (pow2 40);
assert_norm ((pow2 24 * pow2 52) * pow2 52 = pow2 128);
assert_norm ((pow2 52 * pow2 52) * pow2 52 = pow2 28 * pow2 128);
Math.Lemmas.euclidean_division_definition (v s2) (pow2 25);
assert_norm (((pow2 36 * pow2 52) * pow2 52) * pow2 52 = pow2 192);
assert_norm (((pow2 52 * pow2 52) * pow2 52) * pow2 52 = pow2 16 * pow2 192);
Math.Lemmas.euclidean_division_definition (v s3) (pow2 16);
assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192) | {
"checked_file": "Hacl.Spec.K256.Field52.Lemmas1.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.K256.MathLemmas.fst.checked",
"Hacl.Spec.K256.Field52.Definitions.fst.checked",
"Hacl.Spec.K256.Field52.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.Calc.fsti.checked"
],
"interface_file": false,
"source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst"
} | [
"lemma"
] | [
"Hacl.Spec.K256.Field52.Definitions.felem4",
"Hacl.Spec.K256.Field52.Definitions.felem5",
"Lib.IntTypes.uint64",
"Prims._assert",
"Prims.eq2",
"Prims.int",
"Hacl.Spec.K256.Field52.Definitions.as_nat5",
"Prims.op_Addition",
"Lib.IntTypes.v",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"FStar.Mul.op_Star",
"Prims.pow2",
"Prims.unit",
"FStar.Math.Lemmas.euclidean_division_definition",
"FStar.Pervasives.assert_norm",
"Prims.b2t",
"Prims.op_Equality"
] | [] | module Hacl.Spec.K256.Field52.Lemmas1
open FStar.Mul
open Lib.IntTypes
module S = Spec.K256
include Hacl.Spec.K256.Field52.Definitions
include Hacl.Spec.K256.Field52
module ML = Hacl.Spec.K256.MathLemmas
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
/// Load and store functions
val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s) | false | false | Hacl.Spec.K256.Field52.Lemmas1.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s) | [] | Hacl.Spec.K256.Field52.Lemmas1.load_felem5_lemma_as_nat | {
"file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | s: Hacl.Spec.K256.Field52.Definitions.felem4 -> f: Hacl.Spec.K256.Field52.Definitions.felem5
-> FStar.Pervasives.Lemma
(requires
(let _ = s in
(let FStar.Pervasives.Native.Mktuple4 #_ #_ #_ #_ s0 s1 s2 s3 = _ in
let _ = f in
(let FStar.Pervasives.Native.Mktuple5 #_ #_ #_ #_ #_ f0 f1 f2 f3 f4 = _ in
Lib.IntTypes.v f0 == Lib.IntTypes.v s0 % Prims.pow2 52 /\
Lib.IntTypes.v f1 ==
Lib.IntTypes.v s0 / Prims.pow2 52 +
(Lib.IntTypes.v s1 % Prims.pow2 40) * Prims.pow2 12 /\
Lib.IntTypes.v f2 ==
Lib.IntTypes.v s1 / Prims.pow2 40 +
(Lib.IntTypes.v s2 % Prims.pow2 28) * Prims.pow2 24 /\
Lib.IntTypes.v f3 ==
Lib.IntTypes.v s2 / Prims.pow2 28 +
(Lib.IntTypes.v s3 % Prims.pow2 16) * Prims.pow2 36 /\
Lib.IntTypes.v f4 == Lib.IntTypes.v s3 / Prims.pow2 16)
<:
Type0)
<:
Type0))
(ensures
Hacl.Spec.K256.Field52.Definitions.as_nat5 f == Hacl.Spec.K256.Field52.Definitions.as_nat4 s
) | {
"end_col": 81,
"end_line": 41,
"start_col": 34,
"start_line": 28
} |
FStar.Pervasives.Lemma | val add5_lemma: m1:scale64_5 -> m2:scale64_5 -> f1:felem5 -> f2:felem5 -> Lemma
(requires felem_fits5 f1 m1 /\ felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096,4096,4096,4096,65536))
(ensures (let r = add5 f1 f2 in
as_nat5 r == as_nat5 f1 + as_nat5 f2 /\ felem_fits5 r (m1 +* m2))) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.MathLemmas",
"short_module": "ML"
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let add5_lemma m1 m2 f1 f2 =
let (a0,a1,a2,a3,a4) = f1 in
let (b0,b1,b2,b3,b4) = f2 in
let (ma0,ma1,ma2,ma3,ma4) = m1 in
let (mb0,mb1,mb2,mb3,mb4) = m2 in
add5_lemma1 ma0 mb0 a0 b0;
add5_lemma1 ma1 mb1 a1 b1;
add5_lemma1 ma2 mb2 a2 b2;
add5_lemma1 ma3 mb3 a3 b3;
add5_lemma_last1 ma4 mb4 a4 b4 | val add5_lemma: m1:scale64_5 -> m2:scale64_5 -> f1:felem5 -> f2:felem5 -> Lemma
(requires felem_fits5 f1 m1 /\ felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096,4096,4096,4096,65536))
(ensures (let r = add5 f1 f2 in
as_nat5 r == as_nat5 f1 + as_nat5 f2 /\ felem_fits5 r (m1 +* m2)))
let add5_lemma m1 m2 f1 f2 = | false | null | true | let a0, a1, a2, a3, a4 = f1 in
let b0, b1, b2, b3, b4 = f2 in
let ma0, ma1, ma2, ma3, ma4 = m1 in
let mb0, mb1, mb2, mb3, mb4 = m2 in
add5_lemma1 ma0 mb0 a0 b0;
add5_lemma1 ma1 mb1 a1 b1;
add5_lemma1 ma2 mb2 a2 b2;
add5_lemma1 ma3 mb3 a3 b3;
add5_lemma_last1 ma4 mb4 a4 b4 | {
"checked_file": "Hacl.Spec.K256.Field52.Lemmas1.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.K256.MathLemmas.fst.checked",
"Hacl.Spec.K256.Field52.Definitions.fst.checked",
"Hacl.Spec.K256.Field52.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.Calc.fsti.checked"
],
"interface_file": false,
"source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst"
} | [
"lemma"
] | [
"Hacl.Spec.K256.Field52.Definitions.scale64_5",
"Hacl.Spec.K256.Field52.Definitions.felem5",
"Lib.IntTypes.uint64",
"Prims.nat",
"Hacl.Spec.K256.Field52.Lemmas1.add5_lemma_last1",
"Prims.unit",
"Hacl.Spec.K256.Field52.Lemmas1.add5_lemma1"
] | [] | module Hacl.Spec.K256.Field52.Lemmas1
open FStar.Mul
open Lib.IntTypes
module S = Spec.K256
include Hacl.Spec.K256.Field52.Definitions
include Hacl.Spec.K256.Field52
module ML = Hacl.Spec.K256.MathLemmas
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
/// Load and store functions
val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s)
let load_felem5_lemma_as_nat s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
Math.Lemmas.euclidean_division_definition (v s0) (pow2 52);
assert_norm (pow2 12 * pow2 52 = pow2 64);
assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64);
Math.Lemmas.euclidean_division_definition (v s1) (pow2 40);
assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128);
assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128);
Math.Lemmas.euclidean_division_definition (v s2) (pow2 25);
assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192);
assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192);
Math.Lemmas.euclidean_division_definition (v s3) (pow2 16);
assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192)
val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1))
let load_felem5_lemma_fits s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
assert (v f0 < pow2 52);
Math.Lemmas.lemma_div_lt (v s0) 64 52;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12;
assert (v f1 < pow2 52);
Math.Lemmas.lemma_div_lt (v s1) 64 40;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24;
assert (v f2 < pow2 52);
Math.Lemmas.lemma_div_lt (v s2) 64 28;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36;
assert (v f3 < pow2 52);
assert (v f4 = v s3 / pow2 16);
Math.Lemmas.lemma_div_lt (v s3) 64 16;
assert (v f4 < pow2 48)
val load_felem5_lemma: s:felem4 ->
Lemma (let f = load_felem5 s in
felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s)
let load_felem5_lemma s =
assert_norm (v mask52 = pow2 52 - 1);
assert_norm (0xffffffffff = pow2 40 - 1);
assert_norm (0xfffffff = pow2 28 - 1);
assert_norm (0xffff = pow2 16 - 1);
let (s0,s1,s2,s3) = s in
let f0 = s0 &. mask52 in // s0 % pow2 52
mod_mask_lemma s0 52ul;
assert (v (mod_mask #U64 #SEC 52ul) == v mask52);
assert (v f0 = v s0 % pow2 52);
let f11 = s0 >>. 52ul in
let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in
let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12
Math.Lemmas.lemma_div_lt (v s0) 64 52;
//assert (v f11 < pow2 12);
mod_mask_lemma s1 40ul;
assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64;
//assert (v f12 == v s1 % pow2 40 * pow2 12);
Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12);
logor_disjoint f11 f12 12;
assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12);
let f21 = s1 >>. 40ul in
let f22 = (s2 &. u64 0xfffffff) <<. 24ul in
let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24
Math.Lemmas.lemma_div_lt (v s1) 64 40;
//assert (v f21 < pow2 24);
mod_mask_lemma s2 28ul;
assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64;
//assert (v f22 == v s2 % pow2 28 * pow2 24);
Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24);
logor_disjoint f21 f22 24;
assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24);
let f31 = s2 >>. 28ul in
let f32 = (s3 &. u64 0xffff) <<. 36ul in
let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36
Math.Lemmas.lemma_div_lt (v s2) 64 28;
//assert (v f31 < pow2 36);
mod_mask_lemma s3 16ul;
assert (v (mod_mask #U64 #SEC 16ul) == 0xffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64;
//assert (v f32 == v s3 % pow2 16 * pow2 36);
Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36);
logor_disjoint f31 f32 36;
assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36);
let f4 = s3 >>. 16ul in // s3 / pow2 16
assert (v f4 = v s3 / pow2 16);
let f = (f0,f1,f2,f3,f4) in
load_felem5_lemma_as_nat s f;
load_felem5_lemma_fits s f
val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma
(requires
(let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
felem_fits5 f (1,1,1,1,1) /\
v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\
v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\
v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\
v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16))
(ensures as_nat4 s == as_nat5 f)
let store_felem5_lemma_as_nat f s =
let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192);
calc (==) {
v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { }
v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 }
v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208;
(==) { Math.Lemmas.small_mod (v f4) (pow2 48) }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208;
}
val store_felem5_lemma: f:felem5 -> Lemma
(requires felem_fits5 f (1,1,1,1,1))
(ensures as_nat4 (store_felem5 f) == as_nat5 f)
let store_felem5_lemma f =
let (f0,f1,f2,f3,f4) = f in
let o0 = f0 |. (f1 <<. 52ul) in
//assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52;
//assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52);
Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52);
logor_disjoint f0 (f1 <<. 52ul) 52;
assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52);
let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in
//assert (v (f1 >>. 12ul) == v f1 / pow2 12);
Math.Lemmas.lemma_div_lt (v f1) 52 12;
//assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40;
assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40);
Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40);
logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40;
assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40);
let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in
Math.Lemmas.lemma_div_lt (v f2) 52 24;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28;
//assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28);
Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28);
logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28;
assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28);
let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in
Math.Lemmas.lemma_div_lt (v f3) 52 36;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16;
//assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16);
Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16);
logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16;
assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16);
store_felem5_lemma_as_nat f (o0,o1,o2,o3)
/// Addition and multiplication by a digit
val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096)
(ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb))
let add5_lemma1 ma mb a b =
assert (v a + v b <= (ma + mb) * max52);
Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096;
assert (v a + v b <= 4096 * max52);
assert_norm (4096 * max52 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64)
val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536)
(ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb))
let add5_lemma_last1 ma mb a b =
assert (v a + v b <= (ma + mb) * max48);
Math.Lemmas.lemma_mult_le_right max48 (ma + mb) 65536;
assert (v a + v b <= 65536 * max48);
assert_norm (65536 * max48 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64)
val add5_lemma: m1:scale64_5 -> m2:scale64_5 -> f1:felem5 -> f2:felem5 -> Lemma
(requires felem_fits5 f1 m1 /\ felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096,4096,4096,4096,65536))
(ensures (let r = add5 f1 f2 in
as_nat5 r == as_nat5 f1 + as_nat5 f2 /\ felem_fits5 r (m1 +* m2))) | false | false | Hacl.Spec.K256.Field52.Lemmas1.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val add5_lemma: m1:scale64_5 -> m2:scale64_5 -> f1:felem5 -> f2:felem5 -> Lemma
(requires felem_fits5 f1 m1 /\ felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096,4096,4096,4096,65536))
(ensures (let r = add5 f1 f2 in
as_nat5 r == as_nat5 f1 + as_nat5 f2 /\ felem_fits5 r (m1 +* m2))) | [] | Hacl.Spec.K256.Field52.Lemmas1.add5_lemma | {
"file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
m1: Hacl.Spec.K256.Field52.Definitions.scale64_5 ->
m2: Hacl.Spec.K256.Field52.Definitions.scale64_5 ->
f1: Hacl.Spec.K256.Field52.Definitions.felem5 ->
f2: Hacl.Spec.K256.Field52.Definitions.felem5
-> FStar.Pervasives.Lemma
(requires
Hacl.Spec.K256.Field52.Definitions.felem_fits5 f1 m1 /\
Hacl.Spec.K256.Field52.Definitions.felem_fits5 f2 m2 /\
m1 +* m2 <=* FStar.Pervasives.Native.Mktuple5 4096 4096 4096 4096 65536)
(ensures
(let r = Hacl.Spec.K256.Field52.add5 f1 f2 in
Hacl.Spec.K256.Field52.Definitions.as_nat5 r ==
Hacl.Spec.K256.Field52.Definitions.as_nat5 f1 +
Hacl.Spec.K256.Field52.Definitions.as_nat5 f2 /\
Hacl.Spec.K256.Field52.Definitions.felem_fits5 r (m1 +* m2))) | {
"end_col": 32,
"end_line": 253,
"start_col": 28,
"start_line": 244
} |
FStar.Pervasives.Lemma | val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma
(requires
(let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
felem_fits5 f (1,1,1,1,1) /\
v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\
v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\
v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\
v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16))
(ensures as_nat4 s == as_nat5 f) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.MathLemmas",
"short_module": "ML"
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let store_felem5_lemma_as_nat f s =
let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192);
calc (==) {
v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { }
v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 }
v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208;
(==) { Math.Lemmas.small_mod (v f4) (pow2 48) }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208;
} | val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma
(requires
(let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
felem_fits5 f (1,1,1,1,1) /\
v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\
v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\
v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\
v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16))
(ensures as_nat4 s == as_nat5 f)
let store_felem5_lemma_as_nat f s = | false | null | true | let f0, f1, f2, f3, f4 = f in
let s0, s1, s2, s3 = s in
assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192);
calc ( == ) {
v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
( == ) { () }
v f0 + (v f1 % pow2 12) * pow2 52 + (v f1 / pow2 12 + (v f2 % pow2 24) * pow2 40) * pow2 64 +
v s2 * pow2 128 +
v s3 * pow2 192;
( == ) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 }
v f0 + v f1 * pow2 52 + (v f2 % pow2 24) * pow2 104 +
(v f2 / pow2 24 + (v f3 % pow2 36) * pow2 28) * pow2 128 +
v s3 * pow2 192;
( == ) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + (v f3 % pow2 36) * pow2 156 +
(v f3 / pow2 36 + (v f4 % pow2 48) * pow2 16) * pow2 192;
( == ) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208;
( == ) { Math.Lemmas.small_mod (v f4) (pow2 48) }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208;
} | {
"checked_file": "Hacl.Spec.K256.Field52.Lemmas1.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.K256.MathLemmas.fst.checked",
"Hacl.Spec.K256.Field52.Definitions.fst.checked",
"Hacl.Spec.K256.Field52.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.Calc.fsti.checked"
],
"interface_file": false,
"source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst"
} | [
"lemma"
] | [
"Hacl.Spec.K256.Field52.Definitions.felem5",
"Hacl.Spec.K256.Field52.Definitions.felem4",
"Lib.IntTypes.uint64",
"FStar.Calc.calc_finish",
"Prims.int",
"Prims.eq2",
"Prims.op_Addition",
"Lib.IntTypes.v",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"FStar.Mul.op_Star",
"Prims.pow2",
"Prims.Cons",
"FStar.Preorder.relation",
"Prims.Nil",
"Prims.unit",
"FStar.Calc.calc_step",
"Prims.op_Modulus",
"Prims.op_Division",
"FStar.Calc.calc_init",
"FStar.Calc.calc_pack",
"Prims.squash",
"Hacl.Spec.K256.MathLemmas.lemma_a_mul_c_plus_d_mod_e_mul_f_g",
"FStar.Math.Lemmas.small_mod",
"Prims._assert",
"Hacl.Spec.K256.Field52.Definitions.as_nat4"
] | [] | module Hacl.Spec.K256.Field52.Lemmas1
open FStar.Mul
open Lib.IntTypes
module S = Spec.K256
include Hacl.Spec.K256.Field52.Definitions
include Hacl.Spec.K256.Field52
module ML = Hacl.Spec.K256.MathLemmas
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
/// Load and store functions
val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s)
let load_felem5_lemma_as_nat s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
Math.Lemmas.euclidean_division_definition (v s0) (pow2 52);
assert_norm (pow2 12 * pow2 52 = pow2 64);
assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64);
Math.Lemmas.euclidean_division_definition (v s1) (pow2 40);
assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128);
assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128);
Math.Lemmas.euclidean_division_definition (v s2) (pow2 25);
assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192);
assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192);
Math.Lemmas.euclidean_division_definition (v s3) (pow2 16);
assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192)
val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1))
let load_felem5_lemma_fits s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
assert (v f0 < pow2 52);
Math.Lemmas.lemma_div_lt (v s0) 64 52;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12;
assert (v f1 < pow2 52);
Math.Lemmas.lemma_div_lt (v s1) 64 40;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24;
assert (v f2 < pow2 52);
Math.Lemmas.lemma_div_lt (v s2) 64 28;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36;
assert (v f3 < pow2 52);
assert (v f4 = v s3 / pow2 16);
Math.Lemmas.lemma_div_lt (v s3) 64 16;
assert (v f4 < pow2 48)
val load_felem5_lemma: s:felem4 ->
Lemma (let f = load_felem5 s in
felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s)
let load_felem5_lemma s =
assert_norm (v mask52 = pow2 52 - 1);
assert_norm (0xffffffffff = pow2 40 - 1);
assert_norm (0xfffffff = pow2 28 - 1);
assert_norm (0xffff = pow2 16 - 1);
let (s0,s1,s2,s3) = s in
let f0 = s0 &. mask52 in // s0 % pow2 52
mod_mask_lemma s0 52ul;
assert (v (mod_mask #U64 #SEC 52ul) == v mask52);
assert (v f0 = v s0 % pow2 52);
let f11 = s0 >>. 52ul in
let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in
let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12
Math.Lemmas.lemma_div_lt (v s0) 64 52;
//assert (v f11 < pow2 12);
mod_mask_lemma s1 40ul;
assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64;
//assert (v f12 == v s1 % pow2 40 * pow2 12);
Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12);
logor_disjoint f11 f12 12;
assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12);
let f21 = s1 >>. 40ul in
let f22 = (s2 &. u64 0xfffffff) <<. 24ul in
let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24
Math.Lemmas.lemma_div_lt (v s1) 64 40;
//assert (v f21 < pow2 24);
mod_mask_lemma s2 28ul;
assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64;
//assert (v f22 == v s2 % pow2 28 * pow2 24);
Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24);
logor_disjoint f21 f22 24;
assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24);
let f31 = s2 >>. 28ul in
let f32 = (s3 &. u64 0xffff) <<. 36ul in
let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36
Math.Lemmas.lemma_div_lt (v s2) 64 28;
//assert (v f31 < pow2 36);
mod_mask_lemma s3 16ul;
assert (v (mod_mask #U64 #SEC 16ul) == 0xffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64;
//assert (v f32 == v s3 % pow2 16 * pow2 36);
Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36);
logor_disjoint f31 f32 36;
assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36);
let f4 = s3 >>. 16ul in // s3 / pow2 16
assert (v f4 = v s3 / pow2 16);
let f = (f0,f1,f2,f3,f4) in
load_felem5_lemma_as_nat s f;
load_felem5_lemma_fits s f
val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma
(requires
(let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
felem_fits5 f (1,1,1,1,1) /\
v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\
v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\
v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\
v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16))
(ensures as_nat4 s == as_nat5 f) | false | false | Hacl.Spec.K256.Field52.Lemmas1.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma
(requires
(let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
felem_fits5 f (1,1,1,1,1) /\
v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\
v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\
v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\
v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16))
(ensures as_nat4 s == as_nat5 f) | [] | Hacl.Spec.K256.Field52.Lemmas1.store_felem5_lemma_as_nat | {
"file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | f: Hacl.Spec.K256.Field52.Definitions.felem5 -> s: Hacl.Spec.K256.Field52.Definitions.felem4
-> FStar.Pervasives.Lemma
(requires
(let _ = f in
(let FStar.Pervasives.Native.Mktuple5 #_ #_ #_ #_ #_ f0 f1 f2 f3 f4 = _ in
let _ = s in
(let FStar.Pervasives.Native.Mktuple4 #_ #_ #_ #_ s0 s1 s2 s3 = _ in
Hacl.Spec.K256.Field52.Definitions.felem_fits5 f (1, 1, 1, 1, 1) /\
Lib.IntTypes.v s0 ==
Lib.IntTypes.v f0 + (Lib.IntTypes.v f1 % Prims.pow2 12) * Prims.pow2 52 /\
Lib.IntTypes.v s1 ==
Lib.IntTypes.v f1 / Prims.pow2 12 +
(Lib.IntTypes.v f2 % Prims.pow2 24) * Prims.pow2 40 /\
Lib.IntTypes.v s2 ==
Lib.IntTypes.v f2 / Prims.pow2 24 +
(Lib.IntTypes.v f3 % Prims.pow2 36) * Prims.pow2 28 /\
Lib.IntTypes.v s3 ==
Lib.IntTypes.v f3 / Prims.pow2 36 +
(Lib.IntTypes.v f4 % Prims.pow2 48) * Prims.pow2 16)
<:
Type0)
<:
Type0))
(ensures
Hacl.Spec.K256.Field52.Definitions.as_nat4 s == Hacl.Spec.K256.Field52.Definitions.as_nat5 f
) | {
"end_col": 5,
"end_line": 168,
"start_col": 35,
"start_line": 151
} |
FStar.Pervasives.Lemma | val mul15_lemma: m1:scale64_5 -> m2:nat -> f:felem5 -> c:uint64 -> Lemma
(requires felem_fits5 f m1 /\ v c <= m2 /\ m1 ** mk_nat5 m2 <=* (4096,4096,4096,4096,65536))
(ensures (let r = mul15 f c in
as_nat5 r == v c * as_nat5 f /\ felem_fits5 r (m1 ** mk_nat5 m2))) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.MathLemmas",
"short_module": "ML"
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52.Definitions",
"short_module": null
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.K256.Field52",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mul15_lemma m1 m2 f c =
let (f0,f1,f2,f3,f4) = f in
let (mf0,mf1,mf2,mf3,mf4) = m1 in
let (r0,r1,r2,r3,r4) = mul15 f c in
mul15_fits_lemma m1 m2 f c;
assert (felem_fits5 (r0,r1,r2,r3,r4) (m1 ** mk_nat5 m2));
calc (==) { //as_nat5 (r0,r1,r2,r3,r4);
v r0 + v r1 * pow52 + v r2 * pow104 + v r3 * pow156 + v r4 * pow208;
(==) { mul15_lemma1 mf0 m2 f0 c }
v c * v f0 + v r1 * pow52 + v r2 * pow104 + v r3 * pow156 + v r4 * pow208;
(==) { mul15_lemma1 mf1 m2 f1 c }
v c * v f0 + v c * v f1 * pow52 + v r2 * pow104 + v r3 * pow156 + v r4 * pow208;
(==) { mul15_lemma1 mf2 m2 f2 c }
v c * v f0 + v c * v f1 * pow52 + v c * v f2 * pow104 + v r3 * pow156 + v r4 * pow208;
(==) { mul15_lemma1 mf3 m2 f3 c }
v c * v f0 + v c * v f1 * pow52 + v c * v f2 * pow104 + v c * v f3 * pow156 + v r4 * pow208;
(==) { mul15_lemma_last1 mf4 m2 f4 c }
v c * v f0 + v c * v f1 * pow52 + v c * v f2 * pow104 + v c * v f3 * pow156 + v c * v f4 * pow208;
(==) { ML.lemma_distr5_pow52 (v c) (v f0) (v f1) (v f2) (v f3) (v f4) }
v c * (v f0 + v f1 * pow52 + v f2 * pow104 + v f3 * pow156 + v f4 * pow208);
};
assert (as_nat5 (r0,r1,r2,r3,r4) == v c * as_nat5 f) | val mul15_lemma: m1:scale64_5 -> m2:nat -> f:felem5 -> c:uint64 -> Lemma
(requires felem_fits5 f m1 /\ v c <= m2 /\ m1 ** mk_nat5 m2 <=* (4096,4096,4096,4096,65536))
(ensures (let r = mul15 f c in
as_nat5 r == v c * as_nat5 f /\ felem_fits5 r (m1 ** mk_nat5 m2)))
let mul15_lemma m1 m2 f c = | false | null | true | let f0, f1, f2, f3, f4 = f in
let mf0, mf1, mf2, mf3, mf4 = m1 in
let r0, r1, r2, r3, r4 = mul15 f c in
mul15_fits_lemma m1 m2 f c;
assert (felem_fits5 (r0, r1, r2, r3, r4) (m1 ** mk_nat5 m2));
calc ( == ) {
v r0 + v r1 * pow52 + v r2 * pow104 + v r3 * pow156 + v r4 * pow208;
( == ) { mul15_lemma1 mf0 m2 f0 c }
v c * v f0 + v r1 * pow52 + v r2 * pow104 + v r3 * pow156 + v r4 * pow208;
( == ) { mul15_lemma1 mf1 m2 f1 c }
v c * v f0 + (v c * v f1) * pow52 + v r2 * pow104 + v r3 * pow156 + v r4 * pow208;
( == ) { mul15_lemma1 mf2 m2 f2 c }
v c * v f0 + (v c * v f1) * pow52 + (v c * v f2) * pow104 + v r3 * pow156 + v r4 * pow208;
( == ) { mul15_lemma1 mf3 m2 f3 c }
v c * v f0 + (v c * v f1) * pow52 + (v c * v f2) * pow104 + (v c * v f3) * pow156 + v r4 * pow208;
( == ) { mul15_lemma_last1 mf4 m2 f4 c }
v c * v f0 + (v c * v f1) * pow52 + (v c * v f2) * pow104 + (v c * v f3) * pow156 +
(v c * v f4) * pow208;
( == ) { ML.lemma_distr5_pow52 (v c) (v f0) (v f1) (v f2) (v f3) (v f4) }
v c * (v f0 + v f1 * pow52 + v f2 * pow104 + v f3 * pow156 + v f4 * pow208);
};
assert (as_nat5 (r0, r1, r2, r3, r4) == v c * as_nat5 f) | {
"checked_file": "Hacl.Spec.K256.Field52.Lemmas1.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.K256.MathLemmas.fst.checked",
"Hacl.Spec.K256.Field52.Definitions.fst.checked",
"Hacl.Spec.K256.Field52.fst.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked",
"FStar.Calc.fsti.checked"
],
"interface_file": false,
"source_file": "Hacl.Spec.K256.Field52.Lemmas1.fst"
} | [
"lemma"
] | [
"Hacl.Spec.K256.Field52.Definitions.scale64_5",
"Prims.nat",
"Hacl.Spec.K256.Field52.Definitions.felem5",
"Lib.IntTypes.uint64",
"Prims._assert",
"Prims.eq2",
"Prims.int",
"Hacl.Spec.K256.Field52.Definitions.as_nat5",
"FStar.Pervasives.Native.Mktuple5",
"FStar.Mul.op_Star",
"Lib.IntTypes.v",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"Prims.unit",
"FStar.Calc.calc_finish",
"Prims.op_Addition",
"Hacl.Spec.K256.Field52.Definitions.pow52",
"Hacl.Spec.K256.Field52.Definitions.pow104",
"Hacl.Spec.K256.Field52.Definitions.pow156",
"Hacl.Spec.K256.Field52.Definitions.pow208",
"Prims.Cons",
"FStar.Preorder.relation",
"Prims.Nil",
"FStar.Calc.calc_step",
"FStar.Calc.calc_init",
"FStar.Calc.calc_pack",
"Hacl.Spec.K256.Field52.Lemmas1.mul15_lemma1",
"Prims.squash",
"Hacl.Spec.K256.Field52.Lemmas1.mul15_lemma_last1",
"Hacl.Spec.K256.MathLemmas.lemma_distr5_pow52",
"Hacl.Spec.K256.Field52.Definitions.felem_fits5",
"Hacl.Spec.K256.Field52.Definitions.op_Star_Star",
"Hacl.Spec.K256.Field52.Definitions.mk_nat5",
"Hacl.Spec.K256.Field52.Lemmas1.mul15_fits_lemma",
"Hacl.Spec.K256.Field52.mul15"
] | [] | module Hacl.Spec.K256.Field52.Lemmas1
open FStar.Mul
open Lib.IntTypes
module S = Spec.K256
include Hacl.Spec.K256.Field52.Definitions
include Hacl.Spec.K256.Field52
module ML = Hacl.Spec.K256.MathLemmas
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
/// Load and store functions
val load_felem5_lemma_as_nat: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 == v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 == v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 == v s3 / pow2 16))
(ensures as_nat5 f == as_nat4 s)
let load_felem5_lemma_as_nat s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
Math.Lemmas.euclidean_division_definition (v s0) (pow2 52);
assert_norm (pow2 12 * pow2 52 = pow2 64);
assert_norm (pow2 52 * pow2 52 = pow2 40 * pow2 64);
Math.Lemmas.euclidean_division_definition (v s1) (pow2 40);
assert_norm (pow2 24 * pow2 52 * pow2 52 = pow2 128);
assert_norm (pow2 52 * pow2 52 * pow2 52 = pow2 28 * pow2 128);
Math.Lemmas.euclidean_division_definition (v s2) (pow2 25);
assert_norm (pow2 36 * pow2 52 * pow2 52 * pow2 52 = pow2 192);
assert_norm (pow2 52 * pow2 52 * pow2 52 * pow2 52 = pow2 16 * pow2 192);
Math.Lemmas.euclidean_division_definition (v s3) (pow2 16);
assert (as_nat5 f == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192)
val load_felem5_lemma_fits: s:felem4 -> f:felem5 -> Lemma
(requires
(let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
v f0 == v s0 % pow2 52 /\
v f1 == v s0 / pow2 52 + v s1 % pow2 40 * pow2 12 /\
v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24 /\
v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36 /\
v f4 = v s3 / pow2 16))
(ensures felem_fits5 f (1,1,1,1,1))
let load_felem5_lemma_fits s f =
let (s0,s1,s2,s3) = s in
let (f0,f1,f2,f3,f4) = f in
assert (v f0 < pow2 52);
Math.Lemmas.lemma_div_lt (v s0) 64 52;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s0) 52 (v s1) 40 12;
assert (v f1 < pow2 52);
Math.Lemmas.lemma_div_lt (v s1) 64 40;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s1) 40 (v s2) 28 24;
assert (v f2 < pow2 52);
Math.Lemmas.lemma_div_lt (v s2) 64 28;
ML.lemma_a_div_b_plus_c_mod_d_mul_e (v s2) 28 (v s3) 16 36;
assert (v f3 < pow2 52);
assert (v f4 = v s3 / pow2 16);
Math.Lemmas.lemma_div_lt (v s3) 64 16;
assert (v f4 < pow2 48)
val load_felem5_lemma: s:felem4 ->
Lemma (let f = load_felem5 s in
felem_fits5 f (1,1,1,1,1) /\ as_nat5 f == as_nat4 s)
let load_felem5_lemma s =
assert_norm (v mask52 = pow2 52 - 1);
assert_norm (0xffffffffff = pow2 40 - 1);
assert_norm (0xfffffff = pow2 28 - 1);
assert_norm (0xffff = pow2 16 - 1);
let (s0,s1,s2,s3) = s in
let f0 = s0 &. mask52 in // s0 % pow2 52
mod_mask_lemma s0 52ul;
assert (v (mod_mask #U64 #SEC 52ul) == v mask52);
assert (v f0 = v s0 % pow2 52);
let f11 = s0 >>. 52ul in
let f12 = (s1 &. u64 0xffffffffff) <<. 12ul in
let f1 = f11 |. f12 in // s0 / pow2 52 + (s1 % pow2 40) * pow2 12
Math.Lemmas.lemma_div_lt (v s0) 64 52;
//assert (v f11 < pow2 12);
mod_mask_lemma s1 40ul;
assert (v (mod_mask #U64 #SEC 40ul) == 0xffffffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s1) 40 12 64;
//assert (v f12 == v s1 % pow2 40 * pow2 12);
Math.Lemmas.cancel_mul_mod (v s1 % pow2 40) (pow2 12);
logor_disjoint f11 f12 12;
assert (v f1 = v s0 / pow2 52 + v s1 % pow2 40 * pow2 12);
let f21 = s1 >>. 40ul in
let f22 = (s2 &. u64 0xfffffff) <<. 24ul in
let f2 = f21 |. f22 in // s1 / pow2 40 + (s2 % pow2 28) * pow2 24
Math.Lemmas.lemma_div_lt (v s1) 64 40;
//assert (v f21 < pow2 24);
mod_mask_lemma s2 28ul;
assert (v (mod_mask #U64 #SEC 28ul) == 0xfffffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s2) 28 24 64;
//assert (v f22 == v s2 % pow2 28 * pow2 24);
Math.Lemmas.cancel_mul_mod (v s2 % pow2 28) (pow2 24);
logor_disjoint f21 f22 24;
assert (v f2 = v s1 / pow2 40 + v s2 % pow2 28 * pow2 24);
let f31 = s2 >>. 28ul in
let f32 = (s3 &. u64 0xffff) <<. 36ul in
let f3 = f31 |. f32 in // s2 / pow2 28 + (s3 % pow2 16) * pow2 36
Math.Lemmas.lemma_div_lt (v s2) 64 28;
//assert (v f31 < pow2 36);
mod_mask_lemma s3 16ul;
assert (v (mod_mask #U64 #SEC 16ul) == 0xffff);
ML.lemma_a_mod_b_mul_c_mod_d (v s3) 16 36 64;
//assert (v f32 == v s3 % pow2 16 * pow2 36);
Math.Lemmas.cancel_mul_mod (v s3 % pow2 16) (pow2 36);
logor_disjoint f31 f32 36;
assert (v f3 = v s2 / pow2 28 + v s3 % pow2 16 * pow2 36);
let f4 = s3 >>. 16ul in // s3 / pow2 16
assert (v f4 = v s3 / pow2 16);
let f = (f0,f1,f2,f3,f4) in
load_felem5_lemma_as_nat s f;
load_felem5_lemma_fits s f
val store_felem5_lemma_as_nat: f:felem5 -> s:felem4 -> Lemma
(requires
(let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
felem_fits5 f (1,1,1,1,1) /\
v s0 == v f0 + v f1 % pow2 12 * pow2 52 /\
v s1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40 /\
v s2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28 /\
v s3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16))
(ensures as_nat4 s == as_nat5 f)
let store_felem5_lemma_as_nat f s =
let (f0,f1,f2,f3,f4) = f in
let (s0,s1,s2,s3) = s in
assert (as_nat4 s == v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192);
calc (==) {
v s0 + v s1 * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { }
v f0 + v f1 % pow2 12 * pow2 52 + (v f1 / pow2 12 + v f2 % pow2 24 * pow2 40) * pow2 64 + v s2 * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f1) 12 52 (v f2 % pow2 24) 40 64 }
v f0 + v f1 * pow2 52 + v f2 % pow2 24 * pow2 104 + (v f2 / pow2 24 + v f3 % pow2 36 * pow2 28) * pow2 128 + v s3 * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f2) 24 104 (v f3 % pow2 36) 28 128 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 % pow2 36 * pow2 156 + (v f3 / pow2 36 + v f4 % pow2 48 * pow2 16) * pow2 192;
(==) { ML.lemma_a_mul_c_plus_d_mod_e_mul_f_g (v f3) 36 156 (v f4 % pow2 48) 16 192 }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + (v f4 % pow2 48) * pow2 208;
(==) { Math.Lemmas.small_mod (v f4) (pow2 48) }
v f0 + v f1 * pow2 52 + v f2 * pow2 104 + v f3 * pow2 156 + v f4 * pow2 208;
}
val store_felem5_lemma: f:felem5 -> Lemma
(requires felem_fits5 f (1,1,1,1,1))
(ensures as_nat4 (store_felem5 f) == as_nat5 f)
let store_felem5_lemma f =
let (f0,f1,f2,f3,f4) = f in
let o0 = f0 |. (f1 <<. 52ul) in
//assert (v (f1 <<. 52ul) == v f1 * pow2 52 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f1) 64 52;
//assert (v (f1 <<. 52ul) == v f1 % pow2 12 * pow2 52);
Math.Lemmas.cancel_mul_mod (v f1 % pow2 12) (pow2 52);
logor_disjoint f0 (f1 <<. 52ul) 52;
assert (v o0 == v f0 + v f1 % pow2 12 * pow2 52);
let o1 = (f1 >>. 12ul) |. (f2 <<. 40ul) in
//assert (v (f1 >>. 12ul) == v f1 / pow2 12);
Math.Lemmas.lemma_div_lt (v f1) 52 12;
//assert (v (f2 <<. 40ul) == v f2 * pow2 40 % pow2 64);
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f2) 64 40;
assert (v (f2 <<. 40ul) == v f2 % pow2 24 * pow2 40);
Math.Lemmas.cancel_mul_mod (v f2 % pow2 24) (pow2 40);
logor_disjoint (f1 >>. 12ul) (f2 <<. 40ul) 40;
assert (v o1 == v f1 / pow2 12 + v f2 % pow2 24 * pow2 40);
let o2 = (f2 >>. 24ul) |. (f3 <<. 28ul) in
Math.Lemmas.lemma_div_lt (v f2) 52 24;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f3) 64 28;
//assert (v (f3 <<. 28ul) == v f3 % pow2 36 * pow2 28);
Math.Lemmas.cancel_mul_mod (v f3 % pow2 36) (pow2 28);
logor_disjoint (f2 >>. 24ul) (f3 <<. 28ul) 28;
assert (v o2 == v f2 / pow2 24 + v f3 % pow2 36 * pow2 28);
let o3 = (f3 >>. 36ul) |. (f4 <<. 16ul) in
Math.Lemmas.lemma_div_lt (v f3) 52 36;
Math.Lemmas.pow2_multiplication_modulo_lemma_2 (v f4) 64 16;
//assert (v (f4 <<. 16ul) == v f4 % pow2 48 * pow2 16);
Math.Lemmas.cancel_mul_mod (v f4 % pow2 48) (pow2 16);
logor_disjoint (f3 >>. 36ul) (f4 <<. 16ul) 16;
assert (v o3 == v f3 / pow2 36 + v f4 % pow2 48 * pow2 16);
store_felem5_lemma_as_nat f (o0,o1,o2,o3)
/// Addition and multiplication by a digit
val add5_lemma1: ma:scale64 -> mb:scale64 -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ felem_fits1 b mb /\ ma + mb <= 4096)
(ensures v (a +. b) == v a + v b /\ felem_fits1 (a +. b) (ma + mb))
let add5_lemma1 ma mb a b =
assert (v a + v b <= (ma + mb) * max52);
Math.Lemmas.lemma_mult_le_right max52 (ma + mb) 4096;
assert (v a + v b <= 4096 * max52);
assert_norm (4096 * max52 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64)
val add5_lemma_last1: ma:scale64_last -> mb:scale64_last -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ felem_fits_last1 b mb /\ ma + mb <= 65536)
(ensures v (a +. b) == v a + v b /\ felem_fits_last1 (a +. b) (ma + mb))
let add5_lemma_last1 ma mb a b =
assert (v a + v b <= (ma + mb) * max48);
Math.Lemmas.lemma_mult_le_right max48 (ma + mb) 65536;
assert (v a + v b <= 65536 * max48);
assert_norm (65536 * max48 < pow2 64);
Math.Lemmas.small_mod (v a + v b) (pow2 64)
val add5_lemma: m1:scale64_5 -> m2:scale64_5 -> f1:felem5 -> f2:felem5 -> Lemma
(requires felem_fits5 f1 m1 /\ felem_fits5 f2 m2 /\ m1 +* m2 <=* (4096,4096,4096,4096,65536))
(ensures (let r = add5 f1 f2 in
as_nat5 r == as_nat5 f1 + as_nat5 f2 /\ felem_fits5 r (m1 +* m2)))
let add5_lemma m1 m2 f1 f2 =
let (a0,a1,a2,a3,a4) = f1 in
let (b0,b1,b2,b3,b4) = f2 in
let (ma0,ma1,ma2,ma3,ma4) = m1 in
let (mb0,mb1,mb2,mb3,mb4) = m2 in
add5_lemma1 ma0 mb0 a0 b0;
add5_lemma1 ma1 mb1 a1 b1;
add5_lemma1 ma2 mb2 a2 b2;
add5_lemma1 ma3 mb3 a3 b3;
add5_lemma_last1 ma4 mb4 a4 b4
val mul15_lemma1: ma:scale64 -> mb:nat -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits1 a ma /\ v b <= mb /\ ma * mb <= 4096)
(ensures v (a *. b) == v a * v b /\ felem_fits1 (a *. b) (ma * mb))
let mul15_lemma1 ma mb a b =
assert (v a * v b <= (ma * mb) * max52);
Math.Lemmas.lemma_mult_le_right max52 (ma * mb) 4096;
assert (v a * v b <= 4096 * max52);
assert_norm (4096 * max52 < pow2 64);
Math.Lemmas.small_mod (v a * v b) (pow2 64)
val mul15_lemma_last1: ma:scale64_last -> mb:nat -> a:uint64 -> b:uint64 -> Lemma
(requires felem_fits_last1 a ma /\ v b <= mb /\ ma * mb <= 65536)
(ensures v (a *. b) == v a * v b /\ felem_fits_last1 (a *. b) (ma * mb))
let mul15_lemma_last1 ma mb a b =
assert (v a * v b <= (ma * mb) * max48);
Math.Lemmas.lemma_mult_le_right max48 (ma * mb) 65536;
assert (v a * v b <= 65536 * max48);
assert_norm (65536 * max48 < pow2 64);
Math.Lemmas.small_mod (v a * v b) (pow2 64)
val mul15_fits_lemma: m1:scale64_5 -> m2:nat -> f:felem5 -> c:uint64 -> Lemma
(requires felem_fits5 f m1 /\ v c <= m2 /\ m1 ** mk_nat5 m2 <=* (4096,4096,4096,4096,65536))
(ensures felem_fits5 (mul15 f c) (m1 ** mk_nat5 m2))
let mul15_fits_lemma m1 m2 f c =
let (f0,f1,f2,f3,f4) = f in
let (mf0,mf1,mf2,mf3,mf4) = m1 in
let (r0,r1,r2,r3,r4) = mul15 f c in
mul15_lemma1 mf0 m2 f0 c;
assert (felem_fits1 r0 (mf0 * m2));
mul15_lemma1 mf1 m2 f1 c;
assert (felem_fits1 r1 (mf1 * m2));
mul15_lemma1 mf2 m2 f2 c;
assert (felem_fits1 r2 (mf2 * m2));
mul15_lemma1 mf3 m2 f3 c;
assert (felem_fits1 r3 (mf3 * m2));
mul15_lemma_last1 mf4 m2 f4 c;
assert (felem_fits_last1 r4 (mf4 * m2))
val mul15_lemma: m1:scale64_5 -> m2:nat -> f:felem5 -> c:uint64 -> Lemma
(requires felem_fits5 f m1 /\ v c <= m2 /\ m1 ** mk_nat5 m2 <=* (4096,4096,4096,4096,65536))
(ensures (let r = mul15 f c in
as_nat5 r == v c * as_nat5 f /\ felem_fits5 r (m1 ** mk_nat5 m2))) | false | false | Hacl.Spec.K256.Field52.Lemmas1.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mul15_lemma: m1:scale64_5 -> m2:nat -> f:felem5 -> c:uint64 -> Lemma
(requires felem_fits5 f m1 /\ v c <= m2 /\ m1 ** mk_nat5 m2 <=* (4096,4096,4096,4096,65536))
(ensures (let r = mul15 f c in
as_nat5 r == v c * as_nat5 f /\ felem_fits5 r (m1 ** mk_nat5 m2))) | [] | Hacl.Spec.K256.Field52.Lemmas1.mul15_lemma | {
"file_name": "code/k256/Hacl.Spec.K256.Field52.Lemmas1.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
m1: Hacl.Spec.K256.Field52.Definitions.scale64_5 ->
m2: Prims.nat ->
f: Hacl.Spec.K256.Field52.Definitions.felem5 ->
c: Lib.IntTypes.uint64
-> FStar.Pervasives.Lemma
(requires
Hacl.Spec.K256.Field52.Definitions.felem_fits5 f m1 /\ Lib.IntTypes.v c <= m2 /\
m1 ** Hacl.Spec.K256.Field52.Definitions.mk_nat5 m2 <=*
FStar.Pervasives.Native.Mktuple5 4096 4096 4096 4096 65536)
(ensures
(let r = Hacl.Spec.K256.Field52.mul15 f c in
Hacl.Spec.K256.Field52.Definitions.as_nat5 r ==
Lib.IntTypes.v c * Hacl.Spec.K256.Field52.Definitions.as_nat5 f /\
Hacl.Spec.K256.Field52.Definitions.felem_fits5 r
(m1 ** Hacl.Spec.K256.Field52.Definitions.mk_nat5 m2))) | {
"end_col": 54,
"end_line": 328,
"start_col": 27,
"start_line": 306
} |
Prims.Tot | val get_view (#b : Type) (v:buffer b) : view (buffer_src v) b | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let get_view #b v = Buffer?.v v | val get_view (#b : Type) (v:buffer b) : view (buffer_src v) b
let get_view #b v = | false | null | false | Buffer?.v v | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"total"
] | [
"LowStar.BufferView.Up.buffer",
"LowStar.BufferView.Up.__proj__Buffer__item__v",
"LowStar.BufferView.Up.view",
"LowStar.BufferView.Up.buffer_src"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val get_view (#b : Type) (v:buffer b) : view (buffer_src v) b | [] | LowStar.BufferView.Up.get_view | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | v: LowStar.BufferView.Up.buffer b
-> LowStar.BufferView.Up.view (LowStar.BufferView.Up.buffer_src v) b | {
"end_col": 31,
"end_line": 30,
"start_col": 20,
"start_line": 30
} |
Prims.Tot | val buffer_src (#dest:Type) (b:buffer dest) : Type0 | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let buffer_src #b bv = Buffer?.src bv | val buffer_src (#dest:Type) (b:buffer dest) : Type0
let buffer_src #b bv = | false | null | false | Buffer?.src bv | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"total"
] | [
"LowStar.BufferView.Up.buffer",
"LowStar.BufferView.Up.__proj__Buffer__item__src"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val buffer_src (#dest:Type) (b:buffer dest) : Type0 | [] | LowStar.BufferView.Up.buffer_src | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | b: LowStar.BufferView.Up.buffer dest -> Type0 | {
"end_col": 37,
"end_line": 28,
"start_col": 23,
"start_line": 28
} |
Prims.Tot | val as_down_buffer (#b:Type) (v:buffer b) : Down.buffer (buffer_src v) | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let as_down_buffer #b bv = Buffer?.down_buf bv | val as_down_buffer (#b:Type) (v:buffer b) : Down.buffer (buffer_src v)
let as_down_buffer #b bv = | false | null | false | Buffer?.down_buf bv | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"total"
] | [
"LowStar.BufferView.Up.buffer",
"LowStar.BufferView.Up.__proj__Buffer__item__down_buf",
"LowStar.BufferView.Down.buffer",
"LowStar.BufferView.Up.buffer_src"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val as_down_buffer (#b:Type) (v:buffer b) : Down.buffer (buffer_src v) | [] | LowStar.BufferView.Up.as_down_buffer | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | v: LowStar.BufferView.Up.buffer b
-> LowStar.BufferView.Down.buffer (LowStar.BufferView.Up.buffer_src v) | {
"end_col": 46,
"end_line": 29,
"start_col": 27,
"start_line": 29
} |
Prims.GTot | val upd (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot HS.mem | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let upd #b h vb i x
: GTot HS.mem
= upd' #b h vb i x | val upd (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot HS.mem
let upd #b h vb i x : GTot HS.mem = | false | null | false | upd' #b h vb i x | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"sometrivial"
] | [
"FStar.Monotonic.HyperStack.mem",
"LowStar.BufferView.Up.buffer",
"LowStar.BufferView.Up.live",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"LowStar.BufferView.Up.length",
"LowStar.BufferView.Up.upd'"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1"
let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n)
let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix))
})
= let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail
let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb})
: GTot b
= let v = get_view vb in
let _, es, _ = split_at_i vb i h in
View?.get v es
let upd' (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot (h':HS.mem{sel h' vb i == x})
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
let h' = Down.upd_seq h (as_down_buffer vb) s1 in
Down.upd_seq_spec h (as_down_buffer vb) s1;
assert (Down.as_seq h' (as_down_buffer vb) == s1);
let n = View?.n v in
assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n)));
assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x);
h'
let upd #b h vb i x | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val upd (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot HS.mem | [] | LowStar.BufferView.Up.upd | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
h: FStar.Monotonic.HyperStack.mem ->
vb: LowStar.BufferView.Up.buffer b {LowStar.BufferView.Up.live h vb} ->
i: Prims.nat{i < LowStar.BufferView.Up.length vb} ->
x: b
-> Prims.GTot FStar.Monotonic.HyperStack.mem | {
"end_col": 20,
"end_line": 98,
"start_col": 4,
"start_line": 98
} |
Prims.GTot | val mk_buffer (#src:Type0)
(#dest:Type0)
(b:Down.buffer src)
(v:view src dest{
Down.length b % View?.n v == 0
})
: GTot (buffer dest) | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mk_buffer #src #dest down_buf v = Buffer src down_buf v | val mk_buffer (#src:Type0)
(#dest:Type0)
(b:Down.buffer src)
(v:view src dest{
Down.length b % View?.n v == 0
})
: GTot (buffer dest)
let mk_buffer #src #dest down_buf v = | false | null | false | Buffer src down_buf v | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"sometrivial"
] | [
"LowStar.BufferView.Down.buffer",
"LowStar.BufferView.Up.view",
"Prims.eq2",
"Prims.int",
"Prims.op_Modulus",
"LowStar.BufferView.Down.length",
"LowStar.BufferView.Up.__proj__View__item__n",
"LowStar.BufferView.Up.Buffer",
"LowStar.BufferView.Up.buffer"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mk_buffer (#src:Type0)
(#dest:Type0)
(b:Down.buffer src)
(v:view src dest{
Down.length b % View?.n v == 0
})
: GTot (buffer dest) | [] | LowStar.BufferView.Up.mk_buffer | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
b: LowStar.BufferView.Down.buffer src ->
v: LowStar.BufferView.Up.view src dest {LowStar.BufferView.Down.length b % View?.n v == 0}
-> Prims.GTot (LowStar.BufferView.Up.buffer dest) | {
"end_col": 59,
"end_line": 26,
"start_col": 38,
"start_line": 26
} |
FStar.Pervasives.Lemma | val view_indexing (#b: _) (vb:buffer b) (i:nat{i < length vb})
: Lemma (let open FStar.Mul in
let n = View?.n (get_view vb) in
n <= length vb * n - i * n) | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n) | val view_indexing (#b: _) (vb:buffer b) (i:nat{i < length vb})
: Lemma (let open FStar.Mul in
let n = View?.n (get_view vb) in
n <= length vb * n - i * n)
let view_indexing #b vb i = | false | null | true | let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (- i) n;
let open FStar.Mul in
assert ((length vb + (- i)) * n = length vb * n + (- i) * n);
assert (length vb > i);
assert (length vb + (- i) > 0);
assert (n <= (length vb + (- i)) * n) | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"lemma"
] | [
"LowStar.BufferView.Up.buffer",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"LowStar.BufferView.Up.length",
"Prims._assert",
"Prims.op_LessThanOrEqual",
"FStar.Mul.op_Star",
"Prims.op_Addition",
"Prims.op_Minus",
"Prims.unit",
"Prims.op_GreaterThan",
"Prims.op_Equality",
"Prims.int",
"FStar.Math.Lemmas.distributivity_add_left",
"LowStar.BufferView.Up.length_eq",
"Prims.pos",
"LowStar.BufferView.Up.__proj__View__item__n",
"LowStar.BufferView.Up.buffer_src",
"LowStar.BufferView.Up.get_view"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1" | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val view_indexing (#b: _) (vb:buffer b) (i:nat{i < length vb})
: Lemma (let open FStar.Mul in
let n = View?.n (get_view vb) in
n <= length vb * n - i * n) | [] | LowStar.BufferView.Up.view_indexing | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | vb: LowStar.BufferView.Up.buffer b -> i: Prims.nat{i < LowStar.BufferView.Up.length vb}
-> FStar.Pervasives.Lemma
(ensures
(let n = View?.n (LowStar.BufferView.Up.get_view vb) in
n <= LowStar.BufferView.Up.length vb * n - i * n)) | {
"end_col": 40,
"end_line": 46,
"start_col": 3,
"start_line": 39
} |
Prims.GTot | val length (#b: _) (vb:buffer b)
: GTot nat | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb) | val length (#b: _) (vb:buffer b)
: GTot nat
let length #b vb = | false | null | false | Down.length (as_down_buffer vb) / View?.n (get_view vb) | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"sometrivial"
] | [
"LowStar.BufferView.Up.buffer",
"Prims.op_Division",
"LowStar.BufferView.Down.length",
"LowStar.BufferView.Up.buffer_src",
"LowStar.BufferView.Up.as_down_buffer",
"LowStar.BufferView.Up.__proj__View__item__n",
"LowStar.BufferView.Up.get_view",
"Prims.nat"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = () | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val length (#b: _) (vb:buffer b)
: GTot nat | [] | LowStar.BufferView.Up.length | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | vb: LowStar.BufferView.Up.buffer b -> Prims.GTot Prims.nat | {
"end_col": 57,
"end_line": 33,
"start_col": 2,
"start_line": 33
} |
Prims.GTot | val sel (#b: _)
(h:HS.mem)
(vb:buffer b)
(i:nat{i < length vb})
: GTot b | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb})
: GTot b
= let v = get_view vb in
let _, es, _ = split_at_i vb i h in
View?.get v es | val sel (#b: _)
(h:HS.mem)
(vb:buffer b)
(i:nat{i < length vb})
: GTot b
let sel (#b: _) (h: HS.mem) (vb: buffer b) (i: nat{i < length vb}) : GTot b = | false | null | false | let v = get_view vb in
let _, es, _ = split_at_i vb i h in
View?.get v es | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"sometrivial"
] | [
"FStar.Monotonic.HyperStack.mem",
"LowStar.BufferView.Up.buffer",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"LowStar.BufferView.Up.length",
"FStar.Seq.Base.seq",
"LowStar.BufferView.Up.buffer_src",
"FStar.Seq.Properties.lseq",
"LowStar.BufferView.Up.__proj__View__item__n",
"LowStar.BufferView.Up.get_view",
"LowStar.BufferView.Up.__proj__View__item__get",
"FStar.Pervasives.Native.tuple3",
"Prims.eq2",
"LowStar.BufferView.Down.as_seq",
"LowStar.BufferView.Up.as_down_buffer",
"FStar.Seq.Base.append",
"LowStar.BufferView.Up.split_at_i",
"LowStar.BufferView.Up.view"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1"
let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n)
let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix))
})
= let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail
let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val sel (#b: _)
(h:HS.mem)
(vb:buffer b)
(i:nat{i < length vb})
: GTot b | [] | LowStar.BufferView.Up.sel | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
h: FStar.Monotonic.HyperStack.mem ->
vb: LowStar.BufferView.Up.buffer b ->
i: Prims.nat{i < LowStar.BufferView.Up.length vb}
-> Prims.GTot b | {
"end_col": 19,
"end_line": 75,
"start_col": 4,
"start_line": 73
} |
FStar.Pervasives.Lemma | val lt_leq_mul (min: nat) (max: nat{min < max}) (n: nat)
: Lemma (let open FStar.Mul in min * n + n <= max * n) | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat)
: Lemma (FStar.Mul.(min * n + n <= max * n))
= let open FStar.Mul in
assert ((min * n) + n = (min + 1) * n);
assert ((min * n) + n <= max * n) | val lt_leq_mul (min: nat) (max: nat{min < max}) (n: nat)
: Lemma (let open FStar.Mul in min * n + n <= max * n)
let lt_leq_mul (min: nat) (max: nat{min < max}) (n: nat)
: Lemma (let open FStar.Mul in min * n + n <= max * n) = | false | null | true | let open FStar.Mul in
assert ((min * n) + n = (min + 1) * n);
assert ((min * n) + n <= max * n) | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"lemma"
] | [
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"Prims._assert",
"Prims.op_LessThanOrEqual",
"Prims.op_Addition",
"FStar.Mul.op_Star",
"Prims.unit",
"Prims.op_Equality",
"Prims.int",
"Prims.l_True",
"Prims.squash",
"Prims.Nil",
"FStar.Pervasives.pattern"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1"
let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n)
let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix))
})
= let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail
let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb})
: GTot b
= let v = get_view vb in
let _, es, _ = split_at_i vb i h in
View?.get v es
let upd' (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot (h':HS.mem{sel h' vb i == x})
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
let h' = Down.upd_seq h (as_down_buffer vb) s1 in
Down.upd_seq_spec h (as_down_buffer vb) s1;
assert (Down.as_seq h' (as_down_buffer vb) == s1);
let n = View?.n v in
assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n)));
assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x);
h'
let upd #b h vb i x
: GTot HS.mem
= upd' #b h vb i x
let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb i == x)
= ()
let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat) | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val lt_leq_mul (min: nat) (max: nat{min < max}) (n: nat)
: Lemma (let open FStar.Mul in min * n + n <= max * n) | [] | LowStar.BufferView.Up.lt_leq_mul | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | min: Prims.nat -> max: Prims.nat{min < max} -> n: Prims.nat
-> FStar.Pervasives.Lemma (ensures min * n + n <= max * n) | {
"end_col": 38,
"end_line": 108,
"start_col": 5,
"start_line": 106
} |
Prims.GTot | val as_seq (#b: _) (h:HS.mem) (vb:buffer b)
: GTot (Seq.lseq b (length vb)) | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let as_seq (#b: _) (h:HS.mem) (vb:buffer b) = as_seq' h vb 0 | val as_seq (#b: _) (h:HS.mem) (vb:buffer b)
: GTot (Seq.lseq b (length vb))
let as_seq (#b: _) (h: HS.mem) (vb: buffer b) = | false | null | false | as_seq' h vb 0 | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"sometrivial"
] | [
"FStar.Monotonic.HyperStack.mem",
"LowStar.BufferView.Up.buffer",
"LowStar.BufferView.Up.as_seq'",
"FStar.Seq.Properties.lseq",
"LowStar.BufferView.Up.length"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1"
let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n)
let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix))
})
= let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail
let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb})
: GTot b
= let v = get_view vb in
let _, es, _ = split_at_i vb i h in
View?.get v es
let upd' (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot (h':HS.mem{sel h' vb i == x})
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
let h' = Down.upd_seq h (as_down_buffer vb) s1 in
Down.upd_seq_spec h (as_down_buffer vb) s1;
assert (Down.as_seq h' (as_down_buffer vb) == s1);
let n = View?.n v in
assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n)));
assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x);
h'
let upd #b h vb i x
: GTot HS.mem
= upd' #b h vb i x
let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb i == x)
= ()
let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat)
: Lemma (FStar.Mul.(min * n + n <= max * n))
= let open FStar.Mul in
assert ((min * n) + n = (min + 1) * n);
assert ((min * n) + n <= max * n)
#set-options "--z3rlimit 20"
let sel_upd2 (#b:_) (vb:buffer b)
(i:nat{i < length vb})
(j:nat{j < length vb /\ i<>j})
(x:b)
(h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb j == sel h vb j)
= let open FStar.Mul in
let v = get_view vb in
view_indexing vb i;
view_indexing vb j;
let h' = upd h vb i x in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = Down.as_seq h' (as_down_buffer vb) in
let min = if i < j then i else j in
let max = if i < j then j else i in
let n = View?.n v in
lt_leq_mul min max n;
let min0, max0 =
Seq.slice s0 (min * n) ((min * n) + n),
Seq.slice s0 (max * n) ((max * n) + n)
in
let _, s_j, _ = split_at_i vb j h in
let min1, max1 =
Seq.slice s1 (min * n) ((min * n) + n),
Seq.slice s1 (max * n) ((max * n) + n)
in
let _, s_j', _ = split_at_i vb j h' in
let prefix, s_i, suffix = split_at_i vb i h in
Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix));
if i < j
then begin
assert (Seq.equal max0 s_j);
assert (Seq.equal max1 s_j');
assert (Seq.equal s_j s_j')
end
else begin
assert (Seq.equal min0 s_j);
assert (Seq.equal min1 s_j');
assert (Seq.equal s_j s_j')
end
let sel_upd #b vb i j x h =
if i=j then sel_upd1 vb i x h
else sel_upd2 vb i j x h
let lemma_upd_with_sel #b vb i h =
let v = get_view vb in
let prefix, es, suffix = split_at_i vb i h in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = prefix `Seq.append` (View?.put v (View?.get v es) `Seq.append` suffix) in
assert (Seq.equal s0 s1);
Down.upd_seq_spec h (as_down_buffer vb) s0
let upd_modifies #b h vb i x
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
Down.upd_seq_spec h (as_down_buffer vb) s1
let upd_equal_domains #b h vb i x
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
upd_modifies h vb i x;
Down.upd_seq_spec h (as_down_buffer vb) s1
let rec as_seq' (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i <= length vb})
: GTot (Seq.lseq b (length vb - i))
(decreases (length vb - i))
= let v = get_view vb in
if i = length vb
then Seq.empty
else let _ = view_indexing vb i in
let _, s_i, suffix = split_at_i vb i h in
View?.get v s_i `Seq.cons` as_seq' h vb (i + 1) | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 20,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val as_seq (#b: _) (h:HS.mem) (vb:buffer b)
: GTot (Seq.lseq b (length vb)) | [] | LowStar.BufferView.Up.as_seq | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | h: FStar.Monotonic.HyperStack.mem -> vb: LowStar.BufferView.Up.buffer b
-> Prims.GTot (FStar.Seq.Properties.lseq b (LowStar.BufferView.Up.length vb)) | {
"end_col": 60,
"end_line": 189,
"start_col": 46,
"start_line": 189
} |
FStar.Pervasives.Lemma | val upd_equal_domains (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: Lemma (FStar.HyperStack.ST.equal_domains h (upd h vb i x)) | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let upd_equal_domains #b h vb i x
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
upd_modifies h vb i x;
Down.upd_seq_spec h (as_down_buffer vb) s1 | val upd_equal_domains (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: Lemma (FStar.HyperStack.ST.equal_domains h (upd h vb i x))
let upd_equal_domains #b h vb i x = | false | null | true | let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` ((View?.put v x) `Seq.append` suffix) in
upd_modifies h vb i x;
Down.upd_seq_spec h (as_down_buffer vb) s1 | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"lemma"
] | [
"FStar.Monotonic.HyperStack.mem",
"LowStar.BufferView.Up.buffer",
"LowStar.BufferView.Up.live",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"LowStar.BufferView.Up.length",
"FStar.Seq.Base.seq",
"LowStar.BufferView.Up.buffer_src",
"FStar.Seq.Properties.lseq",
"LowStar.BufferView.Up.__proj__View__item__n",
"LowStar.BufferView.Up.get_view",
"LowStar.BufferView.Down.upd_seq_spec",
"LowStar.BufferView.Up.as_down_buffer",
"Prims.unit",
"LowStar.BufferView.Up.upd_modifies",
"FStar.Seq.Base.append",
"LowStar.BufferView.Up.__proj__View__item__put",
"FStar.Pervasives.Native.tuple3",
"Prims.eq2",
"LowStar.BufferView.Down.as_seq",
"LowStar.BufferView.Up.split_at_i",
"LowStar.BufferView.Up.view"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1"
let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n)
let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix))
})
= let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail
let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb})
: GTot b
= let v = get_view vb in
let _, es, _ = split_at_i vb i h in
View?.get v es
let upd' (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot (h':HS.mem{sel h' vb i == x})
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
let h' = Down.upd_seq h (as_down_buffer vb) s1 in
Down.upd_seq_spec h (as_down_buffer vb) s1;
assert (Down.as_seq h' (as_down_buffer vb) == s1);
let n = View?.n v in
assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n)));
assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x);
h'
let upd #b h vb i x
: GTot HS.mem
= upd' #b h vb i x
let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb i == x)
= ()
let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat)
: Lemma (FStar.Mul.(min * n + n <= max * n))
= let open FStar.Mul in
assert ((min * n) + n = (min + 1) * n);
assert ((min * n) + n <= max * n)
#set-options "--z3rlimit 20"
let sel_upd2 (#b:_) (vb:buffer b)
(i:nat{i < length vb})
(j:nat{j < length vb /\ i<>j})
(x:b)
(h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb j == sel h vb j)
= let open FStar.Mul in
let v = get_view vb in
view_indexing vb i;
view_indexing vb j;
let h' = upd h vb i x in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = Down.as_seq h' (as_down_buffer vb) in
let min = if i < j then i else j in
let max = if i < j then j else i in
let n = View?.n v in
lt_leq_mul min max n;
let min0, max0 =
Seq.slice s0 (min * n) ((min * n) + n),
Seq.slice s0 (max * n) ((max * n) + n)
in
let _, s_j, _ = split_at_i vb j h in
let min1, max1 =
Seq.slice s1 (min * n) ((min * n) + n),
Seq.slice s1 (max * n) ((max * n) + n)
in
let _, s_j', _ = split_at_i vb j h' in
let prefix, s_i, suffix = split_at_i vb i h in
Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix));
if i < j
then begin
assert (Seq.equal max0 s_j);
assert (Seq.equal max1 s_j');
assert (Seq.equal s_j s_j')
end
else begin
assert (Seq.equal min0 s_j);
assert (Seq.equal min1 s_j');
assert (Seq.equal s_j s_j')
end
let sel_upd #b vb i j x h =
if i=j then sel_upd1 vb i x h
else sel_upd2 vb i j x h
let lemma_upd_with_sel #b vb i h =
let v = get_view vb in
let prefix, es, suffix = split_at_i vb i h in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = prefix `Seq.append` (View?.put v (View?.get v es) `Seq.append` suffix) in
assert (Seq.equal s0 s1);
Down.upd_seq_spec h (as_down_buffer vb) s0
let upd_modifies #b h vb i x
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
Down.upd_seq_spec h (as_down_buffer vb) s1 | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 20,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val upd_equal_domains (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: Lemma (FStar.HyperStack.ST.equal_domains h (upd h vb i x)) | [] | LowStar.BufferView.Up.upd_equal_domains | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
h: FStar.Monotonic.HyperStack.mem ->
vb: LowStar.BufferView.Up.buffer b {LowStar.BufferView.Up.live h vb} ->
i: Prims.nat{i < LowStar.BufferView.Up.length vb} ->
x: b
-> FStar.Pervasives.Lemma
(ensures FStar.HyperStack.ST.equal_domains h (LowStar.BufferView.Up.upd h vb i x)) | {
"end_col": 46,
"end_line": 177,
"start_col": 4,
"start_line": 172
} |
FStar.Pervasives.Lemma | val sel_upd (#b:_)
(vb:buffer b)
(i:nat{i < length vb})
(j:nat{j < length vb})
(x:b)
(h:HS.mem{live h vb})
: Lemma (if i = j
then sel (upd h vb i x) vb j == x
else sel (upd h vb i x) vb j == sel h vb j)
[SMTPat (sel (upd h vb i x) vb j)] | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let sel_upd #b vb i j x h =
if i=j then sel_upd1 vb i x h
else sel_upd2 vb i j x h | val sel_upd (#b:_)
(vb:buffer b)
(i:nat{i < length vb})
(j:nat{j < length vb})
(x:b)
(h:HS.mem{live h vb})
: Lemma (if i = j
then sel (upd h vb i x) vb j == x
else sel (upd h vb i x) vb j == sel h vb j)
[SMTPat (sel (upd h vb i x) vb j)]
let sel_upd #b vb i j x h = | false | null | true | if i = j then sel_upd1 vb i x h else sel_upd2 vb i j x h | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"lemma"
] | [
"LowStar.BufferView.Up.buffer",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"LowStar.BufferView.Up.length",
"FStar.Monotonic.HyperStack.mem",
"LowStar.BufferView.Up.live",
"Prims.op_Equality",
"Prims.l_or",
"LowStar.BufferView.Up.sel_upd1",
"Prims.bool",
"LowStar.BufferView.Up.sel_upd2",
"Prims.unit"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1"
let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n)
let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix))
})
= let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail
let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb})
: GTot b
= let v = get_view vb in
let _, es, _ = split_at_i vb i h in
View?.get v es
let upd' (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot (h':HS.mem{sel h' vb i == x})
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
let h' = Down.upd_seq h (as_down_buffer vb) s1 in
Down.upd_seq_spec h (as_down_buffer vb) s1;
assert (Down.as_seq h' (as_down_buffer vb) == s1);
let n = View?.n v in
assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n)));
assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x);
h'
let upd #b h vb i x
: GTot HS.mem
= upd' #b h vb i x
let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb i == x)
= ()
let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat)
: Lemma (FStar.Mul.(min * n + n <= max * n))
= let open FStar.Mul in
assert ((min * n) + n = (min + 1) * n);
assert ((min * n) + n <= max * n)
#set-options "--z3rlimit 20"
let sel_upd2 (#b:_) (vb:buffer b)
(i:nat{i < length vb})
(j:nat{j < length vb /\ i<>j})
(x:b)
(h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb j == sel h vb j)
= let open FStar.Mul in
let v = get_view vb in
view_indexing vb i;
view_indexing vb j;
let h' = upd h vb i x in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = Down.as_seq h' (as_down_buffer vb) in
let min = if i < j then i else j in
let max = if i < j then j else i in
let n = View?.n v in
lt_leq_mul min max n;
let min0, max0 =
Seq.slice s0 (min * n) ((min * n) + n),
Seq.slice s0 (max * n) ((max * n) + n)
in
let _, s_j, _ = split_at_i vb j h in
let min1, max1 =
Seq.slice s1 (min * n) ((min * n) + n),
Seq.slice s1 (max * n) ((max * n) + n)
in
let _, s_j', _ = split_at_i vb j h' in
let prefix, s_i, suffix = split_at_i vb i h in
Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix));
if i < j
then begin
assert (Seq.equal max0 s_j);
assert (Seq.equal max1 s_j');
assert (Seq.equal s_j s_j')
end
else begin
assert (Seq.equal min0 s_j);
assert (Seq.equal min1 s_j');
assert (Seq.equal s_j s_j')
end | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 20,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val sel_upd (#b:_)
(vb:buffer b)
(i:nat{i < length vb})
(j:nat{j < length vb})
(x:b)
(h:HS.mem{live h vb})
: Lemma (if i = j
then sel (upd h vb i x) vb j == x
else sel (upd h vb i x) vb j == sel h vb j)
[SMTPat (sel (upd h vb i x) vb j)] | [] | LowStar.BufferView.Up.sel_upd | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
vb: LowStar.BufferView.Up.buffer b ->
i: Prims.nat{i < LowStar.BufferView.Up.length vb} ->
j: Prims.nat{j < LowStar.BufferView.Up.length vb} ->
x: b ->
h: FStar.Monotonic.HyperStack.mem{LowStar.BufferView.Up.live h vb}
-> FStar.Pervasives.Lemma
(ensures
((match i = j with
| true -> LowStar.BufferView.Up.sel (LowStar.BufferView.Up.upd h vb i x) vb j == x
| _ ->
LowStar.BufferView.Up.sel (LowStar.BufferView.Up.upd h vb i x) vb j ==
LowStar.BufferView.Up.sel h vb j)
<:
Type0)) [SMTPat (LowStar.BufferView.Up.sel (LowStar.BufferView.Up.upd h vb i x) vb j)] | {
"end_col": 28,
"end_line": 154,
"start_col": 4,
"start_line": 153
} |
Prims.GTot | val split_at_i (#b: _) (vb: buffer b) (i: nat{i < length vb}) (h: HS.mem)
: GTot
(frags:
(let src_t = buffer_src vb in
Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t)
{ let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix))
})
= let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail | val split_at_i (#b: _) (vb: buffer b) (i: nat{i < length vb}) (h: HS.mem)
: GTot
(frags:
(let src_t = buffer_src vb in
Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t)
{ let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) })
let split_at_i (#b: _) (vb: buffer b) (i: nat{i < length vb}) (h: HS.mem)
: GTot
(frags:
(let src_t = buffer_src vb in
Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t)
{ let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) = | false | null | false | let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"sometrivial"
] | [
"LowStar.BufferView.Up.buffer",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"LowStar.BufferView.Up.length",
"FStar.Monotonic.HyperStack.mem",
"FStar.Seq.Base.seq",
"LowStar.BufferView.Up.buffer_src",
"FStar.Pervasives.Native.Mktuple3",
"FStar.Seq.Properties.lseq",
"LowStar.BufferView.Up.__proj__View__item__n",
"LowStar.BufferView.Up.get_view",
"Prims.unit",
"FStar.Seq.Properties.lemma_split",
"FStar.Pervasives.Native.tuple3",
"Prims.eq2",
"LowStar.BufferView.Down.as_seq",
"LowStar.BufferView.Up.as_down_buffer",
"FStar.Seq.Base.append",
"FStar.Pervasives.Native.tuple2",
"FStar.Seq.Properties.split",
"LowStar.BufferView.Up.length_eq",
"LowStar.BufferView.Up.view_indexing",
"Prims.int",
"FStar.Mul.op_Star",
"Prims.pos",
"LowStar.BufferView.Up.view",
"LowStar.BufferView.Down.length"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1"
let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n)
let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix)) | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val split_at_i (#b: _) (vb: buffer b) (i: nat{i < length vb}) (h: HS.mem)
: GTot
(frags:
(let src_t = buffer_src vb in
Seq.seq src_t * Seq.lseq src_t (View?.n (get_view vb)) * Seq.seq src_t)
{ let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) == (prefix `Seq.append` (es `Seq.append` suffix)) }) | [] | LowStar.BufferView.Up.split_at_i | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
vb: LowStar.BufferView.Up.buffer b ->
i: Prims.nat{i < LowStar.BufferView.Up.length vb} ->
h: FStar.Monotonic.HyperStack.mem
-> Prims.GTot
(frags:
(let src_t = LowStar.BufferView.Up.buffer_src vb in
(FStar.Seq.Base.seq src_t *
FStar.Seq.Properties.lseq src_t (View?.n (LowStar.BufferView.Up.get_view vb))) *
FStar.Seq.Base.seq src_t)
{ let _ = frags in
(let FStar.Pervasives.Native.Mktuple3 #_ #_ #_ prefix es suffix = _ in
LowStar.BufferView.Down.as_seq h (LowStar.BufferView.Up.as_down_buffer vb) ==
FStar.Seq.Base.append prefix (FStar.Seq.Base.append es suffix))
<:
Type0 }) | {
"end_col": 22,
"end_line": 69,
"start_col": 6,
"start_line": 58
} |
FStar.Pervasives.Lemma | val upd_modifies (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: Lemma (ensures (modifies vb h (upd h vb i x) /\
live (upd h vb i x) vb))
[SMTPat (upd h vb i x)] | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let upd_modifies #b h vb i x
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
Down.upd_seq_spec h (as_down_buffer vb) s1 | val upd_modifies (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: Lemma (ensures (modifies vb h (upd h vb i x) /\
live (upd h vb i x) vb))
[SMTPat (upd h vb i x)]
let upd_modifies #b h vb i x = | false | null | true | let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` ((View?.put v x) `Seq.append` suffix) in
Down.upd_seq_spec h (as_down_buffer vb) s1 | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"lemma"
] | [
"FStar.Monotonic.HyperStack.mem",
"LowStar.BufferView.Up.buffer",
"LowStar.BufferView.Up.live",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"LowStar.BufferView.Up.length",
"FStar.Seq.Base.seq",
"LowStar.BufferView.Up.buffer_src",
"FStar.Seq.Properties.lseq",
"LowStar.BufferView.Up.__proj__View__item__n",
"LowStar.BufferView.Up.get_view",
"LowStar.BufferView.Down.upd_seq_spec",
"LowStar.BufferView.Up.as_down_buffer",
"FStar.Seq.Base.append",
"LowStar.BufferView.Up.__proj__View__item__put",
"Prims.unit",
"FStar.Pervasives.Native.tuple3",
"Prims.eq2",
"LowStar.BufferView.Down.as_seq",
"LowStar.BufferView.Up.split_at_i",
"LowStar.BufferView.Up.view"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1"
let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n)
let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix))
})
= let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail
let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb})
: GTot b
= let v = get_view vb in
let _, es, _ = split_at_i vb i h in
View?.get v es
let upd' (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot (h':HS.mem{sel h' vb i == x})
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
let h' = Down.upd_seq h (as_down_buffer vb) s1 in
Down.upd_seq_spec h (as_down_buffer vb) s1;
assert (Down.as_seq h' (as_down_buffer vb) == s1);
let n = View?.n v in
assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n)));
assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x);
h'
let upd #b h vb i x
: GTot HS.mem
= upd' #b h vb i x
let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb i == x)
= ()
let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat)
: Lemma (FStar.Mul.(min * n + n <= max * n))
= let open FStar.Mul in
assert ((min * n) + n = (min + 1) * n);
assert ((min * n) + n <= max * n)
#set-options "--z3rlimit 20"
let sel_upd2 (#b:_) (vb:buffer b)
(i:nat{i < length vb})
(j:nat{j < length vb /\ i<>j})
(x:b)
(h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb j == sel h vb j)
= let open FStar.Mul in
let v = get_view vb in
view_indexing vb i;
view_indexing vb j;
let h' = upd h vb i x in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = Down.as_seq h' (as_down_buffer vb) in
let min = if i < j then i else j in
let max = if i < j then j else i in
let n = View?.n v in
lt_leq_mul min max n;
let min0, max0 =
Seq.slice s0 (min * n) ((min * n) + n),
Seq.slice s0 (max * n) ((max * n) + n)
in
let _, s_j, _ = split_at_i vb j h in
let min1, max1 =
Seq.slice s1 (min * n) ((min * n) + n),
Seq.slice s1 (max * n) ((max * n) + n)
in
let _, s_j', _ = split_at_i vb j h' in
let prefix, s_i, suffix = split_at_i vb i h in
Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix));
if i < j
then begin
assert (Seq.equal max0 s_j);
assert (Seq.equal max1 s_j');
assert (Seq.equal s_j s_j')
end
else begin
assert (Seq.equal min0 s_j);
assert (Seq.equal min1 s_j');
assert (Seq.equal s_j s_j')
end
let sel_upd #b vb i j x h =
if i=j then sel_upd1 vb i x h
else sel_upd2 vb i j x h
let lemma_upd_with_sel #b vb i h =
let v = get_view vb in
let prefix, es, suffix = split_at_i vb i h in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = prefix `Seq.append` (View?.put v (View?.get v es) `Seq.append` suffix) in
assert (Seq.equal s0 s1);
Down.upd_seq_spec h (as_down_buffer vb) s0 | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 20,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val upd_modifies (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: Lemma (ensures (modifies vb h (upd h vb i x) /\
live (upd h vb i x) vb))
[SMTPat (upd h vb i x)] | [] | LowStar.BufferView.Up.upd_modifies | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
h: FStar.Monotonic.HyperStack.mem ->
vb: LowStar.BufferView.Up.buffer b {LowStar.BufferView.Up.live h vb} ->
i: Prims.nat{i < LowStar.BufferView.Up.length vb} ->
x: b
-> FStar.Pervasives.Lemma
(ensures
LowStar.BufferView.Up.modifies vb h (LowStar.BufferView.Up.upd h vb i x) /\
LowStar.BufferView.Up.live (LowStar.BufferView.Up.upd h vb i x) vb)
[SMTPat (LowStar.BufferView.Up.upd h vb i x)] | {
"end_col": 46,
"end_line": 169,
"start_col": 4,
"start_line": 165
} |
FStar.Pervasives.Lemma | val lemma_upd_with_sel (#b:_)
(vb:buffer b)
(i:nat{i < length vb})
(h:HS.mem{live h vb})
:Lemma (upd h vb i (sel h vb i) == h) | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let lemma_upd_with_sel #b vb i h =
let v = get_view vb in
let prefix, es, suffix = split_at_i vb i h in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = prefix `Seq.append` (View?.put v (View?.get v es) `Seq.append` suffix) in
assert (Seq.equal s0 s1);
Down.upd_seq_spec h (as_down_buffer vb) s0 | val lemma_upd_with_sel (#b:_)
(vb:buffer b)
(i:nat{i < length vb})
(h:HS.mem{live h vb})
:Lemma (upd h vb i (sel h vb i) == h)
let lemma_upd_with_sel #b vb i h = | false | null | true | let v = get_view vb in
let prefix, es, suffix = split_at_i vb i h in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = prefix `Seq.append` ((View?.put v (View?.get v es)) `Seq.append` suffix) in
assert (Seq.equal s0 s1);
Down.upd_seq_spec h (as_down_buffer vb) s0 | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"lemma"
] | [
"LowStar.BufferView.Up.buffer",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"LowStar.BufferView.Up.length",
"FStar.Monotonic.HyperStack.mem",
"LowStar.BufferView.Up.live",
"FStar.Seq.Base.seq",
"LowStar.BufferView.Up.buffer_src",
"FStar.Seq.Properties.lseq",
"LowStar.BufferView.Up.__proj__View__item__n",
"LowStar.BufferView.Up.get_view",
"LowStar.BufferView.Down.upd_seq_spec",
"LowStar.BufferView.Up.as_down_buffer",
"Prims.unit",
"Prims._assert",
"FStar.Seq.Base.equal",
"FStar.Seq.Base.append",
"LowStar.BufferView.Up.__proj__View__item__put",
"LowStar.BufferView.Up.__proj__View__item__get",
"LowStar.BufferView.Down.length",
"LowStar.BufferView.Down.as_seq",
"FStar.Pervasives.Native.tuple3",
"Prims.eq2",
"LowStar.BufferView.Up.split_at_i",
"LowStar.BufferView.Up.view"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1"
let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n)
let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix))
})
= let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail
let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb})
: GTot b
= let v = get_view vb in
let _, es, _ = split_at_i vb i h in
View?.get v es
let upd' (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot (h':HS.mem{sel h' vb i == x})
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
let h' = Down.upd_seq h (as_down_buffer vb) s1 in
Down.upd_seq_spec h (as_down_buffer vb) s1;
assert (Down.as_seq h' (as_down_buffer vb) == s1);
let n = View?.n v in
assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n)));
assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x);
h'
let upd #b h vb i x
: GTot HS.mem
= upd' #b h vb i x
let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb i == x)
= ()
let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat)
: Lemma (FStar.Mul.(min * n + n <= max * n))
= let open FStar.Mul in
assert ((min * n) + n = (min + 1) * n);
assert ((min * n) + n <= max * n)
#set-options "--z3rlimit 20"
let sel_upd2 (#b:_) (vb:buffer b)
(i:nat{i < length vb})
(j:nat{j < length vb /\ i<>j})
(x:b)
(h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb j == sel h vb j)
= let open FStar.Mul in
let v = get_view vb in
view_indexing vb i;
view_indexing vb j;
let h' = upd h vb i x in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = Down.as_seq h' (as_down_buffer vb) in
let min = if i < j then i else j in
let max = if i < j then j else i in
let n = View?.n v in
lt_leq_mul min max n;
let min0, max0 =
Seq.slice s0 (min * n) ((min * n) + n),
Seq.slice s0 (max * n) ((max * n) + n)
in
let _, s_j, _ = split_at_i vb j h in
let min1, max1 =
Seq.slice s1 (min * n) ((min * n) + n),
Seq.slice s1 (max * n) ((max * n) + n)
in
let _, s_j', _ = split_at_i vb j h' in
let prefix, s_i, suffix = split_at_i vb i h in
Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix));
if i < j
then begin
assert (Seq.equal max0 s_j);
assert (Seq.equal max1 s_j');
assert (Seq.equal s_j s_j')
end
else begin
assert (Seq.equal min0 s_j);
assert (Seq.equal min1 s_j');
assert (Seq.equal s_j s_j')
end
let sel_upd #b vb i j x h =
if i=j then sel_upd1 vb i x h
else sel_upd2 vb i j x h | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 20,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val lemma_upd_with_sel (#b:_)
(vb:buffer b)
(i:nat{i < length vb})
(h:HS.mem{live h vb})
:Lemma (upd h vb i (sel h vb i) == h) | [] | LowStar.BufferView.Up.lemma_upd_with_sel | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
vb: LowStar.BufferView.Up.buffer b ->
i: Prims.nat{i < LowStar.BufferView.Up.length vb} ->
h: FStar.Monotonic.HyperStack.mem{LowStar.BufferView.Up.live h vb}
-> FStar.Pervasives.Lemma
(ensures LowStar.BufferView.Up.upd h vb i (LowStar.BufferView.Up.sel h vb i) == h) | {
"end_col": 44,
"end_line": 162,
"start_col": 34,
"start_line": 156
} |
Prims.GTot | val as_seq' (#b: _) (h: HS.mem) (vb: buffer b) (i: nat{i <= length vb})
: GTot (Seq.lseq b (length vb - i)) (decreases (length vb - i)) | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let rec as_seq' (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i <= length vb})
: GTot (Seq.lseq b (length vb - i))
(decreases (length vb - i))
= let v = get_view vb in
if i = length vb
then Seq.empty
else let _ = view_indexing vb i in
let _, s_i, suffix = split_at_i vb i h in
View?.get v s_i `Seq.cons` as_seq' h vb (i + 1) | val as_seq' (#b: _) (h: HS.mem) (vb: buffer b) (i: nat{i <= length vb})
: GTot (Seq.lseq b (length vb - i)) (decreases (length vb - i))
let rec as_seq' (#b: _) (h: HS.mem) (vb: buffer b) (i: nat{i <= length vb})
: GTot (Seq.lseq b (length vb - i)) (decreases (length vb - i)) = | false | null | false | let v = get_view vb in
if i = length vb
then Seq.empty
else
let _ = view_indexing vb i in
let _, s_i, suffix = split_at_i vb i h in
(View?.get v s_i) `Seq.cons` (as_seq' h vb (i + 1)) | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"sometrivial",
""
] | [
"FStar.Monotonic.HyperStack.mem",
"LowStar.BufferView.Up.buffer",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThanOrEqual",
"LowStar.BufferView.Up.length",
"Prims.op_Equality",
"FStar.Seq.Base.empty",
"Prims.bool",
"FStar.Seq.Base.seq",
"LowStar.BufferView.Up.buffer_src",
"FStar.Seq.Properties.lseq",
"LowStar.BufferView.Up.__proj__View__item__n",
"LowStar.BufferView.Up.get_view",
"FStar.Seq.Properties.cons",
"LowStar.BufferView.Up.__proj__View__item__get",
"LowStar.BufferView.Up.as_seq'",
"Prims.op_Addition",
"Prims.op_Subtraction",
"FStar.Pervasives.Native.tuple3",
"Prims.eq2",
"LowStar.BufferView.Down.as_seq",
"LowStar.BufferView.Up.as_down_buffer",
"FStar.Seq.Base.append",
"LowStar.BufferView.Up.split_at_i",
"Prims.unit",
"LowStar.BufferView.Up.view_indexing",
"LowStar.BufferView.Up.view"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1"
let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n)
let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix))
})
= let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail
let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb})
: GTot b
= let v = get_view vb in
let _, es, _ = split_at_i vb i h in
View?.get v es
let upd' (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot (h':HS.mem{sel h' vb i == x})
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
let h' = Down.upd_seq h (as_down_buffer vb) s1 in
Down.upd_seq_spec h (as_down_buffer vb) s1;
assert (Down.as_seq h' (as_down_buffer vb) == s1);
let n = View?.n v in
assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n)));
assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x);
h'
let upd #b h vb i x
: GTot HS.mem
= upd' #b h vb i x
let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb i == x)
= ()
let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat)
: Lemma (FStar.Mul.(min * n + n <= max * n))
= let open FStar.Mul in
assert ((min * n) + n = (min + 1) * n);
assert ((min * n) + n <= max * n)
#set-options "--z3rlimit 20"
let sel_upd2 (#b:_) (vb:buffer b)
(i:nat{i < length vb})
(j:nat{j < length vb /\ i<>j})
(x:b)
(h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb j == sel h vb j)
= let open FStar.Mul in
let v = get_view vb in
view_indexing vb i;
view_indexing vb j;
let h' = upd h vb i x in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = Down.as_seq h' (as_down_buffer vb) in
let min = if i < j then i else j in
let max = if i < j then j else i in
let n = View?.n v in
lt_leq_mul min max n;
let min0, max0 =
Seq.slice s0 (min * n) ((min * n) + n),
Seq.slice s0 (max * n) ((max * n) + n)
in
let _, s_j, _ = split_at_i vb j h in
let min1, max1 =
Seq.slice s1 (min * n) ((min * n) + n),
Seq.slice s1 (max * n) ((max * n) + n)
in
let _, s_j', _ = split_at_i vb j h' in
let prefix, s_i, suffix = split_at_i vb i h in
Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix));
if i < j
then begin
assert (Seq.equal max0 s_j);
assert (Seq.equal max1 s_j');
assert (Seq.equal s_j s_j')
end
else begin
assert (Seq.equal min0 s_j);
assert (Seq.equal min1 s_j');
assert (Seq.equal s_j s_j')
end
let sel_upd #b vb i j x h =
if i=j then sel_upd1 vb i x h
else sel_upd2 vb i j x h
let lemma_upd_with_sel #b vb i h =
let v = get_view vb in
let prefix, es, suffix = split_at_i vb i h in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = prefix `Seq.append` (View?.put v (View?.get v es) `Seq.append` suffix) in
assert (Seq.equal s0 s1);
Down.upd_seq_spec h (as_down_buffer vb) s0
let upd_modifies #b h vb i x
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
Down.upd_seq_spec h (as_down_buffer vb) s1
let upd_equal_domains #b h vb i x
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
upd_modifies h vb i x;
Down.upd_seq_spec h (as_down_buffer vb) s1
let rec as_seq' (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i <= length vb})
: GTot (Seq.lseq b (length vb - i)) | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 20,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val as_seq' (#b: _) (h: HS.mem) (vb: buffer b) (i: nat{i <= length vb})
: GTot (Seq.lseq b (length vb - i)) (decreases (length vb - i)) | [
"recursion"
] | LowStar.BufferView.Up.as_seq' | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
h: FStar.Monotonic.HyperStack.mem ->
vb: LowStar.BufferView.Up.buffer b ->
i: Prims.nat{i <= LowStar.BufferView.Up.length vb}
-> Prims.GTot (FStar.Seq.Properties.lseq b (LowStar.BufferView.Up.length vb - i)) | {
"end_col": 56,
"end_line": 187,
"start_col": 3,
"start_line": 182
} |
Prims.GTot | val upd' (#b: _) (h: HS.mem) (vb: buffer b {live h vb}) (i: nat{i < length vb}) (x: b)
: GTot (h': HS.mem{sel h' vb i == x}) | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let upd' (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot (h':HS.mem{sel h' vb i == x})
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
let h' = Down.upd_seq h (as_down_buffer vb) s1 in
Down.upd_seq_spec h (as_down_buffer vb) s1;
assert (Down.as_seq h' (as_down_buffer vb) == s1);
let n = View?.n v in
assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n)));
assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x);
h' | val upd' (#b: _) (h: HS.mem) (vb: buffer b {live h vb}) (i: nat{i < length vb}) (x: b)
: GTot (h': HS.mem{sel h' vb i == x})
let upd' (#b: _) (h: HS.mem) (vb: buffer b {live h vb}) (i: nat{i < length vb}) (x: b)
: GTot (h': HS.mem{sel h' vb i == x}) = | false | null | false | let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` ((View?.put v x) `Seq.append` suffix) in
let h' = Down.upd_seq h (as_down_buffer vb) s1 in
Down.upd_seq_spec h (as_down_buffer vb) s1;
assert (Down.as_seq h' (as_down_buffer vb) == s1);
let n = View?.n v in
assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n)));
assert ((Seq.slice s1 (i * n) (i * n + n)) `Seq.equal` (View?.put v x));
h' | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"sometrivial"
] | [
"FStar.Monotonic.HyperStack.mem",
"LowStar.BufferView.Up.buffer",
"LowStar.BufferView.Up.live",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"LowStar.BufferView.Up.length",
"FStar.Seq.Base.seq",
"LowStar.BufferView.Up.buffer_src",
"FStar.Seq.Properties.lseq",
"LowStar.BufferView.Up.__proj__View__item__n",
"LowStar.BufferView.Up.get_view",
"Prims.unit",
"Prims._assert",
"FStar.Seq.Base.equal",
"FStar.Seq.Base.slice",
"FStar.Mul.op_Star",
"Prims.op_Addition",
"LowStar.BufferView.Up.__proj__View__item__put",
"Prims.eq2",
"LowStar.BufferView.Up.sel",
"LowStar.BufferView.Up.__proj__View__item__get",
"Prims.pos",
"LowStar.BufferView.Down.as_seq",
"LowStar.BufferView.Up.as_down_buffer",
"LowStar.BufferView.Down.upd_seq_spec",
"LowStar.BufferView.Down.upd_seq",
"FStar.Seq.Base.append",
"FStar.Pervasives.Native.tuple3",
"LowStar.BufferView.Up.split_at_i",
"LowStar.BufferView.Up.view"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1"
let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n)
let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix))
})
= let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail
let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb})
: GTot b
= let v = get_view vb in
let _, es, _ = split_at_i vb i h in
View?.get v es
let upd' (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b) | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val upd' (#b: _) (h: HS.mem) (vb: buffer b {live h vb}) (i: nat{i < length vb}) (x: b)
: GTot (h': HS.mem{sel h' vb i == x}) | [] | LowStar.BufferView.Up.upd' | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
h: FStar.Monotonic.HyperStack.mem ->
vb: LowStar.BufferView.Up.buffer b {LowStar.BufferView.Up.live h vb} ->
i: Prims.nat{i < LowStar.BufferView.Up.length vb} ->
x: b
-> Prims.GTot (h': FStar.Monotonic.HyperStack.mem{LowStar.BufferView.Up.sel h' vb i == x}) | {
"end_col": 6,
"end_line": 93,
"start_col": 4,
"start_line": 83
} |
FStar.Pervasives.Lemma | val as_seq_sel (#b: _)
(h:HS.mem)
(vb:buffer b)
(i:nat{i < length vb})
: Lemma (sel h vb i == Seq.index (as_seq h vb) i) | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let as_seq_sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb})
: Lemma (ensures (sel h vb i == Seq.index (as_seq h vb) i))
=
let rec as_seq'_as_seq' (j:nat)
(i:nat{j + i < length vb})
: Lemma (ensures (Seq.index (as_seq' h vb j) i == Seq.index (as_seq' h vb (j + i)) 0))
(decreases i)
= if i = 0 then () else as_seq'_as_seq' (j + 1) (i - 1)
in
as_seq'_as_seq' 0 i | val as_seq_sel (#b: _)
(h:HS.mem)
(vb:buffer b)
(i:nat{i < length vb})
: Lemma (sel h vb i == Seq.index (as_seq h vb) i)
let as_seq_sel (#b: _) (h: HS.mem) (vb: buffer b) (i: nat{i < length vb})
: Lemma (ensures (sel h vb i == Seq.index (as_seq h vb) i)) = | false | null | true | let rec as_seq'_as_seq' (j: nat) (i: nat{j + i < length vb})
: Lemma (ensures (Seq.index (as_seq' h vb j) i == Seq.index (as_seq' h vb (j + i)) 0))
(decreases i) =
if i = 0 then () else as_seq'_as_seq' (j + 1) (i - 1)
in
as_seq'_as_seq' 0 i | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"lemma"
] | [
"FStar.Monotonic.HyperStack.mem",
"LowStar.BufferView.Up.buffer",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"LowStar.BufferView.Up.length",
"Prims.op_Addition",
"Prims.unit",
"Prims.l_True",
"Prims.squash",
"Prims.eq2",
"FStar.Seq.Base.index",
"LowStar.BufferView.Up.as_seq'",
"Prims.Nil",
"FStar.Pervasives.pattern",
"Prims.op_Equality",
"Prims.int",
"Prims.bool",
"Prims.op_Subtraction",
"LowStar.BufferView.Up.sel",
"LowStar.BufferView.Up.as_seq"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1"
let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n)
let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix))
})
= let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail
let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb})
: GTot b
= let v = get_view vb in
let _, es, _ = split_at_i vb i h in
View?.get v es
let upd' (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot (h':HS.mem{sel h' vb i == x})
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
let h' = Down.upd_seq h (as_down_buffer vb) s1 in
Down.upd_seq_spec h (as_down_buffer vb) s1;
assert (Down.as_seq h' (as_down_buffer vb) == s1);
let n = View?.n v in
assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n)));
assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x);
h'
let upd #b h vb i x
: GTot HS.mem
= upd' #b h vb i x
let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb i == x)
= ()
let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat)
: Lemma (FStar.Mul.(min * n + n <= max * n))
= let open FStar.Mul in
assert ((min * n) + n = (min + 1) * n);
assert ((min * n) + n <= max * n)
#set-options "--z3rlimit 20"
let sel_upd2 (#b:_) (vb:buffer b)
(i:nat{i < length vb})
(j:nat{j < length vb /\ i<>j})
(x:b)
(h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb j == sel h vb j)
= let open FStar.Mul in
let v = get_view vb in
view_indexing vb i;
view_indexing vb j;
let h' = upd h vb i x in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = Down.as_seq h' (as_down_buffer vb) in
let min = if i < j then i else j in
let max = if i < j then j else i in
let n = View?.n v in
lt_leq_mul min max n;
let min0, max0 =
Seq.slice s0 (min * n) ((min * n) + n),
Seq.slice s0 (max * n) ((max * n) + n)
in
let _, s_j, _ = split_at_i vb j h in
let min1, max1 =
Seq.slice s1 (min * n) ((min * n) + n),
Seq.slice s1 (max * n) ((max * n) + n)
in
let _, s_j', _ = split_at_i vb j h' in
let prefix, s_i, suffix = split_at_i vb i h in
Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix));
if i < j
then begin
assert (Seq.equal max0 s_j);
assert (Seq.equal max1 s_j');
assert (Seq.equal s_j s_j')
end
else begin
assert (Seq.equal min0 s_j);
assert (Seq.equal min1 s_j');
assert (Seq.equal s_j s_j')
end
let sel_upd #b vb i j x h =
if i=j then sel_upd1 vb i x h
else sel_upd2 vb i j x h
let lemma_upd_with_sel #b vb i h =
let v = get_view vb in
let prefix, es, suffix = split_at_i vb i h in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = prefix `Seq.append` (View?.put v (View?.get v es) `Seq.append` suffix) in
assert (Seq.equal s0 s1);
Down.upd_seq_spec h (as_down_buffer vb) s0
let upd_modifies #b h vb i x
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
Down.upd_seq_spec h (as_down_buffer vb) s1
let upd_equal_domains #b h vb i x
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
upd_modifies h vb i x;
Down.upd_seq_spec h (as_down_buffer vb) s1
let rec as_seq' (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i <= length vb})
: GTot (Seq.lseq b (length vb - i))
(decreases (length vb - i))
= let v = get_view vb in
if i = length vb
then Seq.empty
else let _ = view_indexing vb i in
let _, s_i, suffix = split_at_i vb i h in
View?.get v s_i `Seq.cons` as_seq' h vb (i + 1)
let as_seq (#b: _) (h:HS.mem) (vb:buffer b) = as_seq' h vb 0
#set-options "--max_fuel 1 --max_ifuel 1"
let as_seq_sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb}) | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 20,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val as_seq_sel (#b: _)
(h:HS.mem)
(vb:buffer b)
(i:nat{i < length vb})
: Lemma (sel h vb i == Seq.index (as_seq h vb) i) | [] | LowStar.BufferView.Up.as_seq_sel | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
h: FStar.Monotonic.HyperStack.mem ->
vb: LowStar.BufferView.Up.buffer b ->
i: Prims.nat{i < LowStar.BufferView.Up.length vb}
-> FStar.Pervasives.Lemma
(ensures
LowStar.BufferView.Up.sel h vb i == FStar.Seq.Base.index (LowStar.BufferView.Up.as_seq h vb) i
) | {
"end_col": 25,
"end_line": 201,
"start_col": 5,
"start_line": 194
} |
FStar.Pervasives.Lemma | val sel_upd2
(#b: _)
(vb: buffer b)
(i: nat{i < length vb})
(j: nat{j < length vb /\ i <> j})
(x: b)
(h: HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb j == sel h vb j) | [
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.BufferView.Down",
"short_module": "Down"
},
{
"abbrev": true,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack",
"short_module": "HS"
},
{
"abbrev": false,
"full_module": "LowStar.Monotonic.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "LowStar.BufferView",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let sel_upd2 (#b:_) (vb:buffer b)
(i:nat{i < length vb})
(j:nat{j < length vb /\ i<>j})
(x:b)
(h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb j == sel h vb j)
= let open FStar.Mul in
let v = get_view vb in
view_indexing vb i;
view_indexing vb j;
let h' = upd h vb i x in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = Down.as_seq h' (as_down_buffer vb) in
let min = if i < j then i else j in
let max = if i < j then j else i in
let n = View?.n v in
lt_leq_mul min max n;
let min0, max0 =
Seq.slice s0 (min * n) ((min * n) + n),
Seq.slice s0 (max * n) ((max * n) + n)
in
let _, s_j, _ = split_at_i vb j h in
let min1, max1 =
Seq.slice s1 (min * n) ((min * n) + n),
Seq.slice s1 (max * n) ((max * n) + n)
in
let _, s_j', _ = split_at_i vb j h' in
let prefix, s_i, suffix = split_at_i vb i h in
Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` (View?.put v x `Seq.append` suffix));
if i < j
then begin
assert (Seq.equal max0 s_j);
assert (Seq.equal max1 s_j');
assert (Seq.equal s_j s_j')
end
else begin
assert (Seq.equal min0 s_j);
assert (Seq.equal min1 s_j');
assert (Seq.equal s_j s_j')
end | val sel_upd2
(#b: _)
(vb: buffer b)
(i: nat{i < length vb})
(j: nat{j < length vb /\ i <> j})
(x: b)
(h: HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb j == sel h vb j)
let sel_upd2
(#b: _)
(vb: buffer b)
(i: nat{i < length vb})
(j: nat{j < length vb /\ i <> j})
(x: b)
(h: HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb j == sel h vb j) = | false | null | true | let open FStar.Mul in
let v = get_view vb in
view_indexing vb i;
view_indexing vb j;
let h' = upd h vb i x in
let s0 = Down.as_seq h (as_down_buffer vb) in
let s1 = Down.as_seq h' (as_down_buffer vb) in
let min = if i < j then i else j in
let max = if i < j then j else i in
let n = View?.n v in
lt_leq_mul min max n;
let min0, max0 = Seq.slice s0 (min * n) ((min * n) + n), Seq.slice s0 (max * n) ((max * n) + n) in
let _, s_j, _ = split_at_i vb j h in
let min1, max1 = Seq.slice s1 (min * n) ((min * n) + n), Seq.slice s1 (max * n) ((max * n) + n) in
let _, s_j', _ = split_at_i vb j h' in
let prefix, s_i, suffix = split_at_i vb i h in
Down.upd_seq_spec h (as_down_buffer vb) (prefix `Seq.append` ((View?.put v x) `Seq.append` suffix));
if i < j
then
(assert (Seq.equal max0 s_j);
assert (Seq.equal max1 s_j');
assert (Seq.equal s_j s_j'))
else
(assert (Seq.equal min0 s_j);
assert (Seq.equal min1 s_j');
assert (Seq.equal s_j s_j')) | {
"checked_file": "LowStar.BufferView.Up.fst.checked",
"dependencies": [
"prims.fst.checked",
"LowStar.BufferView.Down.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.Math.Lemmas.fst.checked"
],
"interface_file": true,
"source_file": "LowStar.BufferView.Up.fst"
} | [
"lemma"
] | [
"LowStar.BufferView.Up.buffer",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"LowStar.BufferView.Up.length",
"Prims.l_and",
"Prims.op_disEquality",
"FStar.Monotonic.HyperStack.mem",
"LowStar.BufferView.Up.live",
"FStar.Seq.Base.seq",
"LowStar.BufferView.Up.buffer_src",
"FStar.Seq.Properties.lseq",
"LowStar.BufferView.Up.__proj__View__item__n",
"LowStar.BufferView.Up.get_view",
"Prims._assert",
"FStar.Seq.Base.equal",
"Prims.unit",
"Prims.bool",
"LowStar.BufferView.Down.upd_seq_spec",
"LowStar.BufferView.Up.as_down_buffer",
"FStar.Seq.Base.append",
"LowStar.BufferView.Up.__proj__View__item__put",
"FStar.Pervasives.Native.tuple3",
"Prims.eq2",
"LowStar.BufferView.Down.as_seq",
"LowStar.BufferView.Up.split_at_i",
"FStar.Pervasives.Native.tuple2",
"FStar.Pervasives.Native.Mktuple2",
"FStar.Seq.Base.slice",
"FStar.Mul.op_Star",
"Prims.op_Addition",
"LowStar.BufferView.Up.lt_leq_mul",
"Prims.pos",
"Prims.int",
"Prims.op_GreaterThanOrEqual",
"LowStar.BufferView.Down.length",
"LowStar.BufferView.Up.upd",
"LowStar.BufferView.Up.view_indexing",
"LowStar.BufferView.Up.view",
"Prims.l_True",
"Prims.squash",
"LowStar.BufferView.Up.sel",
"Prims.Nil",
"FStar.Pervasives.pattern"
] | [] | (*
Copyright 2008-2018 Microsoft Research
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*)
module LowStar.BufferView.Up
module Down = LowStar.BufferView.Down
noeq
type buffer (dest:Type0) : Type u#1 =
| Buffer: src:Type0
-> down_buf:Down.buffer src
-> v:view src dest{Down.length down_buf % View?.n v == 0}
-> buffer dest
let mk_buffer #src #dest down_buf v = Buffer src down_buf v
let buffer_src #b bv = Buffer?.src bv
let as_down_buffer #b bv = Buffer?.down_buf bv
let get_view #b v = Buffer?.v v
let as_buffer_mk_buffer #_ #_ _ _ = ()
let length #b vb =
Down.length (as_down_buffer vb) / View?.n (get_view vb)
let length_eq #_ _ = ()
//#reset-options "--max_fuel 0 --max_ifuel 1"
let view_indexing #b vb i
= let n = View?.n (get_view vb) in
length_eq vb;
FStar.Math.Lemmas.distributivity_add_left (length vb) (-i) n;
let open FStar.Mul in
assert ((length vb + (-i)) * n = length vb * n + (-i) * n);
assert (length vb > i);
assert (length vb + (-i) > 0);
assert (n <= (length vb + (-i)) * n)
let split_at_i (#b: _) (vb:buffer b) (i:nat{i < length vb}) (h:HS.mem)
: GTot (frags:
(let src_t = buffer_src vb in
Seq.seq src_t *
Seq.lseq src_t (View?.n (get_view vb)) *
Seq.seq src_t){
let prefix, es, suffix = frags in
Down.as_seq h (as_down_buffer vb) ==
(prefix `Seq.append` (es `Seq.append` suffix))
})
= let open FStar.Mul in
let s0 = Down.as_seq h (as_down_buffer vb) in
let v = get_view vb in
let n = View?.n v in
let start = i * n in
view_indexing vb i;
length_eq vb;
let prefix, suffix = Seq.split s0 start in
Seq.lemma_split s0 start;
let es, tail = Seq.split suffix n in
Seq.lemma_split suffix n;
prefix, es, tail
let sel (#b: _) (h:HS.mem) (vb:buffer b) (i:nat{i < length vb})
: GTot b
= let v = get_view vb in
let _, es, _ = split_at_i vb i h in
View?.get v es
let upd' (#b: _)
(h:HS.mem)
(vb:buffer b{live h vb})
(i:nat{i < length vb})
(x:b)
: GTot (h':HS.mem{sel h' vb i == x})
= let open FStar.Mul in
let v = get_view vb in
let prefix, _, suffix = split_at_i vb i h in
let s1 = prefix `Seq.append` (View?.put v x `Seq.append` suffix) in
let h' = Down.upd_seq h (as_down_buffer vb) s1 in
Down.upd_seq_spec h (as_down_buffer vb) s1;
assert (Down.as_seq h' (as_down_buffer vb) == s1);
let n = View?.n v in
assert (sel h' vb i == View?.get v (Seq.slice s1 (i * n) (i * n + n)));
assert (Seq.slice s1 (i * n) (i * n + n) `Seq.equal` View?.put v x);
h'
let upd #b h vb i x
: GTot HS.mem
= upd' #b h vb i x
let sel_upd1 (#b:_) (vb:buffer b) (i:nat{i < length vb}) (x:b) (h:HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb i == x)
= ()
let lt_leq_mul (min:nat) (max:nat{min < max}) (n:nat)
: Lemma (FStar.Mul.(min * n + n <= max * n))
= let open FStar.Mul in
assert ((min * n) + n = (min + 1) * n);
assert ((min * n) + n <= max * n)
#set-options "--z3rlimit 20"
let sel_upd2 (#b:_) (vb:buffer b)
(i:nat{i < length vb})
(j:nat{j < length vb /\ i<>j})
(x:b)
(h:HS.mem{live h vb}) | false | false | LowStar.BufferView.Up.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 20,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val sel_upd2
(#b: _)
(vb: buffer b)
(i: nat{i < length vb})
(j: nat{j < length vb /\ i <> j})
(x: b)
(h: HS.mem{live h vb})
: Lemma (sel (upd h vb i x) vb j == sel h vb j) | [] | LowStar.BufferView.Up.sel_upd2 | {
"file_name": "ulib/LowStar.BufferView.Up.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
vb: LowStar.BufferView.Up.buffer b ->
i: Prims.nat{i < LowStar.BufferView.Up.length vb} ->
j: Prims.nat{j < LowStar.BufferView.Up.length vb /\ i <> j} ->
x: b ->
h: FStar.Monotonic.HyperStack.mem{LowStar.BufferView.Up.live h vb}
-> FStar.Pervasives.Lemma
(ensures
LowStar.BufferView.Up.sel (LowStar.BufferView.Up.upd h vb i x) vb j ==
LowStar.BufferView.Up.sel h vb j) | {
"end_col": 7,
"end_line": 150,
"start_col": 4,
"start_line": 117
} |
FStar.Tactics.Effect.Tac | val norm_fields: Prims.unit -> FStar.Tactics.Tac unit | [
{
"abbrev": false,
"full_module": "Steel.ST.Util",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.C.Typestring",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let norm_fields () : FStar.Tactics.Tac unit =
FStar.Tactics.norm [delta_attr [`%norm_field_attr]; iota; zeta; primops];
FStar.Tactics.trefl () | val norm_fields: Prims.unit -> FStar.Tactics.Tac unit
let norm_fields () : FStar.Tactics.Tac unit = | true | null | false | FStar.Tactics.norm [delta_attr [`%norm_field_attr]; iota; zeta; primops];
FStar.Tactics.trefl () | {
"checked_file": "Steel.ST.C.Types.Fields.fsti.checked",
"dependencies": [
"Steel.ST.Util.fsti.checked",
"Steel.ST.C.Types.Base.fsti.checked",
"Steel.C.Typestring.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Steel.ST.C.Types.Fields.fsti"
} | [] | [
"Prims.unit",
"FStar.Tactics.V1.Derived.trefl",
"FStar.Tactics.V1.Builtins.norm",
"Prims.Cons",
"FStar.Pervasives.norm_step",
"FStar.Pervasives.delta_attr",
"Prims.string",
"Prims.Nil",
"FStar.Pervasives.iota",
"FStar.Pervasives.zeta",
"FStar.Pervasives.primops"
] | [] | module Steel.ST.C.Types.Fields
include Steel.ST.C.Types.Base
open Steel.C.Typestring
open Steel.ST.Util
[@@noextract_to "krml"] // tactic | false | false | Steel.ST.C.Types.Fields.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val norm_fields: Prims.unit -> FStar.Tactics.Tac unit | [] | Steel.ST.C.Types.Fields.norm_fields | {
"file_name": "lib/steel/c/Steel.ST.C.Types.Fields.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | _: Prims.unit -> FStar.Tactics.Effect.Tac Prims.unit | {
"end_col": 24,
"end_line": 9,
"start_col": 2,
"start_line": 8
} |
Prims.Tot | [
{
"abbrev": false,
"full_module": "Steel.ST.Util",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.C.Typestring",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let nonempty_field_description_t (t: Type0) =
(fd: field_description_t t { fd.fd_empty == false }) | let nonempty_field_description_t (t: Type0) = | false | null | false | (fd: field_description_t t {fd.fd_empty == false}) | {
"checked_file": "Steel.ST.C.Types.Fields.fsti.checked",
"dependencies": [
"Steel.ST.Util.fsti.checked",
"Steel.ST.C.Types.Base.fsti.checked",
"Steel.C.Typestring.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Steel.ST.C.Types.Fields.fsti"
} | [
"total"
] | [
"Steel.ST.C.Types.Fields.field_description_t",
"Prims.eq2",
"Prims.bool",
"Steel.ST.C.Types.Fields.__proj__Mkfield_description_t__item__fd_empty"
] | [] | module Steel.ST.C.Types.Fields
include Steel.ST.C.Types.Base
open Steel.C.Typestring
open Steel.ST.Util
[@@noextract_to "krml"] // tactic
let norm_fields () : FStar.Tactics.Tac unit =
FStar.Tactics.norm [delta_attr [`%norm_field_attr]; iota; zeta; primops];
FStar.Tactics.trefl ()
[@@noextract_to "krml"] // primitive
val field_t_nil: Type0
[@@noextract_to "krml"] // primitive
val field_t_cons (fn: Type0) (ft: Type0) (fc: Type0): Type0
inline_for_extraction [@@noextract_to "krml"; norm_field_attr]
noeq
type field_description_t (t: Type0) : Type u#1 = {
fd_def: (string -> GTot bool);
fd_empty: (fd_empty: bool { fd_empty == true <==> (forall s . fd_def s == false) });
fd_type: (string -> Type0);
fd_typedef: ((s: string) -> Pure (typedef (fd_type s)) (requires (fd_def s)) (ensures (fun _ -> True)));
}
inline_for_extraction [@@noextract_to "krml"; norm_field_attr] | false | true | Steel.ST.C.Types.Fields.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val nonempty_field_description_t : t: Type0 -> Type | [] | Steel.ST.C.Types.Fields.nonempty_field_description_t | {
"file_name": "lib/steel/c/Steel.ST.C.Types.Fields.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | t: Type0 -> Type | {
"end_col": 54,
"end_line": 27,
"start_col": 2,
"start_line": 27
} |
|
Prims.Tot | val field_t (#t: Type0) (fd: field_description_t t) : Tot eqtype | [
{
"abbrev": false,
"full_module": "Steel.ST.Util",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.C.Typestring",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let field_t (#t: Type0) (fd: field_description_t t) : Tot eqtype = (s: string { fd.fd_def s }) | val field_t (#t: Type0) (fd: field_description_t t) : Tot eqtype
let field_t (#t: Type0) (fd: field_description_t t) : Tot eqtype = | false | null | false | (s: string{fd.fd_def s}) | {
"checked_file": "Steel.ST.C.Types.Fields.fsti.checked",
"dependencies": [
"Steel.ST.Util.fsti.checked",
"Steel.ST.C.Types.Base.fsti.checked",
"Steel.C.Typestring.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Steel.ST.C.Types.Fields.fsti"
} | [
"total"
] | [
"Steel.ST.C.Types.Fields.field_description_t",
"Prims.string",
"Prims.b2t",
"Steel.ST.C.Types.Fields.__proj__Mkfield_description_t__item__fd_def",
"Prims.eqtype"
] | [] | module Steel.ST.C.Types.Fields
include Steel.ST.C.Types.Base
open Steel.C.Typestring
open Steel.ST.Util
[@@noextract_to "krml"] // tactic
let norm_fields () : FStar.Tactics.Tac unit =
FStar.Tactics.norm [delta_attr [`%norm_field_attr]; iota; zeta; primops];
FStar.Tactics.trefl ()
[@@noextract_to "krml"] // primitive
val field_t_nil: Type0
[@@noextract_to "krml"] // primitive
val field_t_cons (fn: Type0) (ft: Type0) (fc: Type0): Type0
inline_for_extraction [@@noextract_to "krml"; norm_field_attr]
noeq
type field_description_t (t: Type0) : Type u#1 = {
fd_def: (string -> GTot bool);
fd_empty: (fd_empty: bool { fd_empty == true <==> (forall s . fd_def s == false) });
fd_type: (string -> Type0);
fd_typedef: ((s: string) -> Pure (typedef (fd_type s)) (requires (fd_def s)) (ensures (fun _ -> True)));
}
inline_for_extraction [@@noextract_to "krml"; norm_field_attr]
let nonempty_field_description_t (t: Type0) =
(fd: field_description_t t { fd.fd_empty == false }) | false | false | Steel.ST.C.Types.Fields.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val field_t (#t: Type0) (fd: field_description_t t) : Tot eqtype | [] | Steel.ST.C.Types.Fields.field_t | {
"file_name": "lib/steel/c/Steel.ST.C.Types.Fields.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | fd: Steel.ST.C.Types.Fields.field_description_t t -> Prims.eqtype | {
"end_col": 94,
"end_line": 30,
"start_col": 67,
"start_line": 30
} |
Prims.Tot | val field_description_nil:field_description_t field_t_nil | [
{
"abbrev": false,
"full_module": "Steel.ST.Util",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.C.Typestring",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let field_description_nil : field_description_t field_t_nil = {
fd_def = (fun _ -> false);
fd_empty = true;
fd_type = (fun _ -> unit);
fd_typedef = (fun _ -> false_elim ());
} | val field_description_nil:field_description_t field_t_nil
let field_description_nil:field_description_t field_t_nil = | false | null | false | {
fd_def = (fun _ -> false);
fd_empty = true;
fd_type = (fun _ -> unit);
fd_typedef = (fun _ -> false_elim ())
} | {
"checked_file": "Steel.ST.C.Types.Fields.fsti.checked",
"dependencies": [
"Steel.ST.Util.fsti.checked",
"Steel.ST.C.Types.Base.fsti.checked",
"Steel.C.Typestring.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Steel.ST.C.Types.Fields.fsti"
} | [
"total"
] | [
"Steel.ST.C.Types.Fields.Mkfield_description_t",
"Steel.ST.C.Types.Fields.field_t_nil",
"Prims.string",
"Prims.bool",
"Prims.unit",
"FStar.Pervasives.false_elim",
"Steel.ST.C.Types.Base.typedef"
] | [] | module Steel.ST.C.Types.Fields
include Steel.ST.C.Types.Base
open Steel.C.Typestring
open Steel.ST.Util
[@@noextract_to "krml"] // tactic
let norm_fields () : FStar.Tactics.Tac unit =
FStar.Tactics.norm [delta_attr [`%norm_field_attr]; iota; zeta; primops];
FStar.Tactics.trefl ()
[@@noextract_to "krml"] // primitive
val field_t_nil: Type0
[@@noextract_to "krml"] // primitive
val field_t_cons (fn: Type0) (ft: Type0) (fc: Type0): Type0
inline_for_extraction [@@noextract_to "krml"; norm_field_attr]
noeq
type field_description_t (t: Type0) : Type u#1 = {
fd_def: (string -> GTot bool);
fd_empty: (fd_empty: bool { fd_empty == true <==> (forall s . fd_def s == false) });
fd_type: (string -> Type0);
fd_typedef: ((s: string) -> Pure (typedef (fd_type s)) (requires (fd_def s)) (ensures (fun _ -> True)));
}
inline_for_extraction [@@noextract_to "krml"; norm_field_attr]
let nonempty_field_description_t (t: Type0) =
(fd: field_description_t t { fd.fd_empty == false })
[@@noextract_to "krml"] // proof-only
let field_t (#t: Type0) (fd: field_description_t t) : Tot eqtype = (s: string { fd.fd_def s })
inline_for_extraction [@@noextract_to "krml"] | false | true | Steel.ST.C.Types.Fields.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val field_description_nil:field_description_t field_t_nil | [] | Steel.ST.C.Types.Fields.field_description_nil | {
"file_name": "lib/steel/c/Steel.ST.C.Types.Fields.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} | Steel.ST.C.Types.Fields.field_description_t Steel.ST.C.Types.Fields.field_t_nil | {
"end_col": 40,
"end_line": 37,
"start_col": 2,
"start_line": 34
} |
Prims.Tot | val field_description_cons
(#ft #fc: Type0)
(n: string)
(#fn: Type0)
(#[solve_mk_string_t ()] prf: squash (norm norm_typestring (mk_string_t n == fn)))
(t: typedef ft)
(fd: field_description_t fc)
: Tot (nonempty_field_description_t (field_t_cons fn ft fc)) | [
{
"abbrev": false,
"full_module": "Steel.ST.Util",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.C.Typestring",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let field_description_cons (#ft: Type0) (#fc: Type0) (n: string) (#fn: Type0) (# [ solve_mk_string_t ()] prf: squash (norm norm_typestring (mk_string_t n == fn))) (t: typedef ft) (fd: field_description_t fc) : Tot (nonempty_field_description_t (field_t_cons fn ft fc)) =
field_description_cons0 fn #ft #fc n t fd | val field_description_cons
(#ft #fc: Type0)
(n: string)
(#fn: Type0)
(#[solve_mk_string_t ()] prf: squash (norm norm_typestring (mk_string_t n == fn)))
(t: typedef ft)
(fd: field_description_t fc)
: Tot (nonempty_field_description_t (field_t_cons fn ft fc))
let field_description_cons
(#ft #fc: Type0)
(n: string)
(#fn: Type0)
(#[solve_mk_string_t ()] prf: squash (norm norm_typestring (mk_string_t n == fn)))
(t: typedef ft)
(fd: field_description_t fc)
: Tot (nonempty_field_description_t (field_t_cons fn ft fc)) = | false | null | false | field_description_cons0 fn #ft #fc n t fd | {
"checked_file": "Steel.ST.C.Types.Fields.fsti.checked",
"dependencies": [
"Steel.ST.Util.fsti.checked",
"Steel.ST.C.Types.Base.fsti.checked",
"Steel.C.Typestring.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Steel.ST.C.Types.Fields.fsti"
} | [
"total"
] | [
"Prims.string",
"Prims.squash",
"FStar.Pervasives.norm",
"Steel.C.Typestring.norm_typestring",
"Prims.eq2",
"Steel.C.Typestring.mk_string_t",
"Steel.ST.C.Types.Base.typedef",
"Steel.ST.C.Types.Fields.field_description_t",
"Steel.ST.C.Types.Fields.field_description_cons0",
"Steel.ST.C.Types.Fields.nonempty_field_description_t",
"Steel.ST.C.Types.Fields.field_t_cons"
] | [] | module Steel.ST.C.Types.Fields
include Steel.ST.C.Types.Base
open Steel.C.Typestring
open Steel.ST.Util
[@@noextract_to "krml"] // tactic
let norm_fields () : FStar.Tactics.Tac unit =
FStar.Tactics.norm [delta_attr [`%norm_field_attr]; iota; zeta; primops];
FStar.Tactics.trefl ()
[@@noextract_to "krml"] // primitive
val field_t_nil: Type0
[@@noextract_to "krml"] // primitive
val field_t_cons (fn: Type0) (ft: Type0) (fc: Type0): Type0
inline_for_extraction [@@noextract_to "krml"; norm_field_attr]
noeq
type field_description_t (t: Type0) : Type u#1 = {
fd_def: (string -> GTot bool);
fd_empty: (fd_empty: bool { fd_empty == true <==> (forall s . fd_def s == false) });
fd_type: (string -> Type0);
fd_typedef: ((s: string) -> Pure (typedef (fd_type s)) (requires (fd_def s)) (ensures (fun _ -> True)));
}
inline_for_extraction [@@noextract_to "krml"; norm_field_attr]
let nonempty_field_description_t (t: Type0) =
(fd: field_description_t t { fd.fd_empty == false })
[@@noextract_to "krml"] // proof-only
let field_t (#t: Type0) (fd: field_description_t t) : Tot eqtype = (s: string { fd.fd_def s })
inline_for_extraction [@@noextract_to "krml"]
let field_description_nil : field_description_t field_t_nil = {
fd_def = (fun _ -> false);
fd_empty = true;
fd_type = (fun _ -> unit);
fd_typedef = (fun _ -> false_elim ());
}
inline_for_extraction [@@noextract_to "krml"; norm_field_attr]
let field_description_cons0
(fn: Type0) (#ft: Type0) (#fc: Type0) (n: string) (t: typedef ft) (fd: field_description_t fc)
: Tot (nonempty_field_description_t (field_t_cons fn ft fc))
= {
fd_def = (fun n' -> n = n' || fd.fd_def n');
fd_empty = false;
fd_type = (fun n' -> if n = n' then ft else fd.fd_type n');
fd_typedef = (fun n' -> if n = n' then t else fd.fd_typedef n');
}
inline_for_extraction [@@noextract_to "krml"; norm_field_attr] | false | false | Steel.ST.C.Types.Fields.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val field_description_cons
(#ft #fc: Type0)
(n: string)
(#fn: Type0)
(#[solve_mk_string_t ()] prf: squash (norm norm_typestring (mk_string_t n == fn)))
(t: typedef ft)
(fd: field_description_t fc)
: Tot (nonempty_field_description_t (field_t_cons fn ft fc)) | [] | Steel.ST.C.Types.Fields.field_description_cons | {
"file_name": "lib/steel/c/Steel.ST.C.Types.Fields.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
n: Prims.string ->
t: Steel.ST.C.Types.Base.typedef ft ->
fd: Steel.ST.C.Types.Fields.field_description_t fc
-> Steel.ST.C.Types.Fields.nonempty_field_description_t (Steel.ST.C.Types.Fields.field_t_cons fn
ft
fc) | {
"end_col": 43,
"end_line": 53,
"start_col": 2,
"start_line": 53
} |
Prims.Tot | val field_description_cons0
(fn #ft #fc: Type0)
(n: string)
(t: typedef ft)
(fd: field_description_t fc)
: Tot (nonempty_field_description_t (field_t_cons fn ft fc)) | [
{
"abbrev": false,
"full_module": "Steel.ST.Util",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.C.Typestring",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "Steel.ST.C.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let field_description_cons0
(fn: Type0) (#ft: Type0) (#fc: Type0) (n: string) (t: typedef ft) (fd: field_description_t fc)
: Tot (nonempty_field_description_t (field_t_cons fn ft fc))
= {
fd_def = (fun n' -> n = n' || fd.fd_def n');
fd_empty = false;
fd_type = (fun n' -> if n = n' then ft else fd.fd_type n');
fd_typedef = (fun n' -> if n = n' then t else fd.fd_typedef n');
} | val field_description_cons0
(fn #ft #fc: Type0)
(n: string)
(t: typedef ft)
(fd: field_description_t fc)
: Tot (nonempty_field_description_t (field_t_cons fn ft fc))
let field_description_cons0
(fn #ft #fc: Type0)
(n: string)
(t: typedef ft)
(fd: field_description_t fc)
: Tot (nonempty_field_description_t (field_t_cons fn ft fc)) = | false | null | false | {
fd_def = (fun n' -> n = n' || fd.fd_def n');
fd_empty = false;
fd_type = (fun n' -> if n = n' then ft else fd.fd_type n');
fd_typedef = (fun n' -> if n = n' then t else fd.fd_typedef n')
} | {
"checked_file": "Steel.ST.C.Types.Fields.fsti.checked",
"dependencies": [
"Steel.ST.Util.fsti.checked",
"Steel.ST.C.Types.Base.fsti.checked",
"Steel.C.Typestring.fsti.checked",
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.fsti.checked"
],
"interface_file": false,
"source_file": "Steel.ST.C.Types.Fields.fsti"
} | [
"total"
] | [
"Prims.string",
"Steel.ST.C.Types.Base.typedef",
"Steel.ST.C.Types.Fields.field_description_t",
"Steel.ST.C.Types.Fields.Mkfield_description_t",
"Steel.ST.C.Types.Fields.field_t_cons",
"Prims.op_BarBar",
"Prims.op_Equality",
"Steel.ST.C.Types.Fields.__proj__Mkfield_description_t__item__fd_def",
"Prims.bool",
"Steel.ST.C.Types.Fields.__proj__Mkfield_description_t__item__fd_type",
"Steel.ST.C.Types.Fields.__proj__Mkfield_description_t__item__fd_typedef",
"Steel.ST.C.Types.Fields.nonempty_field_description_t"
] | [] | module Steel.ST.C.Types.Fields
include Steel.ST.C.Types.Base
open Steel.C.Typestring
open Steel.ST.Util
[@@noextract_to "krml"] // tactic
let norm_fields () : FStar.Tactics.Tac unit =
FStar.Tactics.norm [delta_attr [`%norm_field_attr]; iota; zeta; primops];
FStar.Tactics.trefl ()
[@@noextract_to "krml"] // primitive
val field_t_nil: Type0
[@@noextract_to "krml"] // primitive
val field_t_cons (fn: Type0) (ft: Type0) (fc: Type0): Type0
inline_for_extraction [@@noextract_to "krml"; norm_field_attr]
noeq
type field_description_t (t: Type0) : Type u#1 = {
fd_def: (string -> GTot bool);
fd_empty: (fd_empty: bool { fd_empty == true <==> (forall s . fd_def s == false) });
fd_type: (string -> Type0);
fd_typedef: ((s: string) -> Pure (typedef (fd_type s)) (requires (fd_def s)) (ensures (fun _ -> True)));
}
inline_for_extraction [@@noextract_to "krml"; norm_field_attr]
let nonempty_field_description_t (t: Type0) =
(fd: field_description_t t { fd.fd_empty == false })
[@@noextract_to "krml"] // proof-only
let field_t (#t: Type0) (fd: field_description_t t) : Tot eqtype = (s: string { fd.fd_def s })
inline_for_extraction [@@noextract_to "krml"]
let field_description_nil : field_description_t field_t_nil = {
fd_def = (fun _ -> false);
fd_empty = true;
fd_type = (fun _ -> unit);
fd_typedef = (fun _ -> false_elim ());
}
inline_for_extraction [@@noextract_to "krml"; norm_field_attr]
let field_description_cons0
(fn: Type0) (#ft: Type0) (#fc: Type0) (n: string) (t: typedef ft) (fd: field_description_t fc)
: Tot (nonempty_field_description_t (field_t_cons fn ft fc)) | false | false | Steel.ST.C.Types.Fields.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 1,
"max_fuel": 8,
"max_ifuel": 2,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val field_description_cons0
(fn #ft #fc: Type0)
(n: string)
(t: typedef ft)
(fd: field_description_t fc)
: Tot (nonempty_field_description_t (field_t_cons fn ft fc)) | [] | Steel.ST.C.Types.Fields.field_description_cons0 | {
"file_name": "lib/steel/c/Steel.ST.C.Types.Fields.fsti",
"git_rev": "7fbb54e94dd4f48ff7cb867d3bae6889a635541e",
"git_url": "https://github.com/FStarLang/steel.git",
"project_name": "steel"
} |
fn: Type0 ->
n: Prims.string ->
t: Steel.ST.C.Types.Base.typedef ft ->
fd: Steel.ST.C.Types.Fields.field_description_t fc
-> Steel.ST.C.Types.Fields.nonempty_field_description_t (Steel.ST.C.Types.Fields.field_t_cons fn
ft
fc) | {
"end_col": 68,
"end_line": 48,
"start_col": 4,
"start_line": 45
} |
FStar.Pervasives.Lemma | val proj_point_to_list_lemma: p:S.proj_point ->
Lemma (point_inv_list (proj_point_to_list p) /\ point_eval_list (proj_point_to_list p) == p) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.PrecompBaseTable",
"short_module": "SPT"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Definitions",
"short_module": "BD"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let proj_point_to_list_lemma p =
proj_point_to_list_fits p;
proj_point_to_list_eval p | val proj_point_to_list_lemma: p:S.proj_point ->
Lemma (point_inv_list (proj_point_to_list p) /\ point_eval_list (proj_point_to_list p) == p)
let proj_point_to_list_lemma p = | false | null | true | proj_point_to_list_fits p;
proj_point_to_list_eval p | {
"checked_file": "Hacl.Spec.P256.PrecompTable.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.PrecompBaseTable256.fsti.checked",
"Hacl.Spec.PrecompBaseTable.fsti.checked",
"Hacl.Spec.P256.Montgomery.fsti.checked",
"Hacl.Spec.Bignum.Definitions.fst.checked",
"Hacl.Impl.P256.Point.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Spec.P256.PrecompTable.fst"
} | [
"lemma"
] | [
"Spec.P256.PointOps.proj_point",
"Hacl.Spec.P256.PrecompTable.proj_point_to_list_eval",
"Prims.unit",
"Hacl.Spec.P256.PrecompTable.proj_point_to_list_fits"
] | [] | module Hacl.Spec.P256.PrecompTable
open FStar.Mul
open Lib.IntTypes
open Lib.Sequence
open Hacl.Impl.P256.Point
module S = Spec.P256
module SM = Hacl.Spec.P256.Montgomery
module BD = Hacl.Spec.Bignum.Definitions
module FL = FStar.List.Tot
module SPT = Hacl.Spec.PrecompBaseTable
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
let create4_lseq (x0 x1 x2 x3:uint64) : lseq uint64 4 =
let l = [x0; x1; x2; x3] in
assert_norm (FL.length l = 4);
Seq.seq_of_list l
val create4_lemma (x0 x1 x2 x3:uint64) :
Lemma (let s = create4_lseq x0 x1 x2 x3 in
s.[0] == x0 /\ s.[1] == x1 /\ s.[2] == x2 /\ s.[3] == x3)
let create4_lemma x0 x1 x2 x3 =
Seq.elim_of_list [x0; x1; x2; x3]
//-----------------------------------
noextract
let list_as_felem4 (f:felem_list) : lseq uint64 4 =
Seq.seq_of_list f <: lseq uint64 4
val felem_to_list_lemma_eval: x:S.felem ->
Lemma (BD.bn_v (list_as_felem4 (felem_to_list x)) == x)
let felem_to_list_lemma_eval x =
let x0 = x % pow2 64 in
let x1 = x / pow2 64 % pow2 64 in
let x2 = x / pow2 128 % pow2 64 in
let x3 = x / pow2 192 % pow2 64 in
let bn_x = list_as_felem4 (felem_to_list x) in
create4_lemma (u64 x0) (u64 x1) (u64 x2) (u64 x3);
assert (v bn_x.[0] == x0 /\ v bn_x.[1] == x1 /\ v bn_x.[2] == x2 /\ v bn_x.[3] == x3);
Hacl.Impl.P256.Bignum.bn_v_is_as_nat bn_x;
assert (BD.bn_v bn_x = x0 + x1 * pow2 64 + x2 * pow2 128 + x3 * pow2 192);
Hacl.Spec.PrecompBaseTable256.lemma_decompose_nat256_as_four_u64 x
//--------------------------------------------
val proj_point_to_list_sub: p:S.proj_point -> Lemma
(let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
let px_list = felem_to_list pxM in
let py_list = felem_to_list pyM in
let pz_list = felem_to_list pzM in
let p_list = FL.(px_list @ py_list @ pz_list) in
let p_lseq = Seq.seq_of_list p_list <: lseq uint64 12 in
let px_lseq = Seq.seq_of_list px_list <: lseq uint64 4 in
let py_lseq = Seq.seq_of_list py_list <: lseq uint64 4 in
let pz_lseq = Seq.seq_of_list pz_list <: lseq uint64 4 in
sub p_lseq 0 4 == px_lseq /\
sub p_lseq 4 4 == py_lseq /\
sub p_lseq 8 4 == pz_lseq)
let proj_point_to_list_sub p =
let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
let px_list = felem_to_list pxM in
let py_list = felem_to_list pyM in
let pz_list = felem_to_list pzM in
FL.append_assoc px_list py_list pz_list;
SPT.seq_of_list_append_lemma px_list py_list;
SPT.seq_of_list_append_lemma FL.(px_list @ py_list) pz_list
val proj_point_to_list_fits: p:S.proj_point ->
Lemma (point_inv_list (proj_point_to_list p))
let proj_point_to_list_fits p =
let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
proj_point_to_list_sub p;
felem_to_list_lemma_eval pxM;
felem_to_list_lemma_eval pyM;
felem_to_list_lemma_eval pzM
val proj_point_to_list_eval: p:S.proj_point ->
Lemma (point_eval_list (proj_point_to_list p) == p)
let proj_point_to_list_eval p =
let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
proj_point_to_list_sub p;
felem_to_list_lemma_eval pxM;
felem_to_list_lemma_eval pyM;
felem_to_list_lemma_eval pzM;
SM.lemma_to_from_mont_id px;
SM.lemma_to_from_mont_id py;
SM.lemma_to_from_mont_id pz | false | false | Hacl.Spec.P256.PrecompTable.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val proj_point_to_list_lemma: p:S.proj_point ->
Lemma (point_inv_list (proj_point_to_list p) /\ point_eval_list (proj_point_to_list p) == p) | [] | Hacl.Spec.P256.PrecompTable.proj_point_to_list_lemma | {
"file_name": "code/ecdsap256/Hacl.Spec.P256.PrecompTable.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | p: Spec.P256.PointOps.proj_point
-> FStar.Pervasives.Lemma
(ensures
Hacl.Spec.P256.PrecompTable.point_inv_list (Hacl.Spec.P256.PrecompTable.proj_point_to_list p) /\
Hacl.Spec.P256.PrecompTable.point_eval_list (Hacl.Spec.P256.PrecompTable.proj_point_to_list p) ==
p) | {
"end_col": 27,
"end_line": 120,
"start_col": 2,
"start_line": 119
} |
FStar.Pervasives.Lemma | val proj_point_to_list_eval: p:S.proj_point ->
Lemma (point_eval_list (proj_point_to_list p) == p) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.PrecompBaseTable",
"short_module": "SPT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Definitions",
"short_module": "BD"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let proj_point_to_list_eval p =
let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
proj_point_to_list_sub p;
felem_to_list_lemma_eval pxM;
felem_to_list_lemma_eval pyM;
felem_to_list_lemma_eval pzM;
SM.lemma_to_from_mont_id px;
SM.lemma_to_from_mont_id py;
SM.lemma_to_from_mont_id pz | val proj_point_to_list_eval: p:S.proj_point ->
Lemma (point_eval_list (proj_point_to_list p) == p)
let proj_point_to_list_eval p = | false | null | true | let px, py, pz = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
proj_point_to_list_sub p;
felem_to_list_lemma_eval pxM;
felem_to_list_lemma_eval pyM;
felem_to_list_lemma_eval pzM;
SM.lemma_to_from_mont_id px;
SM.lemma_to_from_mont_id py;
SM.lemma_to_from_mont_id pz | {
"checked_file": "Hacl.Spec.P256.PrecompTable.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.PrecompBaseTable256.fsti.checked",
"Hacl.Spec.PrecompBaseTable.fsti.checked",
"Hacl.Spec.P256.Montgomery.fsti.checked",
"Hacl.Spec.Bignum.Definitions.fst.checked",
"Hacl.Impl.P256.Point.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Spec.P256.PrecompTable.fst"
} | [
"lemma"
] | [
"Spec.P256.PointOps.proj_point",
"Prims.nat",
"Hacl.Spec.P256.Montgomery.lemma_to_from_mont_id",
"Prims.unit",
"Hacl.Spec.P256.PrecompTable.felem_to_list_lemma_eval",
"Hacl.Spec.P256.PrecompTable.proj_point_to_list_sub",
"Spec.P256.PointOps.felem",
"Hacl.Spec.P256.Montgomery.to_mont"
] | [] | module Hacl.Spec.P256.PrecompTable
open FStar.Mul
open Lib.IntTypes
open Lib.Sequence
open Hacl.Impl.P256.Point
module S = Spec.P256
module SM = Hacl.Spec.P256.Montgomery
module BD = Hacl.Spec.Bignum.Definitions
module FL = FStar.List.Tot
module SPT = Hacl.Spec.PrecompBaseTable
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
let create4_lseq (x0 x1 x2 x3:uint64) : lseq uint64 4 =
let l = [x0; x1; x2; x3] in
assert_norm (FL.length l = 4);
Seq.seq_of_list l
val create4_lemma (x0 x1 x2 x3:uint64) :
Lemma (let s = create4_lseq x0 x1 x2 x3 in
s.[0] == x0 /\ s.[1] == x1 /\ s.[2] == x2 /\ s.[3] == x3)
let create4_lemma x0 x1 x2 x3 =
Seq.elim_of_list [x0; x1; x2; x3]
//-----------------------------------
noextract
let list_as_felem4 (f:felem_list) : lseq uint64 4 =
Seq.seq_of_list f <: lseq uint64 4
val felem_to_list_lemma_eval: x:S.felem ->
Lemma (BD.bn_v (list_as_felem4 (felem_to_list x)) == x)
let felem_to_list_lemma_eval x =
let x0 = x % pow2 64 in
let x1 = x / pow2 64 % pow2 64 in
let x2 = x / pow2 128 % pow2 64 in
let x3 = x / pow2 192 % pow2 64 in
let bn_x = list_as_felem4 (felem_to_list x) in
create4_lemma (u64 x0) (u64 x1) (u64 x2) (u64 x3);
assert (v bn_x.[0] == x0 /\ v bn_x.[1] == x1 /\ v bn_x.[2] == x2 /\ v bn_x.[3] == x3);
Hacl.Impl.P256.Bignum.bn_v_is_as_nat bn_x;
assert (BD.bn_v bn_x = x0 + x1 * pow2 64 + x2 * pow2 128 + x3 * pow2 192);
Hacl.Spec.PrecompBaseTable256.lemma_decompose_nat256_as_four_u64 x
//--------------------------------------------
val proj_point_to_list_sub: p:S.proj_point -> Lemma
(let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
let px_list = felem_to_list pxM in
let py_list = felem_to_list pyM in
let pz_list = felem_to_list pzM in
let p_list = FL.(px_list @ py_list @ pz_list) in
let p_lseq = Seq.seq_of_list p_list <: lseq uint64 12 in
let px_lseq = Seq.seq_of_list px_list <: lseq uint64 4 in
let py_lseq = Seq.seq_of_list py_list <: lseq uint64 4 in
let pz_lseq = Seq.seq_of_list pz_list <: lseq uint64 4 in
sub p_lseq 0 4 == px_lseq /\
sub p_lseq 4 4 == py_lseq /\
sub p_lseq 8 4 == pz_lseq)
let proj_point_to_list_sub p =
let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
let px_list = felem_to_list pxM in
let py_list = felem_to_list pyM in
let pz_list = felem_to_list pzM in
FL.append_assoc px_list py_list pz_list;
SPT.seq_of_list_append_lemma px_list py_list;
SPT.seq_of_list_append_lemma FL.(px_list @ py_list) pz_list
val proj_point_to_list_fits: p:S.proj_point ->
Lemma (point_inv_list (proj_point_to_list p))
let proj_point_to_list_fits p =
let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
proj_point_to_list_sub p;
felem_to_list_lemma_eval pxM;
felem_to_list_lemma_eval pyM;
felem_to_list_lemma_eval pzM
val proj_point_to_list_eval: p:S.proj_point ->
Lemma (point_eval_list (proj_point_to_list p) == p) | false | false | Hacl.Spec.P256.PrecompTable.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val proj_point_to_list_eval: p:S.proj_point ->
Lemma (point_eval_list (proj_point_to_list p) == p) | [] | Hacl.Spec.P256.PrecompTable.proj_point_to_list_eval | {
"file_name": "code/ecdsap256/Hacl.Spec.P256.PrecompTable.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | p: Spec.P256.PointOps.proj_point
-> FStar.Pervasives.Lemma
(ensures
Hacl.Spec.P256.PrecompTable.point_eval_list (Hacl.Spec.P256.PrecompTable.proj_point_to_list p) ==
p) | {
"end_col": 29,
"end_line": 115,
"start_col": 31,
"start_line": 103
} |
FStar.Pervasives.Lemma | val proj_point_to_list_fits: p:S.proj_point ->
Lemma (point_inv_list (proj_point_to_list p)) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.PrecompBaseTable",
"short_module": "SPT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Definitions",
"short_module": "BD"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let proj_point_to_list_fits p =
let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
proj_point_to_list_sub p;
felem_to_list_lemma_eval pxM;
felem_to_list_lemma_eval pyM;
felem_to_list_lemma_eval pzM | val proj_point_to_list_fits: p:S.proj_point ->
Lemma (point_inv_list (proj_point_to_list p))
let proj_point_to_list_fits p = | false | null | true | let px, py, pz = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
proj_point_to_list_sub p;
felem_to_list_lemma_eval pxM;
felem_to_list_lemma_eval pyM;
felem_to_list_lemma_eval pzM | {
"checked_file": "Hacl.Spec.P256.PrecompTable.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.PrecompBaseTable256.fsti.checked",
"Hacl.Spec.PrecompBaseTable.fsti.checked",
"Hacl.Spec.P256.Montgomery.fsti.checked",
"Hacl.Spec.Bignum.Definitions.fst.checked",
"Hacl.Impl.P256.Point.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Spec.P256.PrecompTable.fst"
} | [
"lemma"
] | [
"Spec.P256.PointOps.proj_point",
"Prims.nat",
"Hacl.Spec.P256.PrecompTable.felem_to_list_lemma_eval",
"Prims.unit",
"Hacl.Spec.P256.PrecompTable.proj_point_to_list_sub",
"Spec.P256.PointOps.felem",
"Hacl.Spec.P256.Montgomery.to_mont"
] | [] | module Hacl.Spec.P256.PrecompTable
open FStar.Mul
open Lib.IntTypes
open Lib.Sequence
open Hacl.Impl.P256.Point
module S = Spec.P256
module SM = Hacl.Spec.P256.Montgomery
module BD = Hacl.Spec.Bignum.Definitions
module FL = FStar.List.Tot
module SPT = Hacl.Spec.PrecompBaseTable
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
let create4_lseq (x0 x1 x2 x3:uint64) : lseq uint64 4 =
let l = [x0; x1; x2; x3] in
assert_norm (FL.length l = 4);
Seq.seq_of_list l
val create4_lemma (x0 x1 x2 x3:uint64) :
Lemma (let s = create4_lseq x0 x1 x2 x3 in
s.[0] == x0 /\ s.[1] == x1 /\ s.[2] == x2 /\ s.[3] == x3)
let create4_lemma x0 x1 x2 x3 =
Seq.elim_of_list [x0; x1; x2; x3]
//-----------------------------------
noextract
let list_as_felem4 (f:felem_list) : lseq uint64 4 =
Seq.seq_of_list f <: lseq uint64 4
val felem_to_list_lemma_eval: x:S.felem ->
Lemma (BD.bn_v (list_as_felem4 (felem_to_list x)) == x)
let felem_to_list_lemma_eval x =
let x0 = x % pow2 64 in
let x1 = x / pow2 64 % pow2 64 in
let x2 = x / pow2 128 % pow2 64 in
let x3 = x / pow2 192 % pow2 64 in
let bn_x = list_as_felem4 (felem_to_list x) in
create4_lemma (u64 x0) (u64 x1) (u64 x2) (u64 x3);
assert (v bn_x.[0] == x0 /\ v bn_x.[1] == x1 /\ v bn_x.[2] == x2 /\ v bn_x.[3] == x3);
Hacl.Impl.P256.Bignum.bn_v_is_as_nat bn_x;
assert (BD.bn_v bn_x = x0 + x1 * pow2 64 + x2 * pow2 128 + x3 * pow2 192);
Hacl.Spec.PrecompBaseTable256.lemma_decompose_nat256_as_four_u64 x
//--------------------------------------------
val proj_point_to_list_sub: p:S.proj_point -> Lemma
(let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
let px_list = felem_to_list pxM in
let py_list = felem_to_list pyM in
let pz_list = felem_to_list pzM in
let p_list = FL.(px_list @ py_list @ pz_list) in
let p_lseq = Seq.seq_of_list p_list <: lseq uint64 12 in
let px_lseq = Seq.seq_of_list px_list <: lseq uint64 4 in
let py_lseq = Seq.seq_of_list py_list <: lseq uint64 4 in
let pz_lseq = Seq.seq_of_list pz_list <: lseq uint64 4 in
sub p_lseq 0 4 == px_lseq /\
sub p_lseq 4 4 == py_lseq /\
sub p_lseq 8 4 == pz_lseq)
let proj_point_to_list_sub p =
let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
let px_list = felem_to_list pxM in
let py_list = felem_to_list pyM in
let pz_list = felem_to_list pzM in
FL.append_assoc px_list py_list pz_list;
SPT.seq_of_list_append_lemma px_list py_list;
SPT.seq_of_list_append_lemma FL.(px_list @ py_list) pz_list
val proj_point_to_list_fits: p:S.proj_point ->
Lemma (point_inv_list (proj_point_to_list p)) | false | false | Hacl.Spec.P256.PrecompTable.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val proj_point_to_list_fits: p:S.proj_point ->
Lemma (point_inv_list (proj_point_to_list p)) | [] | Hacl.Spec.P256.PrecompTable.proj_point_to_list_fits | {
"file_name": "code/ecdsap256/Hacl.Spec.P256.PrecompTable.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | p: Spec.P256.PointOps.proj_point
-> FStar.Pervasives.Lemma
(ensures
Hacl.Spec.P256.PrecompTable.point_inv_list (Hacl.Spec.P256.PrecompTable.proj_point_to_list p)) | {
"end_col": 30,
"end_line": 97,
"start_col": 31,
"start_line": 88
} |
Prims.Tot | val list_as_felem4 (f: felem_list) : lseq uint64 4 | [
{
"abbrev": true,
"full_module": "Hacl.Spec.PrecompBaseTable",
"short_module": "SPT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Definitions",
"short_module": "BD"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let list_as_felem4 (f:felem_list) : lseq uint64 4 =
Seq.seq_of_list f <: lseq uint64 4 | val list_as_felem4 (f: felem_list) : lseq uint64 4
let list_as_felem4 (f: felem_list) : lseq uint64 4 = | false | null | false | Seq.seq_of_list f <: lseq uint64 4 | {
"checked_file": "Hacl.Spec.P256.PrecompTable.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.PrecompBaseTable256.fsti.checked",
"Hacl.Spec.PrecompBaseTable.fsti.checked",
"Hacl.Spec.P256.Montgomery.fsti.checked",
"Hacl.Spec.Bignum.Definitions.fst.checked",
"Hacl.Impl.P256.Point.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Spec.P256.PrecompTable.fst"
} | [
"total"
] | [
"Hacl.Spec.P256.PrecompTable.felem_list",
"FStar.Seq.Properties.seq_of_list",
"Lib.IntTypes.uint64",
"Lib.Sequence.lseq"
] | [] | module Hacl.Spec.P256.PrecompTable
open FStar.Mul
open Lib.IntTypes
open Lib.Sequence
open Hacl.Impl.P256.Point
module S = Spec.P256
module SM = Hacl.Spec.P256.Montgomery
module BD = Hacl.Spec.Bignum.Definitions
module FL = FStar.List.Tot
module SPT = Hacl.Spec.PrecompBaseTable
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
let create4_lseq (x0 x1 x2 x3:uint64) : lseq uint64 4 =
let l = [x0; x1; x2; x3] in
assert_norm (FL.length l = 4);
Seq.seq_of_list l
val create4_lemma (x0 x1 x2 x3:uint64) :
Lemma (let s = create4_lseq x0 x1 x2 x3 in
s.[0] == x0 /\ s.[1] == x1 /\ s.[2] == x2 /\ s.[3] == x3)
let create4_lemma x0 x1 x2 x3 =
Seq.elim_of_list [x0; x1; x2; x3]
//-----------------------------------
noextract | false | false | Hacl.Spec.P256.PrecompTable.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val list_as_felem4 (f: felem_list) : lseq uint64 4 | [] | Hacl.Spec.P256.PrecompTable.list_as_felem4 | {
"file_name": "code/ecdsap256/Hacl.Spec.P256.PrecompTable.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | f: Hacl.Spec.P256.PrecompTable.felem_list -> Lib.Sequence.lseq Lib.IntTypes.uint64 4 | {
"end_col": 36,
"end_line": 33,
"start_col": 2,
"start_line": 33
} |
Prims.Tot | val create4_lseq (x0 x1 x2 x3: uint64) : lseq uint64 4 | [
{
"abbrev": true,
"full_module": "Hacl.Spec.PrecompBaseTable",
"short_module": "SPT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Definitions",
"short_module": "BD"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let create4_lseq (x0 x1 x2 x3:uint64) : lseq uint64 4 =
let l = [x0; x1; x2; x3] in
assert_norm (FL.length l = 4);
Seq.seq_of_list l | val create4_lseq (x0 x1 x2 x3: uint64) : lseq uint64 4
let create4_lseq (x0 x1 x2 x3: uint64) : lseq uint64 4 = | false | null | false | let l = [x0; x1; x2; x3] in
assert_norm (FL.length l = 4);
Seq.seq_of_list l | {
"checked_file": "Hacl.Spec.P256.PrecompTable.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.PrecompBaseTable256.fsti.checked",
"Hacl.Spec.PrecompBaseTable.fsti.checked",
"Hacl.Spec.P256.Montgomery.fsti.checked",
"Hacl.Spec.Bignum.Definitions.fst.checked",
"Hacl.Impl.P256.Point.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Spec.P256.PrecompTable.fst"
} | [
"total"
] | [
"Lib.IntTypes.uint64",
"FStar.Seq.Properties.seq_of_list",
"Prims.unit",
"FStar.Pervasives.assert_norm",
"Prims.b2t",
"Prims.op_Equality",
"Prims.int",
"FStar.List.Tot.Base.length",
"Prims.list",
"Lib.IntTypes.int_t",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"Prims.Cons",
"Prims.Nil",
"Lib.Sequence.lseq"
] | [] | module Hacl.Spec.P256.PrecompTable
open FStar.Mul
open Lib.IntTypes
open Lib.Sequence
open Hacl.Impl.P256.Point
module S = Spec.P256
module SM = Hacl.Spec.P256.Montgomery
module BD = Hacl.Spec.Bignum.Definitions
module FL = FStar.List.Tot
module SPT = Hacl.Spec.PrecompBaseTable
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0" | false | false | Hacl.Spec.P256.PrecompTable.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val create4_lseq (x0 x1 x2 x3: uint64) : lseq uint64 4 | [] | Hacl.Spec.P256.PrecompTable.create4_lseq | {
"file_name": "code/ecdsap256/Hacl.Spec.P256.PrecompTable.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
x0: Lib.IntTypes.uint64 ->
x1: Lib.IntTypes.uint64 ->
x2: Lib.IntTypes.uint64 ->
x3: Lib.IntTypes.uint64
-> Lib.Sequence.lseq Lib.IntTypes.uint64 4 | {
"end_col": 19,
"end_line": 20,
"start_col": 55,
"start_line": 17
} |
FStar.Pervasives.Lemma | val create4_lemma (x0 x1 x2 x3:uint64) :
Lemma (let s = create4_lseq x0 x1 x2 x3 in
s.[0] == x0 /\ s.[1] == x1 /\ s.[2] == x2 /\ s.[3] == x3) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.PrecompBaseTable",
"short_module": "SPT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Definitions",
"short_module": "BD"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let create4_lemma x0 x1 x2 x3 =
Seq.elim_of_list [x0; x1; x2; x3] | val create4_lemma (x0 x1 x2 x3:uint64) :
Lemma (let s = create4_lseq x0 x1 x2 x3 in
s.[0] == x0 /\ s.[1] == x1 /\ s.[2] == x2 /\ s.[3] == x3)
let create4_lemma x0 x1 x2 x3 = | false | null | true | Seq.elim_of_list [x0; x1; x2; x3] | {
"checked_file": "Hacl.Spec.P256.PrecompTable.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.PrecompBaseTable256.fsti.checked",
"Hacl.Spec.PrecompBaseTable.fsti.checked",
"Hacl.Spec.P256.Montgomery.fsti.checked",
"Hacl.Spec.Bignum.Definitions.fst.checked",
"Hacl.Impl.P256.Point.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Spec.P256.PrecompTable.fst"
} | [
"lemma"
] | [
"Lib.IntTypes.uint64",
"FStar.Seq.Properties.elim_of_list",
"Prims.Cons",
"Prims.Nil",
"Prims.unit"
] | [] | module Hacl.Spec.P256.PrecompTable
open FStar.Mul
open Lib.IntTypes
open Lib.Sequence
open Hacl.Impl.P256.Point
module S = Spec.P256
module SM = Hacl.Spec.P256.Montgomery
module BD = Hacl.Spec.Bignum.Definitions
module FL = FStar.List.Tot
module SPT = Hacl.Spec.PrecompBaseTable
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
let create4_lseq (x0 x1 x2 x3:uint64) : lseq uint64 4 =
let l = [x0; x1; x2; x3] in
assert_norm (FL.length l = 4);
Seq.seq_of_list l
val create4_lemma (x0 x1 x2 x3:uint64) :
Lemma (let s = create4_lseq x0 x1 x2 x3 in
s.[0] == x0 /\ s.[1] == x1 /\ s.[2] == x2 /\ s.[3] == x3) | false | false | Hacl.Spec.P256.PrecompTable.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val create4_lemma (x0 x1 x2 x3:uint64) :
Lemma (let s = create4_lseq x0 x1 x2 x3 in
s.[0] == x0 /\ s.[1] == x1 /\ s.[2] == x2 /\ s.[3] == x3) | [] | Hacl.Spec.P256.PrecompTable.create4_lemma | {
"file_name": "code/ecdsap256/Hacl.Spec.P256.PrecompTable.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
x0: Lib.IntTypes.uint64 ->
x1: Lib.IntTypes.uint64 ->
x2: Lib.IntTypes.uint64 ->
x3: Lib.IntTypes.uint64
-> FStar.Pervasives.Lemma
(ensures
(let s = Hacl.Spec.P256.PrecompTable.create4_lseq x0 x1 x2 x3 in
s.[ 0 ] == x0 /\ s.[ 1 ] == x1 /\ s.[ 2 ] == x2 /\ s.[ 3 ] == x3)) | {
"end_col": 35,
"end_line": 27,
"start_col": 2,
"start_line": 27
} |
FStar.Pervasives.Lemma | val felem_to_list_lemma_eval: x:S.felem ->
Lemma (BD.bn_v (list_as_felem4 (felem_to_list x)) == x) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.PrecompBaseTable",
"short_module": "SPT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Definitions",
"short_module": "BD"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let felem_to_list_lemma_eval x =
let x0 = x % pow2 64 in
let x1 = x / pow2 64 % pow2 64 in
let x2 = x / pow2 128 % pow2 64 in
let x3 = x / pow2 192 % pow2 64 in
let bn_x = list_as_felem4 (felem_to_list x) in
create4_lemma (u64 x0) (u64 x1) (u64 x2) (u64 x3);
assert (v bn_x.[0] == x0 /\ v bn_x.[1] == x1 /\ v bn_x.[2] == x2 /\ v bn_x.[3] == x3);
Hacl.Impl.P256.Bignum.bn_v_is_as_nat bn_x;
assert (BD.bn_v bn_x = x0 + x1 * pow2 64 + x2 * pow2 128 + x3 * pow2 192);
Hacl.Spec.PrecompBaseTable256.lemma_decompose_nat256_as_four_u64 x | val felem_to_list_lemma_eval: x:S.felem ->
Lemma (BD.bn_v (list_as_felem4 (felem_to_list x)) == x)
let felem_to_list_lemma_eval x = | false | null | true | let x0 = x % pow2 64 in
let x1 = x / pow2 64 % pow2 64 in
let x2 = x / pow2 128 % pow2 64 in
let x3 = x / pow2 192 % pow2 64 in
let bn_x = list_as_felem4 (felem_to_list x) in
create4_lemma (u64 x0) (u64 x1) (u64 x2) (u64 x3);
assert (v bn_x.[ 0 ] == x0 /\ v bn_x.[ 1 ] == x1 /\ v bn_x.[ 2 ] == x2 /\ v bn_x.[ 3 ] == x3);
Hacl.Impl.P256.Bignum.bn_v_is_as_nat bn_x;
assert (BD.bn_v bn_x = x0 + x1 * pow2 64 + x2 * pow2 128 + x3 * pow2 192);
Hacl.Spec.PrecompBaseTable256.lemma_decompose_nat256_as_four_u64 x | {
"checked_file": "Hacl.Spec.P256.PrecompTable.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.PrecompBaseTable256.fsti.checked",
"Hacl.Spec.PrecompBaseTable.fsti.checked",
"Hacl.Spec.P256.Montgomery.fsti.checked",
"Hacl.Spec.Bignum.Definitions.fst.checked",
"Hacl.Impl.P256.Point.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Spec.P256.PrecompTable.fst"
} | [
"lemma"
] | [
"Spec.P256.PointOps.felem",
"Hacl.Spec.PrecompBaseTable256.lemma_decompose_nat256_as_four_u64",
"Prims.unit",
"Prims._assert",
"Prims.b2t",
"Prims.op_Equality",
"Prims.int",
"Hacl.Spec.Bignum.Definitions.bn_v",
"Lib.IntTypes.U64",
"Prims.op_Addition",
"FStar.Mul.op_Star",
"Prims.pow2",
"Hacl.Impl.P256.Bignum.bn_v_is_as_nat",
"Prims.l_and",
"Prims.eq2",
"Lib.IntTypes.v",
"Lib.IntTypes.SEC",
"Lib.Sequence.op_String_Access",
"Lib.IntTypes.uint64",
"Hacl.Spec.P256.PrecompTable.create4_lemma",
"Lib.IntTypes.u64",
"Lib.Sequence.lseq",
"Lib.IntTypes.int_t",
"Hacl.Spec.P256.PrecompTable.list_as_felem4",
"Hacl.Spec.P256.PrecompTable.felem_to_list",
"Prims.op_Modulus",
"Prims.op_Division"
] | [] | module Hacl.Spec.P256.PrecompTable
open FStar.Mul
open Lib.IntTypes
open Lib.Sequence
open Hacl.Impl.P256.Point
module S = Spec.P256
module SM = Hacl.Spec.P256.Montgomery
module BD = Hacl.Spec.Bignum.Definitions
module FL = FStar.List.Tot
module SPT = Hacl.Spec.PrecompBaseTable
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
let create4_lseq (x0 x1 x2 x3:uint64) : lseq uint64 4 =
let l = [x0; x1; x2; x3] in
assert_norm (FL.length l = 4);
Seq.seq_of_list l
val create4_lemma (x0 x1 x2 x3:uint64) :
Lemma (let s = create4_lseq x0 x1 x2 x3 in
s.[0] == x0 /\ s.[1] == x1 /\ s.[2] == x2 /\ s.[3] == x3)
let create4_lemma x0 x1 x2 x3 =
Seq.elim_of_list [x0; x1; x2; x3]
//-----------------------------------
noextract
let list_as_felem4 (f:felem_list) : lseq uint64 4 =
Seq.seq_of_list f <: lseq uint64 4
val felem_to_list_lemma_eval: x:S.felem ->
Lemma (BD.bn_v (list_as_felem4 (felem_to_list x)) == x) | false | false | Hacl.Spec.P256.PrecompTable.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val felem_to_list_lemma_eval: x:S.felem ->
Lemma (BD.bn_v (list_as_felem4 (felem_to_list x)) == x) | [] | Hacl.Spec.P256.PrecompTable.felem_to_list_lemma_eval | {
"file_name": "code/ecdsap256/Hacl.Spec.P256.PrecompTable.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | x: Spec.P256.PointOps.felem
-> FStar.Pervasives.Lemma
(ensures
Hacl.Spec.Bignum.Definitions.bn_v (Hacl.Spec.P256.PrecompTable.list_as_felem4 (Hacl.Spec.P256.PrecompTable.felem_to_list
x)) ==
x) | {
"end_col": 68,
"end_line": 49,
"start_col": 32,
"start_line": 39
} |
FStar.Pervasives.Lemma | val proj_point_to_list_sub: p:S.proj_point -> Lemma
(let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
let px_list = felem_to_list pxM in
let py_list = felem_to_list pyM in
let pz_list = felem_to_list pzM in
let p_list = FL.(px_list @ py_list @ pz_list) in
let p_lseq = Seq.seq_of_list p_list <: lseq uint64 12 in
let px_lseq = Seq.seq_of_list px_list <: lseq uint64 4 in
let py_lseq = Seq.seq_of_list py_list <: lseq uint64 4 in
let pz_lseq = Seq.seq_of_list pz_list <: lseq uint64 4 in
sub p_lseq 0 4 == px_lseq /\
sub p_lseq 4 4 == py_lseq /\
sub p_lseq 8 4 == pz_lseq) | [
{
"abbrev": true,
"full_module": "Hacl.Spec.PrecompBaseTable",
"short_module": "SPT"
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Definitions",
"short_module": "BD"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": true,
"full_module": "FStar.List.Tot",
"short_module": "FL"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.P256.Montgomery",
"short_module": "SM"
},
{
"abbrev": true,
"full_module": "Spec.P256",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Impl.P256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Sequence",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Spec.P256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let proj_point_to_list_sub p =
let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
let px_list = felem_to_list pxM in
let py_list = felem_to_list pyM in
let pz_list = felem_to_list pzM in
FL.append_assoc px_list py_list pz_list;
SPT.seq_of_list_append_lemma px_list py_list;
SPT.seq_of_list_append_lemma FL.(px_list @ py_list) pz_list | val proj_point_to_list_sub: p:S.proj_point -> Lemma
(let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
let px_list = felem_to_list pxM in
let py_list = felem_to_list pyM in
let pz_list = felem_to_list pzM in
let p_list = FL.(px_list @ py_list @ pz_list) in
let p_lseq = Seq.seq_of_list p_list <: lseq uint64 12 in
let px_lseq = Seq.seq_of_list px_list <: lseq uint64 4 in
let py_lseq = Seq.seq_of_list py_list <: lseq uint64 4 in
let pz_lseq = Seq.seq_of_list pz_list <: lseq uint64 4 in
sub p_lseq 0 4 == px_lseq /\
sub p_lseq 4 4 == py_lseq /\
sub p_lseq 8 4 == pz_lseq)
let proj_point_to_list_sub p = | false | null | true | let px, py, pz = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
let px_list = felem_to_list pxM in
let py_list = felem_to_list pyM in
let pz_list = felem_to_list pzM in
FL.append_assoc px_list py_list pz_list;
SPT.seq_of_list_append_lemma px_list py_list;
SPT.seq_of_list_append_lemma FL.(px_list @ py_list) pz_list | {
"checked_file": "Hacl.Spec.P256.PrecompTable.fst.checked",
"dependencies": [
"Spec.P256.fst.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Hacl.Spec.PrecompBaseTable256.fsti.checked",
"Hacl.Spec.PrecompBaseTable.fsti.checked",
"Hacl.Spec.P256.Montgomery.fsti.checked",
"Hacl.Spec.Bignum.Definitions.fst.checked",
"Hacl.Impl.P256.Point.fsti.checked",
"Hacl.Impl.P256.Bignum.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked"
],
"interface_file": true,
"source_file": "Hacl.Spec.P256.PrecompTable.fst"
} | [
"lemma"
] | [
"Spec.P256.PointOps.proj_point",
"Prims.nat",
"Hacl.Spec.PrecompBaseTable.seq_of_list_append_lemma",
"Lib.IntTypes.uint64",
"FStar.List.Tot.Base.op_At",
"Prims.unit",
"FStar.List.Tot.Properties.append_assoc",
"Hacl.Spec.P256.PrecompTable.felem_list",
"Hacl.Spec.P256.PrecompTable.felem_to_list",
"Spec.P256.PointOps.felem",
"Hacl.Spec.P256.Montgomery.to_mont"
] | [] | module Hacl.Spec.P256.PrecompTable
open FStar.Mul
open Lib.IntTypes
open Lib.Sequence
open Hacl.Impl.P256.Point
module S = Spec.P256
module SM = Hacl.Spec.P256.Montgomery
module BD = Hacl.Spec.Bignum.Definitions
module FL = FStar.List.Tot
module SPT = Hacl.Spec.PrecompBaseTable
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
let create4_lseq (x0 x1 x2 x3:uint64) : lseq uint64 4 =
let l = [x0; x1; x2; x3] in
assert_norm (FL.length l = 4);
Seq.seq_of_list l
val create4_lemma (x0 x1 x2 x3:uint64) :
Lemma (let s = create4_lseq x0 x1 x2 x3 in
s.[0] == x0 /\ s.[1] == x1 /\ s.[2] == x2 /\ s.[3] == x3)
let create4_lemma x0 x1 x2 x3 =
Seq.elim_of_list [x0; x1; x2; x3]
//-----------------------------------
noextract
let list_as_felem4 (f:felem_list) : lseq uint64 4 =
Seq.seq_of_list f <: lseq uint64 4
val felem_to_list_lemma_eval: x:S.felem ->
Lemma (BD.bn_v (list_as_felem4 (felem_to_list x)) == x)
let felem_to_list_lemma_eval x =
let x0 = x % pow2 64 in
let x1 = x / pow2 64 % pow2 64 in
let x2 = x / pow2 128 % pow2 64 in
let x3 = x / pow2 192 % pow2 64 in
let bn_x = list_as_felem4 (felem_to_list x) in
create4_lemma (u64 x0) (u64 x1) (u64 x2) (u64 x3);
assert (v bn_x.[0] == x0 /\ v bn_x.[1] == x1 /\ v bn_x.[2] == x2 /\ v bn_x.[3] == x3);
Hacl.Impl.P256.Bignum.bn_v_is_as_nat bn_x;
assert (BD.bn_v bn_x = x0 + x1 * pow2 64 + x2 * pow2 128 + x3 * pow2 192);
Hacl.Spec.PrecompBaseTable256.lemma_decompose_nat256_as_four_u64 x
//--------------------------------------------
val proj_point_to_list_sub: p:S.proj_point -> Lemma
(let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
let px_list = felem_to_list pxM in
let py_list = felem_to_list pyM in
let pz_list = felem_to_list pzM in
let p_list = FL.(px_list @ py_list @ pz_list) in
let p_lseq = Seq.seq_of_list p_list <: lseq uint64 12 in
let px_lseq = Seq.seq_of_list px_list <: lseq uint64 4 in
let py_lseq = Seq.seq_of_list py_list <: lseq uint64 4 in
let pz_lseq = Seq.seq_of_list pz_list <: lseq uint64 4 in
sub p_lseq 0 4 == px_lseq /\
sub p_lseq 4 4 == py_lseq /\
sub p_lseq 8 4 == pz_lseq) | false | false | Hacl.Spec.P256.PrecompTable.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val proj_point_to_list_sub: p:S.proj_point -> Lemma
(let (px, py, pz) = p in
let pxM = SM.to_mont px in
let pyM = SM.to_mont py in
let pzM = SM.to_mont pz in
let px_list = felem_to_list pxM in
let py_list = felem_to_list pyM in
let pz_list = felem_to_list pzM in
let p_list = FL.(px_list @ py_list @ pz_list) in
let p_lseq = Seq.seq_of_list p_list <: lseq uint64 12 in
let px_lseq = Seq.seq_of_list px_list <: lseq uint64 4 in
let py_lseq = Seq.seq_of_list py_list <: lseq uint64 4 in
let pz_lseq = Seq.seq_of_list pz_list <: lseq uint64 4 in
sub p_lseq 0 4 == px_lseq /\
sub p_lseq 4 4 == py_lseq /\
sub p_lseq 8 4 == pz_lseq) | [] | Hacl.Spec.P256.PrecompTable.proj_point_to_list_sub | {
"file_name": "code/ecdsap256/Hacl.Spec.P256.PrecompTable.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | p: Spec.P256.PointOps.proj_point
-> FStar.Pervasives.Lemma
(ensures
(let _ = p in
(let FStar.Pervasives.Native.Mktuple3 #_ #_ #_ px py pz = _ in
let pxM = Hacl.Spec.P256.Montgomery.to_mont px in
let pyM = Hacl.Spec.P256.Montgomery.to_mont py in
let pzM = Hacl.Spec.P256.Montgomery.to_mont pz in
let px_list = Hacl.Spec.P256.PrecompTable.felem_to_list pxM in
let py_list = Hacl.Spec.P256.PrecompTable.felem_to_list pyM in
let pz_list = Hacl.Spec.P256.PrecompTable.felem_to_list pzM in
let p_list = px_list @ py_list @ pz_list in
let p_lseq =
FStar.Seq.Properties.seq_of_list p_list <: Lib.Sequence.lseq Lib.IntTypes.uint64 12
in
let px_lseq =
FStar.Seq.Properties.seq_of_list px_list <: Lib.Sequence.lseq Lib.IntTypes.uint64 4
in
let py_lseq =
FStar.Seq.Properties.seq_of_list py_list <: Lib.Sequence.lseq Lib.IntTypes.uint64 4
in
let pz_lseq =
FStar.Seq.Properties.seq_of_list pz_list <: Lib.Sequence.lseq Lib.IntTypes.uint64 4
in
Lib.Sequence.sub p_lseq 0 4 == px_lseq /\ Lib.Sequence.sub p_lseq 4 4 == py_lseq /\
Lib.Sequence.sub p_lseq 8 4 == pz_lseq)
<:
Type0)) | {
"end_col": 61,
"end_line": 82,
"start_col": 30,
"start_line": 71
} |
Prims.Tot | [@@ FStar.Tactics.Typeclasses.tcinstance]
val bn_of_mont (t: limb_t) (x: mont t) : BN.bn t | [
{
"abbrev": true,
"full_module": "Hacl.Bignum",
"short_module": "BN"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum",
"short_module": "SB"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Montgomery",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "Lib.LoopCombinators",
"short_module": "Loops"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.ModInvLimb",
"short_module": null
},
{
"abbrev": true,
"full_module": "Hacl.Bignum",
"short_module": "BN"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Montgomery",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | instance bn_of_mont (t:limb_t) (x:mont t) : BN.bn t = x.bn | [@@ FStar.Tactics.Typeclasses.tcinstance]
val bn_of_mont (t: limb_t) (x: mont t) : BN.bn t
[@@ FStar.Tactics.Typeclasses.tcinstance]
let bn_of_mont (t: limb_t) (x: mont t) : BN.bn t = | false | null | false | x.bn | {
"checked_file": "Hacl.Bignum.Montgomery.fsti.checked",
"dependencies": [
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.Bignum.Montgomery.fsti.checked",
"Hacl.Bignum.ModInvLimb.fsti.checked",
"Hacl.Bignum.Definitions.fst.checked",
"Hacl.Bignum.fsti.checked",
"FStar.Tactics.Typeclasses.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Bignum.Montgomery.fsti"
} | [
"total"
] | [
"Hacl.Bignum.Definitions.limb_t",
"Hacl.Bignum.Montgomery.mont",
"Hacl.Bignum.Montgomery.__proj__Mkmont__item__bn",
"Hacl.Bignum.bn"
] | [] | module Hacl.Bignum.Montgomery
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.Bignum.Definitions
module S = Hacl.Spec.Bignum.Montgomery
module BN = Hacl.Bignum
include Hacl.Bignum.ModInvLimb
#reset-options "--z3rlimit 50 --fuel 0 --ifuel 0"
inline_for_extraction noextract
let bn_check_modulus_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len ->
Stack (limb t)
(requires fun h -> live h n)
(ensures fun h0 r h1 -> modifies0 h0 h1 /\
r == S.bn_check_modulus (as_seq h0 n))
inline_for_extraction noextract
val bn_check_modulus: #t:limb_t -> #len:BN.meta_len t -> bn_check_modulus_st t len
inline_for_extraction noextract
let bn_precomp_r2_mod_n_st (t:limb_t) (len:BN.meta_len t) =
nBits:size_t{v nBits / bits t < v len}
-> n:lbignum t len
-> res:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h res /\ disjoint n res)
(ensures fun h0 _ h1 -> modifies (loc res) h0 h1 /\
as_seq h1 res == S.bn_precomp_r2_mod_n (v nBits) (as_seq h0 n))
inline_for_extraction noextract
val bn_precomp_r2_mod_n: #t:limb_t -> k:BN.bn t -> bn_precomp_r2_mod_n_st t k.BN.len
inline_for_extraction noextract
let bn_mont_precomp_st (t:limb_t) (len:BN.meta_len t) =
nBits:size_t
-> n:lbignum t len
-> r2:lbignum t len ->
Stack (limb t)
(requires fun h ->
live h n /\ live h r2 /\ disjoint n r2 /\
1 < bn_v h n /\ bn_v h n % 2 = 1 /\
pow2 (v nBits) < bn_v h n /\ v nBits / bits t < v len)
(ensures fun h0 mu h1 -> modifies (loc r2) h0 h1 /\
(as_seq h1 r2, mu) == S.bn_mont_precomp (v nBits) (as_seq h0 n))
inline_for_extraction noextract
val bn_mont_precomp:
#t:limb_t
-> len:BN.meta_len t
-> precompr2:bn_precomp_r2_mod_n_st t len ->
bn_mont_precomp_st t len
inline_for_extraction noextract
let bn_mont_reduction_st (t:limb_t) (len:size_t{0 < v len /\ v len + v len <= max_size_t}) =
n:lbignum t len
-> mu:limb t
-> c:lbignum t (len +! len)
-> res:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h c /\ live h res /\
disjoint res n /\ disjoint res c /\ disjoint n c)
(ensures fun h0 _ h1 -> modifies (loc res |+| loc c) h0 h1 /\
as_seq h1 res == S.bn_mont_reduction (as_seq h0 n) mu (as_seq h0 c))
inline_for_extraction noextract
val bn_mont_reduction: #t:limb_t -> k:BN.bn t -> bn_mont_reduction_st t k.BN.len
inline_for_extraction noextract
let bn_to_mont_st (t:limb_t) (nLen:BN.meta_len t) =
n:lbignum t nLen
-> mu:limb t
-> r2:lbignum t nLen
-> a:lbignum t nLen
-> aM:lbignum t nLen ->
Stack unit
(requires fun h ->
live h n /\ live h r2 /\ live h a /\ live h aM /\
disjoint a r2 /\ disjoint a n /\ disjoint a aM /\
disjoint n r2 /\ disjoint n aM /\ disjoint r2 aM)
(ensures fun h0 _ h1 -> modifies (loc aM) h0 h1 /\
as_seq h1 aM == S.bn_to_mont (as_seq h0 n) mu (as_seq h0 r2) (as_seq h0 a))
inline_for_extraction noextract
val bn_to_mont: #t:limb_t -> k:BN.bn t -> mr:bn_mont_reduction_st t k.BN.len -> bn_to_mont_st t k.BN.len
inline_for_extraction noextract
let bn_from_mont_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len
-> mu:limb t
-> aM:lbignum t len
-> a:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h a /\ live h aM /\
disjoint aM a /\ disjoint aM n /\ disjoint a n)
(ensures fun h0 _ h1 -> modifies (loc a) h0 h1 /\
as_seq h1 a == S.bn_from_mont (as_seq h0 n) mu (as_seq h0 aM))
// This one just needs a specialized implementation of mont_reduction. No point
// in doing a type class for a single function , so we take it as a parameter.
inline_for_extraction noextract
val bn_from_mont: #t:limb_t -> k:BN.bn t -> mr:bn_mont_reduction_st t k.BN.len -> bn_from_mont_st t k.BN.len
inline_for_extraction noextract
let bn_mont_mul_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len
-> mu:limb t
-> aM:lbignum t len
-> bM:lbignum t len
-> resM:lbignum t len ->
Stack unit
(requires fun h ->
live h aM /\ live h bM /\ live h resM /\ live h n /\
disjoint resM n /\ eq_or_disjoint aM bM /\
eq_or_disjoint aM resM /\ eq_or_disjoint bM resM)
(ensures fun h0 _ h1 -> modifies (loc resM) h0 h1 /\
as_seq h1 resM == S.bn_mont_mul (as_seq h0 n) mu (as_seq h0 aM) (as_seq h0 bM))
/// This one needs both the type class and a specialized montgomery reduction.
inline_for_extraction noextract
val bn_mont_mul: #t:limb_t -> k:BN.bn t -> mr:bn_mont_reduction_st t k.BN.len -> bn_mont_mul_st t k.BN.len
inline_for_extraction noextract
let bn_mont_sqr_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len
-> mu:limb t
-> aM:lbignum t len
-> resM:lbignum t len ->
Stack unit
(requires fun h ->
live h aM /\ live h resM /\ live h n /\
disjoint resM n /\ eq_or_disjoint aM resM)
(ensures fun h0 _ h1 -> modifies (loc resM) h0 h1 /\
as_seq h1 resM == S.bn_mont_sqr (as_seq h0 n) mu (as_seq h0 aM))
/// This one needs both the type class and a specialized montgomery reduction.
inline_for_extraction noextract
val bn_mont_sqr: #t:limb_t -> k:BN.bn t -> mr:bn_mont_reduction_st t k.BN.len -> bn_mont_sqr_st t k.BN.len
inline_for_extraction noextract
class mont (t:limb_t) = {
bn: BN.bn t;
mont_check: bn_check_modulus_st t bn.BN.len;
precomp: bn_precomp_r2_mod_n_st t bn.BN.len;
reduction: bn_mont_reduction_st t bn.BN.len;
to: bn_to_mont_st t bn.BN.len;
from: bn_from_mont_st t bn.BN.len;
mul: bn_mont_mul_st t bn.BN.len;
sqr: bn_mont_sqr_st t bn.BN.len;
}
/// Encoding type-class hierarchies via a hook for type class resolution. | false | false | Hacl.Bignum.Montgomery.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | [@@ FStar.Tactics.Typeclasses.tcinstance]
val bn_of_mont (t: limb_t) (x: mont t) : BN.bn t | [] | Hacl.Bignum.Montgomery.bn_of_mont | {
"file_name": "code/bignum/Hacl.Bignum.Montgomery.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | t: Hacl.Bignum.Definitions.limb_t -> x: Hacl.Bignum.Montgomery.mont t -> Hacl.Bignum.bn t | {
"end_col": 58,
"end_line": 184,
"start_col": 54,
"start_line": 184
} |
Prims.Tot | [
{
"abbrev": true,
"full_module": "Hacl.Bignum",
"short_module": "BN"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum",
"short_module": "SB"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Montgomery",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "Lib.LoopCombinators",
"short_module": "Loops"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.ModInvLimb",
"short_module": null
},
{
"abbrev": true,
"full_module": "Hacl.Bignum",
"short_module": "BN"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Montgomery",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let bn_precomp_r2_mod_n_st (t:limb_t) (len:BN.meta_len t) =
nBits:size_t{v nBits / bits t < v len}
-> n:lbignum t len
-> res:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h res /\ disjoint n res)
(ensures fun h0 _ h1 -> modifies (loc res) h0 h1 /\
as_seq h1 res == S.bn_precomp_r2_mod_n (v nBits) (as_seq h0 n)) | let bn_precomp_r2_mod_n_st (t: limb_t) (len: BN.meta_len t) = | false | null | false | nBits: size_t{v nBits / bits t < v len} -> n: lbignum t len -> res: lbignum t len
-> Stack unit
(requires fun h -> live h n /\ live h res /\ disjoint n res)
(ensures
fun h0 _ h1 ->
modifies (loc res) h0 h1 /\ as_seq h1 res == S.bn_precomp_r2_mod_n (v nBits) (as_seq h0 n)
) | {
"checked_file": "Hacl.Bignum.Montgomery.fsti.checked",
"dependencies": [
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.Bignum.Montgomery.fsti.checked",
"Hacl.Bignum.ModInvLimb.fsti.checked",
"Hacl.Bignum.Definitions.fst.checked",
"Hacl.Bignum.fsti.checked",
"FStar.Tactics.Typeclasses.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Bignum.Montgomery.fsti"
} | [
"total"
] | [
"Hacl.Bignum.Definitions.limb_t",
"Hacl.Bignum.meta_len",
"Lib.IntTypes.size_t",
"Prims.b2t",
"Prims.op_LessThan",
"Prims.op_Division",
"Lib.IntTypes.v",
"Lib.IntTypes.U32",
"Lib.IntTypes.PUB",
"Lib.IntTypes.bits",
"Hacl.Bignum.Definitions.lbignum",
"Prims.unit",
"FStar.Monotonic.HyperStack.mem",
"Prims.l_and",
"Lib.Buffer.live",
"Lib.Buffer.MUT",
"Hacl.Bignum.Definitions.limb",
"Lib.Buffer.disjoint",
"Lib.Buffer.modifies",
"Lib.Buffer.loc",
"Prims.eq2",
"Lib.Sequence.lseq",
"Lib.Buffer.as_seq",
"Hacl.Spec.Bignum.Montgomery.bn_precomp_r2_mod_n"
] | [] | module Hacl.Bignum.Montgomery
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.Bignum.Definitions
module S = Hacl.Spec.Bignum.Montgomery
module BN = Hacl.Bignum
include Hacl.Bignum.ModInvLimb
#reset-options "--z3rlimit 50 --fuel 0 --ifuel 0"
inline_for_extraction noextract
let bn_check_modulus_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len ->
Stack (limb t)
(requires fun h -> live h n)
(ensures fun h0 r h1 -> modifies0 h0 h1 /\
r == S.bn_check_modulus (as_seq h0 n))
inline_for_extraction noextract
val bn_check_modulus: #t:limb_t -> #len:BN.meta_len t -> bn_check_modulus_st t len
inline_for_extraction noextract | false | false | Hacl.Bignum.Montgomery.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val bn_precomp_r2_mod_n_st : t: Hacl.Bignum.Definitions.limb_t -> len: Hacl.Bignum.meta_len t -> Type0 | [] | Hacl.Bignum.Montgomery.bn_precomp_r2_mod_n_st | {
"file_name": "code/bignum/Hacl.Bignum.Montgomery.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | t: Hacl.Bignum.Definitions.limb_t -> len: Hacl.Bignum.meta_len t -> Type0 | {
"end_col": 67,
"end_line": 42,
"start_col": 4,
"start_line": 35
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Hacl.Bignum.ModInvLimb",
"short_module": null
},
{
"abbrev": true,
"full_module": "Hacl.Bignum",
"short_module": "BN"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Montgomery",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let bn_check_modulus_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len ->
Stack (limb t)
(requires fun h -> live h n)
(ensures fun h0 r h1 -> modifies0 h0 h1 /\
r == S.bn_check_modulus (as_seq h0 n)) | let bn_check_modulus_st (t: limb_t) (len: BN.meta_len t) = | false | null | false | n: lbignum t len
-> Stack (limb t)
(requires fun h -> live h n)
(ensures fun h0 r h1 -> modifies0 h0 h1 /\ r == S.bn_check_modulus (as_seq h0 n)) | {
"checked_file": "Hacl.Bignum.Montgomery.fsti.checked",
"dependencies": [
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.Bignum.Montgomery.fsti.checked",
"Hacl.Bignum.ModInvLimb.fsti.checked",
"Hacl.Bignum.Definitions.fst.checked",
"Hacl.Bignum.fsti.checked",
"FStar.Tactics.Typeclasses.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Bignum.Montgomery.fsti"
} | [
"total"
] | [
"Hacl.Bignum.Definitions.limb_t",
"Hacl.Bignum.meta_len",
"Hacl.Bignum.Definitions.lbignum",
"Hacl.Bignum.Definitions.limb",
"FStar.Monotonic.HyperStack.mem",
"Lib.Buffer.live",
"Lib.Buffer.MUT",
"Prims.l_and",
"Lib.Buffer.modifies0",
"Prims.eq2",
"Hacl.Spec.Bignum.Definitions.limb",
"Hacl.Spec.Bignum.Montgomery.bn_check_modulus",
"Lib.IntTypes.v",
"Lib.IntTypes.U32",
"Lib.IntTypes.PUB",
"Lib.Buffer.as_seq"
] | [] | module Hacl.Bignum.Montgomery
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.Bignum.Definitions
module S = Hacl.Spec.Bignum.Montgomery
module BN = Hacl.Bignum
include Hacl.Bignum.ModInvLimb
#reset-options "--z3rlimit 50 --fuel 0 --ifuel 0"
inline_for_extraction noextract | false | false | Hacl.Bignum.Montgomery.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val bn_check_modulus_st : t: Hacl.Bignum.Definitions.limb_t -> len: Hacl.Bignum.meta_len t -> Type0 | [] | Hacl.Bignum.Montgomery.bn_check_modulus_st | {
"file_name": "code/bignum/Hacl.Bignum.Montgomery.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | t: Hacl.Bignum.Definitions.limb_t -> len: Hacl.Bignum.meta_len t -> Type0 | {
"end_col": 42,
"end_line": 26,
"start_col": 2,
"start_line": 22
} |
|
Prims.Tot | [
{
"abbrev": true,
"full_module": "Hacl.Bignum",
"short_module": "BN"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum",
"short_module": "SB"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Montgomery",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "Lib.LoopCombinators",
"short_module": "Loops"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.ModInvLimb",
"short_module": null
},
{
"abbrev": true,
"full_module": "Hacl.Bignum",
"short_module": "BN"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Montgomery",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let bn_mont_reduction_st (t:limb_t) (len:size_t{0 < v len /\ v len + v len <= max_size_t}) =
n:lbignum t len
-> mu:limb t
-> c:lbignum t (len +! len)
-> res:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h c /\ live h res /\
disjoint res n /\ disjoint res c /\ disjoint n c)
(ensures fun h0 _ h1 -> modifies (loc res |+| loc c) h0 h1 /\
as_seq h1 res == S.bn_mont_reduction (as_seq h0 n) mu (as_seq h0 c)) | let bn_mont_reduction_st (t: limb_t) (len: size_t{0 < v len /\ v len + v len <= max_size_t}) = | false | null | false | n: lbignum t len -> mu: limb t -> c: lbignum t (len +! len) -> res: lbignum t len
-> Stack unit
(requires
fun h ->
live h n /\ live h c /\ live h res /\ disjoint res n /\ disjoint res c /\ disjoint n c)
(ensures
fun h0 _ h1 ->
modifies (loc res |+| loc c) h0 h1 /\
as_seq h1 res == S.bn_mont_reduction (as_seq h0 n) mu (as_seq h0 c)) | {
"checked_file": "Hacl.Bignum.Montgomery.fsti.checked",
"dependencies": [
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.Bignum.Montgomery.fsti.checked",
"Hacl.Bignum.ModInvLimb.fsti.checked",
"Hacl.Bignum.Definitions.fst.checked",
"Hacl.Bignum.fsti.checked",
"FStar.Tactics.Typeclasses.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Bignum.Montgomery.fsti"
} | [
"total"
] | [
"Hacl.Bignum.Definitions.limb_t",
"Lib.IntTypes.size_t",
"Prims.l_and",
"Prims.b2t",
"Prims.op_LessThan",
"Lib.IntTypes.v",
"Lib.IntTypes.U32",
"Lib.IntTypes.PUB",
"Prims.op_LessThanOrEqual",
"Prims.op_Addition",
"Lib.IntTypes.max_size_t",
"Hacl.Bignum.Definitions.lbignum",
"Hacl.Bignum.Definitions.limb",
"Lib.IntTypes.op_Plus_Bang",
"Prims.unit",
"FStar.Monotonic.HyperStack.mem",
"Lib.Buffer.live",
"Lib.Buffer.MUT",
"Lib.Buffer.disjoint",
"Lib.Buffer.modifies",
"Lib.Buffer.op_Bar_Plus_Bar",
"Lib.Buffer.loc",
"Prims.eq2",
"Lib.Sequence.lseq",
"Lib.Buffer.as_seq",
"Hacl.Spec.Bignum.Montgomery.bn_mont_reduction"
] | [] | module Hacl.Bignum.Montgomery
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.Bignum.Definitions
module S = Hacl.Spec.Bignum.Montgomery
module BN = Hacl.Bignum
include Hacl.Bignum.ModInvLimb
#reset-options "--z3rlimit 50 --fuel 0 --ifuel 0"
inline_for_extraction noextract
let bn_check_modulus_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len ->
Stack (limb t)
(requires fun h -> live h n)
(ensures fun h0 r h1 -> modifies0 h0 h1 /\
r == S.bn_check_modulus (as_seq h0 n))
inline_for_extraction noextract
val bn_check_modulus: #t:limb_t -> #len:BN.meta_len t -> bn_check_modulus_st t len
inline_for_extraction noextract
let bn_precomp_r2_mod_n_st (t:limb_t) (len:BN.meta_len t) =
nBits:size_t{v nBits / bits t < v len}
-> n:lbignum t len
-> res:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h res /\ disjoint n res)
(ensures fun h0 _ h1 -> modifies (loc res) h0 h1 /\
as_seq h1 res == S.bn_precomp_r2_mod_n (v nBits) (as_seq h0 n))
inline_for_extraction noextract
val bn_precomp_r2_mod_n: #t:limb_t -> k:BN.bn t -> bn_precomp_r2_mod_n_st t k.BN.len
inline_for_extraction noextract
let bn_mont_precomp_st (t:limb_t) (len:BN.meta_len t) =
nBits:size_t
-> n:lbignum t len
-> r2:lbignum t len ->
Stack (limb t)
(requires fun h ->
live h n /\ live h r2 /\ disjoint n r2 /\
1 < bn_v h n /\ bn_v h n % 2 = 1 /\
pow2 (v nBits) < bn_v h n /\ v nBits / bits t < v len)
(ensures fun h0 mu h1 -> modifies (loc r2) h0 h1 /\
(as_seq h1 r2, mu) == S.bn_mont_precomp (v nBits) (as_seq h0 n))
inline_for_extraction noextract
val bn_mont_precomp:
#t:limb_t
-> len:BN.meta_len t
-> precompr2:bn_precomp_r2_mod_n_st t len ->
bn_mont_precomp_st t len
inline_for_extraction noextract | false | false | Hacl.Bignum.Montgomery.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val bn_mont_reduction_st : t: Hacl.Bignum.Definitions.limb_t ->
len:
Lib.IntTypes.size_t
{ 0 < Lib.IntTypes.v len /\
Lib.IntTypes.v len + Lib.IntTypes.v len <= Lib.IntTypes.max_size_t }
-> Type0 | [] | Hacl.Bignum.Montgomery.bn_mont_reduction_st | {
"file_name": "code/bignum/Hacl.Bignum.Montgomery.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
t: Hacl.Bignum.Definitions.limb_t ->
len:
Lib.IntTypes.size_t
{ 0 < Lib.IntTypes.v len /\
Lib.IntTypes.v len + Lib.IntTypes.v len <= Lib.IntTypes.max_size_t }
-> Type0 | {
"end_col": 72,
"end_line": 83,
"start_col": 4,
"start_line": 74
} |
|
Prims.Tot | [
{
"abbrev": true,
"full_module": "Hacl.Bignum",
"short_module": "BN"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum",
"short_module": "SB"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Montgomery",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "Lib.LoopCombinators",
"short_module": "Loops"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.ModInvLimb",
"short_module": null
},
{
"abbrev": true,
"full_module": "Hacl.Bignum",
"short_module": "BN"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Montgomery",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let bn_to_mont_st (t:limb_t) (nLen:BN.meta_len t) =
n:lbignum t nLen
-> mu:limb t
-> r2:lbignum t nLen
-> a:lbignum t nLen
-> aM:lbignum t nLen ->
Stack unit
(requires fun h ->
live h n /\ live h r2 /\ live h a /\ live h aM /\
disjoint a r2 /\ disjoint a n /\ disjoint a aM /\
disjoint n r2 /\ disjoint n aM /\ disjoint r2 aM)
(ensures fun h0 _ h1 -> modifies (loc aM) h0 h1 /\
as_seq h1 aM == S.bn_to_mont (as_seq h0 n) mu (as_seq h0 r2) (as_seq h0 a)) | let bn_to_mont_st (t: limb_t) (nLen: BN.meta_len t) = | false | null | false | n: lbignum t nLen -> mu: limb t -> r2: lbignum t nLen -> a: lbignum t nLen -> aM: lbignum t nLen
-> Stack unit
(requires
fun h ->
live h n /\ live h r2 /\ live h a /\ live h aM /\ disjoint a r2 /\ disjoint a n /\
disjoint a aM /\ disjoint n r2 /\ disjoint n aM /\ disjoint r2 aM)
(ensures
fun h0 _ h1 ->
modifies (loc aM) h0 h1 /\
as_seq h1 aM == S.bn_to_mont (as_seq h0 n) mu (as_seq h0 r2) (as_seq h0 a)) | {
"checked_file": "Hacl.Bignum.Montgomery.fsti.checked",
"dependencies": [
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.Bignum.Montgomery.fsti.checked",
"Hacl.Bignum.ModInvLimb.fsti.checked",
"Hacl.Bignum.Definitions.fst.checked",
"Hacl.Bignum.fsti.checked",
"FStar.Tactics.Typeclasses.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Bignum.Montgomery.fsti"
} | [
"total"
] | [
"Hacl.Bignum.Definitions.limb_t",
"Hacl.Bignum.meta_len",
"Hacl.Bignum.Definitions.lbignum",
"Hacl.Bignum.Definitions.limb",
"Prims.unit",
"FStar.Monotonic.HyperStack.mem",
"Prims.l_and",
"Lib.Buffer.live",
"Lib.Buffer.MUT",
"Lib.Buffer.disjoint",
"Lib.Buffer.modifies",
"Lib.Buffer.loc",
"Prims.eq2",
"Lib.Sequence.lseq",
"Lib.IntTypes.v",
"Lib.IntTypes.U32",
"Lib.IntTypes.PUB",
"Lib.Buffer.as_seq",
"Hacl.Spec.Bignum.Montgomery.bn_to_mont"
] | [] | module Hacl.Bignum.Montgomery
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.Bignum.Definitions
module S = Hacl.Spec.Bignum.Montgomery
module BN = Hacl.Bignum
include Hacl.Bignum.ModInvLimb
#reset-options "--z3rlimit 50 --fuel 0 --ifuel 0"
inline_for_extraction noextract
let bn_check_modulus_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len ->
Stack (limb t)
(requires fun h -> live h n)
(ensures fun h0 r h1 -> modifies0 h0 h1 /\
r == S.bn_check_modulus (as_seq h0 n))
inline_for_extraction noextract
val bn_check_modulus: #t:limb_t -> #len:BN.meta_len t -> bn_check_modulus_st t len
inline_for_extraction noextract
let bn_precomp_r2_mod_n_st (t:limb_t) (len:BN.meta_len t) =
nBits:size_t{v nBits / bits t < v len}
-> n:lbignum t len
-> res:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h res /\ disjoint n res)
(ensures fun h0 _ h1 -> modifies (loc res) h0 h1 /\
as_seq h1 res == S.bn_precomp_r2_mod_n (v nBits) (as_seq h0 n))
inline_for_extraction noextract
val bn_precomp_r2_mod_n: #t:limb_t -> k:BN.bn t -> bn_precomp_r2_mod_n_st t k.BN.len
inline_for_extraction noextract
let bn_mont_precomp_st (t:limb_t) (len:BN.meta_len t) =
nBits:size_t
-> n:lbignum t len
-> r2:lbignum t len ->
Stack (limb t)
(requires fun h ->
live h n /\ live h r2 /\ disjoint n r2 /\
1 < bn_v h n /\ bn_v h n % 2 = 1 /\
pow2 (v nBits) < bn_v h n /\ v nBits / bits t < v len)
(ensures fun h0 mu h1 -> modifies (loc r2) h0 h1 /\
(as_seq h1 r2, mu) == S.bn_mont_precomp (v nBits) (as_seq h0 n))
inline_for_extraction noextract
val bn_mont_precomp:
#t:limb_t
-> len:BN.meta_len t
-> precompr2:bn_precomp_r2_mod_n_st t len ->
bn_mont_precomp_st t len
inline_for_extraction noextract
let bn_mont_reduction_st (t:limb_t) (len:size_t{0 < v len /\ v len + v len <= max_size_t}) =
n:lbignum t len
-> mu:limb t
-> c:lbignum t (len +! len)
-> res:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h c /\ live h res /\
disjoint res n /\ disjoint res c /\ disjoint n c)
(ensures fun h0 _ h1 -> modifies (loc res |+| loc c) h0 h1 /\
as_seq h1 res == S.bn_mont_reduction (as_seq h0 n) mu (as_seq h0 c))
inline_for_extraction noextract
val bn_mont_reduction: #t:limb_t -> k:BN.bn t -> bn_mont_reduction_st t k.BN.len
inline_for_extraction noextract | false | false | Hacl.Bignum.Montgomery.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val bn_to_mont_st : t: Hacl.Bignum.Definitions.limb_t -> nLen: Hacl.Bignum.meta_len t -> Type0 | [] | Hacl.Bignum.Montgomery.bn_to_mont_st | {
"file_name": "code/bignum/Hacl.Bignum.Montgomery.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | t: Hacl.Bignum.Definitions.limb_t -> nLen: Hacl.Bignum.meta_len t -> Type0 | {
"end_col": 79,
"end_line": 103,
"start_col": 4,
"start_line": 92
} |
|
Prims.Tot | [
{
"abbrev": true,
"full_module": "Hacl.Bignum",
"short_module": "BN"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum",
"short_module": "SB"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Montgomery",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "Lib.LoopCombinators",
"short_module": "Loops"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.ModInvLimb",
"short_module": null
},
{
"abbrev": true,
"full_module": "Hacl.Bignum",
"short_module": "BN"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Montgomery",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let bn_from_mont_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len
-> mu:limb t
-> aM:lbignum t len
-> a:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h a /\ live h aM /\
disjoint aM a /\ disjoint aM n /\ disjoint a n)
(ensures fun h0 _ h1 -> modifies (loc a) h0 h1 /\
as_seq h1 a == S.bn_from_mont (as_seq h0 n) mu (as_seq h0 aM)) | let bn_from_mont_st (t: limb_t) (len: BN.meta_len t) = | false | null | false | n: lbignum t len -> mu: limb t -> aM: lbignum t len -> a: lbignum t len
-> Stack unit
(requires
fun h -> live h n /\ live h a /\ live h aM /\ disjoint aM a /\ disjoint aM n /\ disjoint a n
)
(ensures
fun h0 _ h1 ->
modifies (loc a) h0 h1 /\ as_seq h1 a == S.bn_from_mont (as_seq h0 n) mu (as_seq h0 aM)) | {
"checked_file": "Hacl.Bignum.Montgomery.fsti.checked",
"dependencies": [
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.Bignum.Montgomery.fsti.checked",
"Hacl.Bignum.ModInvLimb.fsti.checked",
"Hacl.Bignum.Definitions.fst.checked",
"Hacl.Bignum.fsti.checked",
"FStar.Tactics.Typeclasses.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Bignum.Montgomery.fsti"
} | [
"total"
] | [
"Hacl.Bignum.Definitions.limb_t",
"Hacl.Bignum.meta_len",
"Hacl.Bignum.Definitions.lbignum",
"Hacl.Bignum.Definitions.limb",
"Prims.unit",
"FStar.Monotonic.HyperStack.mem",
"Prims.l_and",
"Lib.Buffer.live",
"Lib.Buffer.MUT",
"Lib.Buffer.disjoint",
"Lib.Buffer.modifies",
"Lib.Buffer.loc",
"Prims.eq2",
"Lib.Sequence.lseq",
"Lib.IntTypes.v",
"Lib.IntTypes.U32",
"Lib.IntTypes.PUB",
"Lib.Buffer.as_seq",
"Hacl.Spec.Bignum.Montgomery.bn_from_mont"
] | [] | module Hacl.Bignum.Montgomery
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.Bignum.Definitions
module S = Hacl.Spec.Bignum.Montgomery
module BN = Hacl.Bignum
include Hacl.Bignum.ModInvLimb
#reset-options "--z3rlimit 50 --fuel 0 --ifuel 0"
inline_for_extraction noextract
let bn_check_modulus_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len ->
Stack (limb t)
(requires fun h -> live h n)
(ensures fun h0 r h1 -> modifies0 h0 h1 /\
r == S.bn_check_modulus (as_seq h0 n))
inline_for_extraction noextract
val bn_check_modulus: #t:limb_t -> #len:BN.meta_len t -> bn_check_modulus_st t len
inline_for_extraction noextract
let bn_precomp_r2_mod_n_st (t:limb_t) (len:BN.meta_len t) =
nBits:size_t{v nBits / bits t < v len}
-> n:lbignum t len
-> res:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h res /\ disjoint n res)
(ensures fun h0 _ h1 -> modifies (loc res) h0 h1 /\
as_seq h1 res == S.bn_precomp_r2_mod_n (v nBits) (as_seq h0 n))
inline_for_extraction noextract
val bn_precomp_r2_mod_n: #t:limb_t -> k:BN.bn t -> bn_precomp_r2_mod_n_st t k.BN.len
inline_for_extraction noextract
let bn_mont_precomp_st (t:limb_t) (len:BN.meta_len t) =
nBits:size_t
-> n:lbignum t len
-> r2:lbignum t len ->
Stack (limb t)
(requires fun h ->
live h n /\ live h r2 /\ disjoint n r2 /\
1 < bn_v h n /\ bn_v h n % 2 = 1 /\
pow2 (v nBits) < bn_v h n /\ v nBits / bits t < v len)
(ensures fun h0 mu h1 -> modifies (loc r2) h0 h1 /\
(as_seq h1 r2, mu) == S.bn_mont_precomp (v nBits) (as_seq h0 n))
inline_for_extraction noextract
val bn_mont_precomp:
#t:limb_t
-> len:BN.meta_len t
-> precompr2:bn_precomp_r2_mod_n_st t len ->
bn_mont_precomp_st t len
inline_for_extraction noextract
let bn_mont_reduction_st (t:limb_t) (len:size_t{0 < v len /\ v len + v len <= max_size_t}) =
n:lbignum t len
-> mu:limb t
-> c:lbignum t (len +! len)
-> res:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h c /\ live h res /\
disjoint res n /\ disjoint res c /\ disjoint n c)
(ensures fun h0 _ h1 -> modifies (loc res |+| loc c) h0 h1 /\
as_seq h1 res == S.bn_mont_reduction (as_seq h0 n) mu (as_seq h0 c))
inline_for_extraction noextract
val bn_mont_reduction: #t:limb_t -> k:BN.bn t -> bn_mont_reduction_st t k.BN.len
inline_for_extraction noextract
let bn_to_mont_st (t:limb_t) (nLen:BN.meta_len t) =
n:lbignum t nLen
-> mu:limb t
-> r2:lbignum t nLen
-> a:lbignum t nLen
-> aM:lbignum t nLen ->
Stack unit
(requires fun h ->
live h n /\ live h r2 /\ live h a /\ live h aM /\
disjoint a r2 /\ disjoint a n /\ disjoint a aM /\
disjoint n r2 /\ disjoint n aM /\ disjoint r2 aM)
(ensures fun h0 _ h1 -> modifies (loc aM) h0 h1 /\
as_seq h1 aM == S.bn_to_mont (as_seq h0 n) mu (as_seq h0 r2) (as_seq h0 a))
inline_for_extraction noextract
val bn_to_mont: #t:limb_t -> k:BN.bn t -> mr:bn_mont_reduction_st t k.BN.len -> bn_to_mont_st t k.BN.len
inline_for_extraction noextract | false | false | Hacl.Bignum.Montgomery.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val bn_from_mont_st : t: Hacl.Bignum.Definitions.limb_t -> len: Hacl.Bignum.meta_len t -> Type0 | [] | Hacl.Bignum.Montgomery.bn_from_mont_st | {
"file_name": "code/bignum/Hacl.Bignum.Montgomery.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | t: Hacl.Bignum.Definitions.limb_t -> len: Hacl.Bignum.meta_len t -> Type0 | {
"end_col": 66,
"end_line": 121,
"start_col": 4,
"start_line": 112
} |
|
Prims.Tot | [
{
"abbrev": true,
"full_module": "Hacl.Bignum",
"short_module": "BN"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum",
"short_module": "SB"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Montgomery",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "LowStar.Buffer",
"short_module": "B"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "Lib.LoopCombinators",
"short_module": "Loops"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.ModInvLimb",
"short_module": null
},
{
"abbrev": true,
"full_module": "Hacl.Bignum",
"short_module": "BN"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.Bignum.Montgomery",
"short_module": "S"
},
{
"abbrev": false,
"full_module": "Hacl.Bignum.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Bignum",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let bn_mont_sqr_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len
-> mu:limb t
-> aM:lbignum t len
-> resM:lbignum t len ->
Stack unit
(requires fun h ->
live h aM /\ live h resM /\ live h n /\
disjoint resM n /\ eq_or_disjoint aM resM)
(ensures fun h0 _ h1 -> modifies (loc resM) h0 h1 /\
as_seq h1 resM == S.bn_mont_sqr (as_seq h0 n) mu (as_seq h0 aM)) | let bn_mont_sqr_st (t: limb_t) (len: BN.meta_len t) = | false | null | false | n: lbignum t len -> mu: limb t -> aM: lbignum t len -> resM: lbignum t len
-> Stack unit
(requires
fun h -> live h aM /\ live h resM /\ live h n /\ disjoint resM n /\ eq_or_disjoint aM resM)
(ensures
fun h0 _ h1 ->
modifies (loc resM) h0 h1 /\
as_seq h1 resM == S.bn_mont_sqr (as_seq h0 n) mu (as_seq h0 aM)) | {
"checked_file": "Hacl.Bignum.Montgomery.fsti.checked",
"dependencies": [
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.Bignum.Montgomery.fsti.checked",
"Hacl.Bignum.ModInvLimb.fsti.checked",
"Hacl.Bignum.Definitions.fst.checked",
"Hacl.Bignum.fsti.checked",
"FStar.Tactics.Typeclasses.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Bignum.Montgomery.fsti"
} | [
"total"
] | [
"Hacl.Bignum.Definitions.limb_t",
"Hacl.Bignum.meta_len",
"Hacl.Bignum.Definitions.lbignum",
"Hacl.Bignum.Definitions.limb",
"Prims.unit",
"FStar.Monotonic.HyperStack.mem",
"Prims.l_and",
"Lib.Buffer.live",
"Lib.Buffer.MUT",
"Lib.Buffer.disjoint",
"Lib.Buffer.eq_or_disjoint",
"Lib.Buffer.modifies",
"Lib.Buffer.loc",
"Prims.eq2",
"Lib.Sequence.lseq",
"Lib.IntTypes.v",
"Lib.IntTypes.U32",
"Lib.IntTypes.PUB",
"Lib.Buffer.as_seq",
"Hacl.Spec.Bignum.Montgomery.bn_mont_sqr"
] | [] | module Hacl.Bignum.Montgomery
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.Bignum.Definitions
module S = Hacl.Spec.Bignum.Montgomery
module BN = Hacl.Bignum
include Hacl.Bignum.ModInvLimb
#reset-options "--z3rlimit 50 --fuel 0 --ifuel 0"
inline_for_extraction noextract
let bn_check_modulus_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len ->
Stack (limb t)
(requires fun h -> live h n)
(ensures fun h0 r h1 -> modifies0 h0 h1 /\
r == S.bn_check_modulus (as_seq h0 n))
inline_for_extraction noextract
val bn_check_modulus: #t:limb_t -> #len:BN.meta_len t -> bn_check_modulus_st t len
inline_for_extraction noextract
let bn_precomp_r2_mod_n_st (t:limb_t) (len:BN.meta_len t) =
nBits:size_t{v nBits / bits t < v len}
-> n:lbignum t len
-> res:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h res /\ disjoint n res)
(ensures fun h0 _ h1 -> modifies (loc res) h0 h1 /\
as_seq h1 res == S.bn_precomp_r2_mod_n (v nBits) (as_seq h0 n))
inline_for_extraction noextract
val bn_precomp_r2_mod_n: #t:limb_t -> k:BN.bn t -> bn_precomp_r2_mod_n_st t k.BN.len
inline_for_extraction noextract
let bn_mont_precomp_st (t:limb_t) (len:BN.meta_len t) =
nBits:size_t
-> n:lbignum t len
-> r2:lbignum t len ->
Stack (limb t)
(requires fun h ->
live h n /\ live h r2 /\ disjoint n r2 /\
1 < bn_v h n /\ bn_v h n % 2 = 1 /\
pow2 (v nBits) < bn_v h n /\ v nBits / bits t < v len)
(ensures fun h0 mu h1 -> modifies (loc r2) h0 h1 /\
(as_seq h1 r2, mu) == S.bn_mont_precomp (v nBits) (as_seq h0 n))
inline_for_extraction noextract
val bn_mont_precomp:
#t:limb_t
-> len:BN.meta_len t
-> precompr2:bn_precomp_r2_mod_n_st t len ->
bn_mont_precomp_st t len
inline_for_extraction noextract
let bn_mont_reduction_st (t:limb_t) (len:size_t{0 < v len /\ v len + v len <= max_size_t}) =
n:lbignum t len
-> mu:limb t
-> c:lbignum t (len +! len)
-> res:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h c /\ live h res /\
disjoint res n /\ disjoint res c /\ disjoint n c)
(ensures fun h0 _ h1 -> modifies (loc res |+| loc c) h0 h1 /\
as_seq h1 res == S.bn_mont_reduction (as_seq h0 n) mu (as_seq h0 c))
inline_for_extraction noextract
val bn_mont_reduction: #t:limb_t -> k:BN.bn t -> bn_mont_reduction_st t k.BN.len
inline_for_extraction noextract
let bn_to_mont_st (t:limb_t) (nLen:BN.meta_len t) =
n:lbignum t nLen
-> mu:limb t
-> r2:lbignum t nLen
-> a:lbignum t nLen
-> aM:lbignum t nLen ->
Stack unit
(requires fun h ->
live h n /\ live h r2 /\ live h a /\ live h aM /\
disjoint a r2 /\ disjoint a n /\ disjoint a aM /\
disjoint n r2 /\ disjoint n aM /\ disjoint r2 aM)
(ensures fun h0 _ h1 -> modifies (loc aM) h0 h1 /\
as_seq h1 aM == S.bn_to_mont (as_seq h0 n) mu (as_seq h0 r2) (as_seq h0 a))
inline_for_extraction noextract
val bn_to_mont: #t:limb_t -> k:BN.bn t -> mr:bn_mont_reduction_st t k.BN.len -> bn_to_mont_st t k.BN.len
inline_for_extraction noextract
let bn_from_mont_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len
-> mu:limb t
-> aM:lbignum t len
-> a:lbignum t len ->
Stack unit
(requires fun h ->
live h n /\ live h a /\ live h aM /\
disjoint aM a /\ disjoint aM n /\ disjoint a n)
(ensures fun h0 _ h1 -> modifies (loc a) h0 h1 /\
as_seq h1 a == S.bn_from_mont (as_seq h0 n) mu (as_seq h0 aM))
// This one just needs a specialized implementation of mont_reduction. No point
// in doing a type class for a single function , so we take it as a parameter.
inline_for_extraction noextract
val bn_from_mont: #t:limb_t -> k:BN.bn t -> mr:bn_mont_reduction_st t k.BN.len -> bn_from_mont_st t k.BN.len
inline_for_extraction noextract
let bn_mont_mul_st (t:limb_t) (len:BN.meta_len t) =
n:lbignum t len
-> mu:limb t
-> aM:lbignum t len
-> bM:lbignum t len
-> resM:lbignum t len ->
Stack unit
(requires fun h ->
live h aM /\ live h bM /\ live h resM /\ live h n /\
disjoint resM n /\ eq_or_disjoint aM bM /\
eq_or_disjoint aM resM /\ eq_or_disjoint bM resM)
(ensures fun h0 _ h1 -> modifies (loc resM) h0 h1 /\
as_seq h1 resM == S.bn_mont_mul (as_seq h0 n) mu (as_seq h0 aM) (as_seq h0 bM))
/// This one needs both the type class and a specialized montgomery reduction.
inline_for_extraction noextract
val bn_mont_mul: #t:limb_t -> k:BN.bn t -> mr:bn_mont_reduction_st t k.BN.len -> bn_mont_mul_st t k.BN.len
inline_for_extraction noextract | false | false | Hacl.Bignum.Montgomery.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val bn_mont_sqr_st : t: Hacl.Bignum.Definitions.limb_t -> len: Hacl.Bignum.meta_len t -> Type0 | [] | Hacl.Bignum.Montgomery.bn_mont_sqr_st | {
"file_name": "code/bignum/Hacl.Bignum.Montgomery.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | t: Hacl.Bignum.Definitions.limb_t -> len: Hacl.Bignum.meta_len t -> Type0 | {
"end_col": 68,
"end_line": 162,
"start_col": 4,
"start_line": 153
} |
Subsets and Splits