project
stringclasses
2 values
commit_id
stringlengths
40
40
target
int64
0
1
func
stringlengths
26
142k
idx
int64
0
27.3k
qemu
507563e85db880ff875f0a9498a1cf58a50cfad3
0
static void gen_arith_imm (CPUState *env, DisasContext *ctx, uint32_t opc, int rt, int rs, int16_t imm) { target_ulong uimm; const char *opn = "imm arith"; TCGv t0 = tcg_temp_local_new(TCG_TYPE_TL); if (rt == 0 && opc != OPC_ADDI && opc != OPC_DADDI) { /* If no destination, treat it as a NOP. For addi, we must generate the overflow exception when needed. */ MIPS_DEBUG("NOP"); goto out; } uimm = (uint16_t)imm; switch (opc) { case OPC_ADDI: case OPC_ADDIU: #if defined(TARGET_MIPS64) case OPC_DADDI: case OPC_DADDIU: #endif case OPC_SLTI: case OPC_SLTIU: uimm = (target_long)imm; /* Sign extend to 32/64 bits */ /* Fall through. */ case OPC_ANDI: case OPC_ORI: case OPC_XORI: gen_load_gpr(t0, rs); break; case OPC_LUI: tcg_gen_movi_tl(t0, imm << 16); break; case OPC_SLL: case OPC_SRA: case OPC_SRL: #if defined(TARGET_MIPS64) case OPC_DSLL: case OPC_DSRA: case OPC_DSRL: case OPC_DSLL32: case OPC_DSRA32: case OPC_DSRL32: #endif uimm &= 0x1f; gen_load_gpr(t0, rs); break; } switch (opc) { case OPC_ADDI: { TCGv r_tmp1 = tcg_temp_local_new(TCG_TYPE_TL); TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_TL); int l1 = gen_new_label(); save_cpu_state(ctx, 1); tcg_gen_ext32s_tl(r_tmp1, t0); tcg_gen_addi_tl(t0, r_tmp1, uimm); tcg_gen_xori_tl(r_tmp1, r_tmp1, uimm); tcg_gen_xori_tl(r_tmp1, r_tmp1, -1); tcg_gen_xori_tl(r_tmp2, t0, uimm); tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2); tcg_temp_free(r_tmp2); tcg_gen_shri_tl(r_tmp1, r_tmp1, 31); tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1); tcg_temp_free(r_tmp1); /* operands of same sign, result different sign */ generate_exception(ctx, EXCP_OVERFLOW); gen_set_label(l1); tcg_gen_ext32s_tl(t0, t0); } opn = "addi"; break; case OPC_ADDIU: tcg_gen_ext32s_tl(t0, t0); tcg_gen_addi_tl(t0, t0, uimm); tcg_gen_ext32s_tl(t0, t0); opn = "addiu"; break; #if defined(TARGET_MIPS64) case OPC_DADDI: { TCGv r_tmp1 = tcg_temp_local_new(TCG_TYPE_TL); TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_TL); int l1 = gen_new_label(); save_cpu_state(ctx, 1); tcg_gen_mov_tl(r_tmp1, t0); tcg_gen_addi_tl(t0, t0, uimm); tcg_gen_xori_tl(r_tmp1, r_tmp1, uimm); tcg_gen_xori_tl(r_tmp1, r_tmp1, -1); tcg_gen_xori_tl(r_tmp2, t0, uimm); tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2); tcg_temp_free(r_tmp2); tcg_gen_shri_tl(r_tmp1, r_tmp1, 63); tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1); tcg_temp_free(r_tmp1); /* operands of same sign, result different sign */ generate_exception(ctx, EXCP_OVERFLOW); gen_set_label(l1); } opn = "daddi"; break; case OPC_DADDIU: tcg_gen_addi_tl(t0, t0, uimm); opn = "daddiu"; break; #endif case OPC_SLTI: gen_op_lti(t0, uimm); opn = "slti"; break; case OPC_SLTIU: gen_op_ltiu(t0, uimm); opn = "sltiu"; break; case OPC_ANDI: tcg_gen_andi_tl(t0, t0, uimm); opn = "andi"; break; case OPC_ORI: tcg_gen_ori_tl(t0, t0, uimm); opn = "ori"; break; case OPC_XORI: tcg_gen_xori_tl(t0, t0, uimm); opn = "xori"; break; case OPC_LUI: opn = "lui"; break; case OPC_SLL: tcg_gen_ext32u_tl(t0, t0); tcg_gen_shli_tl(t0, t0, uimm); tcg_gen_ext32s_tl(t0, t0); opn = "sll"; break; case OPC_SRA: tcg_gen_ext32s_tl(t0, t0); tcg_gen_sari_tl(t0, t0, uimm); tcg_gen_ext32s_tl(t0, t0); opn = "sra"; break; case OPC_SRL: switch ((ctx->opcode >> 21) & 0x1f) { case 0: tcg_gen_ext32u_tl(t0, t0); tcg_gen_shri_tl(t0, t0, uimm); tcg_gen_ext32s_tl(t0, t0); opn = "srl"; break; case 1: /* rotr is decoded as srl on non-R2 CPUs */ if (env->insn_flags & ISA_MIPS32R2) { if (uimm != 0) { TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I32); tcg_gen_trunc_tl_i32(r_tmp1, t0); tcg_gen_rotri_i32(r_tmp1, r_tmp1, uimm); tcg_gen_ext_i32_tl(t0, r_tmp1); tcg_temp_free(r_tmp1); } opn = "rotr"; } else { tcg_gen_ext32u_tl(t0, t0); tcg_gen_shri_tl(t0, t0, uimm); tcg_gen_ext32s_tl(t0, t0); opn = "srl"; } break; default: MIPS_INVAL("invalid srl flag"); generate_exception(ctx, EXCP_RI); break; } break; #if defined(TARGET_MIPS64) case OPC_DSLL: tcg_gen_shli_tl(t0, t0, uimm); opn = "dsll"; break; case OPC_DSRA: tcg_gen_sari_tl(t0, t0, uimm); opn = "dsra"; break; case OPC_DSRL: switch ((ctx->opcode >> 21) & 0x1f) { case 0: tcg_gen_shri_tl(t0, t0, uimm); opn = "dsrl"; break; case 1: /* drotr is decoded as dsrl on non-R2 CPUs */ if (env->insn_flags & ISA_MIPS32R2) { if (uimm != 0) { tcg_gen_rotri_tl(t0, t0, uimm); } opn = "drotr"; } else { tcg_gen_shri_tl(t0, t0, uimm); opn = "dsrl"; } break; default: MIPS_INVAL("invalid dsrl flag"); generate_exception(ctx, EXCP_RI); break; } break; case OPC_DSLL32: tcg_gen_shli_tl(t0, t0, uimm + 32); opn = "dsll32"; break; case OPC_DSRA32: tcg_gen_sari_tl(t0, t0, uimm + 32); opn = "dsra32"; break; case OPC_DSRL32: switch ((ctx->opcode >> 21) & 0x1f) { case 0: tcg_gen_shri_tl(t0, t0, uimm + 32); opn = "dsrl32"; break; case 1: /* drotr32 is decoded as dsrl32 on non-R2 CPUs */ if (env->insn_flags & ISA_MIPS32R2) { tcg_gen_rotri_tl(t0, t0, uimm + 32); opn = "drotr32"; } else { tcg_gen_shri_tl(t0, t0, uimm + 32); opn = "dsrl32"; } break; default: MIPS_INVAL("invalid dsrl32 flag"); generate_exception(ctx, EXCP_RI); break; } break; #endif default: MIPS_INVAL(opn); generate_exception(ctx, EXCP_RI); goto out; } gen_store_gpr(t0, rt); MIPS_DEBUG("%s %s, %s, " TARGET_FMT_lx, opn, regnames[rt], regnames[rs], uimm); out: tcg_temp_free(t0); }
4,298
qemu
32bafa8fdd098d52fbf1102d5a5e48d29398c0aa
0
static ImageInfoSpecific *vmdk_get_specific_info(BlockDriverState *bs) { int i; BDRVVmdkState *s = bs->opaque; ImageInfoSpecific *spec_info = g_new0(ImageInfoSpecific, 1); ImageInfoList **next; *spec_info = (ImageInfoSpecific){ .type = IMAGE_INFO_SPECIFIC_KIND_VMDK, { .vmdk = g_new0(ImageInfoSpecificVmdk, 1), }, }; *spec_info->u.vmdk = (ImageInfoSpecificVmdk) { .create_type = g_strdup(s->create_type), .cid = s->cid, .parent_cid = s->parent_cid, }; next = &spec_info->u.vmdk->extents; for (i = 0; i < s->num_extents; i++) { *next = g_new0(ImageInfoList, 1); (*next)->value = vmdk_get_extent_info(&s->extents[i]); (*next)->next = NULL; next = &(*next)->next; } return spec_info; }
4,299
qemu
5bb95e41868b461f37159efb48908828ebd7ab36
0
void do_smbios_option(const char *optarg) { #ifdef TARGET_I386 if (smbios_entry_add(optarg) < 0) { fprintf(stderr, "Wrong smbios provided\n"); exit(1); } #endif }
4,300
qemu
1a40d5e23577b955265fe12a2b7b5222ec2df0f2
0
static int oss_run_in (HWVoiceIn *hw) { OSSVoiceIn *oss = (OSSVoiceIn *) hw; int hwshift = hw->info.shift; int i; int live = audio_pcm_hw_get_live_in (hw); int dead = hw->samples - live; size_t read_samples = 0; struct { int add; int len; } bufs[2] = { { hw->wpos, 0 }, { 0, 0 } }; if (!dead) { return 0; } if (hw->wpos + dead > hw->samples) { bufs[0].len = (hw->samples - hw->wpos) << hwshift; bufs[1].len = (dead - (hw->samples - hw->wpos)) << hwshift; } else { bufs[0].len = dead << hwshift; } for (i = 0; i < 2; ++i) { ssize_t nread; if (bufs[i].len) { void *p = advance (oss->pcm_buf, bufs[i].add << hwshift); nread = read (oss->fd, p, bufs[i].len); if (nread > 0) { if (nread & hw->info.align) { dolog ("warning: Misaligned read %zd (requested %d), " "alignment %d\n", nread, bufs[i].add << hwshift, hw->info.align + 1); } read_samples += nread >> hwshift; hw->conv (hw->conv_buf + bufs[i].add, p, nread >> hwshift, &nominal_volume); } if (bufs[i].len - nread) { if (nread == -1) { switch (errno) { case EINTR: case EAGAIN: break; default: oss_logerr ( errno, "Failed to read %d bytes of audio (to %p)\n", bufs[i].len, p ); break; } } break; } } } hw->wpos = (hw->wpos + read_samples) % hw->samples; return read_samples; }
4,301
qemu
61007b316cd71ee7333ff7a0a749a8949527575f
0
int bdrv_debug_remove_breakpoint(BlockDriverState *bs, const char *tag) { while (bs && bs->drv && !bs->drv->bdrv_debug_remove_breakpoint) { bs = bs->file; } if (bs && bs->drv && bs->drv->bdrv_debug_remove_breakpoint) { return bs->drv->bdrv_debug_remove_breakpoint(bs, tag); } return -ENOTSUP; }
4,302
FFmpeg
6ba5cbc699e77cae66bb719354fa142114b64eab
0
int rtp_set_remote_url(URLContext *h, const char *uri) { RTPContext *s = h->priv_data; char hostname[256]; int port; char buf[1024]; char path[1024]; url_split(NULL, 0, hostname, sizeof(hostname), &port, path, sizeof(path), uri); snprintf(buf, sizeof(buf), "udp://%s:%d%s", hostname, port, path); udp_set_remote_url(s->rtp_hd, buf); snprintf(buf, sizeof(buf), "udp://%s:%d%s", hostname, port + 1, path); udp_set_remote_url(s->rtcp_hd, buf); return 0; }
4,303
FFmpeg
5098a6f6275a57f122cd8f03e7ffbe5dd090b8e0
0
int vp78_decode_mb_row_sliced(AVCodecContext *avctx, void *tdata, int jobnr, int threadnr, int is_vp7) { VP8Context *s = avctx->priv_data; VP8ThreadData *td = &s->thread_data[jobnr]; VP8ThreadData *next_td = NULL, *prev_td = NULL; VP8Frame *curframe = s->curframe; int mb_y, num_jobs = s->num_jobs; int ret; td->thread_nr = threadnr; for (mb_y = jobnr; mb_y < s->mb_height; mb_y += num_jobs) { if (mb_y >= s->mb_height) break; td->thread_mb_pos = mb_y << 16; ret = s->decode_mb_row_no_filter(avctx, tdata, jobnr, threadnr); if (ret < 0) return ret; if (s->deblock_filter) s->filter_mb_row(avctx, tdata, jobnr, threadnr); update_pos(td, mb_y, INT_MAX & 0xFFFF); s->mv_min.y -= 64; s->mv_max.y -= 64; if (avctx->active_thread_type == FF_THREAD_FRAME) ff_thread_report_progress(&curframe->tf, mb_y, 0); } return 0; }
4,304
FFmpeg
29ba091136a5e04574f7bfc1b17536c923958f6f
0
const char *avfilter_configuration(void) { return FFMPEG_CONFIGURATION; }
4,305
qemu
af52fe862fba686713044efdf9158195f84535ab
0
static void uart_send_breaks(UartState *s) { int break_enabled = 1; qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_BREAK, &break_enabled); }
4,308
qemu
a7812ae412311d7d47f8aa85656faadac9d64b56
0
static void cris_alu(DisasContext *dc, int op, TCGv d, TCGv op_a, TCGv op_b, int size) { TCGv tmp; int writeback; writeback = 1; if (op == CC_OP_BOUND || op == CC_OP_BTST) tmp = tcg_temp_local_new(TCG_TYPE_TL); if (op == CC_OP_CMP) { tmp = tcg_temp_new(TCG_TYPE_TL); writeback = 0; } else if (size == 4) { tmp = d; writeback = 0; } else tmp = tcg_temp_new(TCG_TYPE_TL); cris_pre_alu_update_cc(dc, op, op_a, op_b, size); cris_alu_op_exec(dc, op, tmp, op_a, op_b, size); cris_update_result(dc, tmp); /* Writeback. */ if (writeback) { if (size == 1) tcg_gen_andi_tl(d, d, ~0xff); else tcg_gen_andi_tl(d, d, ~0xffff); tcg_gen_or_tl(d, d, tmp); } if (GET_TCGV(tmp) != GET_TCGV(d)) tcg_temp_free(tmp); }
4,309
qemu
d735b620b58f2fdfddc8e641e9feac3c9671a49d
0
void ide_atapi_cmd_reply_end(IDEState *s) { int byte_count_limit, size, ret; #ifdef DEBUG_IDE_ATAPI printf("reply: tx_size=%d elem_tx_size=%d index=%d\n", s->packet_transfer_size, s->elementary_transfer_size, s->io_buffer_index); #endif if (s->packet_transfer_size <= 0) { /* end of transfer */ s->status = READY_STAT | SEEK_STAT; s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD; ide_transfer_stop(s); ide_set_irq(s->bus); #ifdef DEBUG_IDE_ATAPI printf("status=0x%x\n", s->status); #endif } else { /* see if a new sector must be read */ if (s->lba != -1 && s->io_buffer_index >= s->cd_sector_size) { ret = cd_read_sector(s, s->lba, s->io_buffer, s->cd_sector_size); if (ret < 0) { ide_transfer_stop(s); ide_atapi_io_error(s, ret); return; } s->lba++; s->io_buffer_index = 0; } if (s->elementary_transfer_size > 0) { /* there are some data left to transmit in this elementary transfer */ size = s->cd_sector_size - s->io_buffer_index; if (size > s->elementary_transfer_size) size = s->elementary_transfer_size; s->packet_transfer_size -= size; s->elementary_transfer_size -= size; s->io_buffer_index += size; ide_transfer_start(s, s->io_buffer + s->io_buffer_index - size, size, ide_atapi_cmd_reply_end); } else { /* a new transfer is needed */ s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO; byte_count_limit = s->lcyl | (s->hcyl << 8); #ifdef DEBUG_IDE_ATAPI printf("byte_count_limit=%d\n", byte_count_limit); #endif if (byte_count_limit == 0xffff) byte_count_limit--; size = s->packet_transfer_size; if (size > byte_count_limit) { /* byte count limit must be even if this case */ if (byte_count_limit & 1) byte_count_limit--; size = byte_count_limit; } s->lcyl = size; s->hcyl = size >> 8; s->elementary_transfer_size = size; /* we cannot transmit more than one sector at a time */ if (s->lba != -1) { if (size > (s->cd_sector_size - s->io_buffer_index)) size = (s->cd_sector_size - s->io_buffer_index); } s->packet_transfer_size -= size; s->elementary_transfer_size -= size; s->io_buffer_index += size; ide_transfer_start(s, s->io_buffer + s->io_buffer_index - size, size, ide_atapi_cmd_reply_end); ide_set_irq(s->bus); #ifdef DEBUG_IDE_ATAPI printf("status=0x%x\n", s->status); #endif } } }
4,310
qemu
079d0b7f1eedcc634c371fe05b617fdc55c8b762
0
static int ehci_execute(EHCIQueue *q) { USBDevice *dev; int ret; int endp; int devadr; if ( !(q->qh.token & QTD_TOKEN_ACTIVE)) { fprintf(stderr, "Attempting to execute inactive QH\n"); return USB_RET_PROCERR; } q->tbytes = (q->qh.token & QTD_TOKEN_TBYTES_MASK) >> QTD_TOKEN_TBYTES_SH; if (q->tbytes > BUFF_SIZE) { fprintf(stderr, "Request for more bytes than allowed\n"); return USB_RET_PROCERR; } q->pid = (q->qh.token & QTD_TOKEN_PID_MASK) >> QTD_TOKEN_PID_SH; switch(q->pid) { case 0: q->pid = USB_TOKEN_OUT; break; case 1: q->pid = USB_TOKEN_IN; break; case 2: q->pid = USB_TOKEN_SETUP; break; default: fprintf(stderr, "bad token\n"); break; } if (ehci_init_transfer(q) != 0) { return USB_RET_PROCERR; } endp = get_field(q->qh.epchar, QH_EPCHAR_EP); devadr = get_field(q->qh.epchar, QH_EPCHAR_DEVADDR); ret = USB_RET_NODEV; usb_packet_setup(&q->packet, q->pid, devadr, endp); usb_packet_map(&q->packet, &q->sgl); // TO-DO: associating device with ehci port dev = ehci_find_device(q->ehci, q->packet.devaddr); ret = usb_handle_packet(dev, &q->packet); DPRINTF("submit: qh %x next %x qtd %x pid %x len %zd " "(total %d) endp %x ret %d\n", q->qhaddr, q->qh.next, q->qtdaddr, q->pid, q->packet.iov.size, q->tbytes, endp, ret); if (ret > BUFF_SIZE) { fprintf(stderr, "ret from usb_handle_packet > BUFF_SIZE\n"); return USB_RET_PROCERR; } return ret; }
4,311
qemu
1ff5c1a68e2784722b66ecc40e30908e87e28a3b
0
static void sdl_resize(DisplayState *ds, int w, int h) { int flags; // printf("resizing to %d %d\n", w, h); flags = SDL_HWSURFACE|SDL_ASYNCBLIT|SDL_HWACCEL; flags |= SDL_RESIZABLE; if (gui_fullscreen) flags |= SDL_FULLSCREEN; screen = SDL_SetVideoMode(w, h, 0, flags); if (!screen) { fprintf(stderr, "Could not open SDL display\n"); exit(1); } ds->data = screen->pixels; ds->linesize = screen->pitch; ds->depth = screen->format->BitsPerPixel; ds->width = w; ds->height = h; }
4,312
qemu
a8170e5e97ad17ca169c64ba87ae2f53850dab4c
0
static uint64_t imx_avic_read(void *opaque, target_phys_addr_t offset, unsigned size) { IMXAVICState *s = (IMXAVICState *)opaque; DPRINTF("read(offset = 0x%x)\n", offset >> 2); switch (offset >> 2) { case 0: /* INTCNTL */ return s->intcntl; case 1: /* Normal Interrupt Mask Register, NIMASK */ return s->intmask; case 2: /* Interrupt Enable Number Register, INTENNUM */ case 3: /* Interrupt Disable Number Register, INTDISNUM */ return 0; case 4: /* Interrupt Enabled Number Register High */ return s->enabled >> 32; case 5: /* Interrupt Enabled Number Register Low */ return s->enabled & 0xffffffffULL; case 6: /* Interrupt Type Register High */ return s->is_fiq >> 32; case 7: /* Interrupt Type Register Low */ return s->is_fiq & 0xffffffffULL; case 8: /* Normal Interrupt Priority Register 7 */ case 9: /* Normal Interrupt Priority Register 6 */ case 10:/* Normal Interrupt Priority Register 5 */ case 11:/* Normal Interrupt Priority Register 4 */ case 12:/* Normal Interrupt Priority Register 3 */ case 13:/* Normal Interrupt Priority Register 2 */ case 14:/* Normal Interrupt Priority Register 1 */ case 15:/* Normal Interrupt Priority Register 0 */ return s->prio[15-(offset>>2)]; case 16: /* Normal interrupt vector and status register */ { /* * This returns the highest priority * outstanding interrupt. Where there is more than * one pending IRQ with the same priority, * take the highest numbered one. */ uint64_t flags = s->pending & s->enabled & ~s->is_fiq; int i; int prio = -1; int irq = -1; for (i = 63; i >= 0; --i) { if (flags & (1ULL<<i)) { int irq_prio = imx_avic_prio(s, i); if (irq_prio > prio) { irq = i; prio = irq_prio; } } } if (irq >= 0) { imx_avic_set_irq(s, irq, 0); return irq << 16 | prio; } return 0xffffffffULL; } case 17:/* Fast Interrupt vector and status register */ { uint64_t flags = s->pending & s->enabled & s->is_fiq; int i = ctz64(flags); if (i < 64) { imx_avic_set_irq(opaque, i, 0); return i; } return 0xffffffffULL; } case 18:/* Interrupt source register high */ return s->pending >> 32; case 19:/* Interrupt source register low */ return s->pending & 0xffffffffULL; case 20:/* Interrupt Force Register high */ case 21:/* Interrupt Force Register low */ return 0; case 22:/* Normal Interrupt Pending Register High */ return (s->pending & s->enabled & ~s->is_fiq) >> 32; case 23:/* Normal Interrupt Pending Register Low */ return (s->pending & s->enabled & ~s->is_fiq) & 0xffffffffULL; case 24: /* Fast Interrupt Pending Register High */ return (s->pending & s->enabled & s->is_fiq) >> 32; case 25: /* Fast Interrupt Pending Register Low */ return (s->pending & s->enabled & s->is_fiq) & 0xffffffffULL; case 0x40: /* AVIC vector 0, use for WFI WAR */ return 0x4; default: IPRINTF("imx_avic_read: Bad offset 0x%x\n", (int)offset); return 0; } }
4,313
FFmpeg
1b648c7cdbee335c642bd2c05fe624fc195b85e6
0
static enum CodecID find_codec_or_die(const char *name, enum AVMediaType type, int encoder) { const char *codec_string = encoder ? "encoder" : "decoder"; AVCodec *codec; if(!name) return CODEC_ID_NONE; codec = encoder ? avcodec_find_encoder_by_name(name) : avcodec_find_decoder_by_name(name); if(!codec) { av_log(NULL, AV_LOG_FATAL, "Unknown %s '%s'\n", codec_string, name); exit_program(1); } if(codec->type != type) { av_log(NULL, AV_LOG_FATAL, "Invalid %s type '%s'\n", codec_string, name); exit_program(1); } return codec->id; }
4,314
qemu
4be746345f13e99e468c60acbd3a355e8183e3ce
0
static void sd_blk_read(SDState *sd, uint64_t addr, uint32_t len) { uint64_t end = addr + len; DPRINTF("sd_blk_read: addr = 0x%08llx, len = %d\n", (unsigned long long) addr, len); if (!sd->bdrv || bdrv_read(sd->bdrv, addr >> 9, sd->buf, 1) < 0) { fprintf(stderr, "sd_blk_read: read error on host side\n"); return; } if (end > (addr & ~511) + 512) { memcpy(sd->data, sd->buf + (addr & 511), 512 - (addr & 511)); if (bdrv_read(sd->bdrv, end >> 9, sd->buf, 1) < 0) { fprintf(stderr, "sd_blk_read: read error on host side\n"); return; } memcpy(sd->data + 512 - (addr & 511), sd->buf, end & 511); } else memcpy(sd->data, sd->buf + (addr & 511), len); }
4,316
qemu
2eea841c11096e8dcc457b80e21f3fbdc32d2590
0
static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *dc = container_of(dcbase, DisasContext, base); CPUARMState *env = cpu->env_ptr; uint32_t insn; bool is_16bit; if (arm_pre_translate_insn(dc)) { return; } insn = arm_lduw_code(env, dc->pc, dc->sctlr_b); is_16bit = thumb_insn_is_16bit(dc, insn); dc->pc += 2; if (!is_16bit) { uint32_t insn2 = arm_lduw_code(env, dc->pc, dc->sctlr_b); insn = insn << 16 | insn2; dc->pc += 2; } dc->insn = insn; if (dc->condexec_mask && !thumb_insn_is_unconditional(dc, insn)) { uint32_t cond = dc->condexec_cond; if (cond != 0x0e) { /* Skip conditional when condition is AL. */ dc->condlabel = gen_new_label(); arm_gen_test_cc(cond ^ 1, dc->condlabel); dc->condjmp = 1; } } if (is_16bit) { disas_thumb_insn(dc, insn); } else { if (disas_thumb2_insn(dc, insn)) { gen_exception_insn(dc, 4, EXCP_UDEF, syn_uncategorized(), default_exception_el(dc)); } } /* Advance the Thumb condexec condition. */ if (dc->condexec_mask) { dc->condexec_cond = ((dc->condexec_cond & 0xe) | ((dc->condexec_mask >> 4) & 1)); dc->condexec_mask = (dc->condexec_mask << 1) & 0x1f; if (dc->condexec_mask == 0) { dc->condexec_cond = 0; } } arm_post_translate_insn(dc); /* Thumb is a variable-length ISA. Stop translation when the next insn * will touch a new page. This ensures that prefetch aborts occur at * the right place. * * We want to stop the TB if the next insn starts in a new page, * or if it spans between this page and the next. This means that * if we're looking at the last halfword in the page we need to * see if it's a 16-bit Thumb insn (which will fit in this TB) * or a 32-bit Thumb insn (which won't). * This is to avoid generating a silly TB with a single 16-bit insn * in it at the end of this page (which would execute correctly * but isn't very efficient). */ if (dc->base.is_jmp == DISAS_NEXT && (dc->pc >= dc->next_page_start || (dc->pc >= dc->next_page_start - 3 && insn_crosses_page(env, dc)))) { dc->base.is_jmp = DISAS_TOO_MANY; } }
4,317
qemu
a0efbf16604770b9d805bcf210ec29942321134f
0
void qemu_set_dfilter_ranges(const char *filter_spec, Error **errp) { gchar **ranges = g_strsplit(filter_spec, ",", 0); int i; if (debug_regions) { g_array_unref(debug_regions); debug_regions = NULL; } debug_regions = g_array_sized_new(FALSE, FALSE, sizeof(Range), g_strv_length(ranges)); for (i = 0; ranges[i]; i++) { const char *r = ranges[i]; const char *range_op, *r2, *e; uint64_t r1val, r2val, lob, upb; struct Range range; range_op = strstr(r, "-"); r2 = range_op ? range_op + 1 : NULL; if (!range_op) { range_op = strstr(r, "+"); r2 = range_op ? range_op + 1 : NULL; } if (!range_op) { range_op = strstr(r, ".."); r2 = range_op ? range_op + 2 : NULL; } if (!range_op) { error_setg(errp, "Bad range specifier"); goto out; } if (qemu_strtoull(r, &e, 0, &r1val) || e != range_op) { error_setg(errp, "Invalid number to the left of %.*s", (int)(r2 - range_op), range_op); goto out; } if (qemu_strtoull(r2, NULL, 0, &r2val)) { error_setg(errp, "Invalid number to the right of %.*s", (int)(r2 - range_op), range_op); goto out; } switch (*range_op) { case '+': lob = r1val; upb = r1val + r2val - 1; break; case '-': upb = r1val; lob = r1val - (r2val - 1); break; case '.': lob = r1val; upb = r2val; break; default: g_assert_not_reached(); } if (lob > upb || (lob == 0 && upb == UINT64_MAX)) { error_setg(errp, "Invalid range"); goto out; } range.begin = lob; range.end = upb + 1; g_array_append_val(debug_regions, range); } out: g_strfreev(ranges); }
4,319
qemu
be5e7a76010bd14d09f74504ed6368782e701888
0
static void disas_arm_insn(CPUState * env, DisasContext *s) { unsigned int cond, insn, val, op1, i, shift, rm, rs, rn, rd, sh; TCGv tmp; TCGv tmp2; TCGv tmp3; TCGv addr; TCGv_i64 tmp64; insn = ldl_code(s->pc); s->pc += 4; /* M variants do not implement ARM mode. */ if (IS_M(env)) goto illegal_op; cond = insn >> 28; if (cond == 0xf){ /* Unconditional instructions. */ if (((insn >> 25) & 7) == 1) { /* NEON Data processing. */ if (!arm_feature(env, ARM_FEATURE_NEON)) goto illegal_op; if (disas_neon_data_insn(env, s, insn)) goto illegal_op; return; } if ((insn & 0x0f100000) == 0x04000000) { /* NEON load/store. */ if (!arm_feature(env, ARM_FEATURE_NEON)) goto illegal_op; if (disas_neon_ls_insn(env, s, insn)) goto illegal_op; return; } if (((insn & 0x0f30f000) == 0x0510f000) || ((insn & 0x0f30f010) == 0x0710f000)) { if ((insn & (1 << 22)) == 0) { /* PLDW; v7MP */ if (!arm_feature(env, ARM_FEATURE_V7MP)) { goto illegal_op; } } /* Otherwise PLD; v5TE+ */ return; } if (((insn & 0x0f70f000) == 0x0450f000) || ((insn & 0x0f70f010) == 0x0650f000)) { ARCH(7); return; /* PLI; V7 */ } if (((insn & 0x0f700000) == 0x04100000) || ((insn & 0x0f700010) == 0x06100000)) { if (!arm_feature(env, ARM_FEATURE_V7MP)) { goto illegal_op; } return; /* v7MP: Unallocated memory hint: must NOP */ } if ((insn & 0x0ffffdff) == 0x01010000) { ARCH(6); /* setend */ if (insn & (1 << 9)) { /* BE8 mode not implemented. */ goto illegal_op; } return; } else if ((insn & 0x0fffff00) == 0x057ff000) { switch ((insn >> 4) & 0xf) { case 1: /* clrex */ ARCH(6K); gen_clrex(s); return; case 4: /* dsb */ case 5: /* dmb */ case 6: /* isb */ ARCH(7); /* We don't emulate caches so these are a no-op. */ return; default: goto illegal_op; } } else if ((insn & 0x0e5fffe0) == 0x084d0500) { /* srs */ int32_t offset; if (IS_USER(s)) goto illegal_op; ARCH(6); op1 = (insn & 0x1f); addr = tcg_temp_new_i32(); tmp = tcg_const_i32(op1); gen_helper_get_r13_banked(addr, cpu_env, tmp); tcg_temp_free_i32(tmp); i = (insn >> 23) & 3; switch (i) { case 0: offset = -4; break; /* DA */ case 1: offset = 0; break; /* IA */ case 2: offset = -8; break; /* DB */ case 3: offset = 4; break; /* IB */ default: abort(); } if (offset) tcg_gen_addi_i32(addr, addr, offset); tmp = load_reg(s, 14); gen_st32(tmp, addr, 0); tmp = load_cpu_field(spsr); tcg_gen_addi_i32(addr, addr, 4); gen_st32(tmp, addr, 0); if (insn & (1 << 21)) { /* Base writeback. */ switch (i) { case 0: offset = -8; break; case 1: offset = 4; break; case 2: offset = -4; break; case 3: offset = 0; break; default: abort(); } if (offset) tcg_gen_addi_i32(addr, addr, offset); tmp = tcg_const_i32(op1); gen_helper_set_r13_banked(cpu_env, tmp, addr); tcg_temp_free_i32(tmp); tcg_temp_free_i32(addr); } else { tcg_temp_free_i32(addr); } return; } else if ((insn & 0x0e50ffe0) == 0x08100a00) { /* rfe */ int32_t offset; if (IS_USER(s)) goto illegal_op; ARCH(6); rn = (insn >> 16) & 0xf; addr = load_reg(s, rn); i = (insn >> 23) & 3; switch (i) { case 0: offset = -4; break; /* DA */ case 1: offset = 0; break; /* IA */ case 2: offset = -8; break; /* DB */ case 3: offset = 4; break; /* IB */ default: abort(); } if (offset) tcg_gen_addi_i32(addr, addr, offset); /* Load PC into tmp and CPSR into tmp2. */ tmp = gen_ld32(addr, 0); tcg_gen_addi_i32(addr, addr, 4); tmp2 = gen_ld32(addr, 0); if (insn & (1 << 21)) { /* Base writeback. */ switch (i) { case 0: offset = -8; break; case 1: offset = 4; break; case 2: offset = -4; break; case 3: offset = 0; break; default: abort(); } if (offset) tcg_gen_addi_i32(addr, addr, offset); store_reg(s, rn, addr); } else { tcg_temp_free_i32(addr); } gen_rfe(s, tmp, tmp2); return; } else if ((insn & 0x0e000000) == 0x0a000000) { /* branch link and change to thumb (blx <offset>) */ int32_t offset; val = (uint32_t)s->pc; tmp = tcg_temp_new_i32(); tcg_gen_movi_i32(tmp, val); store_reg(s, 14, tmp); /* Sign-extend the 24-bit offset */ offset = (((int32_t)insn) << 8) >> 8; /* offset * 4 + bit24 * 2 + (thumb bit) */ val += (offset << 2) | ((insn >> 23) & 2) | 1; /* pipeline offset */ val += 4; gen_bx_im(s, val); return; } else if ((insn & 0x0e000f00) == 0x0c000100) { if (arm_feature(env, ARM_FEATURE_IWMMXT)) { /* iWMMXt register transfer. */ if (env->cp15.c15_cpar & (1 << 1)) if (!disas_iwmmxt_insn(env, s, insn)) return; } } else if ((insn & 0x0fe00000) == 0x0c400000) { /* Coprocessor double register transfer. */ } else if ((insn & 0x0f000010) == 0x0e000010) { /* Additional coprocessor register transfer. */ } else if ((insn & 0x0ff10020) == 0x01000000) { uint32_t mask; uint32_t val; /* cps (privileged) */ if (IS_USER(s)) return; mask = val = 0; if (insn & (1 << 19)) { if (insn & (1 << 8)) mask |= CPSR_A; if (insn & (1 << 7)) mask |= CPSR_I; if (insn & (1 << 6)) mask |= CPSR_F; if (insn & (1 << 18)) val |= mask; } if (insn & (1 << 17)) { mask |= CPSR_M; val |= (insn & 0x1f); } if (mask) { gen_set_psr_im(s, mask, 0, val); } return; } goto illegal_op; } if (cond != 0xe) { /* if not always execute, we generate a conditional jump to next instruction */ s->condlabel = gen_new_label(); gen_test_cc(cond ^ 1, s->condlabel); s->condjmp = 1; } if ((insn & 0x0f900000) == 0x03000000) { if ((insn & (1 << 21)) == 0) { ARCH(6T2); rd = (insn >> 12) & 0xf; val = ((insn >> 4) & 0xf000) | (insn & 0xfff); if ((insn & (1 << 22)) == 0) { /* MOVW */ tmp = tcg_temp_new_i32(); tcg_gen_movi_i32(tmp, val); } else { /* MOVT */ tmp = load_reg(s, rd); tcg_gen_ext16u_i32(tmp, tmp); tcg_gen_ori_i32(tmp, tmp, val << 16); } store_reg(s, rd, tmp); } else { if (((insn >> 12) & 0xf) != 0xf) goto illegal_op; if (((insn >> 16) & 0xf) == 0) { gen_nop_hint(s, insn & 0xff); } else { /* CPSR = immediate */ val = insn & 0xff; shift = ((insn >> 8) & 0xf) * 2; if (shift) val = (val >> shift) | (val << (32 - shift)); i = ((insn & (1 << 22)) != 0); if (gen_set_psr_im(s, msr_mask(env, s, (insn >> 16) & 0xf, i), i, val)) goto illegal_op; } } } else if ((insn & 0x0f900000) == 0x01000000 && (insn & 0x00000090) != 0x00000090) { /* miscellaneous instructions */ op1 = (insn >> 21) & 3; sh = (insn >> 4) & 0xf; rm = insn & 0xf; switch (sh) { case 0x0: /* move program status register */ if (op1 & 1) { /* PSR = reg */ tmp = load_reg(s, rm); i = ((op1 & 2) != 0); if (gen_set_psr(s, msr_mask(env, s, (insn >> 16) & 0xf, i), i, tmp)) goto illegal_op; } else { /* reg = PSR */ rd = (insn >> 12) & 0xf; if (op1 & 2) { if (IS_USER(s)) goto illegal_op; tmp = load_cpu_field(spsr); } else { tmp = tcg_temp_new_i32(); gen_helper_cpsr_read(tmp); } store_reg(s, rd, tmp); } break; case 0x1: if (op1 == 1) { /* branch/exchange thumb (bx). */ tmp = load_reg(s, rm); gen_bx(s, tmp); } else if (op1 == 3) { /* clz */ rd = (insn >> 12) & 0xf; tmp = load_reg(s, rm); gen_helper_clz(tmp, tmp); store_reg(s, rd, tmp); } else { goto illegal_op; } break; case 0x2: if (op1 == 1) { ARCH(5J); /* bxj */ /* Trivial implementation equivalent to bx. */ tmp = load_reg(s, rm); gen_bx(s, tmp); } else { goto illegal_op; } break; case 0x3: if (op1 != 1) goto illegal_op; /* branch link/exchange thumb (blx) */ tmp = load_reg(s, rm); tmp2 = tcg_temp_new_i32(); tcg_gen_movi_i32(tmp2, s->pc); store_reg(s, 14, tmp2); gen_bx(s, tmp); break; case 0x5: /* saturating add/subtract */ rd = (insn >> 12) & 0xf; rn = (insn >> 16) & 0xf; tmp = load_reg(s, rm); tmp2 = load_reg(s, rn); if (op1 & 2) gen_helper_double_saturate(tmp2, tmp2); if (op1 & 1) gen_helper_sub_saturate(tmp, tmp, tmp2); else gen_helper_add_saturate(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); store_reg(s, rd, tmp); break; case 7: /* SMC instruction (op1 == 3) and undefined instructions (op1 == 0 || op1 == 2) will trap */ if (op1 != 1) { goto illegal_op; } /* bkpt */ gen_exception_insn(s, 4, EXCP_BKPT); break; case 0x8: /* signed multiply */ case 0xa: case 0xc: case 0xe: rs = (insn >> 8) & 0xf; rn = (insn >> 12) & 0xf; rd = (insn >> 16) & 0xf; if (op1 == 1) { /* (32 * 16) >> 16 */ tmp = load_reg(s, rm); tmp2 = load_reg(s, rs); if (sh & 4) tcg_gen_sari_i32(tmp2, tmp2, 16); else gen_sxth(tmp2); tmp64 = gen_muls_i64_i32(tmp, tmp2); tcg_gen_shri_i64(tmp64, tmp64, 16); tmp = tcg_temp_new_i32(); tcg_gen_trunc_i64_i32(tmp, tmp64); tcg_temp_free_i64(tmp64); if ((sh & 2) == 0) { tmp2 = load_reg(s, rn); gen_helper_add_setq(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); } store_reg(s, rd, tmp); } else { /* 16 * 16 */ tmp = load_reg(s, rm); tmp2 = load_reg(s, rs); gen_mulxy(tmp, tmp2, sh & 2, sh & 4); tcg_temp_free_i32(tmp2); if (op1 == 2) { tmp64 = tcg_temp_new_i64(); tcg_gen_ext_i32_i64(tmp64, tmp); tcg_temp_free_i32(tmp); gen_addq(s, tmp64, rn, rd); gen_storeq_reg(s, rn, rd, tmp64); tcg_temp_free_i64(tmp64); } else { if (op1 == 0) { tmp2 = load_reg(s, rn); gen_helper_add_setq(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); } store_reg(s, rd, tmp); } } break; default: goto illegal_op; } } else if (((insn & 0x0e000000) == 0 && (insn & 0x00000090) != 0x90) || ((insn & 0x0e000000) == (1 << 25))) { int set_cc, logic_cc, shiftop; op1 = (insn >> 21) & 0xf; set_cc = (insn >> 20) & 1; logic_cc = table_logic_cc[op1] & set_cc; /* data processing instruction */ if (insn & (1 << 25)) { /* immediate operand */ val = insn & 0xff; shift = ((insn >> 8) & 0xf) * 2; if (shift) { val = (val >> shift) | (val << (32 - shift)); } tmp2 = tcg_temp_new_i32(); tcg_gen_movi_i32(tmp2, val); if (logic_cc && shift) { gen_set_CF_bit31(tmp2); } } else { /* register */ rm = (insn) & 0xf; tmp2 = load_reg(s, rm); shiftop = (insn >> 5) & 3; if (!(insn & (1 << 4))) { shift = (insn >> 7) & 0x1f; gen_arm_shift_im(tmp2, shiftop, shift, logic_cc); } else { rs = (insn >> 8) & 0xf; tmp = load_reg(s, rs); gen_arm_shift_reg(tmp2, shiftop, tmp, logic_cc); } } if (op1 != 0x0f && op1 != 0x0d) { rn = (insn >> 16) & 0xf; tmp = load_reg(s, rn); } else { TCGV_UNUSED(tmp); } rd = (insn >> 12) & 0xf; switch(op1) { case 0x00: tcg_gen_and_i32(tmp, tmp, tmp2); if (logic_cc) { gen_logic_CC(tmp); } store_reg_bx(env, s, rd, tmp); break; case 0x01: tcg_gen_xor_i32(tmp, tmp, tmp2); if (logic_cc) { gen_logic_CC(tmp); } store_reg_bx(env, s, rd, tmp); break; case 0x02: if (set_cc && rd == 15) { /* SUBS r15, ... is used for exception return. */ if (IS_USER(s)) { goto illegal_op; } gen_helper_sub_cc(tmp, tmp, tmp2); gen_exception_return(s, tmp); } else { if (set_cc) { gen_helper_sub_cc(tmp, tmp, tmp2); } else { tcg_gen_sub_i32(tmp, tmp, tmp2); } store_reg_bx(env, s, rd, tmp); } break; case 0x03: if (set_cc) { gen_helper_sub_cc(tmp, tmp2, tmp); } else { tcg_gen_sub_i32(tmp, tmp2, tmp); } store_reg_bx(env, s, rd, tmp); break; case 0x04: if (set_cc) { gen_helper_add_cc(tmp, tmp, tmp2); } else { tcg_gen_add_i32(tmp, tmp, tmp2); } store_reg_bx(env, s, rd, tmp); break; case 0x05: if (set_cc) { gen_helper_adc_cc(tmp, tmp, tmp2); } else { gen_add_carry(tmp, tmp, tmp2); } store_reg_bx(env, s, rd, tmp); break; case 0x06: if (set_cc) { gen_helper_sbc_cc(tmp, tmp, tmp2); } else { gen_sub_carry(tmp, tmp, tmp2); } store_reg_bx(env, s, rd, tmp); break; case 0x07: if (set_cc) { gen_helper_sbc_cc(tmp, tmp2, tmp); } else { gen_sub_carry(tmp, tmp2, tmp); } store_reg_bx(env, s, rd, tmp); break; case 0x08: if (set_cc) { tcg_gen_and_i32(tmp, tmp, tmp2); gen_logic_CC(tmp); } tcg_temp_free_i32(tmp); break; case 0x09: if (set_cc) { tcg_gen_xor_i32(tmp, tmp, tmp2); gen_logic_CC(tmp); } tcg_temp_free_i32(tmp); break; case 0x0a: if (set_cc) { gen_helper_sub_cc(tmp, tmp, tmp2); } tcg_temp_free_i32(tmp); break; case 0x0b: if (set_cc) { gen_helper_add_cc(tmp, tmp, tmp2); } tcg_temp_free_i32(tmp); break; case 0x0c: tcg_gen_or_i32(tmp, tmp, tmp2); if (logic_cc) { gen_logic_CC(tmp); } store_reg_bx(env, s, rd, tmp); break; case 0x0d: if (logic_cc && rd == 15) { /* MOVS r15, ... is used for exception return. */ if (IS_USER(s)) { goto illegal_op; } gen_exception_return(s, tmp2); } else { if (logic_cc) { gen_logic_CC(tmp2); } store_reg_bx(env, s, rd, tmp2); } break; case 0x0e: tcg_gen_andc_i32(tmp, tmp, tmp2); if (logic_cc) { gen_logic_CC(tmp); } store_reg_bx(env, s, rd, tmp); break; default: case 0x0f: tcg_gen_not_i32(tmp2, tmp2); if (logic_cc) { gen_logic_CC(tmp2); } store_reg_bx(env, s, rd, tmp2); break; } if (op1 != 0x0f && op1 != 0x0d) { tcg_temp_free_i32(tmp2); } } else { /* other instructions */ op1 = (insn >> 24) & 0xf; switch(op1) { case 0x0: case 0x1: /* multiplies, extra load/stores */ sh = (insn >> 5) & 3; if (sh == 0) { if (op1 == 0x0) { rd = (insn >> 16) & 0xf; rn = (insn >> 12) & 0xf; rs = (insn >> 8) & 0xf; rm = (insn) & 0xf; op1 = (insn >> 20) & 0xf; switch (op1) { case 0: case 1: case 2: case 3: case 6: /* 32 bit mul */ tmp = load_reg(s, rs); tmp2 = load_reg(s, rm); tcg_gen_mul_i32(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); if (insn & (1 << 22)) { /* Subtract (mls) */ ARCH(6T2); tmp2 = load_reg(s, rn); tcg_gen_sub_i32(tmp, tmp2, tmp); tcg_temp_free_i32(tmp2); } else if (insn & (1 << 21)) { /* Add */ tmp2 = load_reg(s, rn); tcg_gen_add_i32(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); } if (insn & (1 << 20)) gen_logic_CC(tmp); store_reg(s, rd, tmp); break; case 4: /* 64 bit mul double accumulate (UMAAL) */ ARCH(6); tmp = load_reg(s, rs); tmp2 = load_reg(s, rm); tmp64 = gen_mulu_i64_i32(tmp, tmp2); gen_addq_lo(s, tmp64, rn); gen_addq_lo(s, tmp64, rd); gen_storeq_reg(s, rn, rd, tmp64); tcg_temp_free_i64(tmp64); break; case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 15: /* 64 bit mul: UMULL, UMLAL, SMULL, SMLAL. */ tmp = load_reg(s, rs); tmp2 = load_reg(s, rm); if (insn & (1 << 22)) { tmp64 = gen_muls_i64_i32(tmp, tmp2); } else { tmp64 = gen_mulu_i64_i32(tmp, tmp2); } if (insn & (1 << 21)) { /* mult accumulate */ gen_addq(s, tmp64, rn, rd); } if (insn & (1 << 20)) { gen_logicq_cc(tmp64); } gen_storeq_reg(s, rn, rd, tmp64); tcg_temp_free_i64(tmp64); break; default: goto illegal_op; } } else { rn = (insn >> 16) & 0xf; rd = (insn >> 12) & 0xf; if (insn & (1 << 23)) { /* load/store exclusive */ op1 = (insn >> 21) & 0x3; if (op1) ARCH(6K); else ARCH(6); addr = tcg_temp_local_new_i32(); load_reg_var(s, addr, rn); if (insn & (1 << 20)) { switch (op1) { case 0: /* ldrex */ gen_load_exclusive(s, rd, 15, addr, 2); break; case 1: /* ldrexd */ gen_load_exclusive(s, rd, rd + 1, addr, 3); break; case 2: /* ldrexb */ gen_load_exclusive(s, rd, 15, addr, 0); break; case 3: /* ldrexh */ gen_load_exclusive(s, rd, 15, addr, 1); break; default: abort(); } } else { rm = insn & 0xf; switch (op1) { case 0: /* strex */ gen_store_exclusive(s, rd, rm, 15, addr, 2); break; case 1: /* strexd */ gen_store_exclusive(s, rd, rm, rm + 1, addr, 3); break; case 2: /* strexb */ gen_store_exclusive(s, rd, rm, 15, addr, 0); break; case 3: /* strexh */ gen_store_exclusive(s, rd, rm, 15, addr, 1); break; default: abort(); } } tcg_temp_free(addr); } else { /* SWP instruction */ rm = (insn) & 0xf; /* ??? This is not really atomic. However we know we never have multiple CPUs running in parallel, so it is good enough. */ addr = load_reg(s, rn); tmp = load_reg(s, rm); if (insn & (1 << 22)) { tmp2 = gen_ld8u(addr, IS_USER(s)); gen_st8(tmp, addr, IS_USER(s)); } else { tmp2 = gen_ld32(addr, IS_USER(s)); gen_st32(tmp, addr, IS_USER(s)); } tcg_temp_free_i32(addr); store_reg(s, rd, tmp2); } } } else { int address_offset; int load; /* Misc load/store */ rn = (insn >> 16) & 0xf; rd = (insn >> 12) & 0xf; addr = load_reg(s, rn); if (insn & (1 << 24)) gen_add_datah_offset(s, insn, 0, addr); address_offset = 0; if (insn & (1 << 20)) { /* load */ switch(sh) { case 1: tmp = gen_ld16u(addr, IS_USER(s)); break; case 2: tmp = gen_ld8s(addr, IS_USER(s)); break; default: case 3: tmp = gen_ld16s(addr, IS_USER(s)); break; } load = 1; } else if (sh & 2) { /* doubleword */ if (sh & 1) { /* store */ tmp = load_reg(s, rd); gen_st32(tmp, addr, IS_USER(s)); tcg_gen_addi_i32(addr, addr, 4); tmp = load_reg(s, rd + 1); gen_st32(tmp, addr, IS_USER(s)); load = 0; } else { /* load */ tmp = gen_ld32(addr, IS_USER(s)); store_reg(s, rd, tmp); tcg_gen_addi_i32(addr, addr, 4); tmp = gen_ld32(addr, IS_USER(s)); rd++; load = 1; } address_offset = -4; } else { /* store */ tmp = load_reg(s, rd); gen_st16(tmp, addr, IS_USER(s)); load = 0; } /* Perform base writeback before the loaded value to ensure correct behavior with overlapping index registers. ldrd with base writeback is is undefined if the destination and index registers overlap. */ if (!(insn & (1 << 24))) { gen_add_datah_offset(s, insn, address_offset, addr); store_reg(s, rn, addr); } else if (insn & (1 << 21)) { if (address_offset) tcg_gen_addi_i32(addr, addr, address_offset); store_reg(s, rn, addr); } else { tcg_temp_free_i32(addr); } if (load) { /* Complete the load. */ store_reg(s, rd, tmp); } } break; case 0x4: case 0x5: goto do_ldst; case 0x6: case 0x7: if (insn & (1 << 4)) { ARCH(6); /* Armv6 Media instructions. */ rm = insn & 0xf; rn = (insn >> 16) & 0xf; rd = (insn >> 12) & 0xf; rs = (insn >> 8) & 0xf; switch ((insn >> 23) & 3) { case 0: /* Parallel add/subtract. */ op1 = (insn >> 20) & 7; tmp = load_reg(s, rn); tmp2 = load_reg(s, rm); sh = (insn >> 5) & 7; if ((op1 & 3) == 0 || sh == 5 || sh == 6) goto illegal_op; gen_arm_parallel_addsub(op1, sh, tmp, tmp2); tcg_temp_free_i32(tmp2); store_reg(s, rd, tmp); break; case 1: if ((insn & 0x00700020) == 0) { /* Halfword pack. */ tmp = load_reg(s, rn); tmp2 = load_reg(s, rm); shift = (insn >> 7) & 0x1f; if (insn & (1 << 6)) { /* pkhtb */ if (shift == 0) shift = 31; tcg_gen_sari_i32(tmp2, tmp2, shift); tcg_gen_andi_i32(tmp, tmp, 0xffff0000); tcg_gen_ext16u_i32(tmp2, tmp2); } else { /* pkhbt */ if (shift) tcg_gen_shli_i32(tmp2, tmp2, shift); tcg_gen_ext16u_i32(tmp, tmp); tcg_gen_andi_i32(tmp2, tmp2, 0xffff0000); } tcg_gen_or_i32(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); store_reg(s, rd, tmp); } else if ((insn & 0x00200020) == 0x00200000) { /* [us]sat */ tmp = load_reg(s, rm); shift = (insn >> 7) & 0x1f; if (insn & (1 << 6)) { if (shift == 0) shift = 31; tcg_gen_sari_i32(tmp, tmp, shift); } else { tcg_gen_shli_i32(tmp, tmp, shift); } sh = (insn >> 16) & 0x1f; tmp2 = tcg_const_i32(sh); if (insn & (1 << 22)) gen_helper_usat(tmp, tmp, tmp2); else gen_helper_ssat(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); store_reg(s, rd, tmp); } else if ((insn & 0x00300fe0) == 0x00200f20) { /* [us]sat16 */ tmp = load_reg(s, rm); sh = (insn >> 16) & 0x1f; tmp2 = tcg_const_i32(sh); if (insn & (1 << 22)) gen_helper_usat16(tmp, tmp, tmp2); else gen_helper_ssat16(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); store_reg(s, rd, tmp); } else if ((insn & 0x00700fe0) == 0x00000fa0) { /* Select bytes. */ tmp = load_reg(s, rn); tmp2 = load_reg(s, rm); tmp3 = tcg_temp_new_i32(); tcg_gen_ld_i32(tmp3, cpu_env, offsetof(CPUState, GE)); gen_helper_sel_flags(tmp, tmp3, tmp, tmp2); tcg_temp_free_i32(tmp3); tcg_temp_free_i32(tmp2); store_reg(s, rd, tmp); } else if ((insn & 0x000003e0) == 0x00000060) { tmp = load_reg(s, rm); shift = (insn >> 10) & 3; /* ??? In many cases it's not neccessary to do a rotate, a shift is sufficient. */ if (shift != 0) tcg_gen_rotri_i32(tmp, tmp, shift * 8); op1 = (insn >> 20) & 7; switch (op1) { case 0: gen_sxtb16(tmp); break; case 2: gen_sxtb(tmp); break; case 3: gen_sxth(tmp); break; case 4: gen_uxtb16(tmp); break; case 6: gen_uxtb(tmp); break; case 7: gen_uxth(tmp); break; default: goto illegal_op; } if (rn != 15) { tmp2 = load_reg(s, rn); if ((op1 & 3) == 0) { gen_add16(tmp, tmp2); } else { tcg_gen_add_i32(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); } } store_reg(s, rd, tmp); } else if ((insn & 0x003f0f60) == 0x003f0f20) { /* rev */ tmp = load_reg(s, rm); if (insn & (1 << 22)) { if (insn & (1 << 7)) { gen_revsh(tmp); } else { ARCH(6T2); gen_helper_rbit(tmp, tmp); } } else { if (insn & (1 << 7)) gen_rev16(tmp); else tcg_gen_bswap32_i32(tmp, tmp); } store_reg(s, rd, tmp); } else { goto illegal_op; } break; case 2: /* Multiplies (Type 3). */ tmp = load_reg(s, rm); tmp2 = load_reg(s, rs); if (insn & (1 << 20)) { /* Signed multiply most significant [accumulate]. (SMMUL, SMMLA, SMMLS) */ tmp64 = gen_muls_i64_i32(tmp, tmp2); if (rd != 15) { tmp = load_reg(s, rd); if (insn & (1 << 6)) { tmp64 = gen_subq_msw(tmp64, tmp); } else { tmp64 = gen_addq_msw(tmp64, tmp); } } if (insn & (1 << 5)) { tcg_gen_addi_i64(tmp64, tmp64, 0x80000000u); } tcg_gen_shri_i64(tmp64, tmp64, 32); tmp = tcg_temp_new_i32(); tcg_gen_trunc_i64_i32(tmp, tmp64); tcg_temp_free_i64(tmp64); store_reg(s, rn, tmp); } else { if (insn & (1 << 5)) gen_swap_half(tmp2); gen_smul_dual(tmp, tmp2); if (insn & (1 << 6)) { /* This subtraction cannot overflow. */ tcg_gen_sub_i32(tmp, tmp, tmp2); } else { /* This addition cannot overflow 32 bits; * however it may overflow considered as a signed * operation, in which case we must set the Q flag. */ gen_helper_add_setq(tmp, tmp, tmp2); } tcg_temp_free_i32(tmp2); if (insn & (1 << 22)) { /* smlald, smlsld */ tmp64 = tcg_temp_new_i64(); tcg_gen_ext_i32_i64(tmp64, tmp); tcg_temp_free_i32(tmp); gen_addq(s, tmp64, rd, rn); gen_storeq_reg(s, rd, rn, tmp64); tcg_temp_free_i64(tmp64); } else { /* smuad, smusd, smlad, smlsd */ if (rd != 15) { tmp2 = load_reg(s, rd); gen_helper_add_setq(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); } store_reg(s, rn, tmp); } } break; case 3: op1 = ((insn >> 17) & 0x38) | ((insn >> 5) & 7); switch (op1) { case 0: /* Unsigned sum of absolute differences. */ ARCH(6); tmp = load_reg(s, rm); tmp2 = load_reg(s, rs); gen_helper_usad8(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); if (rd != 15) { tmp2 = load_reg(s, rd); tcg_gen_add_i32(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); } store_reg(s, rn, tmp); break; case 0x20: case 0x24: case 0x28: case 0x2c: /* Bitfield insert/clear. */ ARCH(6T2); shift = (insn >> 7) & 0x1f; i = (insn >> 16) & 0x1f; i = i + 1 - shift; if (rm == 15) { tmp = tcg_temp_new_i32(); tcg_gen_movi_i32(tmp, 0); } else { tmp = load_reg(s, rm); } if (i != 32) { tmp2 = load_reg(s, rd); gen_bfi(tmp, tmp2, tmp, shift, (1u << i) - 1); tcg_temp_free_i32(tmp2); } store_reg(s, rd, tmp); break; case 0x12: case 0x16: case 0x1a: case 0x1e: /* sbfx */ case 0x32: case 0x36: case 0x3a: case 0x3e: /* ubfx */ ARCH(6T2); tmp = load_reg(s, rm); shift = (insn >> 7) & 0x1f; i = ((insn >> 16) & 0x1f) + 1; if (shift + i > 32) goto illegal_op; if (i < 32) { if (op1 & 0x20) { gen_ubfx(tmp, shift, (1u << i) - 1); } else { gen_sbfx(tmp, shift, i); } } store_reg(s, rd, tmp); break; default: goto illegal_op; } break; } break; } do_ldst: /* Check for undefined extension instructions * per the ARM Bible IE: * xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx */ sh = (0xf << 20) | (0xf << 4); if (op1 == 0x7 && ((insn & sh) == sh)) { goto illegal_op; } /* load/store byte/word */ rn = (insn >> 16) & 0xf; rd = (insn >> 12) & 0xf; tmp2 = load_reg(s, rn); i = (IS_USER(s) || (insn & 0x01200000) == 0x00200000); if (insn & (1 << 24)) gen_add_data_offset(s, insn, tmp2); if (insn & (1 << 20)) { /* load */ if (insn & (1 << 22)) { tmp = gen_ld8u(tmp2, i); } else { tmp = gen_ld32(tmp2, i); } } else { /* store */ tmp = load_reg(s, rd); if (insn & (1 << 22)) gen_st8(tmp, tmp2, i); else gen_st32(tmp, tmp2, i); } if (!(insn & (1 << 24))) { gen_add_data_offset(s, insn, tmp2); store_reg(s, rn, tmp2); } else if (insn & (1 << 21)) { store_reg(s, rn, tmp2); } else { tcg_temp_free_i32(tmp2); } if (insn & (1 << 20)) { /* Complete the load. */ if (rd == 15) gen_bx(s, tmp); else store_reg(s, rd, tmp); } break; case 0x08: case 0x09: { int j, n, user, loaded_base; TCGv loaded_var; /* load/store multiple words */ /* XXX: store correct base if write back */ user = 0; if (insn & (1 << 22)) { if (IS_USER(s)) goto illegal_op; /* only usable in supervisor mode */ if ((insn & (1 << 15)) == 0) user = 1; } rn = (insn >> 16) & 0xf; addr = load_reg(s, rn); /* compute total size */ loaded_base = 0; TCGV_UNUSED(loaded_var); n = 0; for(i=0;i<16;i++) { if (insn & (1 << i)) n++; } /* XXX: test invalid n == 0 case ? */ if (insn & (1 << 23)) { if (insn & (1 << 24)) { /* pre increment */ tcg_gen_addi_i32(addr, addr, 4); } else { /* post increment */ } } else { if (insn & (1 << 24)) { /* pre decrement */ tcg_gen_addi_i32(addr, addr, -(n * 4)); } else { /* post decrement */ if (n != 1) tcg_gen_addi_i32(addr, addr, -((n - 1) * 4)); } } j = 0; for(i=0;i<16;i++) { if (insn & (1 << i)) { if (insn & (1 << 20)) { /* load */ tmp = gen_ld32(addr, IS_USER(s)); if (i == 15) { gen_bx(s, tmp); } else if (user) { tmp2 = tcg_const_i32(i); gen_helper_set_user_reg(tmp2, tmp); tcg_temp_free_i32(tmp2); tcg_temp_free_i32(tmp); } else if (i == rn) { loaded_var = tmp; loaded_base = 1; } else { store_reg(s, i, tmp); } } else { /* store */ if (i == 15) { /* special case: r15 = PC + 8 */ val = (long)s->pc + 4; tmp = tcg_temp_new_i32(); tcg_gen_movi_i32(tmp, val); } else if (user) { tmp = tcg_temp_new_i32(); tmp2 = tcg_const_i32(i); gen_helper_get_user_reg(tmp, tmp2); tcg_temp_free_i32(tmp2); } else { tmp = load_reg(s, i); } gen_st32(tmp, addr, IS_USER(s)); } j++; /* no need to add after the last transfer */ if (j != n) tcg_gen_addi_i32(addr, addr, 4); } } if (insn & (1 << 21)) { /* write back */ if (insn & (1 << 23)) { if (insn & (1 << 24)) { /* pre increment */ } else { /* post increment */ tcg_gen_addi_i32(addr, addr, 4); } } else { if (insn & (1 << 24)) { /* pre decrement */ if (n != 1) tcg_gen_addi_i32(addr, addr, -((n - 1) * 4)); } else { /* post decrement */ tcg_gen_addi_i32(addr, addr, -(n * 4)); } } store_reg(s, rn, addr); } else { tcg_temp_free_i32(addr); } if (loaded_base) { store_reg(s, rn, loaded_var); } if ((insn & (1 << 22)) && !user) { /* Restore CPSR from SPSR. */ tmp = load_cpu_field(spsr); gen_set_cpsr(tmp, 0xffffffff); tcg_temp_free_i32(tmp); s->is_jmp = DISAS_UPDATE; } } break; case 0xa: case 0xb: { int32_t offset; /* branch (and link) */ val = (int32_t)s->pc; if (insn & (1 << 24)) { tmp = tcg_temp_new_i32(); tcg_gen_movi_i32(tmp, val); store_reg(s, 14, tmp); } offset = (((int32_t)insn << 8) >> 8); val += (offset << 2) + 4; gen_jmp(s, val); } break; case 0xc: case 0xd: case 0xe: /* Coprocessor. */ if (disas_coproc_insn(env, s, insn)) goto illegal_op; break; case 0xf: /* swi */ gen_set_pc_im(s->pc); s->is_jmp = DISAS_SWI; break; default: illegal_op: gen_exception_insn(s, 4, EXCP_UDEF); break; } } }
4,320
qemu
e01b444523e2b0c663b42b3e8f44ef48a6153051
0
static int ppc_hash64_translate(CPUPPCState *env, struct mmu_ctx_hash64 *ctx, target_ulong eaddr, int rwx) { int ret; ppc_slb_t *slb; hwaddr pte_offset; ppc_hash_pte64_t pte; int target_page_bits; assert((rwx == 0) || (rwx == 1) || (rwx == 2)); /* 1. Handle real mode accesses */ if (((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0))) { /* Translation is off */ /* In real mode the top 4 effective address bits are ignored */ ctx->raddr = eaddr & 0x0FFFFFFFFFFFFFFFULL; ctx->prot = PAGE_READ | PAGE_EXEC | PAGE_WRITE; return 0; } /* 2. Translation is on, so look up the SLB */ slb = slb_lookup(env, eaddr); if (!slb) { return -5; } /* 3. Check for segment level no-execute violation */ if ((rwx == 2) && (slb->vsid & SLB_VSID_N)) { return -3; } /* 4. Locate the PTE in the hash table */ pte_offset = ppc_hash64_htab_lookup(env, slb, eaddr, &pte); if (pte_offset == -1) { return -1; } LOG_MMU("found PTE at offset %08" HWADDR_PRIx "\n", pte_offset); /* 5. Check access permissions */ ctx->key = !!(msr_pr ? (slb->vsid & SLB_VSID_KP) : (slb->vsid & SLB_VSID_KS)); int access, pp; bool nx; pp = (pte.pte1 & HPTE64_R_PP) | ((pte.pte1 & HPTE64_R_PP0) >> 61); /* No execute if either noexec or guarded bits set */ nx = (pte.pte1 & HPTE64_R_N) || (pte.pte1 & HPTE64_R_G); /* Compute access rights */ access = ppc_hash64_pp_check(ctx->key, pp, nx); /* Keep the matching PTE informations */ ctx->raddr = pte.pte1; ctx->prot = access; ret = ppc_hash64_check_prot(ctx->prot, rwx); if (ret) { /* Access right violation */ LOG_MMU("PTE access rejected\n"); return ret; } LOG_MMU("PTE access granted !\n"); /* 6. Update PTE referenced and changed bits if necessary */ if (ppc_hash64_pte_update_flags(ctx, &pte.pte1, ret, rwx) == 1) { ppc_hash64_store_hpte1(env, pte_offset, pte.pte1); } /* We have a TLB that saves 4K pages, so let's * split a huge page to 4k chunks */ target_page_bits = (slb->vsid & SLB_VSID_L) ? TARGET_PAGE_BITS_16M : TARGET_PAGE_BITS; if (target_page_bits != TARGET_PAGE_BITS) { ctx->raddr |= (eaddr & ((1 << target_page_bits) - 1)) & TARGET_PAGE_MASK; } return ret; }
4,322
qemu
c2d8d311c18b13c5282ab7d7b2ae57e3dd1e7f7d
0
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, ISADevice **rtc_state, ISADevice **floppy, bool no_vmport) { int i; DriveInfo *fd[MAX_FD]; DeviceState *hpet = NULL; int pit_isa_irq = 0; qemu_irq pit_alt_irq = NULL; qemu_irq rtc_irq = NULL; qemu_irq *a20_line; ISADevice *i8042, *port92, *vmmouse, *pit; qemu_irq *cpu_exit_irq; register_ioport_write(0x80, 1, 1, ioport80_write, NULL); register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); /* * Check if an HPET shall be created. * * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT * when the HPET wants to take over. Thus we have to disable the latter. */ if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) { hpet = sysbus_try_create_simple("hpet", HPET_BASE, NULL); if (hpet) { for (i = 0; i < GSI_NUM_PINS; i++) { sysbus_connect_irq(sysbus_from_qdev(hpet), i, gsi[i]); } pit_isa_irq = -1; pit_alt_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_PIT_INT); rtc_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_RTC_INT); } } *rtc_state = rtc_init(isa_bus, 2000, rtc_irq); qemu_register_boot_set(pc_boot_set, *rtc_state); if (kvm_irqchip_in_kernel()) { pit = kvm_pit_init(isa_bus, 0x40); } else { pit = pit_init(isa_bus, 0x40, pit_isa_irq, pit_alt_irq); } if (hpet) { /* connect PIT to output control line of the HPET */ qdev_connect_gpio_out(hpet, 0, qdev_get_gpio_in(&pit->qdev, 0)); } pcspk_init(isa_bus, pit); for(i = 0; i < MAX_SERIAL_PORTS; i++) { if (serial_hds[i]) { serial_isa_init(isa_bus, i, serial_hds[i]); } } for(i = 0; i < MAX_PARALLEL_PORTS; i++) { if (parallel_hds[i]) { parallel_init(isa_bus, i, parallel_hds[i]); } } a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2); i8042 = isa_create_simple(isa_bus, "i8042"); i8042_setup_a20_line(i8042, &a20_line[0]); if (!no_vmport) { vmport_init(isa_bus); vmmouse = isa_try_create(isa_bus, "vmmouse"); } else { vmmouse = NULL; } if (vmmouse) { qdev_prop_set_ptr(&vmmouse->qdev, "ps2_mouse", i8042); qdev_init_nofail(&vmmouse->qdev); } port92 = isa_create_simple(isa_bus, "port92"); port92_init(port92, &a20_line[1]); cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1); DMA_init(0, cpu_exit_irq); for(i = 0; i < MAX_FD; i++) { fd[i] = drive_get(IF_FLOPPY, 0, i); } *floppy = fdctrl_init_isa(isa_bus, fd); }
4,323
qemu
c83c66c3b58893a4dc056e272822beb88fe9ec7f
0
void stream_start(BlockDriverState *bs, BlockDriverState *base, const char *base_id, BlockDriverCompletionFunc *cb, void *opaque, Error **errp) { StreamBlockJob *s; Coroutine *co; s = block_job_create(&stream_job_type, bs, cb, opaque, errp); if (!s) { return; } s->base = base; if (base_id) { pstrcpy(s->backing_file_id, sizeof(s->backing_file_id), base_id); } co = qemu_coroutine_create(stream_run); trace_stream_start(bs, base, s, co, opaque); qemu_coroutine_enter(co, s); }
4,324
FFmpeg
97a5addfcf0029d0f5538ed70cb38cae4108a618
0
static int decode_subframe(WMAProDecodeCtx *s) { int offset = s->samples_per_frame; int subframe_len = s->samples_per_frame; int i; int total_samples = s->samples_per_frame * s->num_channels; int transmit_coeffs = 0; int cur_subwoofer_cutoff; s->subframe_offset = get_bits_count(&s->gb); /** reset channel context and find the next block offset and size == the next block of the channel with the smallest number of decoded samples */ for (i = 0; i < s->num_channels; i++) { s->channel[i].grouped = 0; if (offset > s->channel[i].decoded_samples) { offset = s->channel[i].decoded_samples; subframe_len = s->channel[i].subframe_len[s->channel[i].cur_subframe]; } } av_dlog(s->avctx, "processing subframe with offset %i len %i\n", offset, subframe_len); /** get a list of all channels that contain the estimated block */ s->channels_for_cur_subframe = 0; for (i = 0; i < s->num_channels; i++) { const int cur_subframe = s->channel[i].cur_subframe; /** substract already processed samples */ total_samples -= s->channel[i].decoded_samples; /** and count if there are multiple subframes that match our profile */ if (offset == s->channel[i].decoded_samples && subframe_len == s->channel[i].subframe_len[cur_subframe]) { total_samples -= s->channel[i].subframe_len[cur_subframe]; s->channel[i].decoded_samples += s->channel[i].subframe_len[cur_subframe]; s->channel_indexes_for_cur_subframe[s->channels_for_cur_subframe] = i; ++s->channels_for_cur_subframe; } } /** check if the frame will be complete after processing the estimated block */ if (!total_samples) s->parsed_all_subframes = 1; av_dlog(s->avctx, "subframe is part of %i channels\n", s->channels_for_cur_subframe); /** calculate number of scale factor bands and their offsets */ s->table_idx = av_log2(s->samples_per_frame/subframe_len); s->num_bands = s->num_sfb[s->table_idx]; s->cur_sfb_offsets = s->sfb_offsets[s->table_idx]; cur_subwoofer_cutoff = s->subwoofer_cutoffs[s->table_idx]; /** configure the decoder for the current subframe */ for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; s->channel[c].coeffs = &s->channel[c].out[(s->samples_per_frame >> 1) + offset]; } s->subframe_len = subframe_len; s->esc_len = av_log2(s->subframe_len - 1) + 1; /** skip extended header if any */ if (get_bits1(&s->gb)) { int num_fill_bits; if (!(num_fill_bits = get_bits(&s->gb, 2))) { int len = get_bits(&s->gb, 4); num_fill_bits = get_bits(&s->gb, len) + 1; } if (num_fill_bits >= 0) { if (get_bits_count(&s->gb) + num_fill_bits > s->num_saved_bits) { av_log(s->avctx, AV_LOG_ERROR, "invalid number of fill bits\n"); return AVERROR_INVALIDDATA; } skip_bits_long(&s->gb, num_fill_bits); } } /** no idea for what the following bit is used */ if (get_bits1(&s->gb)) { av_log_ask_for_sample(s->avctx, "reserved bit set\n"); return AVERROR_INVALIDDATA; } if (decode_channel_transform(s) < 0) return AVERROR_INVALIDDATA; for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; if ((s->channel[c].transmit_coefs = get_bits1(&s->gb))) transmit_coeffs = 1; } if (transmit_coeffs) { int step; int quant_step = 90 * s->bits_per_sample >> 4; /** decode number of vector coded coefficients */ if ((s->transmit_num_vec_coeffs = get_bits1(&s->gb))) { int num_bits = av_log2((s->subframe_len + 3)/4) + 1; for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; s->channel[c].num_vec_coeffs = get_bits(&s->gb, num_bits) << 2; } } else { for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; s->channel[c].num_vec_coeffs = s->subframe_len; } } /** decode quantization step */ step = get_sbits(&s->gb, 6); quant_step += step; if (step == -32 || step == 31) { const int sign = (step == 31) - 1; int quant = 0; while (get_bits_count(&s->gb) + 5 < s->num_saved_bits && (step = get_bits(&s->gb, 5)) == 31) { quant += 31; } quant_step += ((quant + step) ^ sign) - sign; } if (quant_step < 0) { av_log(s->avctx, AV_LOG_DEBUG, "negative quant step\n"); } /** decode quantization step modifiers for every channel */ if (s->channels_for_cur_subframe == 1) { s->channel[s->channel_indexes_for_cur_subframe[0]].quant_step = quant_step; } else { int modifier_len = get_bits(&s->gb, 3); for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; s->channel[c].quant_step = quant_step; if (get_bits1(&s->gb)) { if (modifier_len) { s->channel[c].quant_step += get_bits(&s->gb, modifier_len) + 1; } else ++s->channel[c].quant_step; } } } /** decode scale factors */ if (decode_scale_factors(s) < 0) return AVERROR_INVALIDDATA; } av_dlog(s->avctx, "BITSTREAM: subframe header length was %i\n", get_bits_count(&s->gb) - s->subframe_offset); /** parse coefficients */ for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; if (s->channel[c].transmit_coefs && get_bits_count(&s->gb) < s->num_saved_bits) { decode_coeffs(s, c); } else memset(s->channel[c].coeffs, 0, sizeof(*s->channel[c].coeffs) * subframe_len); } av_dlog(s->avctx, "BITSTREAM: subframe length was %i\n", get_bits_count(&s->gb) - s->subframe_offset); if (transmit_coeffs) { FFTContext *mdct = &s->mdct_ctx[av_log2(subframe_len) - WMAPRO_BLOCK_MIN_BITS]; /** reconstruct the per channel data */ inverse_channel_transform(s); for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; const int* sf = s->channel[c].scale_factors; int b; if (c == s->lfe_channel) memset(&s->tmp[cur_subwoofer_cutoff], 0, sizeof(*s->tmp) * (subframe_len - cur_subwoofer_cutoff)); /** inverse quantization and rescaling */ for (b = 0; b < s->num_bands; b++) { const int end = FFMIN(s->cur_sfb_offsets[b+1], s->subframe_len); const int exp = s->channel[c].quant_step - (s->channel[c].max_scale_factor - *sf++) * s->channel[c].scale_factor_step; const float quant = pow(10.0, exp / 20.0); int start = s->cur_sfb_offsets[b]; s->dsp.vector_fmul_scalar(s->tmp + start, s->channel[c].coeffs + start, quant, end - start); } /** apply imdct (imdct_half == DCTIV with reverse) */ mdct->imdct_half(mdct, s->channel[c].coeffs, s->tmp); } } /** window and overlapp-add */ wmapro_window(s); /** handled one subframe */ for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; if (s->channel[c].cur_subframe >= s->channel[c].num_subframes) { av_log(s->avctx, AV_LOG_ERROR, "broken subframe\n"); return AVERROR_INVALIDDATA; } ++s->channel[c].cur_subframe; } return 0; }
4,325
qemu
a426e122173f36f05ea2cb72dcff77b7408546ce
0
int kvm_vm_ioctl(KVMState *s, int type, ...) { int ret; void *arg; va_list ap; va_start(ap, type); arg = va_arg(ap, void *); va_end(ap); ret = ioctl(s->vmfd, type, arg); if (ret == -1) ret = -errno; return ret; }
4,326
qemu
4a1418e07bdcfaa3177739e04707ecaec75d89e1
0
void kqemu_cpu_interrupt(CPUState *env) { #if defined(_WIN32) /* cancelling the I/O request causes KQEMU to finish executing the current block and successfully returning. */ CancelIo(kqemu_fd); #endif }
4,327
qemu
736d120af4bf5f3e13b2f90c464b3a24847f78f0
0
target_ulong helper_cfc1(CPUMIPSState *env, uint32_t reg) { target_ulong arg1; switch (reg) { case 0: arg1 = (int32_t)env->active_fpu.fcr0; break; case 25: arg1 = ((env->active_fpu.fcr31 >> 24) & 0xfe) | ((env->active_fpu.fcr31 >> 23) & 0x1); break; case 26: arg1 = env->active_fpu.fcr31 & 0x0003f07c; break; case 28: arg1 = (env->active_fpu.fcr31 & 0x00000f83) | ((env->active_fpu.fcr31 >> 22) & 0x4); break; default: arg1 = (int32_t)env->active_fpu.fcr31; break; } return arg1; }
4,328
qemu
41ecc72ba5932381208e151bf2d2149a0342beff
0
static void setup_frame(int sig, struct target_sigaction *ka, target_sigset_t *set, CPUSH4State *regs) { struct target_sigframe *frame; abi_ulong frame_addr; int i; int err = 0; int signal; frame_addr = get_sigframe(ka, regs->gregs[15], sizeof(*frame)); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) goto give_sigsegv; signal = current_exec_domain_sig(sig); err |= setup_sigcontext(&frame->sc, regs, set->sig[0]); for (i = 0; i < TARGET_NSIG_WORDS - 1; i++) { __put_user(set->sig[i + 1], &frame->extramask[i]); } /* Set up to return from userspace. If provided, use a stub already in userspace. */ if (ka->sa_flags & TARGET_SA_RESTORER) { regs->pr = (unsigned long) ka->sa_restorer; } else { /* Generate return code (system call to sigreturn) */ __put_user(MOVW(2), &frame->retcode[0]); __put_user(TRAP_NOARG, &frame->retcode[1]); __put_user((TARGET_NR_sigreturn), &frame->retcode[2]); regs->pr = (unsigned long) frame->retcode; } if (err) goto give_sigsegv; /* Set up registers for signal handler */ regs->gregs[15] = frame_addr; regs->gregs[4] = signal; /* Arg for signal handler */ regs->gregs[5] = 0; regs->gregs[6] = frame_addr += offsetof(typeof(*frame), sc); regs->pc = (unsigned long) ka->_sa_handler; unlock_user_struct(frame, frame_addr, 1); return; give_sigsegv: unlock_user_struct(frame, frame_addr, 1); force_sig(TARGET_SIGSEGV); }
4,329
qemu
72cf2d4f0e181d0d3a3122e04129c58a95da713e
0
static int qcow_open(BlockDriverState *bs, const char *filename, int flags) { BDRVQcowState *s = bs->opaque; int len, i, shift, ret; QCowHeader header; uint64_t ext_end; ret = bdrv_file_open(&s->hd, filename, flags); if (ret < 0) return ret; if (bdrv_pread(s->hd, 0, &header, sizeof(header)) != sizeof(header)) goto fail; be32_to_cpus(&header.magic); be32_to_cpus(&header.version); be64_to_cpus(&header.backing_file_offset); be32_to_cpus(&header.backing_file_size); be64_to_cpus(&header.size); be32_to_cpus(&header.cluster_bits); be32_to_cpus(&header.crypt_method); be64_to_cpus(&header.l1_table_offset); be32_to_cpus(&header.l1_size); be64_to_cpus(&header.refcount_table_offset); be32_to_cpus(&header.refcount_table_clusters); be64_to_cpus(&header.snapshots_offset); be32_to_cpus(&header.nb_snapshots); if (header.magic != QCOW_MAGIC || header.version != QCOW_VERSION) goto fail; if (header.size <= 1 || header.cluster_bits < MIN_CLUSTER_BITS || header.cluster_bits > MAX_CLUSTER_BITS) goto fail; if (header.crypt_method > QCOW_CRYPT_AES) goto fail; s->crypt_method_header = header.crypt_method; if (s->crypt_method_header) bs->encrypted = 1; s->cluster_bits = header.cluster_bits; s->cluster_size = 1 << s->cluster_bits; s->cluster_sectors = 1 << (s->cluster_bits - 9); s->l2_bits = s->cluster_bits - 3; /* L2 is always one cluster */ s->l2_size = 1 << s->l2_bits; bs->total_sectors = header.size / 512; s->csize_shift = (62 - (s->cluster_bits - 8)); s->csize_mask = (1 << (s->cluster_bits - 8)) - 1; s->cluster_offset_mask = (1LL << s->csize_shift) - 1; s->refcount_table_offset = header.refcount_table_offset; s->refcount_table_size = header.refcount_table_clusters << (s->cluster_bits - 3); s->snapshots_offset = header.snapshots_offset; s->nb_snapshots = header.nb_snapshots; /* read the level 1 table */ s->l1_size = header.l1_size; shift = s->cluster_bits + s->l2_bits; s->l1_vm_state_index = (header.size + (1LL << shift) - 1) >> shift; /* the L1 table must contain at least enough entries to put header.size bytes */ if (s->l1_size < s->l1_vm_state_index) goto fail; s->l1_table_offset = header.l1_table_offset; s->l1_table = qemu_mallocz( align_offset(s->l1_size * sizeof(uint64_t), 512)); if (bdrv_pread(s->hd, s->l1_table_offset, s->l1_table, s->l1_size * sizeof(uint64_t)) != s->l1_size * sizeof(uint64_t)) goto fail; for(i = 0;i < s->l1_size; i++) { be64_to_cpus(&s->l1_table[i]); } /* alloc L2 cache */ s->l2_cache = qemu_malloc(s->l2_size * L2_CACHE_SIZE * sizeof(uint64_t)); s->cluster_cache = qemu_malloc(s->cluster_size); /* one more sector for decompressed data alignment */ s->cluster_data = qemu_malloc(QCOW_MAX_CRYPT_CLUSTERS * s->cluster_size + 512); s->cluster_cache_offset = -1; if (qcow2_refcount_init(bs) < 0) goto fail; LIST_INIT(&s->cluster_allocs); /* read qcow2 extensions */ if (header.backing_file_offset) ext_end = header.backing_file_offset; else ext_end = s->cluster_size; if (qcow_read_extensions(bs, sizeof(header), ext_end)) goto fail; /* read the backing file name */ if (header.backing_file_offset != 0) { len = header.backing_file_size; if (len > 1023) len = 1023; if (bdrv_pread(s->hd, header.backing_file_offset, bs->backing_file, len) != len) goto fail; bs->backing_file[len] = '\0'; } if (qcow2_read_snapshots(bs) < 0) goto fail; #ifdef DEBUG_ALLOC qcow2_check_refcounts(bs); #endif return 0; fail: qcow2_free_snapshots(bs); qcow2_refcount_close(bs); qemu_free(s->l1_table); qemu_free(s->l2_cache); qemu_free(s->cluster_cache); qemu_free(s->cluster_data); bdrv_delete(s->hd); return -1; }
4,330
qemu
d4d34b0d3f5af5c8e09980da0de2eebe9a27dc71
0
static void get_enum(Object *obj, Visitor *v, void *opaque, const char *name, Error **errp) { DeviceState *dev = DEVICE(obj); Property *prop = opaque; int *ptr = qdev_get_prop_ptr(dev, prop); visit_type_enum(v, ptr, prop->info->enum_table, prop->info->name, prop->name, errp); }
4,331
qemu
2c0ef9f411ae6081efa9eca5b3eab2dbeee45a6c
0
QapiDeallocVisitor *qapi_dealloc_visitor_new(void) { QapiDeallocVisitor *v; v = g_malloc0(sizeof(*v)); v->visitor.type = VISITOR_DEALLOC; v->visitor.start_struct = qapi_dealloc_start_struct; v->visitor.end_struct = qapi_dealloc_end_struct; v->visitor.start_alternate = qapi_dealloc_start_alternate; v->visitor.end_alternate = qapi_dealloc_end_alternate; v->visitor.start_list = qapi_dealloc_start_list; v->visitor.next_list = qapi_dealloc_next_list; v->visitor.end_list = qapi_dealloc_end_list; v->visitor.type_int64 = qapi_dealloc_type_int64; v->visitor.type_uint64 = qapi_dealloc_type_uint64; v->visitor.type_bool = qapi_dealloc_type_bool; v->visitor.type_str = qapi_dealloc_type_str; v->visitor.type_number = qapi_dealloc_type_number; v->visitor.type_any = qapi_dealloc_type_anything; v->visitor.type_null = qapi_dealloc_type_null; return v; }
4,332
qemu
a8170e5e97ad17ca169c64ba87ae2f53850dab4c
0
static uint32_t dp8393x_readb(void *opaque, target_phys_addr_t addr) { uint16_t v = dp8393x_readw(opaque, addr & ~0x1); return (v >> (8 * (addr & 0x1))) & 0xff; }
4,333
qemu
b3a62939561e07bc34493444fa926b6137cba4e8
0
int tcg_global_mem_new_internal(TCGType type, TCGv_ptr base, intptr_t offset, const char *name) { TCGContext *s = &tcg_ctx; TCGTemp *ts, *base_ts = &s->temps[GET_TCGV_PTR(base)]; int idx, reg = base_ts->reg; idx = s->nb_globals; #if TCG_TARGET_REG_BITS == 32 if (type == TCG_TYPE_I64) { char buf[64]; tcg_temp_alloc(s, s->nb_globals + 2); ts = &s->temps[s->nb_globals]; ts->base_type = type; ts->type = TCG_TYPE_I32; ts->fixed_reg = 0; ts->mem_allocated = 1; ts->mem_reg = reg; #ifdef HOST_WORDS_BIGENDIAN ts->mem_offset = offset + 4; #else ts->mem_offset = offset; #endif pstrcpy(buf, sizeof(buf), name); pstrcat(buf, sizeof(buf), "_0"); ts->name = strdup(buf); ts++; ts->base_type = type; ts->type = TCG_TYPE_I32; ts->fixed_reg = 0; ts->mem_allocated = 1; ts->mem_reg = reg; #ifdef HOST_WORDS_BIGENDIAN ts->mem_offset = offset; #else ts->mem_offset = offset + 4; #endif pstrcpy(buf, sizeof(buf), name); pstrcat(buf, sizeof(buf), "_1"); ts->name = strdup(buf); s->nb_globals += 2; } else #endif { tcg_temp_alloc(s, s->nb_globals + 1); ts = &s->temps[s->nb_globals]; ts->base_type = type; ts->type = type; ts->fixed_reg = 0; ts->mem_allocated = 1; ts->mem_reg = reg; ts->mem_offset = offset; ts->name = name; s->nb_globals++; } return idx; }
4,334
qemu
7e450a8f50ac12fc8f69b6ce555254c84efcf407
0
hwaddr sparc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) { SPARCCPU *cpu = SPARC_CPU(cs); CPUSPARCState *env = &cpu->env; hwaddr phys_addr; int mmu_idx = cpu_mmu_index(env, false); MemoryRegionSection section; if (cpu_sparc_get_phys_page(env, &phys_addr, addr, 2, mmu_idx) != 0) { if (cpu_sparc_get_phys_page(env, &phys_addr, addr, 0, mmu_idx) != 0) { return -1; } } section = memory_region_find(get_system_memory(), phys_addr, 1); memory_region_unref(section.mr); if (!int128_nz(section.size)) { return -1; } return phys_addr; }
4,335
qemu
1f01e50b8330c24714ddca5841fdbb703076b121
0
int qed_read_l2_table(BDRVQEDState *s, QEDRequest *request, uint64_t offset) { int ret; qed_unref_l2_cache_entry(request->l2_table); /* Check for cached L2 entry */ request->l2_table = qed_find_l2_cache_entry(&s->l2_cache, offset); if (request->l2_table) { return 0; } request->l2_table = qed_alloc_l2_cache_entry(&s->l2_cache); request->l2_table->table = qed_alloc_table(s); BLKDBG_EVENT(s->bs->file, BLKDBG_L2_LOAD); ret = qed_read_table(s, offset, request->l2_table->table); qed_acquire(s); if (ret) { /* can't trust loaded L2 table anymore */ qed_unref_l2_cache_entry(request->l2_table); request->l2_table = NULL; } else { request->l2_table->offset = offset; qed_commit_l2_cache_entry(&s->l2_cache, request->l2_table); /* This is guaranteed to succeed because we just committed the entry * to the cache. */ request->l2_table = qed_find_l2_cache_entry(&s->l2_cache, offset); assert(request->l2_table != NULL); } qed_release(s); return ret; }
4,338
qemu
1ea879e5580f63414693655fcf0328559cdce138
0
static int audio_pcm_info_eq (struct audio_pcm_info *info, audsettings_t *as) { int bits = 8, sign = 0; switch (as->fmt) { case AUD_FMT_S8: sign = 1; case AUD_FMT_U8: break; case AUD_FMT_S16: sign = 1; case AUD_FMT_U16: bits = 16; break; case AUD_FMT_S32: sign = 1; case AUD_FMT_U32: bits = 32; break; } return info->freq == as->freq && info->nchannels == as->nchannels && info->sign == sign && info->bits == bits && info->swap_endianness == (as->endianness != AUDIO_HOST_ENDIANNESS); }
4,339
FFmpeg
72732f2dddabae1d943ce617e0a27e32d13416fb
0
static int parse_adaptation_sets(AVFormatContext *s) { WebMDashMuxContext *w = s->priv_data; char *p = w->adaptation_sets; char *q; enum { new_set, parsed_id, parsing_streams } state; // syntax id=0,streams=0,1,2 id=1,streams=3,4 and so on state = new_set; while (p < w->adaptation_sets + strlen(w->adaptation_sets)) { if (*p == ' ') continue; else if (state == new_set && !strncmp(p, "id=", 3)) { w->as = av_realloc(w->as, sizeof(*w->as) * ++w->nb_as); if (w->as == NULL) return -1; w->as[w->nb_as - 1].nb_streams = 0; w->as[w->nb_as - 1].streams = NULL; p += 3; // consume "id=" q = w->as[w->nb_as - 1].id; while (*p != ',') *q++ = *p++; *q = 0; p++; state = parsed_id; } else if (state == parsed_id && !strncmp(p, "streams=", 8)) { p += 8; // consume "streams=" state = parsing_streams; } else if (state == parsing_streams) { struct AdaptationSet *as = &w->as[w->nb_as - 1]; q = p; while (*q != '\0' && *q != ',' && *q != ' ') q++; as->streams = av_realloc(as->streams, sizeof(*as->streams) * ++as->nb_streams); if (as->streams == NULL) return -1; as->streams[as->nb_streams - 1] = to_integer(p, q - p); if (as->streams[as->nb_streams - 1] < 0) return -1; if (*q == '\0') break; if (*q == ' ') state = new_set; p = ++q; } else { return -1; } } return 0; }
4,340
FFmpeg
dd5d61795690e339ae271692e7ab9df66b5eb153
0
static int filter_frame(AVFilterLink *link, AVFrame *picref) { AVFilterContext *ctx = link->dst; IDETContext *idet = ctx->priv; if (idet->prev) av_frame_free(&idet->prev); idet->prev = idet->cur; idet->cur = idet->next; idet->next = picref; if (!idet->cur) return 0; if (!idet->prev) idet->prev = av_frame_clone(idet->cur); if (!idet->csp) idet->csp = av_pix_fmt_desc_get(link->format); if (idet->csp->comp[0].depth_minus1 / 8 == 1){ idet->filter_line = (ff_idet_filter_func)ff_idet_filter_line_c_16bit; if (ARCH_X86) ff_idet_init_x86(idet, 1); } filter(ctx); return ff_filter_frame(ctx->outputs[0], av_frame_clone(idet->cur)); }
4,342
FFmpeg
70d54392f5015b9c6594fcae558f59f952501e3b
0
void ff_dsputil_init_arm(DSPContext* c, AVCodecContext *avctx) { const int high_bit_depth = avctx->bits_per_raw_sample > 8; int cpu_flags = av_get_cpu_flags(); ff_put_pixels_clamped = c->put_pixels_clamped; ff_add_pixels_clamped = c->add_pixels_clamped; if (avctx->bits_per_raw_sample <= 8) { if(avctx->idct_algo == FF_IDCT_AUTO || avctx->idct_algo == FF_IDCT_ARM){ c->idct_put = j_rev_dct_arm_put; c->idct_add = j_rev_dct_arm_add; c->idct = ff_j_rev_dct_arm; c->idct_permutation_type = FF_LIBMPEG2_IDCT_PERM; } else if (avctx->idct_algo == FF_IDCT_SIMPLEARM){ c->idct_put = simple_idct_arm_put; c->idct_add = simple_idct_arm_add; c->idct = ff_simple_idct_arm; c->idct_permutation_type = FF_NO_IDCT_PERM; } } c->add_pixels_clamped = ff_add_pixels_clamped_arm; if (!high_bit_depth) { c->put_pixels_tab[0][0] = ff_put_pixels16_arm; c->put_pixels_tab[0][1] = ff_put_pixels16_x2_arm; c->put_pixels_tab[0][2] = ff_put_pixels16_y2_arm; c->put_pixels_tab[0][3] = ff_put_pixels16_xy2_arm; c->put_pixels_tab[1][0] = ff_put_pixels8_arm; c->put_pixels_tab[1][1] = ff_put_pixels8_x2_arm; c->put_pixels_tab[1][2] = ff_put_pixels8_y2_arm; c->put_pixels_tab[1][3] = ff_put_pixels8_xy2_arm; c->put_no_rnd_pixels_tab[0][0] = ff_put_pixels16_arm; c->put_no_rnd_pixels_tab[0][1] = ff_put_no_rnd_pixels16_x2_arm; c->put_no_rnd_pixels_tab[0][2] = ff_put_no_rnd_pixels16_y2_arm; c->put_no_rnd_pixels_tab[0][3] = ff_put_no_rnd_pixels16_xy2_arm; c->put_no_rnd_pixels_tab[1][0] = ff_put_pixels8_arm; c->put_no_rnd_pixels_tab[1][1] = ff_put_no_rnd_pixels8_x2_arm; c->put_no_rnd_pixels_tab[1][2] = ff_put_no_rnd_pixels8_y2_arm; c->put_no_rnd_pixels_tab[1][3] = ff_put_no_rnd_pixels8_xy2_arm; } if (have_armv5te(cpu_flags)) ff_dsputil_init_armv5te(c, avctx); if (have_armv6(cpu_flags)) ff_dsputil_init_armv6(c, avctx); if (have_vfp(cpu_flags)) ff_dsputil_init_vfp(c, avctx); if (have_neon(cpu_flags)) ff_dsputil_init_neon(c, avctx); }
4,345
FFmpeg
79997def65fd2313b48a5f3c3a884c6149ae9b5d
0
static void fft(AC3MDCTContext *mdct, IComplex *z, int ln) { int j, l, np, np2; int nblocks, nloops; register IComplex *p,*q; int tmp_re, tmp_im; np = 1 << ln; /* reverse */ for (j = 0; j < np; j++) { int k = av_reverse[j] >> (8 - ln); if (k < j) FFSWAP(IComplex, z[k], z[j]); } /* pass 0 */ p = &z[0]; j = np >> 1; do { BF(p[0].re, p[0].im, p[1].re, p[1].im, p[0].re, p[0].im, p[1].re, p[1].im); p += 2; } while (--j); /* pass 1 */ p = &z[0]; j = np >> 2; do { BF(p[0].re, p[0].im, p[2].re, p[2].im, p[0].re, p[0].im, p[2].re, p[2].im); BF(p[1].re, p[1].im, p[3].re, p[3].im, p[1].re, p[1].im, p[3].im, -p[3].re); p+=4; } while (--j); /* pass 2 .. ln-1 */ nblocks = np >> 3; nloops = 1 << 2; np2 = np >> 1; do { p = z; q = z + nloops; for (j = 0; j < nblocks; j++) { BF(p->re, p->im, q->re, q->im, p->re, p->im, q->re, q->im); p++; q++; for(l = nblocks; l < np2; l += nblocks) { CMUL(tmp_re, tmp_im, mdct->costab[l], -mdct->sintab[l], q->re, q->im, 15); BF(p->re, p->im, q->re, q->im, p->re, p->im, tmp_re, tmp_im); p++; q++; } p += nloops; q += nloops; } nblocks = nblocks >> 1; nloops = nloops << 1; } while (nblocks); }
4,347
qemu
577bf808958d06497928c639efaa473bf8c5e099
1
static inline void gen_lookup_tb(DisasContext *s) { tcg_gen_movi_i32(cpu_R[15], s->pc & ~1); s->is_jmp = DISAS_UPDATE; }
4,348
FFmpeg
a9f3e4b138fc14f7512fde821c051fe1ff7f124f
1
static int parse_interval(Interval *interval, int interval_count, const char **buf, void *log_ctx) { char *intervalstr; int ret; *buf += strspn(*buf, SPACES); if (!**buf) return 0; /* reset data */ memset(interval, 0, sizeof(Interval)); interval->index = interval_count; /* format: INTERVAL COMMANDS */ /* parse interval */ intervalstr = av_get_token(buf, DELIMS); if (intervalstr && intervalstr[0]) { char *start, *end; start = av_strtok(intervalstr, "-", &end); if ((ret = av_parse_time(&interval->start_ts, start, 1)) < 0) { "Invalid start time specification '%s' in interval #%d\n", start, interval_count); if (end) { if ((ret = av_parse_time(&interval->end_ts, end, 1)) < 0) { "Invalid end time specification '%s' in interval #%d\n", end, interval_count); } else { interval->end_ts = INT64_MAX; if (interval->end_ts < interval->start_ts) { "Invalid end time '%s' in interval #%d: " "cannot be lesser than start time '%s'\n", end, interval_count, start); } else { "No interval specified for interval #%d\n", interval_count); /* parse commands */ ret = parse_commands(&interval->commands, &interval->nb_commands, interval_count, buf, log_ctx); end: av_free(intervalstr); return ret;
4,349
qemu
39e3e113bdb27b4144d697fbd6678a9c24740103
1
static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp) { TCGv tmp; TCGv_i64 t64; int index = IS_USER(s); t64 = tcg_temp_new_i64(); tmp = tcg_temp_new(); switch (opsize) { case OS_BYTE: tcg_gen_qemu_ld8s(tmp, addr, index); gen_helper_exts32(cpu_env, fp, tmp); break; case OS_WORD: tcg_gen_qemu_ld16s(tmp, addr, index); gen_helper_exts32(cpu_env, fp, tmp); break; case OS_LONG: tcg_gen_qemu_ld32u(tmp, addr, index); gen_helper_exts32(cpu_env, fp, tmp); break; case OS_SINGLE: tcg_gen_qemu_ld32u(tmp, addr, index); gen_helper_extf32(cpu_env, fp, tmp); break; case OS_DOUBLE: tcg_gen_qemu_ld64(t64, addr, index); gen_helper_extf64(cpu_env, fp, t64); tcg_temp_free_i64(t64); break; case OS_EXTENDED: if (m68k_feature(s->env, M68K_FEATURE_CF_FPU)) { gen_exception(s, s->insn_pc, EXCP_FP_UNIMP); break; } tcg_gen_qemu_ld32u(tmp, addr, index); tcg_gen_shri_i32(tmp, tmp, 16); tcg_gen_st16_i32(tmp, fp, offsetof(FPReg, l.upper)); tcg_gen_addi_i32(tmp, addr, 4); tcg_gen_qemu_ld64(t64, tmp, index); tcg_gen_st_i64(t64, fp, offsetof(FPReg, l.lower)); break; case OS_PACKED: /* unimplemented data type on 68040/ColdFire * FIXME if needed for another FPU */ gen_exception(s, s->insn_pc, EXCP_FP_UNIMP); break; default: g_assert_not_reached(); } tcg_temp_free(tmp); tcg_temp_free_i64(t64); }
4,350
FFmpeg
dd1382ac9534bd9b5ec7833eed9ab6f383e68a50
0
static av_cold int j2kenc_init(AVCodecContext *avctx) { int i, ret; Jpeg2000EncoderContext *s = avctx->priv_data; Jpeg2000CodingStyle *codsty = &s->codsty; Jpeg2000QuantStyle *qntsty = &s->qntsty; s->avctx = avctx; av_log(s->avctx, AV_LOG_DEBUG, "init\n"); // defaults: // TODO: implement setting non-standard precinct size memset(codsty->log2_prec_widths , 15, sizeof(codsty->log2_prec_widths )); memset(codsty->log2_prec_heights, 15, sizeof(codsty->log2_prec_heights)); codsty->nreslevels2decode= codsty->nreslevels = 7; codsty->log2_cblk_width = 4; codsty->log2_cblk_height = 4; codsty->transform = avctx->prediction_method ? FF_DWT53 : FF_DWT97_INT; qntsty->nguardbits = 1; s->tile_width = 256; s->tile_height = 256; if (codsty->transform == FF_DWT53) qntsty->quantsty = JPEG2000_QSTY_NONE; else qntsty->quantsty = JPEG2000_QSTY_SE; s->width = avctx->width; s->height = avctx->height; for (i = 0; i < 3; i++) s->cbps[i] = 8; if (avctx->pix_fmt == AV_PIX_FMT_RGB24){ s->ncomponents = 3; } else if (avctx->pix_fmt == AV_PIX_FMT_GRAY8){ s->ncomponents = 1; } else{ // planar YUV s->planar = 1; s->ncomponents = 3; avcodec_get_chroma_sub_sample(avctx->pix_fmt, s->chroma_shift, s->chroma_shift + 1); } ff_jpeg2000_init_tier1_luts(); init_luts(); init_quantization(s); if (ret=init_tiles(s)) return ret; av_log(s->avctx, AV_LOG_DEBUG, "after init\n"); return 0; }
4,353
FFmpeg
bacc92b59bfa5d6a1f631e63e46fc1d2fb934e51
1
static int vp9_handle_packet(AVFormatContext *ctx, PayloadContext *rtp_vp9_ctx, AVStream *st, AVPacket *pkt, uint32_t *timestamp, const uint8_t *buf, int len, uint16_t seq, int flags) { int has_pic_id, has_layer_idc, has_ref_idc, has_ss_data, has_su_data; av_unused int pic_id = 0, non_key_frame = 0; av_unused int layer_temporal = -1, layer_spatial = -1, layer_quality = -1; int ref_fields = 0, has_ref_field_ext_pic_id = 0; int first_fragment, last_fragment; int rtp_m; int res = 0; /* drop data of previous packets in case of non-continuous (lossy) packet stream */ if (rtp_vp9_ctx->buf && rtp_vp9_ctx->timestamp != *timestamp) ffio_free_dyn_buf(&rtp_vp9_ctx->buf); /* sanity check for size of input packet: 1 byte payload at least */ if (len < RTP_VP9_DESC_REQUIRED_SIZE + 1) { av_log(ctx, AV_LOG_ERROR, "Too short RTP/VP9 packet, got %d bytes\n", len); return AVERROR_INVALIDDATA; } /* * decode the required VP9 payload descriptor according to section 4.2 of the spec.: * * 0 1 2 3 4 5 6 7 * +-+-+-+-+-+-+-+-+ * |I|L|F|B|E|V|U|-| (REQUIRED) * +-+-+-+-+-+-+-+-+ * * I: PictureID present * L: Layer indices present * F: Reference indices present * B: Start of VP9 frame * E: End of picture * V: Scalability Structure (SS) present * U: Scalability Structure Update (SU) present */ has_pic_id = !!(buf[0] & 0x80); has_layer_idc = !!(buf[0] & 0x40); has_ref_idc = !!(buf[0] & 0x20); first_fragment = !!(buf[0] & 0x10); last_fragment = !!(buf[0] & 0x08); has_ss_data = !!(buf[0] & 0x04); has_su_data = !!(buf[0] & 0x02); rtp_m = !!(flags & RTP_FLAG_MARKER); /* sanity check for markers: B should always be equal to the RTP M marker */ if (last_fragment != rtp_m) { av_log(ctx, AV_LOG_ERROR, "Invalid combination of B and M marker (%d != %d)\n", last_fragment, rtp_m); return AVERROR_INVALIDDATA; } /* pass the extensions field */ buf += RTP_VP9_DESC_REQUIRED_SIZE; len -= RTP_VP9_DESC_REQUIRED_SIZE; /* * decode the 1-byte/2-byte picture ID: * * 0 1 2 3 4 5 6 7 * +-+-+-+-+-+-+-+-+ * I: |M|PICTURE ID | (RECOMMENDED) * +-+-+-+-+-+-+-+-+ * M: | EXTENDED PID | (RECOMMENDED) * +-+-+-+-+-+-+-+-+ * * M: The most significant bit of the first octet is an extension flag. * PictureID: 8 or 16 bits including the M bit. */ if (has_pic_id) { if (len < 1) { av_log(ctx, AV_LOG_ERROR, "Too short RTP/VP9 packet\n"); return AVERROR_INVALIDDATA; } /* check for 1-byte or 2-byte picture index */ if (buf[0] & 0x80) { if (len < 2) { av_log(ctx, AV_LOG_ERROR, "Too short RTP/VP9 packet\n"); return AVERROR_INVALIDDATA; } pic_id = AV_RB16(buf) & 0x7fff; buf += 2; len -= 2; } else { pic_id = buf[0] & 0x7f; buf++; len--; } } /* * decode layer indices * * 0 1 2 3 4 5 6 7 * +-+-+-+-+-+-+-+-+ * L: | T | S | Q | R | (CONDITIONALLY RECOMMENDED) * +-+-+-+-+-+-+-+-+ * * T, S and Q are 2-bit indices for temporal, spatial, and quality layers. * If "F" is set in the initial octet, R is 2 bits representing the number * of reference fields this frame refers to. */ if (has_layer_idc) { if (len < 1) { av_log(ctx, AV_LOG_ERROR, "Too short RTP/VP9 packet\n"); return AVERROR_INVALIDDATA; } layer_temporal = buf[0] & 0xC0; layer_spatial = buf[0] & 0x30; layer_quality = buf[0] & 0x0C; if (has_ref_idc) { ref_fields = buf[0] & 0x03; if (ref_fields) non_key_frame = 1; } buf++; len--; } /* * decode the reference fields * * 0 1 2 3 4 5 6 7 * +-+-+-+-+-+-+-+-+ -\ * F: | PID |X| RS| RQ| (OPTIONAL) . * +-+-+-+-+-+-+-+-+ . - R times * X: | EXTENDED PID | (OPTIONAL) . * +-+-+-+-+-+-+-+-+ -/ * * PID: The relative Picture ID referred to by this frame. * RS and RQ: The spatial and quality layer IDs. * X: 1 if this layer index has an extended relative Picture ID. */ if (has_ref_idc) { while (ref_fields) { if (len < 1) { av_log(ctx, AV_LOG_ERROR, "Too short RTP/VP9 packet\n"); return AVERROR_INVALIDDATA; } has_ref_field_ext_pic_id = buf[0] & 0x10; /* pass ref. field */ if (has_ref_field_ext_pic_id) { if (len < 2) { av_log(ctx, AV_LOG_ERROR, "Too short RTP/VP9 packet\n"); return AVERROR_INVALIDDATA; } /* ignore ref. data */ buf += 2; len -= 2; } else { /* ignore ref. data */ buf++; len--; } ref_fields--; } } /* * decode the scalability structure (SS) * * 0 1 2 3 4 5 6 7 * +-+-+-+-+-+-+-+-+ * V: | PATTERN LENGTH| * +-+-+-+-+-+-+-+-+ -\ * | T | S | Q | R | (OPTIONAL) . * +-+-+-+-+-+-+-+-+ -\ . * | PID |X| RS| RQ| (OPTIONAL) . . - PAT. LEN. times * +-+-+-+-+-+-+-+-+ . - R times . * X: | EXTENDED PID | (OPTIONAL) . . * +-+-+-+-+-+-+-+-+ -/ -/ * * PID: The relative Picture ID referred to by this frame. * RS and RQ: The spatial and quality layer IDs. * X: 1 if this layer index has an extended relative Picture ID. */ if (has_ss_data) { avpriv_report_missing_feature(ctx, "VP9 scalability structure data"); return AVERROR(ENOSYS); } /* * decode the scalability update structure (SU) * * spec. is tbd */ if (has_su_data) { avpriv_report_missing_feature(ctx, "VP9 scalability update structure data"); return AVERROR(ENOSYS); } /* * decode the VP9 payload header * * spec. is tbd */ //XXX: implement when specified /* sanity check: 1 byte payload as minimum */ if (len < 1) { av_log(ctx, AV_LOG_ERROR, "Too short RTP/VP9 packet\n"); return AVERROR_INVALIDDATA; } /* start frame buffering with new dynamic buffer */ if (!rtp_vp9_ctx->buf) { /* sanity check: a new frame should have started */ if (first_fragment) { res = avio_open_dyn_buf(&rtp_vp9_ctx->buf); if (res < 0) return res; /* update the timestamp in the frame packet with the one from the RTP packet */ rtp_vp9_ctx->timestamp = *timestamp; } else { /* frame not started yet, need more packets */ return AVERROR(EAGAIN); } } /* write the fragment to the dyn. buffer */ avio_write(rtp_vp9_ctx->buf, buf, len); /* do we need more fragments? */ if (!last_fragment) return AVERROR(EAGAIN); /* close frame buffering and create resulting A/V packet */ res = ff_rtp_finalize_packet(pkt, &rtp_vp9_ctx->buf, st->index); if (res < 0) return res; return 0; }
4,355
qemu
f140e3000371e67ff4e00df3213e2d576d9c91be
1
int nbd_client_co_preadv(BlockDriverState *bs, uint64_t offset, uint64_t bytes, QEMUIOVector *qiov, int flags) { NBDRequest request = { .type = NBD_CMD_READ, .from = offset, .len = bytes, }; assert(bytes <= NBD_MAX_BUFFER_SIZE); assert(!flags); return nbd_co_request(bs, &request, qiov); }
4,356
qemu
7d8abfcb50a33aed369bbd267852cf04009c49e9
1
writev_f(int argc, char **argv) { struct timeval t1, t2; int Cflag = 0, qflag = 0; int c, cnt; char *buf; int64_t offset; int total; int nr_iov; int pattern = 0xcd; QEMUIOVector qiov; while ((c = getopt(argc, argv, "CqP:")) != EOF) { switch (c) { case 'C': Cflag = 1; break; case 'q': qflag = 1; break; case 'P': pattern = atoi(optarg); break; default: return command_usage(&writev_cmd); } } if (optind > argc - 2) return command_usage(&writev_cmd); offset = cvtnum(argv[optind]); if (offset < 0) { printf("non-numeric length argument -- %s\n", argv[optind]); return 0; } optind++; if (offset & 0x1ff) { printf("offset %lld is not sector aligned\n", (long long)offset); return 0; } nr_iov = argc - optind; buf = create_iovec(&qiov, &argv[optind], nr_iov, pattern); gettimeofday(&t1, NULL); cnt = do_aio_writev(&qiov, offset, &total); gettimeofday(&t2, NULL); if (cnt < 0) { printf("writev failed: %s\n", strerror(-cnt)); return 0; } if (qflag) return 0; /* Finally, report back -- -C gives a parsable format */ t2 = tsub(t2, t1); print_report("wrote", &t2, offset, qiov.size, total, cnt, Cflag); qemu_io_free(buf); return 0; }
4,357
qemu
69d34a360dfe773e17e72c76d15931c9b9d190f6
1
static off_t read_off(BlockDriverState *bs, int64_t offset) { uint64_t buffer; if (bdrv_pread(bs->file, offset, &buffer, 8) < 8) return 0; return be64_to_cpu(buffer); }
4,358
qemu
fcf73f66a67f5e58c18216f8c8651e38cf4d90af
1
static void qmp_input_type_int(Visitor *v, int64_t *obj, const char *name, Error **errp) { QmpInputVisitor *qiv = to_qiv(v); QObject *qobj = qmp_input_get_object(qiv, name, true); if (!qobj || qobject_type(qobj) != QTYPE_QINT) { error_setg(errp, QERR_INVALID_PARAMETER_TYPE, name ? name : "null", "integer"); return; } *obj = qint_get_int(qobject_to_qint(qobj)); }
4,359
qemu
98f343395e937fa1db3a28dfb4f303f97cfddd6c
1
static void emulated_push_type(EmulatedState *card, uint32_t type) { EmulEvent *event = (EmulEvent *)g_malloc(sizeof(EmulEvent)); assert(event); event->p.gen.type = type; emulated_push_event(card, event); }
4,361
qemu
35f9304d925a5423c51bd2c83a81fa3cc2b6e680
1
static target_ulong h_protect(CPUPPCState *env, sPAPREnvironment *spapr, target_ulong opcode, target_ulong *args) { target_ulong flags = args[0]; target_ulong pte_index = args[1]; target_ulong avpn = args[2]; uint8_t *hpte; target_ulong v, r, rb; if ((pte_index * HASH_PTE_SIZE_64) & ~env->htab_mask) { return H_PARAMETER; } hpte = env->external_htab + (pte_index * HASH_PTE_SIZE_64); while (!lock_hpte(hpte, HPTE_V_HVLOCK)) { /* We have no real concurrency in qemu soft-emulation, so we * will never actually have a contested lock */ assert(0); } v = ldq_p(hpte); r = ldq_p(hpte + (HASH_PTE_SIZE_64/2)); if ((v & HPTE_V_VALID) == 0 || ((flags & H_AVPN) && (v & ~0x7fULL) != avpn)) { stq_p(hpte, v & ~HPTE_V_HVLOCK); assert(!(ldq_p(hpte) & HPTE_V_HVLOCK)); return H_NOT_FOUND; } r &= ~(HPTE_R_PP0 | HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_HI | HPTE_R_KEY_LO); r |= (flags << 55) & HPTE_R_PP0; r |= (flags << 48) & HPTE_R_KEY_HI; r |= flags & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO); rb = compute_tlbie_rb(v, r, pte_index); stq_p(hpte, v & ~HPTE_V_VALID); ppc_tlb_invalidate_one(env, rb); stq_p(hpte + (HASH_PTE_SIZE_64/2), r); /* Don't need a memory barrier, due to qemu's global lock */ stq_p(hpte, v & ~HPTE_V_HVLOCK); assert(!(ldq_p(hpte) & HPTE_V_HVLOCK)); return H_SUCCESS; }
4,363
FFmpeg
b29feec9829cfab2523c8d95e35bd69e689ea4af
1
static int ir2_decode_plane_inter(Ir2Context *ctx, int width, int height, uint8_t *dst, int pitch, const uint8_t *table) { int j; int out = 0; int c; int t; if (width & 1) for (j = 0; j < height; j++) { out = 0; while (out < width) { c = ir2_get_code(&ctx->gb); if (c >= 0x80) { /* we have a skip */ c -= 0x7F; out += c * 2; } else { /* add two deltas from table */ t = dst[out] + (((table[c * 2] - 128)*3) >> 2); t = av_clip_uint8(t); dst[out] = t; out++; t = dst[out] + (((table[(c * 2) + 1] - 128)*3) >> 2); t = av_clip_uint8(t); dst[out] = t; out++; } } dst += pitch; } return 0; }
4,364
qemu
ee0d0be16819896cc6c8018cbe171a632b61489c
1
static ExitStatus op_ex(DisasContext *s, DisasOps *o) { /* ??? Perhaps a better way to implement EXECUTE is to set a bit in tb->flags, (ab)use the tb->cs_base field as the address of the template in memory, and grab 8 bits of tb->flags/cflags for the contents of the register. We would then recognize all this in gen_intermediate_code_internal, generating code for exactly one instruction. This new TB then gets executed normally. On the other hand, this seems to be mostly used for modifying MVC inside of memcpy, which needs a helper call anyway. So perhaps this doesn't bear thinking about any further. */ TCGv_i64 tmp; update_psw_addr(s); update_cc_op(s); tmp = tcg_const_i64(s->next_pc); gen_helper_ex(cc_op, cpu_env, cc_op, o->in1, o->in2, tmp); tcg_temp_free_i64(tmp); set_cc_static(s); return NO_EXIT; }
4,365
FFmpeg
d49352c7cc22fd8928a761a373c3508be17c9f19
1
static int initFilter(int16_t **outFilter, int16_t **filterPos, int *outFilterSize, int xInc, int srcW, int dstW, int filterAlign, int one, int flags, int cpu_flags, SwsVector *srcFilter, SwsVector *dstFilter, double param[2]) { int i; int filterSize; int filter2Size; int minFilterSize; int64_t *filter=NULL; int64_t *filter2=NULL; const int64_t fone= 1LL<<54; int ret= -1; emms_c(); //FIXME this should not be required but it IS (even for non-MMX versions) // NOTE: the +3 is for the MMX(+1)/SSE(+3) scaler which reads over the end FF_ALLOC_OR_GOTO(NULL, *filterPos, (dstW+3)*sizeof(int16_t), fail); if (FFABS(xInc - 0x10000) <10) { // unscaled int i; filterSize= 1; FF_ALLOCZ_OR_GOTO(NULL, filter, dstW*sizeof(*filter)*filterSize, fail); for (i=0; i<dstW; i++) { filter[i*filterSize]= fone; (*filterPos)[i]=i; } } else if (flags&SWS_POINT) { // lame looking point sampling mode int i; int xDstInSrc; filterSize= 1; FF_ALLOC_OR_GOTO(NULL, filter, dstW*sizeof(*filter)*filterSize, fail); xDstInSrc= xInc/2 - 0x8000; for (i=0; i<dstW; i++) { int xx= (xDstInSrc - ((filterSize-1)<<15) + (1<<15))>>16; (*filterPos)[i]= xx; filter[i]= fone; xDstInSrc+= xInc; } } else if ((xInc <= (1<<16) && (flags&SWS_AREA)) || (flags&SWS_FAST_BILINEAR)) { // bilinear upscale int i; int xDstInSrc; filterSize= 2; FF_ALLOC_OR_GOTO(NULL, filter, dstW*sizeof(*filter)*filterSize, fail); xDstInSrc= xInc/2 - 0x8000; for (i=0; i<dstW; i++) { int xx= (xDstInSrc - ((filterSize-1)<<15) + (1<<15))>>16; int j; (*filterPos)[i]= xx; //bilinear upscale / linear interpolate / area averaging for (j=0; j<filterSize; j++) { int64_t coeff= fone - FFABS((xx<<16) - xDstInSrc)*(fone>>16); if (coeff<0) coeff=0; filter[i*filterSize + j]= coeff; xx++; } xDstInSrc+= xInc; } } else { int xDstInSrc; int sizeFactor; if (flags&SWS_BICUBIC) sizeFactor= 4; else if (flags&SWS_X) sizeFactor= 8; else if (flags&SWS_AREA) sizeFactor= 1; //downscale only, for upscale it is bilinear else if (flags&SWS_GAUSS) sizeFactor= 8; // infinite ;) else if (flags&SWS_LANCZOS) sizeFactor= param[0] != SWS_PARAM_DEFAULT ? ceil(2*param[0]) : 6; else if (flags&SWS_SINC) sizeFactor= 20; // infinite ;) else if (flags&SWS_SPLINE) sizeFactor= 20; // infinite ;) else if (flags&SWS_BILINEAR) sizeFactor= 2; else { sizeFactor= 0; //GCC warning killer assert(0); } if (xInc <= 1<<16) filterSize= 1 + sizeFactor; // upscale else filterSize= 1 + (sizeFactor*srcW + dstW - 1)/ dstW; if (filterSize > srcW-2) filterSize=srcW-2; FF_ALLOC_OR_GOTO(NULL, filter, dstW*sizeof(*filter)*filterSize, fail); xDstInSrc= xInc - 0x10000; for (i=0; i<dstW; i++) { int xx= (xDstInSrc - ((filterSize-2)<<16)) / (1<<17); int j; (*filterPos)[i]= xx; for (j=0; j<filterSize; j++) { int64_t d= ((int64_t)FFABS((xx<<17) - xDstInSrc))<<13; double floatd; int64_t coeff; if (xInc > 1<<16) d= d*dstW/srcW; floatd= d * (1.0/(1<<30)); if (flags & SWS_BICUBIC) { int64_t B= (param[0] != SWS_PARAM_DEFAULT ? param[0] : 0) * (1<<24); int64_t C= (param[1] != SWS_PARAM_DEFAULT ? param[1] : 0.6) * (1<<24); if (d >= 1LL<<31) { coeff = 0.0; } else { int64_t dd = (d * d) >> 30; int64_t ddd = (dd * d) >> 30; if (d < 1LL<<30) coeff = (12*(1<<24)-9*B-6*C)*ddd + (-18*(1<<24)+12*B+6*C)*dd + (6*(1<<24)-2*B)*(1<<30); else coeff = (-B-6*C)*ddd + (6*B+30*C)*dd + (-12*B-48*C)*d + (8*B+24*C)*(1<<30); } coeff *= fone>>(30+24); } /* else if (flags & SWS_X) { double p= param ? param*0.01 : 0.3; coeff = d ? sin(d*M_PI)/(d*M_PI) : 1.0; coeff*= pow(2.0, - p*d*d); }*/ else if (flags & SWS_X) { double A= param[0] != SWS_PARAM_DEFAULT ? param[0] : 1.0; double c; if (floatd<1.0) c = cos(floatd*M_PI); else c=-1.0; if (c<0.0) c= -pow(-c, A); else c= pow( c, A); coeff= (c*0.5 + 0.5)*fone; } else if (flags & SWS_AREA) { int64_t d2= d - (1<<29); if (d2*xInc < -(1LL<<(29+16))) coeff= 1.0 * (1LL<<(30+16)); else if (d2*xInc < (1LL<<(29+16))) coeff= -d2*xInc + (1LL<<(29+16)); else coeff=0.0; coeff *= fone>>(30+16); } else if (flags & SWS_GAUSS) { double p= param[0] != SWS_PARAM_DEFAULT ? param[0] : 3.0; coeff = (pow(2.0, - p*floatd*floatd))*fone; } else if (flags & SWS_SINC) { coeff = (d ? sin(floatd*M_PI)/(floatd*M_PI) : 1.0)*fone; } else if (flags & SWS_LANCZOS) { double p= param[0] != SWS_PARAM_DEFAULT ? param[0] : 3.0; coeff = (d ? sin(floatd*M_PI)*sin(floatd*M_PI/p)/(floatd*floatd*M_PI*M_PI/p) : 1.0)*fone; if (floatd>p) coeff=0; } else if (flags & SWS_BILINEAR) { coeff= (1<<30) - d; if (coeff<0) coeff=0; coeff *= fone >> 30; } else if (flags & SWS_SPLINE) { double p=-2.196152422706632; coeff = getSplineCoeff(1.0, 0.0, p, -p-1.0, floatd) * fone; } else { coeff= 0.0; //GCC warning killer assert(0); } filter[i*filterSize + j]= coeff; xx++; } xDstInSrc+= 2*xInc; } } /* apply src & dst Filter to filter -> filter2 av_free(filter); */ assert(filterSize>0); filter2Size= filterSize; if (srcFilter) filter2Size+= srcFilter->length - 1; if (dstFilter) filter2Size+= dstFilter->length - 1; assert(filter2Size>0); FF_ALLOCZ_OR_GOTO(NULL, filter2, filter2Size*dstW*sizeof(*filter2), fail); for (i=0; i<dstW; i++) { int j, k; if(srcFilter) { for (k=0; k<srcFilter->length; k++) { for (j=0; j<filterSize; j++) filter2[i*filter2Size + k + j] += srcFilter->coeff[k]*filter[i*filterSize + j]; } } else { for (j=0; j<filterSize; j++) filter2[i*filter2Size + j]= filter[i*filterSize + j]; } //FIXME dstFilter (*filterPos)[i]+= (filterSize-1)/2 - (filter2Size-1)/2; } av_freep(&filter); /* try to reduce the filter-size (step1 find size and shift left) */ // Assume it is near normalized (*0.5 or *2.0 is OK but * 0.001 is not). minFilterSize= 0; for (i=dstW-1; i>=0; i--) { int min= filter2Size; int j; int64_t cutOff=0.0; /* get rid of near zero elements on the left by shifting left */ for (j=0; j<filter2Size; j++) { int k; cutOff += FFABS(filter2[i*filter2Size]); if (cutOff > SWS_MAX_REDUCE_CUTOFF*fone) break; /* preserve monotonicity because the core can't handle the filter otherwise */ if (i<dstW-1 && (*filterPos)[i] >= (*filterPos)[i+1]) break; // move filter coefficients left for (k=1; k<filter2Size; k++) filter2[i*filter2Size + k - 1]= filter2[i*filter2Size + k]; filter2[i*filter2Size + k - 1]= 0; (*filterPos)[i]++; } cutOff=0; /* count near zeros on the right */ for (j=filter2Size-1; j>0; j--) { cutOff += FFABS(filter2[i*filter2Size + j]); if (cutOff > SWS_MAX_REDUCE_CUTOFF*fone) break; min--; } if (min>minFilterSize) minFilterSize= min; } if (HAVE_ALTIVEC && cpu_flags & AV_CPU_FLAG_ALTIVEC) { // we can handle the special case 4, // so we don't want to go to the full 8 if (minFilterSize < 5) filterAlign = 4; // We really don't want to waste our time // doing useless computation, so fall back on // the scalar C code for very small filters. // Vectorizing is worth it only if you have a // decent-sized vector. if (minFilterSize < 3) filterAlign = 1; } if (HAVE_MMX && cpu_flags & AV_CPU_FLAG_MMX) { // special case for unscaled vertical filtering if (minFilterSize == 1 && filterAlign == 2) filterAlign= 1; } assert(minFilterSize > 0); filterSize= (minFilterSize +(filterAlign-1)) & (~(filterAlign-1)); assert(filterSize > 0); filter= av_malloc(filterSize*dstW*sizeof(*filter)); if (filterSize >= MAX_FILTER_SIZE*16/((flags&SWS_ACCURATE_RND) ? APCK_SIZE : 16) || !filter) goto fail; *outFilterSize= filterSize; if (flags&SWS_PRINT_INFO) av_log(NULL, AV_LOG_VERBOSE, "SwScaler: reducing / aligning filtersize %d -> %d\n", filter2Size, filterSize); /* try to reduce the filter-size (step2 reduce it) */ for (i=0; i<dstW; i++) { int j; for (j=0; j<filterSize; j++) { if (j>=filter2Size) filter[i*filterSize + j]= 0; else filter[i*filterSize + j]= filter2[i*filter2Size + j]; if((flags & SWS_BITEXACT) && j>=minFilterSize) filter[i*filterSize + j]= 0; } } //FIXME try to align filterPos if possible //fix borders for (i=0; i<dstW; i++) { int j; if ((*filterPos)[i] < 0) { // move filter coefficients left to compensate for filterPos for (j=1; j<filterSize; j++) { int left= FFMAX(j + (*filterPos)[i], 0); filter[i*filterSize + left] += filter[i*filterSize + j]; filter[i*filterSize + j]=0; } (*filterPos)[i]= 0; } if ((*filterPos)[i] + filterSize > srcW) { int shift= (*filterPos)[i] + filterSize - srcW; // move filter coefficients right to compensate for filterPos for (j=filterSize-2; j>=0; j--) { int right= FFMIN(j + shift, filterSize-1); filter[i*filterSize +right] += filter[i*filterSize +j]; filter[i*filterSize +j]=0; } (*filterPos)[i]= srcW - filterSize; } } // Note the +1 is for the MMX scaler which reads over the end /* align at 16 for AltiVec (needed by hScale_altivec_real) */ FF_ALLOCZ_OR_GOTO(NULL, *outFilter, *outFilterSize*(dstW+3)*sizeof(int16_t), fail); /* normalize & store in outFilter */ for (i=0; i<dstW; i++) { int j; int64_t error=0; int64_t sum=0; for (j=0; j<filterSize; j++) { sum+= filter[i*filterSize + j]; } sum= (sum + one/2)/ one; for (j=0; j<*outFilterSize; j++) { int64_t v= filter[i*filterSize + j] + error; int intV= ROUNDED_DIV(v, sum); (*outFilter)[i*(*outFilterSize) + j]= intV; error= v - intV*sum; } } (*filterPos)[dstW+0] = (*filterPos)[dstW+1] = (*filterPos)[dstW+2] = (*filterPos)[dstW-1]; // the MMX/SSE scaler will read over the end for (i=0; i<*outFilterSize; i++) { int k= (dstW - 1) * (*outFilterSize) + i; (*outFilter)[k + 1 * (*outFilterSize)] = (*outFilter)[k + 2 * (*outFilterSize)] = (*outFilter)[k + 3 * (*outFilterSize)] = (*outFilter)[k]; } ret=0; fail: av_free(filter); av_free(filter2); return ret; }
4,366
FFmpeg
014b6b416fec89777cb9cff61bcf7896eaf7cf39
0
int update_dimensions(VP8Context *s, int width, int height, int is_vp7) { AVCodecContext *avctx = s->avctx; int i, ret; if (width != s->avctx->width || height != s->avctx->height) { vp8_decode_flush_impl(s->avctx, 1); ret = ff_set_dimensions(s->avctx, width, height); if (ret < 0) return ret; } s->mb_width = (s->avctx->coded_width + 15) / 16; s->mb_height = (s->avctx->coded_height + 15) / 16; s->mb_layout = is_vp7 || avctx->active_thread_type == FF_THREAD_SLICE && FFMIN(s->num_coeff_partitions, avctx->thread_count) > 1; if (!s->mb_layout) { // Frame threading and one thread s->macroblocks_base = av_mallocz((s->mb_width + s->mb_height * 2 + 1) * sizeof(*s->macroblocks)); s->intra4x4_pred_mode_top = av_mallocz(s->mb_width * 4); } else // Sliced threading s->macroblocks_base = av_mallocz((s->mb_width + 2) * (s->mb_height + 2) * sizeof(*s->macroblocks)); s->top_nnz = av_mallocz(s->mb_width * sizeof(*s->top_nnz)); s->top_border = av_mallocz((s->mb_width + 1) * sizeof(*s->top_border)); s->thread_data = av_mallocz(MAX_THREADS * sizeof(VP8ThreadData)); for (i = 0; i < MAX_THREADS; i++) { s->thread_data[i].filter_strength = av_mallocz(s->mb_width * sizeof(*s->thread_data[0].filter_strength)); #if HAVE_THREADS pthread_mutex_init(&s->thread_data[i].lock, NULL); pthread_cond_init(&s->thread_data[i].cond, NULL); #endif } if (!s->macroblocks_base || !s->top_nnz || !s->top_border || (!s->intra4x4_pred_mode_top && !s->mb_layout)) return AVERROR(ENOMEM); s->macroblocks = s->macroblocks_base + 1; return 0; }
4,367
FFmpeg
aec8f88a9eb0ef8d684a2e76a152c9090da4af51
0
static int decode_main_header(NUTContext *nut){ AVFormatContext *s= nut->avf; ByteIOContext *bc = &s->pb; uint64_t tmp; int i, j; get_packetheader(nut, bc, 8, 1); tmp = get_v(bc); if (tmp != 1){ av_log(s, AV_LOG_ERROR, "bad version (%Ld)\n", tmp); return -1; } nut->stream_count = get_v(bc); get_v(bc); //checksum threshold for(i=0; i<256;){ int tmp_flags = get_v(bc); int tmp_stream= get_v(bc); int tmp_mul = get_v(bc); int tmp_size = get_v(bc); int count = get_v(bc); if(count == 0 || i+count > 256){ av_log(s, AV_LOG_ERROR, "illegal count %d at %d\n", count, i); return -1; } if((tmp_flags & FLAG_FRAME_TYPE) && tmp_flags != 1){ if(tmp_flags & FLAG_PRED_KEY_FRAME){ av_log(s, AV_LOG_ERROR, "keyframe prediction in non 0 frame type\n"); return -1; } if(!(tmp_flags & FLAG_PTS) || !(tmp_flags & FLAG_FULL_PTS) ){ av_log(s, AV_LOG_ERROR, "no full pts in non 0 frame type\n"); return -1; } } for(j=0; j<count; j++,i++){ if(tmp_stream > nut->stream_count + 1){ av_log(s, AV_LOG_ERROR, "illegal stream number\n"); return -1; } nut->frame_code[i].flags = tmp_flags ; nut->frame_code[i].stream_id_plus1 = tmp_stream; nut->frame_code[i].size_mul = tmp_mul ; nut->frame_code[i].size_lsb = tmp_size ; if(++tmp_size >= tmp_mul){ tmp_size=0; tmp_stream++; } } } if(nut->frame_code['N'].flags != 1){ av_log(s, AV_LOG_ERROR, "illegal frame_code table\n"); return -1; } if(check_checksum(bc)){ av_log(s, AV_LOG_ERROR, "Main header checksum missmatch\n"); return -1; } return 0; }
4,368
FFmpeg
ee9794ed20528c2aa4c53cf67cb218bdce6e0485
1
void av_dynarray_add(void *tab_ptr, int *nb_ptr, void *elem) { /* see similar ffmpeg.c:grow_array() */ int nb, nb_alloc; intptr_t *tab; nb = *nb_ptr; tab = *(intptr_t**)tab_ptr; if ((nb & (nb - 1)) == 0) { if (nb == 0) nb_alloc = 1; else nb_alloc = nb * 2; tab = av_realloc(tab, nb_alloc * sizeof(intptr_t)); *(intptr_t**)tab_ptr = tab; } tab[nb++] = (intptr_t)elem; *nb_ptr = nb; }
4,369
FFmpeg
f19af812a32c1398d48c3550d11dbc6aafbb2bfc
1
static void write_long(unsigned char *p,uint32_t v) { p[0] = v>>24; p[1] = v>>16; p[2] = v>>8; p[3] = v; }
4,370
FFmpeg
221f902f1dc167bdc0bfdff6b6af3214ae3cc1f4
1
static void filter_edges_16bit(void *dst1, void *prev1, void *cur1, void *next1, int w, int prefs, int mrefs, int parity, int mode) { uint16_t *dst = dst1; uint16_t *prev = prev1; uint16_t *cur = cur1; uint16_t *next = next1; int x; uint16_t *prev2 = parity ? prev : cur ; uint16_t *next2 = parity ? cur : next; mrefs /= 2; prefs /= 2; FILTER(0, 3, 0) dst = (uint16_t*)dst1 + w - 3; prev = (uint16_t*)prev1 + w - 3; cur = (uint16_t*)cur1 + w - 3; next = (uint16_t*)next1 + w - 3; prev2 = (uint16_t*)(parity ? prev : cur); next2 = (uint16_t*)(parity ? cur : next); FILTER(w - 3, w, 0) }
4,371
qemu
b3a6a2e0417c78ec5491347eb85a7d125a5fefdc
1
int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; uint32_t aSig; int32 z; a = float32_squash_input_denormal(a STATUS_VAR); aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); aSign = extractFloat32Sign( a ); shiftCount = aExp - 0x9E; if ( 0 <= shiftCount ) { if ( float32_val(a) != 0xCF000000 ) { float_raise( float_flag_invalid STATUS_VAR); if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF; } return (int32_t) 0x80000000; } else if ( aExp <= 0x7E ) { if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; return 0; } aSig = ( aSig | 0x00800000 )<<8; z = aSig>>( - shiftCount ); if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } if ( aSign ) z = - z; return z; }
4,372
FFmpeg
44ed34b79097b972095e7c9efae32a13b4bc51dc
1
static int avi_load_index(AVFormatContext *s) { AVIContext *avi = s->priv_data; ByteIOContext *pb = s->pb; uint32_t tag, size; int64_t pos= url_ftell(pb); url_fseek(pb, avi->movi_end, SEEK_SET); #ifdef DEBUG_SEEK printf("movi_end=0x%"PRIx64"\n", avi->movi_end); #endif for(;;) { if (url_feof(pb)) break; tag = get_le32(pb); size = get_le32(pb); #ifdef DEBUG_SEEK printf("tag=%c%c%c%c size=0x%x\n", tag & 0xff, (tag >> 8) & 0xff, (tag >> 16) & 0xff, (tag >> 24) & 0xff, size); #endif switch(tag) { case MKTAG('i', 'd', 'x', '1'): if (avi_read_idx1(s, size) < 0) goto skip; else goto the_end; break; default: skip: size += (size & 1); url_fskip(pb, size); break; } } the_end: url_fseek(pb, pos, SEEK_SET); return 0; }
4,374
qemu
8db36e9dddb1b6fab3554a8c00d92268b33a487b
1
int usb_desc_handle_control(USBDevice *dev, USBPacket *p, int request, int value, int index, int length, uint8_t *data) { const USBDesc *desc = usb_device_get_usb_desc(dev); int ret = -1; assert(desc != NULL); switch(request) { case DeviceOutRequest | USB_REQ_SET_ADDRESS: dev->addr = value; trace_usb_set_addr(dev->addr); ret = 0; break; case DeviceRequest | USB_REQ_GET_DESCRIPTOR: ret = usb_desc_get_descriptor(dev, value, data, length); break; case DeviceRequest | USB_REQ_GET_CONFIGURATION: data[0] = dev->config->bConfigurationValue; ret = 1; break; case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: ret = usb_desc_set_config(dev, value); trace_usb_set_config(dev->addr, value, ret); break; case DeviceRequest | USB_REQ_GET_STATUS: data[0] = 0; if (dev->config->bmAttributes & 0x40) { data[0] |= 1 << USB_DEVICE_SELF_POWERED; } if (dev->remote_wakeup) { data[0] |= 1 << USB_DEVICE_REMOTE_WAKEUP; } data[1] = 0x00; ret = 2; break; case DeviceOutRequest | USB_REQ_CLEAR_FEATURE: if (value == USB_DEVICE_REMOTE_WAKEUP) { dev->remote_wakeup = 0; ret = 0; } trace_usb_clear_device_feature(dev->addr, value, ret); break; case DeviceOutRequest | USB_REQ_SET_FEATURE: if (value == USB_DEVICE_REMOTE_WAKEUP) { dev->remote_wakeup = 1; ret = 0; } trace_usb_set_device_feature(dev->addr, value, ret); break; case InterfaceRequest | USB_REQ_GET_INTERFACE: if (index < 0 || index >= dev->ninterfaces) { break; } data[0] = dev->altsetting[index]; ret = 1; break; case InterfaceOutRequest | USB_REQ_SET_INTERFACE: ret = usb_desc_set_interface(dev, index, value); trace_usb_set_interface(dev->addr, index, value, ret); break; } return ret; }
4,375
qemu
b2b012afdd9c03ba8a1619f45301d34f358d367b
1
static void imx_eth_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { IMXFECState *s = IMX_FEC(opaque); uint32_t index = offset >> 2; FEC_PRINTF("reg[%s] <= 0x%" PRIx32 "\n", imx_eth_reg_name(s, index), (uint32_t)value); switch (index) { case ENET_EIR: s->regs[index] &= ~value; break; case ENET_EIMR: s->regs[index] = value; break; case ENET_RDAR: if (s->regs[ENET_ECR] & ENET_ECR_ETHEREN) { if (!s->regs[index]) { s->regs[index] = ENET_RDAR_RDAR; imx_eth_enable_rx(s); } } else { s->regs[index] = 0; } break; case ENET_TDAR: if (s->regs[ENET_ECR] & ENET_ECR_ETHEREN) { s->regs[index] = ENET_TDAR_TDAR; imx_eth_do_tx(s); } s->regs[index] = 0; break; case ENET_ECR: if (value & ENET_ECR_RESET) { return imx_eth_reset(DEVICE(s)); } s->regs[index] = value; if ((s->regs[index] & ENET_ECR_ETHEREN) == 0) { s->regs[ENET_RDAR] = 0; s->rx_descriptor = s->regs[ENET_RDSR]; s->regs[ENET_TDAR] = 0; s->tx_descriptor = s->regs[ENET_TDSR]; } break; case ENET_MMFR: s->regs[index] = value; if (extract32(value, 29, 1)) { /* This is a read operation */ s->regs[ENET_MMFR] = deposit32(s->regs[ENET_MMFR], 0, 16, do_phy_read(s, extract32(value, 18, 10))); } else { /* This a write operation */ do_phy_write(s, extract32(value, 18, 10), extract32(value, 0, 16)); } /* raise the interrupt as the PHY operation is done */ s->regs[ENET_EIR] |= ENET_INT_MII; break; case ENET_MSCR: s->regs[index] = value & 0xfe; break; case ENET_MIBC: /* TODO: Implement MIB. */ s->regs[index] = (value & 0x80000000) ? 0xc0000000 : 0; break; case ENET_RCR: s->regs[index] = value & 0x07ff003f; /* TODO: Implement LOOP mode. */ break; case ENET_TCR: /* We transmit immediately, so raise GRA immediately. */ s->regs[index] = value; if (value & 1) { s->regs[ENET_EIR] |= ENET_INT_GRA; } break; case ENET_PALR: s->regs[index] = value; s->conf.macaddr.a[0] = value >> 24; s->conf.macaddr.a[1] = value >> 16; s->conf.macaddr.a[2] = value >> 8; s->conf.macaddr.a[3] = value; break; case ENET_PAUR: s->regs[index] = (value | 0x0000ffff) & 0xffff8808; s->conf.macaddr.a[4] = value >> 24; s->conf.macaddr.a[5] = value >> 16; break; case ENET_OPD: s->regs[index] = (value & 0x0000ffff) | 0x00010000; break; case ENET_IAUR: case ENET_IALR: case ENET_GAUR: case ENET_GALR: /* TODO: implement MAC hash filtering. */ break; case ENET_TFWR: if (s->is_fec) { s->regs[index] = value & 0x3; } else { s->regs[index] = value & 0x13f; } break; case ENET_RDSR: if (s->is_fec) { s->regs[index] = value & ~3; } else { s->regs[index] = value & ~7; } s->rx_descriptor = s->regs[index]; break; case ENET_TDSR: if (s->is_fec) { s->regs[index] = value & ~3; } else { s->regs[index] = value & ~7; } s->tx_descriptor = s->regs[index]; break; case ENET_MRBR: s->regs[index] = value & 0x00003ff0; break; default: if (s->is_fec) { imx_fec_write(s, index, value); } else { imx_enet_write(s, index, value); } return; } imx_eth_update(s); }
4,376
qemu
1f51470d044852592922f91000e741c381582cdc
1
int qemu_chr_open_spice(QemuOpts *opts, CharDriverState **_chr) { CharDriverState *chr; SpiceCharDriver *s; const char* name = qemu_opt_get(opts, "name"); uint32_t debug = qemu_opt_get_number(opts, "debug", 0); const char** psubtype = spice_server_char_device_recognized_subtypes(); const char *subtype = NULL; if (name == NULL) { fprintf(stderr, "spice-qemu-char: missing name parameter\n"); print_allowed_subtypes(); return -EINVAL; } for(;*psubtype != NULL; ++psubtype) { if (strcmp(name, *psubtype) == 0) { subtype = *psubtype; break; } } if (subtype == NULL) { fprintf(stderr, "spice-qemu-char: unsupported name\n"); print_allowed_subtypes(); return -EINVAL; } chr = g_malloc0(sizeof(CharDriverState)); s = g_malloc0(sizeof(SpiceCharDriver)); s->chr = chr; s->debug = debug; s->active = false; s->sin.subtype = subtype; chr->opaque = s; chr->chr_write = spice_chr_write; chr->chr_close = spice_chr_close; chr->chr_guest_open = spice_chr_guest_open; chr->chr_guest_close = spice_chr_guest_close; #if SPICE_SERVER_VERSION < 0x000901 /* See comment in vmc_state() */ if (strcmp(subtype, "vdagent") == 0) { qemu_chr_generic_open(chr); } #endif *_chr = chr; return 0; }
4,377
FFmpeg
1f48c5c0671bb4f39c9dc3ec44c727f1680547b3
1
static char *get_content_url(xmlNodePtr *baseurl_nodes, int n_baseurl_nodes, char *rep_id_val, char *rep_bandwidth_val, char *val) { int i; char *text; char *url = NULL; char tmp_str[MAX_URL_SIZE]; char tmp_str_2[MAX_URL_SIZE]; memset(tmp_str, 0, sizeof(tmp_str)); for (i = 0; i < n_baseurl_nodes; ++i) { if (baseurl_nodes[i] && baseurl_nodes[i]->children && baseurl_nodes[i]->children->type == XML_TEXT_NODE) { text = xmlNodeGetContent(baseurl_nodes[i]->children); if (text) { memset(tmp_str, 0, sizeof(tmp_str)); memset(tmp_str_2, 0, sizeof(tmp_str_2)); ff_make_absolute_url(tmp_str_2, MAX_URL_SIZE, tmp_str, text); av_strlcpy(tmp_str, tmp_str_2, sizeof(tmp_str)); xmlFree(text); } } } if (val) av_strlcat(tmp_str, (const char*)val, sizeof(tmp_str)); if (rep_id_val) { url = av_strireplace(tmp_str, "$RepresentationID$", (const char*)rep_id_val); if (!url) { return NULL; } av_strlcpy(tmp_str, url, sizeof(tmp_str)); av_free(url); } if (rep_bandwidth_val && tmp_str[0] != '\0') { url = av_strireplace(tmp_str, "$Bandwidth$", (const char*)rep_bandwidth_val); if (!url) { return NULL; } } return url; }
4,378
FFmpeg
32baeafeee4f8446c2c3720b9223ad2166ca9d30
1
av_cold void ff_idctdsp_init(IDCTDSPContext *c, AVCodecContext *avctx) { const unsigned high_bit_depth = avctx->bits_per_raw_sample > 8; if (avctx->lowres==1) { c->idct_put = ff_jref_idct4_put; c->idct_add = ff_jref_idct4_add; c->idct = ff_j_rev_dct4; c->perm_type = FF_IDCT_PERM_NONE; } else if (avctx->lowres==2) { c->idct_put = ff_jref_idct2_put; c->idct_add = ff_jref_idct2_add; c->idct = ff_j_rev_dct2; c->perm_type = FF_IDCT_PERM_NONE; } else if (avctx->lowres==3) { c->idct_put = ff_jref_idct1_put; c->idct_add = ff_jref_idct1_add; c->idct = ff_j_rev_dct1; c->perm_type = FF_IDCT_PERM_NONE; } else { if (avctx->bits_per_raw_sample == 10 || avctx->bits_per_raw_sample == 9) { c->idct_put = ff_simple_idct_put_10; c->idct_add = ff_simple_idct_add_10; c->idct = ff_simple_idct_10; c->perm_type = FF_IDCT_PERM_NONE; } else if (avctx->bits_per_raw_sample == 12) { c->idct_put = ff_simple_idct_put_12; c->idct_add = ff_simple_idct_add_12; c->idct = ff_simple_idct_12; c->perm_type = FF_IDCT_PERM_NONE; } else { if (avctx->idct_algo == FF_IDCT_INT) { c->idct_put = ff_jref_idct_put; c->idct_add = ff_jref_idct_add; c->idct = ff_j_rev_dct; c->perm_type = FF_IDCT_PERM_LIBMPEG2; #if CONFIG_FAANIDCT } else if (avctx->idct_algo == FF_IDCT_FAAN) { c->idct_put = ff_faanidct_put; c->idct_add = ff_faanidct_add; c->idct = ff_faanidct; c->perm_type = FF_IDCT_PERM_NONE; #endif /* CONFIG_FAANIDCT */ } else { // accurate/default c->idct_put = ff_simple_idct_put_8; c->idct_add = ff_simple_idct_add_8; c->idct = ff_simple_idct_8; c->perm_type = FF_IDCT_PERM_NONE; } } } c->put_pixels_clamped = put_pixels_clamped_c; c->put_signed_pixels_clamped = put_signed_pixels_clamped_c; c->add_pixels_clamped = add_pixels_clamped_c; if (CONFIG_MPEG4_DECODER && avctx->idct_algo == FF_IDCT_XVID) ff_xvid_idct_init(c, avctx); if (ARCH_AARCH64) ff_idctdsp_init_aarch64(c, avctx, high_bit_depth); if (ARCH_ALPHA) ff_idctdsp_init_alpha(c, avctx, high_bit_depth); if (ARCH_ARM) ff_idctdsp_init_arm(c, avctx, high_bit_depth); if (ARCH_PPC) ff_idctdsp_init_ppc(c, avctx, high_bit_depth); if (ARCH_X86) ff_idctdsp_init_x86(c, avctx, high_bit_depth); if (ARCH_MIPS) ff_idctdsp_init_mips(c, avctx, high_bit_depth); ff_put_pixels_clamped = c->put_pixels_clamped; ff_add_pixels_clamped = c->add_pixels_clamped; ff_init_scantable_permutation(c->idct_permutation, c->perm_type); }
4,379
qemu
67c4c2bd958b0074ffbcde12cb434cd064adab12
1
static void vnc_display_close(VncDisplay *vs) { if (!vs) return; vs->enabled = false; vs->is_unix = false; if (vs->lsock != NULL) { if (vs->lsock_tag) { g_source_remove(vs->lsock_tag); } object_unref(OBJECT(vs->lsock)); vs->lsock = NULL; } vs->ws_enabled = false; if (vs->lwebsock != NULL) { if (vs->lwebsock_tag) { g_source_remove(vs->lwebsock_tag); } object_unref(OBJECT(vs->lwebsock)); vs->lwebsock = NULL; } vs->auth = VNC_AUTH_INVALID; vs->subauth = VNC_AUTH_INVALID; if (vs->tlscreds) { object_unparent(OBJECT(vs->tlscreds)); } g_free(vs->tlsaclname); vs->tlsaclname = NULL; }
4,382
qemu
eca1bdf415c454093dfc7eb983cd49287c043967
1
void cpu_reset(CPUX86State *env) { int i; memset(env, 0, offsetof(CPUX86State, breakpoints)); tlb_flush(env, 1); env->old_exception = -1; /* init to reset state */ #ifdef CONFIG_SOFTMMU env->hflags |= HF_SOFTMMU_MASK; #endif env->hflags2 |= HF2_GIF_MASK; cpu_x86_update_cr0(env, 0x60000010); env->a20_mask = ~0x0; env->smbase = 0x30000; env->idt.limit = 0xffff; env->gdt.limit = 0xffff; env->ldt.limit = 0xffff; env->ldt.flags = DESC_P_MASK | (2 << DESC_TYPE_SHIFT); env->tr.limit = 0xffff; env->tr.flags = DESC_P_MASK | (11 << DESC_TYPE_SHIFT); cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff, DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK | DESC_R_MASK); cpu_x86_load_seg_cache(env, R_DS, 0, 0, 0xffff, DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); cpu_x86_load_seg_cache(env, R_ES, 0, 0, 0xffff, DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffff, DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); cpu_x86_load_seg_cache(env, R_FS, 0, 0, 0xffff, DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff, DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); env->eip = 0xfff0; env->regs[R_EDX] = env->cpuid_version; env->eflags = 0x2; /* FPU init */ for(i = 0;i < 8; i++) env->fptags[i] = 1; env->fpuc = 0x37f; env->mxcsr = 0x1f80; memset(env->dr, 0, sizeof(env->dr)); env->dr[6] = DR6_FIXED_1; env->dr[7] = DR7_FIXED_1; cpu_breakpoint_remove_all(env, BP_CPU); cpu_watchpoint_remove_all(env, BP_CPU);
4,383
FFmpeg
ddfa3751c092feaf1e080f66587024689dfe603c
1
static int get_cod(J2kDecoderContext *s, J2kCodingStyle *c, uint8_t *properties) { J2kCodingStyle tmp; int compno; if (s->buf_end - s->buf < 5) return AVERROR(EINVAL); tmp.log2_prec_width = tmp.log2_prec_height = 15; tmp.csty = bytestream_get_byte(&s->buf); if (bytestream_get_byte(&s->buf)){ // progression level av_log(s->avctx, AV_LOG_ERROR, "only LRCP progression supported\n"); return -1; } tmp.nlayers = bytestream_get_be16(&s->buf); tmp.mct = bytestream_get_byte(&s->buf); // multiple component transformation get_cox(s, &tmp); for (compno = 0; compno < s->ncomponents; compno++){ if (!(properties[compno] & HAD_COC)) memcpy(c + compno, &tmp, sizeof(J2kCodingStyle)); } return 0; }
4,384
qemu
19494f811a43c6bc226aa272d86300d9229224fe
0
static void create_cps(MaltaState *s, const char *cpu_model, qemu_irq *cbus_irq, qemu_irq *i8259_irq) { Error *err = NULL; s->cps = g_new0(MIPSCPSState, 1); object_initialize(s->cps, sizeof(MIPSCPSState), TYPE_MIPS_CPS); qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default()); object_property_set_str(OBJECT(s->cps), cpu_model, "cpu-model", &err); object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", &err); object_property_set_bool(OBJECT(s->cps), true, "realized", &err); if (err != NULL) { error_report("%s", error_get_pretty(err)); exit(1); } sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s->cps), 0, 0, 1); /* FIXME: When GIC is present then we should use GIC's IRQ 3. Until then CPS exposes CPU's IRQs thus use the default IRQ 2. */ *i8259_irq = get_cps_irq(s->cps, 2); *cbus_irq = NULL; }
4,386
qemu
621ff94d5074d88253a5818c6b9c4db718fbfc65
0
void qmp_change_backing_file(const char *device, const char *image_node_name, const char *backing_file, Error **errp) { BlockBackend *blk; BlockDriverState *bs = NULL; AioContext *aio_context; BlockDriverState *image_bs = NULL; Error *local_err = NULL; bool ro; int open_flags; int ret; blk = blk_by_name(device); if (!blk) { error_set(errp, ERROR_CLASS_DEVICE_NOT_FOUND, "Device '%s' not found", device); return; } aio_context = blk_get_aio_context(blk); aio_context_acquire(aio_context); if (!blk_is_available(blk)) { error_setg(errp, "Device '%s' has no medium", device); goto out; } bs = blk_bs(blk); image_bs = bdrv_lookup_bs(NULL, image_node_name, &local_err); if (local_err) { error_propagate(errp, local_err); goto out; } if (!image_bs) { error_setg(errp, "image file not found"); goto out; } if (bdrv_find_base(image_bs) == image_bs) { error_setg(errp, "not allowing backing file change on an image " "without a backing file"); goto out; } /* even though we are not necessarily operating on bs, we need it to * determine if block ops are currently prohibited on the chain */ if (bdrv_op_is_blocked(bs, BLOCK_OP_TYPE_CHANGE, errp)) { goto out; } /* final sanity check */ if (!bdrv_chain_contains(bs, image_bs)) { error_setg(errp, "'%s' and image file are not in the same chain", device); goto out; } /* if not r/w, reopen to make r/w */ open_flags = image_bs->open_flags; ro = bdrv_is_read_only(image_bs); if (ro) { bdrv_reopen(image_bs, open_flags | BDRV_O_RDWR, &local_err); if (local_err) { error_propagate(errp, local_err); goto out; } } ret = bdrv_change_backing_file(image_bs, backing_file, image_bs->drv ? image_bs->drv->format_name : ""); if (ret < 0) { error_setg_errno(errp, -ret, "Could not change backing file to '%s'", backing_file); /* don't exit here, so we can try to restore open flags if * appropriate */ } if (ro) { bdrv_reopen(image_bs, open_flags, &local_err); if (local_err) { error_propagate(errp, local_err); /* will preserve prior errp */ } } out: aio_context_release(aio_context); }
4,387
qemu
fdba487859bff44db21dc119ee2b1b3691c69f0f
0
int pci_parse_devaddr(const char *addr, int *domp, int *busp, unsigned int *slotp, unsigned int *funcp) { const char *p; char *e; unsigned long val; unsigned long dom = 0, bus = 0; unsigned int slot = 0; unsigned int func = 0; p = addr; val = strtoul(p, &e, 16); if (e == p) return -1; if (*e == ':') { bus = val; p = e + 1; val = strtoul(p, &e, 16); if (e == p) return -1; if (*e == ':') { dom = bus; bus = val; p = e + 1; val = strtoul(p, &e, 16); if (e == p) return -1; } } slot = val; if (funcp != NULL) { if (*e != '.') return -1; p = e + 1; val = strtoul(p, &e, 16); if (e == p) return -1; func = val; } /* if funcp == NULL func is 0 */ if (dom > 0xffff || bus > 0xff || slot > 0x1f || func > 7) return -1; if (*e) return -1; /* Note: QEMU doesn't implement domains other than 0 */ if (!pci_find_bus(pci_find_root_bus(dom), bus)) return -1; *domp = dom; *busp = bus; *slotp = slot; if (funcp != NULL) *funcp = func; return 0; }
4,388
qemu
b8d834a00fa3ed4dad7d371e1a00938a126a54a0
0
static void x86_cpu_load_features(X86CPU *cpu, Error **errp) { CPUX86State *env = &cpu->env; FeatureWord w; GList *l; Error *local_err = NULL; /*TODO: cpu->max_features incorrectly overwrites features * set using "feat=on|off". Once we fix this, we can convert * plus_features & minus_features to global properties * inside x86_cpu_parse_featurestr() too. */ if (cpu->max_features) { for (w = 0; w < FEATURE_WORDS; w++) { env->features[w] = x86_cpu_get_supported_feature_word(w, cpu->migratable); } } for (l = plus_features; l; l = l->next) { const char *prop = l->data; object_property_set_bool(OBJECT(cpu), true, prop, &local_err); if (local_err) { goto out; } } for (l = minus_features; l; l = l->next) { const char *prop = l->data; object_property_set_bool(OBJECT(cpu), false, prop, &local_err); if (local_err) { goto out; } } if (!kvm_enabled() || !cpu->expose_kvm) { env->features[FEAT_KVM] = 0; } x86_cpu_enable_xsave_components(cpu); /* CPUID[EAX=7,ECX=0].EBX always increased level automatically: */ x86_cpu_adjust_feat_level(cpu, FEAT_7_0_EBX); if (cpu->full_cpuid_auto_level) { x86_cpu_adjust_feat_level(cpu, FEAT_1_EDX); x86_cpu_adjust_feat_level(cpu, FEAT_1_ECX); x86_cpu_adjust_feat_level(cpu, FEAT_6_EAX); x86_cpu_adjust_feat_level(cpu, FEAT_7_0_ECX); x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_EDX); x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_ECX); x86_cpu_adjust_feat_level(cpu, FEAT_8000_0007_EDX); x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX); x86_cpu_adjust_feat_level(cpu, FEAT_SVM); x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE); /* SVM requires CPUID[0x8000000A] */ if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) { x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A); } } /* Set cpuid_*level* based on cpuid_min_*level, if not explicitly set */ if (env->cpuid_level == UINT32_MAX) { env->cpuid_level = env->cpuid_min_level; } if (env->cpuid_xlevel == UINT32_MAX) { env->cpuid_xlevel = env->cpuid_min_xlevel; } if (env->cpuid_xlevel2 == UINT32_MAX) { env->cpuid_xlevel2 = env->cpuid_min_xlevel2; } out: if (local_err != NULL) { error_propagate(errp, local_err); } }
4,390
qemu
bd269ebc82fbaa5fe7ce5bc7c1770ac8acecd884
0
static void vnc_init_basic_info(SocketAddressLegacy *addr, VncBasicInfo *info, Error **errp) { switch (addr->type) { case SOCKET_ADDRESS_LEGACY_KIND_INET: info->host = g_strdup(addr->u.inet.data->host); info->service = g_strdup(addr->u.inet.data->port); if (addr->u.inet.data->ipv6) { info->family = NETWORK_ADDRESS_FAMILY_IPV6; } else { info->family = NETWORK_ADDRESS_FAMILY_IPV4; } break; case SOCKET_ADDRESS_LEGACY_KIND_UNIX: info->host = g_strdup(""); info->service = g_strdup(addr->u.q_unix.data->path); info->family = NETWORK_ADDRESS_FAMILY_UNIX; break; case SOCKET_ADDRESS_LEGACY_KIND_VSOCK: case SOCKET_ADDRESS_LEGACY_KIND_FD: error_setg(errp, "Unsupported socket address type %s", SocketAddressLegacyKind_lookup[addr->type]); break; default: abort(); } return; }
4,391
qemu
b436982f04fb33bb29fcdea190bd1fdc97dc65ef
0
static int mirror_cow_align(MirrorBlockJob *s, int64_t *sector_num, int *nb_sectors) { bool need_cow; int ret = 0; int chunk_sectors = s->granularity >> BDRV_SECTOR_BITS; int64_t align_sector_num = *sector_num; int align_nb_sectors = *nb_sectors; int max_sectors = chunk_sectors * s->max_iov; need_cow = !test_bit(*sector_num / chunk_sectors, s->cow_bitmap); need_cow |= !test_bit((*sector_num + *nb_sectors - 1) / chunk_sectors, s->cow_bitmap); if (need_cow) { bdrv_round_sectors_to_clusters(blk_bs(s->target), *sector_num, *nb_sectors, &align_sector_num, &align_nb_sectors); } if (align_nb_sectors > max_sectors) { align_nb_sectors = max_sectors; if (need_cow) { align_nb_sectors = QEMU_ALIGN_DOWN(align_nb_sectors, s->target_cluster_sectors); } } /* Clipping may result in align_nb_sectors unaligned to chunk boundary, but * that doesn't matter because it's already the end of source image. */ mirror_clip_sectors(s, align_sector_num, &align_nb_sectors); ret = align_sector_num + align_nb_sectors - (*sector_num + *nb_sectors); *sector_num = align_sector_num; *nb_sectors = align_nb_sectors; assert(ret >= 0); return ret; }
4,392
qemu
b2bedb214469af55179d907a60cd67fed6b0779e
0
static void bonito_pciconf_writel(void *opaque, target_phys_addr_t addr, uint32_t val) { PCIBonitoState *s = opaque; DPRINTF("bonito_pciconf_writel "TARGET_FMT_plx" val %x \n", addr, val); s->dev.config_write(&s->dev, addr, val, 4); }
4,393
qemu
db1e80ee2ed6fc9eb6b203873b39752144f5577f
0
static int vhdx_create(const char *filename, QemuOpts *opts, Error **errp) { int ret = 0; uint64_t image_size = (uint64_t) 2 * GiB; uint32_t log_size = 1 * MiB; uint32_t block_size = 0; uint64_t signature; uint64_t metadata_offset; bool use_zero_blocks = false; gunichar2 *creator = NULL; glong creator_items; BlockBackend *blk; char *type = NULL; VHDXImageType image_type; Error *local_err = NULL; image_size = ROUND_UP(qemu_opt_get_size_del(opts, BLOCK_OPT_SIZE, 0), BDRV_SECTOR_SIZE); log_size = qemu_opt_get_size_del(opts, VHDX_BLOCK_OPT_LOG_SIZE, 0); block_size = qemu_opt_get_size_del(opts, VHDX_BLOCK_OPT_BLOCK_SIZE, 0); type = qemu_opt_get_del(opts, BLOCK_OPT_SUBFMT); use_zero_blocks = qemu_opt_get_bool_del(opts, VHDX_BLOCK_OPT_ZERO, true); if (image_size > VHDX_MAX_IMAGE_SIZE) { error_setg_errno(errp, EINVAL, "Image size too large; max of 64TB"); ret = -EINVAL; goto exit; } if (type == NULL) { type = g_strdup("dynamic"); } if (!strcmp(type, "dynamic")) { image_type = VHDX_TYPE_DYNAMIC; } else if (!strcmp(type, "fixed")) { image_type = VHDX_TYPE_FIXED; } else if (!strcmp(type, "differencing")) { error_setg_errno(errp, ENOTSUP, "Differencing files not yet supported"); ret = -ENOTSUP; goto exit; } else { ret = -EINVAL; goto exit; } /* These are pretty arbitrary, and mainly designed to keep the BAT * size reasonable to load into RAM */ if (block_size == 0) { if (image_size > 32 * TiB) { block_size = 64 * MiB; } else if (image_size > (uint64_t) 100 * GiB) { block_size = 32 * MiB; } else if (image_size > 1 * GiB) { block_size = 16 * MiB; } else { block_size = 8 * MiB; } } /* make the log size close to what was specified, but must be * min 1MB, and multiple of 1MB */ log_size = ROUND_UP(log_size, MiB); block_size = ROUND_UP(block_size, MiB); block_size = block_size > VHDX_BLOCK_SIZE_MAX ? VHDX_BLOCK_SIZE_MAX : block_size; ret = bdrv_create_file(filename, opts, &local_err); if (ret < 0) { error_propagate(errp, local_err); goto exit; } blk = blk_new_open(filename, NULL, NULL, BDRV_O_RDWR | BDRV_O_PROTOCOL, &local_err); if (blk == NULL) { error_propagate(errp, local_err); ret = -EIO; goto exit; } blk_set_allow_write_beyond_eof(blk, true); /* Create (A) */ /* The creator field is optional, but may be useful for * debugging / diagnostics */ creator = g_utf8_to_utf16("QEMU v" QEMU_VERSION, -1, NULL, &creator_items, NULL); signature = cpu_to_le64(VHDX_FILE_SIGNATURE); ret = blk_pwrite(blk, VHDX_FILE_ID_OFFSET, &signature, sizeof(signature), 0); if (ret < 0) { goto delete_and_exit; } if (creator) { ret = blk_pwrite(blk, VHDX_FILE_ID_OFFSET + sizeof(signature), creator, creator_items * sizeof(gunichar2), 0); if (ret < 0) { goto delete_and_exit; } } /* Creates (B),(C) */ ret = vhdx_create_new_headers(blk_bs(blk), image_size, log_size); if (ret < 0) { goto delete_and_exit; } /* Creates (D),(E),(G) explicitly. (F) created as by-product */ ret = vhdx_create_new_region_table(blk_bs(blk), image_size, block_size, 512, log_size, use_zero_blocks, image_type, &metadata_offset); if (ret < 0) { goto delete_and_exit; } /* Creates (H) */ ret = vhdx_create_new_metadata(blk_bs(blk), image_size, block_size, 512, metadata_offset, image_type); if (ret < 0) { goto delete_and_exit; } delete_and_exit: blk_unref(blk); exit: g_free(type); g_free(creator); return ret; }
4,394
FFmpeg
0d194ee51ed477f843900e657a7edbcbecdffa42
0
static void vc1_mc_1mv(VC1Context *v, int dir) { MpegEncContext *s = &v->s; DSPContext *dsp = &v->s.dsp; H264ChromaContext *h264chroma = &v->h264chroma; uint8_t *srcY, *srcU, *srcV; int dxy, mx, my, uvmx, uvmy, src_x, src_y, uvsrc_x, uvsrc_y; int off, off_uv; int v_edge_pos = s->v_edge_pos >> v->field_mode; if ((!v->field_mode || (v->ref_field_type[dir] == 1 && v->cur_field_type == 1)) && !v->s.last_picture.f.data[0]) return; mx = s->mv[dir][0][0]; my = s->mv[dir][0][1]; // store motion vectors for further use in B frames if (s->pict_type == AV_PICTURE_TYPE_P) { s->current_picture.f.motion_val[1][s->block_index[0] + v->blocks_off][0] = mx; s->current_picture.f.motion_val[1][s->block_index[0] + v->blocks_off][1] = my; } uvmx = (mx + ((mx & 3) == 3)) >> 1; uvmy = (my + ((my & 3) == 3)) >> 1; v->luma_mv[s->mb_x][0] = uvmx; v->luma_mv[s->mb_x][1] = uvmy; if (v->field_mode && v->cur_field_type != v->ref_field_type[dir]) { my = my - 2 + 4 * v->cur_field_type; uvmy = uvmy - 2 + 4 * v->cur_field_type; } // fastuvmc shall be ignored for interlaced frame picture if (v->fastuvmc && (v->fcm != ILACE_FRAME)) { uvmx = uvmx + ((uvmx < 0) ? (uvmx & 1) : -(uvmx & 1)); uvmy = uvmy + ((uvmy < 0) ? (uvmy & 1) : -(uvmy & 1)); } if (v->field_mode) { // interlaced field picture if (!dir) { if ((v->cur_field_type != v->ref_field_type[dir]) && v->second_field) { srcY = s->current_picture.f.data[0]; srcU = s->current_picture.f.data[1]; srcV = s->current_picture.f.data[2]; } else { srcY = s->last_picture.f.data[0]; srcU = s->last_picture.f.data[1]; srcV = s->last_picture.f.data[2]; } } else { srcY = s->next_picture.f.data[0]; srcU = s->next_picture.f.data[1]; srcV = s->next_picture.f.data[2]; } } else { if (!dir) { srcY = s->last_picture.f.data[0]; srcU = s->last_picture.f.data[1]; srcV = s->last_picture.f.data[2]; } else { srcY = s->next_picture.f.data[0]; srcU = s->next_picture.f.data[1]; srcV = s->next_picture.f.data[2]; } } if(!srcY) return; src_x = s->mb_x * 16 + (mx >> 2); src_y = s->mb_y * 16 + (my >> 2); uvsrc_x = s->mb_x * 8 + (uvmx >> 2); uvsrc_y = s->mb_y * 8 + (uvmy >> 2); if (v->profile != PROFILE_ADVANCED) { src_x = av_clip( src_x, -16, s->mb_width * 16); src_y = av_clip( src_y, -16, s->mb_height * 16); uvsrc_x = av_clip(uvsrc_x, -8, s->mb_width * 8); uvsrc_y = av_clip(uvsrc_y, -8, s->mb_height * 8); } else { src_x = av_clip( src_x, -17, s->avctx->coded_width); src_y = av_clip( src_y, -18, s->avctx->coded_height + 1); uvsrc_x = av_clip(uvsrc_x, -8, s->avctx->coded_width >> 1); uvsrc_y = av_clip(uvsrc_y, -8, s->avctx->coded_height >> 1); } srcY += src_y * s->linesize + src_x; srcU += uvsrc_y * s->uvlinesize + uvsrc_x; srcV += uvsrc_y * s->uvlinesize + uvsrc_x; if (v->field_mode && v->ref_field_type[dir]) { srcY += s->current_picture_ptr->f.linesize[0]; srcU += s->current_picture_ptr->f.linesize[1]; srcV += s->current_picture_ptr->f.linesize[2]; } /* for grayscale we should not try to read from unknown area */ if (s->flags & CODEC_FLAG_GRAY) { srcU = s->edge_emu_buffer + 18 * s->linesize; srcV = s->edge_emu_buffer + 18 * s->linesize; } if (v->rangeredfrm || (v->mv_mode == MV_PMODE_INTENSITY_COMP) || s->h_edge_pos < 22 || v_edge_pos < 22 || (unsigned)(src_x - s->mspel) > s->h_edge_pos - (mx&3) - 16 - s->mspel * 3 || (unsigned)(src_y - 1) > v_edge_pos - (my&3) - 16 - 3) { uint8_t *uvbuf = s->edge_emu_buffer + 19 * s->linesize; srcY -= s->mspel * (1 + s->linesize); s->vdsp.emulated_edge_mc(s->edge_emu_buffer, srcY, s->linesize, 17 + s->mspel * 2, 17 + s->mspel * 2, src_x - s->mspel, src_y - s->mspel, s->h_edge_pos, v_edge_pos); srcY = s->edge_emu_buffer; s->vdsp.emulated_edge_mc(uvbuf , srcU, s->uvlinesize, 8 + 1, 8 + 1, uvsrc_x, uvsrc_y, s->h_edge_pos >> 1, v_edge_pos >> 1); s->vdsp.emulated_edge_mc(uvbuf + 16, srcV, s->uvlinesize, 8 + 1, 8 + 1, uvsrc_x, uvsrc_y, s->h_edge_pos >> 1, v_edge_pos >> 1); srcU = uvbuf; srcV = uvbuf + 16; /* if we deal with range reduction we need to scale source blocks */ if (v->rangeredfrm) { int i, j; uint8_t *src, *src2; src = srcY; for (j = 0; j < 17 + s->mspel * 2; j++) { for (i = 0; i < 17 + s->mspel * 2; i++) src[i] = ((src[i] - 128) >> 1) + 128; src += s->linesize; } src = srcU; src2 = srcV; for (j = 0; j < 9; j++) { for (i = 0; i < 9; i++) { src[i] = ((src[i] - 128) >> 1) + 128; src2[i] = ((src2[i] - 128) >> 1) + 128; } src += s->uvlinesize; src2 += s->uvlinesize; } } /* if we deal with intensity compensation we need to scale source blocks */ if (v->mv_mode == MV_PMODE_INTENSITY_COMP) { int i, j; uint8_t *src, *src2; src = srcY; for (j = 0; j < 17 + s->mspel * 2; j++) { for (i = 0; i < 17 + s->mspel * 2; i++) src[i] = v->luty[src[i]]; src += s->linesize; } src = srcU; src2 = srcV; for (j = 0; j < 9; j++) { for (i = 0; i < 9; i++) { src[i] = v->lutuv[src[i]]; src2[i] = v->lutuv[src2[i]]; } src += s->uvlinesize; src2 += s->uvlinesize; } } srcY += s->mspel * (1 + s->linesize); } if (v->field_mode && v->second_field) { off = s->current_picture_ptr->f.linesize[0]; off_uv = s->current_picture_ptr->f.linesize[1]; } else { off = 0; off_uv = 0; } if (s->mspel) { dxy = ((my & 3) << 2) | (mx & 3); v->vc1dsp.put_vc1_mspel_pixels_tab[dxy](s->dest[0] + off , srcY , s->linesize, v->rnd); v->vc1dsp.put_vc1_mspel_pixels_tab[dxy](s->dest[0] + off + 8, srcY + 8, s->linesize, v->rnd); srcY += s->linesize * 8; v->vc1dsp.put_vc1_mspel_pixels_tab[dxy](s->dest[0] + off + 8 * s->linesize , srcY , s->linesize, v->rnd); v->vc1dsp.put_vc1_mspel_pixels_tab[dxy](s->dest[0] + off + 8 * s->linesize + 8, srcY + 8, s->linesize, v->rnd); } else { // hpel mc - always used for luma dxy = (my & 2) | ((mx & 2) >> 1); if (!v->rnd) dsp->put_pixels_tab[0][dxy](s->dest[0] + off, srcY, s->linesize, 16); else dsp->put_no_rnd_pixels_tab[0][dxy](s->dest[0] + off, srcY, s->linesize, 16); } if (s->flags & CODEC_FLAG_GRAY) return; /* Chroma MC always uses qpel bilinear */ uvmx = (uvmx & 3) << 1; uvmy = (uvmy & 3) << 1; if (!v->rnd) { h264chroma->put_h264_chroma_pixels_tab[0](s->dest[1] + off_uv, srcU, s->uvlinesize, 8, uvmx, uvmy); h264chroma->put_h264_chroma_pixels_tab[0](s->dest[2] + off_uv, srcV, s->uvlinesize, 8, uvmx, uvmy); } else { v->vc1dsp.put_no_rnd_vc1_chroma_pixels_tab[0](s->dest[1] + off_uv, srcU, s->uvlinesize, 8, uvmx, uvmy); v->vc1dsp.put_no_rnd_vc1_chroma_pixels_tab[0](s->dest[2] + off_uv, srcV, s->uvlinesize, 8, uvmx, uvmy); } }
4,395
qemu
9f14b0add1dcdbfa2ee61051d068211fb0a1fcc9
0
static void rng_egd_chr_read(void *opaque, const uint8_t *buf, int size) { RngEgd *s = RNG_EGD(opaque); size_t buf_offset = 0; while (size > 0 && s->parent.requests) { RngRequest *req = s->parent.requests->data; int len = MIN(size, req->size - req->offset); memcpy(req->data + req->offset, buf + buf_offset, len); buf_offset += len; req->offset += len; size -= len; if (req->offset == req->size) { s->parent.requests = g_slist_remove_link(s->parent.requests, s->parent.requests); req->receive_entropy(req->opaque, req->data, req->size); rng_egd_free_request(req); } } }
4,396
qemu
abd7f08b2353f43274b785db8c7224f082ef4d31
0
static void virgl_cmd_get_capset(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) { struct virtio_gpu_get_capset gc; struct virtio_gpu_resp_capset *resp; uint32_t max_ver, max_size; VIRTIO_GPU_FILL_CMD(gc); virgl_renderer_get_cap_set(gc.capset_id, &max_ver, &max_size); resp = g_malloc(sizeof(*resp) + max_size); resp->hdr.type = VIRTIO_GPU_RESP_OK_CAPSET; virgl_renderer_fill_caps(gc.capset_id, gc.capset_version, (void *)resp->capset_data); virtio_gpu_ctrl_response(g, cmd, &resp->hdr, sizeof(*resp) + max_size); g_free(resp); }
4,397
qemu
4be746345f13e99e468c60acbd3a355e8183e3ce
0
static int get_device_type(SCSIDiskState *s) { BlockDriverState *bdrv = s->qdev.conf.bs; uint8_t cmd[16]; uint8_t buf[36]; uint8_t sensebuf[8]; sg_io_hdr_t io_header; int ret; memset(cmd, 0, sizeof(cmd)); memset(buf, 0, sizeof(buf)); cmd[0] = INQUIRY; cmd[4] = sizeof(buf); memset(&io_header, 0, sizeof(io_header)); io_header.interface_id = 'S'; io_header.dxfer_direction = SG_DXFER_FROM_DEV; io_header.dxfer_len = sizeof(buf); io_header.dxferp = buf; io_header.cmdp = cmd; io_header.cmd_len = sizeof(cmd); io_header.mx_sb_len = sizeof(sensebuf); io_header.sbp = sensebuf; io_header.timeout = 6000; /* XXX */ ret = bdrv_ioctl(bdrv, SG_IO, &io_header); if (ret < 0 || io_header.driver_status || io_header.host_status) { return -1; } s->qdev.type = buf[0]; if (buf[1] & 0x80) { s->features |= 1 << SCSI_DISK_F_REMOVABLE; } return 0; }
4,398
qemu
e63ecc6f68d5f9349683aef5d74e36137eafb72d
0
static always_inline void powerpc_excp (CPUState *env, int excp_model, int excp) { target_ulong msr, vector; int srr0, srr1, asrr0, asrr1; if (loglevel & CPU_LOG_INT) { fprintf(logfile, "Raise exception at 0x" ADDRX " => 0x%08x (%02x)\n", env->nip, excp, env->error_code); } msr = do_load_msr(env); srr0 = SPR_SRR0; srr1 = SPR_SRR1; asrr0 = -1; asrr1 = -1; msr &= ~((target_ulong)0x783F0000); switch (excp) { case POWERPC_EXCP_NONE: /* Should never happen */ return; case POWERPC_EXCP_CRITICAL: /* Critical input */ msr_ri = 0; /* XXX: check this */ switch (excp_model) { case POWERPC_EXCP_40x: srr0 = SPR_40x_SRR2; srr1 = SPR_40x_SRR3; break; case POWERPC_EXCP_BOOKE: srr0 = SPR_BOOKE_CSRR0; srr1 = SPR_BOOKE_CSRR1; break; case POWERPC_EXCP_G2: break; default: goto excp_invalid; } goto store_next; case POWERPC_EXCP_MCHECK: /* Machine check exception */ if (msr_me == 0) { /* Machine check exception is not enabled */ /* XXX: we may just stop the processor here, to allow debugging */ excp = POWERPC_EXCP_RESET; goto excp_reset; } msr_ri = 0; msr_me = 0; #if defined(TARGET_PPC64H) msr_hv = 1; #endif /* XXX: should also have something loaded in DAR / DSISR */ switch (excp_model) { case POWERPC_EXCP_40x: srr0 = SPR_40x_SRR2; srr1 = SPR_40x_SRR3; break; case POWERPC_EXCP_BOOKE: srr0 = SPR_BOOKE_MCSRR0; srr1 = SPR_BOOKE_MCSRR1; asrr0 = SPR_BOOKE_CSRR0; asrr1 = SPR_BOOKE_CSRR1; break; default: break; } goto store_next; case POWERPC_EXCP_DSI: /* Data storage exception */ #if defined (DEBUG_EXCEPTIONS) if (loglevel != 0) { fprintf(logfile, "DSI exception: DSISR=0x" ADDRX" DAR=0x" ADDRX "\n", env->spr[SPR_DSISR], env->spr[SPR_DAR]); } #endif msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif goto store_next; case POWERPC_EXCP_ISI: /* Instruction storage exception */ #if defined (DEBUG_EXCEPTIONS) if (loglevel != 0) { fprintf(logfile, "ISI exception: msr=0x" ADDRX ", nip=0x" ADDRX "\n", msr, env->nip); } #endif msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif msr |= env->error_code; goto store_next; case POWERPC_EXCP_EXTERNAL: /* External input */ msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes0 == 1) msr_hv = 1; #endif goto store_next; case POWERPC_EXCP_ALIGN: /* Alignment exception */ msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif /* XXX: this is false */ /* Get rS/rD and rA from faulting opcode */ env->spr[SPR_DSISR] |= (ldl_code((env->nip - 4)) & 0x03FF0000) >> 16; goto store_current; case POWERPC_EXCP_PROGRAM: /* Program exception */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) { #if defined (DEBUG_EXCEPTIONS) if (loglevel != 0) { fprintf(logfile, "Ignore floating point exception\n"); } #endif return; } msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif msr |= 0x00100000; /* Set FX */ env->fpscr[7] |= 0x8; /* Finally, update FEX */ if ((((env->fpscr[7] & 0x3) << 3) | (env->fpscr[6] >> 1)) & ((env->fpscr[1] << 1) | (env->fpscr[0] >> 3))) env->fpscr[7] |= 0x4; if (msr_fe0 != msr_fe1) { msr |= 0x00010000; goto store_current; } break; case POWERPC_EXCP_INVAL: #if defined (DEBUG_EXCEPTIONS) if (loglevel != 0) { fprintf(logfile, "Invalid instruction at 0x" ADDRX "\n", env->nip); } #endif msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif msr |= 0x00080000; break; case POWERPC_EXCP_PRIV: msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif msr |= 0x00040000; break; case POWERPC_EXCP_TRAP: msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif msr |= 0x00020000; break; default: /* Should never occur */ cpu_abort(env, "Invalid program exception %d. Aborting\n", env->error_code); break; } goto store_next; case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif goto store_current; case POWERPC_EXCP_SYSCALL: /* System call exception */ /* NOTE: this is a temporary hack to support graphics OSI calls from the MOL driver */ /* XXX: To be removed */ if (env->gpr[3] == 0x113724fa && env->gpr[4] == 0x77810f9b && env->osi_call) { if (env->osi_call(env) != 0) return; } if (loglevel & CPU_LOG_INT) { dump_syscall(env); } msr_ri = 0; #if defined(TARGET_PPC64H) if (lev == 1 || (lpes0 == 0 && lpes1 == 0)) msr_hv = 1; #endif goto store_next; case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ msr_ri = 0; goto store_current; case POWERPC_EXCP_DECR: /* Decrementer exception */ msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif goto store_next; case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ /* FIT on 4xx */ #if defined (DEBUG_EXCEPTIONS) if (loglevel != 0) fprintf(logfile, "FIT exception\n"); #endif msr_ri = 0; /* XXX: check this */ goto store_next; case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */ #if defined (DEBUG_EXCEPTIONS) if (loglevel != 0) fprintf(logfile, "WDT exception\n"); #endif switch (excp_model) { case POWERPC_EXCP_BOOKE: srr0 = SPR_BOOKE_CSRR0; srr1 = SPR_BOOKE_CSRR1; break; default: break; } msr_ri = 0; /* XXX: check this */ goto store_next; case POWERPC_EXCP_DTLB: /* Data TLB error */ msr_ri = 0; /* XXX: check this */ goto store_next; case POWERPC_EXCP_ITLB: /* Instruction TLB error */ msr_ri = 0; /* XXX: check this */ goto store_next; case POWERPC_EXCP_DEBUG: /* Debug interrupt */ switch (excp_model) { case POWERPC_EXCP_BOOKE: srr0 = SPR_BOOKE_DSRR0; srr1 = SPR_BOOKE_DSRR1; asrr0 = SPR_BOOKE_CSRR0; asrr1 = SPR_BOOKE_CSRR1; break; default: break; } /* XXX: TODO */ cpu_abort(env, "Debug exception is not implemented yet !\n"); goto store_next; #if defined(TARGET_PPCEMB) case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavailable */ msr_ri = 0; /* XXX: check this */ goto store_current; case POWERPC_EXCP_EFPDI: /* Embedded floating-point data interrupt */ /* XXX: TODO */ cpu_abort(env, "Embedded floating point data exception " "is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_EFPRI: /* Embedded floating-point round interrupt */ /* XXX: TODO */ cpu_abort(env, "Embedded floating point round exception " "is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_EPERFM: /* Embedded performance monitor interrupt */ msr_ri = 0; /* XXX: TODO */ cpu_abort(env, "Performance counter exception is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */ /* XXX: TODO */ cpu_abort(env, "Embedded doorbell interrupt is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */ switch (excp_model) { case POWERPC_EXCP_BOOKE: srr0 = SPR_BOOKE_CSRR0; srr1 = SPR_BOOKE_CSRR1; break; default: break; } /* XXX: TODO */ cpu_abort(env, "Embedded doorbell critical interrupt " "is not implemented yet !\n"); goto store_next; #endif /* defined(TARGET_PPCEMB) */ case POWERPC_EXCP_RESET: /* System reset exception */ msr_ri = 0; #if defined(TARGET_PPC64H) msr_hv = 1; #endif excp_reset: goto store_next; #if defined(TARGET_PPC64) case POWERPC_EXCP_DSEG: /* Data segment exception */ msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif goto store_next; case POWERPC_EXCP_ISEG: /* Instruction segment exception */ msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif goto store_next; #endif /* defined(TARGET_PPC64) */ #if defined(TARGET_PPC64H) case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */ srr0 = SPR_HSRR0; srr1 = SPR_HSSR1; msr_hv = 1; goto store_next; #endif case POWERPC_EXCP_TRACE: /* Trace exception */ msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif goto store_next; #if defined(TARGET_PPC64H) case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */ srr0 = SPR_HSRR0; srr1 = SPR_HSSR1; msr_hv = 1; goto store_next; case POWERPC_EXCP_HISI: /* Hypervisor instruction storage exception */ srr0 = SPR_HSRR0; srr1 = SPR_HSSR1; msr_hv = 1; /* XXX: TODO */ cpu_abort(env, "Hypervisor instruction storage exception " "is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */ srr0 = SPR_HSRR0; srr1 = SPR_HSSR1; msr_hv = 1; goto store_next; case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment exception */ srr0 = SPR_HSRR0; srr1 = SPR_HSSR1; msr_hv = 1; goto store_next; #endif /* defined(TARGET_PPC64H) */ case POWERPC_EXCP_VPU: /* Vector unavailable exception */ msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif goto store_current; case POWERPC_EXCP_PIT: /* Programmable interval timer interrupt */ #if defined (DEBUG_EXCEPTIONS) if (loglevel != 0) fprintf(logfile, "PIT exception\n"); #endif msr_ri = 0; /* XXX: check this */ goto store_next; case POWERPC_EXCP_IO: /* IO error exception */ /* XXX: TODO */ cpu_abort(env, "601 IO error exception is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_RUNM: /* Run mode exception */ /* XXX: TODO */ cpu_abort(env, "601 run mode exception is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_EMUL: /* Emulation trap exception */ /* XXX: TODO */ cpu_abort(env, "602 emulation trap exception " "is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */ msr_ri = 0; /* XXX: check this */ #if defined(TARGET_PPC64H) /* XXX: check this */ if (lpes1 == 0) msr_hv = 1; #endif switch (excp_model) { case POWERPC_EXCP_602: case POWERPC_EXCP_603: case POWERPC_EXCP_603E: case POWERPC_EXCP_G2: goto tlb_miss_tgpr; case POWERPC_EXCP_7x5: goto tlb_miss; case POWERPC_EXCP_74xx: goto tlb_miss_74xx; default: cpu_abort(env, "Invalid instruction TLB miss exception\n"); break; } break; case POWERPC_EXCP_DLTLB: /* Data load TLB miss */ msr_ri = 0; /* XXX: check this */ #if defined(TARGET_PPC64H) /* XXX: check this */ if (lpes1 == 0) msr_hv = 1; #endif switch (excp_model) { case POWERPC_EXCP_602: case POWERPC_EXCP_603: case POWERPC_EXCP_603E: case POWERPC_EXCP_G2: goto tlb_miss_tgpr; case POWERPC_EXCP_7x5: goto tlb_miss; case POWERPC_EXCP_74xx: goto tlb_miss_74xx; default: cpu_abort(env, "Invalid data load TLB miss exception\n"); break; } break; case POWERPC_EXCP_DSTLB: /* Data store TLB miss */ msr_ri = 0; /* XXX: check this */ #if defined(TARGET_PPC64H) /* XXX: check this */ if (lpes1 == 0) msr_hv = 1; #endif switch (excp_model) { case POWERPC_EXCP_602: case POWERPC_EXCP_603: case POWERPC_EXCP_603E: case POWERPC_EXCP_G2: tlb_miss_tgpr: /* Swap temporary saved registers with GPRs */ swap_gpr_tgpr(env); msr_tgpr = 1; goto tlb_miss; case POWERPC_EXCP_7x5: tlb_miss: #if defined (DEBUG_SOFTWARE_TLB) if (loglevel != 0) { const unsigned char *es; target_ulong *miss, *cmp; int en; if (excp == POWERPC_EXCP_IFTLB) { es = "I"; en = 'I'; miss = &env->spr[SPR_IMISS]; cmp = &env->spr[SPR_ICMP]; } else { if (excp == POWERPC_EXCP_DLTLB) es = "DL"; else es = "DS"; en = 'D'; miss = &env->spr[SPR_DMISS]; cmp = &env->spr[SPR_DCMP]; } fprintf(logfile, "6xx %sTLB miss: %cM " ADDRX " %cC " ADDRX " H1 " ADDRX " H2 " ADDRX " %08x\n", es, en, *miss, en, *cmp, env->spr[SPR_HASH1], env->spr[SPR_HASH2], env->error_code); } #endif msr |= env->crf[0] << 28; msr |= env->error_code; /* key, D/I, S/L bits */ /* Set way using a LRU mechanism */ msr |= ((env->last_way + 1) & (env->nb_ways - 1)) << 17; break; case POWERPC_EXCP_74xx: tlb_miss_74xx: #if defined (DEBUG_SOFTWARE_TLB) if (loglevel != 0) { const unsigned char *es; target_ulong *miss, *cmp; int en; if (excp == POWERPC_EXCP_IFTLB) { es = "I"; en = 'I'; miss = &env->spr[SPR_IMISS]; cmp = &env->spr[SPR_ICMP]; } else { if (excp == POWERPC_EXCP_DLTLB) es = "DL"; else es = "DS"; en = 'D'; miss = &env->spr[SPR_TLBMISS]; cmp = &env->spr[SPR_PTEHI]; } fprintf(logfile, "74xx %sTLB miss: %cM " ADDRX " %cC " ADDRX " %08x\n", es, en, *miss, en, *cmp, env->error_code); } #endif msr |= env->error_code; /* key bit */ break; default: cpu_abort(env, "Invalid data store TLB miss exception\n"); break; } goto store_next; case POWERPC_EXCP_FPA: /* Floating-point assist exception */ /* XXX: TODO */ cpu_abort(env, "Floating point assist exception " "is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_IABR: /* Instruction address breakpoint */ /* XXX: TODO */ cpu_abort(env, "IABR exception is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_SMI: /* System management interrupt */ /* XXX: TODO */ cpu_abort(env, "SMI exception is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_THERM: /* Thermal interrupt */ /* XXX: TODO */ cpu_abort(env, "Thermal management exception " "is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_PERFM: /* Embedded performance monitor interrupt */ msr_ri = 0; #if defined(TARGET_PPC64H) if (lpes1 == 0) msr_hv = 1; #endif /* XXX: TODO */ cpu_abort(env, "Performance counter exception is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_VPUA: /* Vector assist exception */ /* XXX: TODO */ cpu_abort(env, "VPU assist exception is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_SOFTP: /* Soft patch exception */ /* XXX: TODO */ cpu_abort(env, "970 soft-patch exception is not implemented yet !\n"); goto store_next; case POWERPC_EXCP_MAINT: /* Maintenance exception */ /* XXX: TODO */ cpu_abort(env, "970 maintenance exception is not implemented yet !\n"); goto store_next; default: excp_invalid: cpu_abort(env, "Invalid PowerPC exception %d. Aborting\n", excp); break; store_current: /* save current instruction location */ env->spr[srr0] = env->nip - 4; break; store_next: /* save next instruction location */ env->spr[srr0] = env->nip; break; } /* Save MSR */ env->spr[srr1] = msr; /* If any alternate SRR register are defined, duplicate saved values */ if (asrr0 != -1) env->spr[asrr0] = env->spr[srr0]; if (asrr1 != -1) env->spr[asrr1] = env->spr[srr1]; /* If we disactivated any translation, flush TLBs */ if (msr_ir || msr_dr) tlb_flush(env, 1); /* reload MSR with correct bits */ msr_ee = 0; msr_pr = 0; msr_fp = 0; msr_fe0 = 0; msr_se = 0; msr_be = 0; msr_fe1 = 0; msr_ir = 0; msr_dr = 0; #if 0 /* Fix this: not on all targets */ msr_pmm = 0; #endif msr_le = msr_ile; do_compute_hflags(env); /* Jump to handler */ vector = env->excp_vectors[excp]; if (vector == (target_ulong)-1) { cpu_abort(env, "Raised an exception without defined vector %d\n", excp); } vector |= env->excp_prefix; #if defined(TARGET_PPC64) if (excp_model == POWERPC_EXCP_BOOKE) { msr_cm = msr_icm; if (!msr_cm) vector = (uint32_t)vector; } else { msr_sf = msr_isf; if (!msr_sf) vector = (uint32_t)vector; } #endif env->nip = vector; /* Reset exception state */ env->exception_index = POWERPC_EXCP_NONE; env->error_code = 0; }
4,399
qemu
65c0f1e9558c7c762cdb333406243fff1d687117
0
static int parse_pair(JSONParserContext *ctxt, QDict *dict, QList **tokens, va_list *ap) { QObject *key = NULL, *token = NULL, *value, *peek; QList *working = qlist_copy(*tokens); peek = qlist_peek(working); if (peek == NULL) { parse_error(ctxt, NULL, "premature EOI"); goto out; } key = parse_value(ctxt, &working, ap); if (!key || qobject_type(key) != QTYPE_QSTRING) { parse_error(ctxt, peek, "key is not a string in object"); goto out; } token = qlist_pop(working); if (token == NULL) { parse_error(ctxt, NULL, "premature EOI"); goto out; } if (!token_is_operator(token, ':')) { parse_error(ctxt, token, "missing : in object pair"); goto out; } value = parse_value(ctxt, &working, ap); if (value == NULL) { parse_error(ctxt, token, "Missing value in dict"); goto out; } qdict_put_obj(dict, qstring_get_str(qobject_to_qstring(key)), value); qobject_decref(token); qobject_decref(key); QDECREF(*tokens); *tokens = working; return 0; out: qobject_decref(token); qobject_decref(key); QDECREF(working); return -1; }
4,400
qemu
32bafa8fdd098d52fbf1102d5a5e48d29398c0aa
0
void qemu_input_event_send_key_number(QemuConsole *src, int num, bool down) { KeyValue *key = g_new0(KeyValue, 1); key->type = KEY_VALUE_KIND_NUMBER; key->u.number = num; qemu_input_event_send_key(src, key, down); }
4,401
qemu
d95704341280fc521dc2b16bbbc5858f6647e2c3
0
opts_start_optional(Visitor *v, bool *present, const char *name, Error **errp) { OptsVisitor *ov = DO_UPCAST(OptsVisitor, visitor, v); /* we only support a single mandatory scalar field in a list node */ assert(ov->repeated_opts == NULL); *present = (lookup_distinct(ov, name, NULL) != NULL); }
4,402
qemu
079d0b7f1eedcc634c371fe05b617fdc55c8b762
0
static void async_complete(void *opaque) { USBHostDevice *s = opaque; AsyncURB *aurb; int urbs = 0; while (1) { USBPacket *p; int r = ioctl(s->fd, USBDEVFS_REAPURBNDELAY, &aurb); if (r < 0) { if (errno == EAGAIN) { if (urbs > 2) { fprintf(stderr, "husb: %d iso urbs finished at once\n", urbs); } return; } if (errno == ENODEV) { if (!s->closing) { trace_usb_host_disconnect(s->bus_num, s->addr); do_disconnect(s); } return; } perror("USBDEVFS_REAPURBNDELAY"); return; } DPRINTF("husb: async completed. aurb %p status %d alen %d\n", aurb, aurb->urb.status, aurb->urb.actual_length); /* If this is a buffered iso urb mark it as complete and don't do anything else (it is handled further in usb_host_handle_iso_data) */ if (aurb->iso_frame_idx == -1) { int inflight; int pid = (aurb->urb.endpoint & USB_DIR_IN) ? USB_TOKEN_IN : USB_TOKEN_OUT; int ep = aurb->urb.endpoint & 0xf; if (aurb->urb.status == -EPIPE) { set_halt(s, pid, ep); } aurb->iso_frame_idx = 0; urbs++; inflight = change_iso_inflight(s, pid, ep, -1); if (inflight == 0 && is_iso_started(s, pid, ep)) { fprintf(stderr, "husb: out of buffers for iso stream\n"); } continue; } p = aurb->packet; trace_usb_host_urb_complete(s->bus_num, s->addr, aurb, aurb->urb.status, aurb->urb.actual_length, aurb->more); if (p) { switch (aurb->urb.status) { case 0: p->result += aurb->urb.actual_length; break; case -EPIPE: set_halt(s, p->pid, p->devep); p->result = USB_RET_STALL; break; default: p->result = USB_RET_NAK; break; } if (aurb->urb.type == USBDEVFS_URB_TYPE_CONTROL) { trace_usb_host_req_complete(s->bus_num, s->addr, p->result); usb_generic_async_ctrl_complete(&s->dev, p); } else if (!aurb->more) { trace_usb_host_req_complete(s->bus_num, s->addr, p->result); usb_packet_complete(&s->dev, p); } } async_free(aurb); } }
4,403
qemu
ad674e53b5cce265fadafbde2c6a4f190345cd00
0
static void next(DBDMA_channel *ch) { uint32_t cp; ch->regs[DBDMA_STATUS] &= cpu_to_be32(~BT); cp = be32_to_cpu(ch->regs[DBDMA_CMDPTR_LO]); ch->regs[DBDMA_CMDPTR_LO] = cpu_to_be32(cp + sizeof(dbdma_cmd)); dbdma_cmdptr_load(ch); }
4,404
qemu
a89f364ae8740dfc31b321eed9ee454e996dc3c1
0
DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id) { DeviceState *dev; if (nand_flash_ids[chip_id].size == 0) { hw_error("%s: Unsupported NAND chip ID.\n", __FUNCTION__); } dev = DEVICE(object_new(TYPE_NAND)); qdev_prop_set_uint8(dev, "manufacturer_id", manf_id); qdev_prop_set_uint8(dev, "chip_id", chip_id); if (blk) { qdev_prop_set_drive(dev, "drive", blk, &error_fatal); } qdev_init_nofail(dev); return dev; }
4,405
FFmpeg
1d0ae92a259b924952856de1a5ca0dc6fd5031e5
0
static void decode_mb(MadContext *t, int inter) { MpegEncContext *s = &t->s; int mv_map = 0; int mv_x, mv_y; int j; if (inter) { int v = decode210(&s->gb); if (v < 2) { mv_map = v ? get_bits(&s->gb, 6) : 63; mv_x = decode_motion(&s->gb); mv_y = decode_motion(&s->gb); } else { mv_map = 0; } } for (j=0; j<6; j++) { if (mv_map & (1<<j)) { // mv_x and mv_y are guarded by mv_map int add = 2*decode_motion(&s->gb); if (t->last_frame.data[0]) comp_block(t, s->mb_x, s->mb_y, j, mv_x, mv_y, add); } else { s->dsp.clear_block(t->block); decode_block_intra(t, t->block); idct_put(t, t->block, s->mb_x, s->mb_y, j); } } }
4,406
qemu
5e1b34a3fa0a0fbf46628aab10cc49f6f855520e
0
static void ioq_submit(LinuxAioState *s) { int ret, len; struct qemu_laiocb *aiocb; struct iocb *iocbs[MAX_QUEUED_IO]; QSIMPLEQ_HEAD(, qemu_laiocb) completed; do { len = 0; QSIMPLEQ_FOREACH(aiocb, &s->io_q.pending, next) { iocbs[len++] = &aiocb->iocb; if (len == MAX_QUEUED_IO) { break; } } ret = io_submit(s->ctx, len, iocbs); if (ret == -EAGAIN) { break; } if (ret < 0) { abort(); } s->io_q.n -= ret; aiocb = container_of(iocbs[ret - 1], struct qemu_laiocb, iocb); QSIMPLEQ_SPLIT_AFTER(&s->io_q.pending, aiocb, next, &completed); } while (ret == len && !QSIMPLEQ_EMPTY(&s->io_q.pending)); s->io_q.blocked = (s->io_q.n > 0); }
4,407
FFmpeg
db592f3b03a21d5bd5237021c00af3ce0431fc60
0
static void envelope_instant16(WaveformContext *s, AVFrame *out, int plane, int component) { const int dst_linesize = out->linesize[component] / 2; const int bg = s->bg_color[component] * (s->size / 256); const int limit = s->size - 1; const int is_chroma = (component == 1 || component == 2); const int shift_w = (is_chroma ? s->desc->log2_chroma_w : 0); const int shift_h = (is_chroma ? s->desc->log2_chroma_h : 0); const int dst_h = FF_CEIL_RSHIFT(out->height, shift_h); const int dst_w = FF_CEIL_RSHIFT(out->width, shift_w); const int start = s->estart[plane]; const int end = s->eend[plane]; uint16_t *dst; int x, y; if (s->mode) { for (x = 0; x < dst_w; x++) { for (y = start; y < end; y++) { dst = (uint16_t *)out->data[component] + y * dst_linesize + x; if (dst[0] != bg) { dst[0] = limit; break; } } for (y = end - 1; y >= start; y--) { dst = (uint16_t *)out->data[component] + y * dst_linesize + x; if (dst[0] != bg) { dst[0] = limit; break; } } } } else { for (y = 0; y < dst_h; y++) { dst = (uint16_t *)out->data[component] + y * dst_linesize; for (x = start; x < end; x++) { if (dst[x] != bg) { dst[x] = limit; break; } } for (x = end - 1; x >= start; x--) { if (dst[x] != bg) { dst[x] = limit; break; } } } } }
4,409
FFmpeg
e5540b3fd30367ce3cc33b2f34a04b660dbc4b38
0
static int advanced_decode_picture_header(VC9Context *v) { static const int type_table[4] = { P_TYPE, B_TYPE, I_TYPE, BI_TYPE }; int type, i, ret; if (v->interlace) { v->fcm = get_bits(&v->gb, 1); if (v->fcm) v->fcm = 2+get_bits(&v->gb, 1); } type = get_prefix(&v->gb, 0, 4); if (type > 4 || type < 0) return FRAME_SKIPED; v->pict_type = type_table[type]; av_log(v->avctx, AV_LOG_INFO, "AP Frame Type: %i\n", v->pict_type); if (v->tfcntrflag) v->tfcntr = get_bits(&v->gb, 8); if (v->broadcast) { if (!v->interlace) v->rptfrm = get_bits(&v->gb, 2); else { v->tff = get_bits(&v->gb, 1); v->rff = get_bits(&v->gb, 1); } } if (v->panscanflag) { #if 0 for (i=0; i<v->numpanscanwin; i++) { v->topleftx[i] = get_bits(&v->gb, 16); v->toplefty[i] = get_bits(&v->gb, 16); v->bottomrightx[i] = get_bits(&v->gb, 16); v->bottomrighty[i] = get_bits(&v->gb, 16); } #else skip_bits(&v->gb, 16*4*v->numpanscanwin); #endif } v->rndctrl = get_bits(&v->gb, 1); v->uvsamp = get_bits(&v->gb, 1); if (v->finterpflag == 1) v->interpfrm = get_bits(&v->gb, 1); switch(v->pict_type) { case I_TYPE: if (decode_i_picture_header(v) < 0) return -1; case P_TYPE: if (decode_p_picture_header(v) < 0) return -1; case BI_TYPE: case B_TYPE: if (decode_b_picture_header(v) < 0) return FRAME_SKIPED; default: break; } /* AC/DC Syntax */ v->transacfrm = get_bits(&v->gb, 1); if (v->transacfrm) v->transacfrm += get_bits(&v->gb, 1); if (v->pict_type == I_TYPE || v->pict_type == BI_TYPE) { v->transacfrm2 = get_bits(&v->gb, 1); if (v->transacfrm2) v->transacfrm2 += get_bits(&v->gb, 1); } v->transacdctab = get_bits(&v->gb, 1); if (v->pict_type == I_TYPE) vop_dquant_decoding(v); return 0; }
4,410
FFmpeg
b11edbd289e454a173914049ae4643a5498520d9
0
static void dss_sp_unpack_coeffs(DssSpContext *p, const uint8_t *src) { GetBitContext gb; DssSpFrame *fparam = &p->fparam; int i; int subframe_idx; uint32_t combined_pitch; uint32_t tmp; uint32_t pitch_lag; for (i = 0; i < DSS_SP_FRAME_SIZE; i += 2) { p->bits[i] = src[i + 1]; p->bits[i + 1] = src[i]; } init_get_bits(&gb, p->bits, DSS_SP_FRAME_SIZE * 8); for (i = 0; i < 2; i++) fparam->filter_idx[i] = get_bits(&gb, 5); for (; i < 8; i++) fparam->filter_idx[i] = get_bits(&gb, 4); for (; i < 14; i++) fparam->filter_idx[i] = get_bits(&gb, 3); for (subframe_idx = 0; subframe_idx < 4; subframe_idx++) { fparam->sf_adaptive_gain[subframe_idx] = get_bits(&gb, 5); fparam->sf[subframe_idx].combined_pulse_pos = get_bits_long(&gb, 31); fparam->sf[subframe_idx].gain = get_bits(&gb, 6); for (i = 0; i < 7; i++) fparam->sf[subframe_idx].pulse_val[i] = get_bits(&gb, 3); } for (subframe_idx = 0; subframe_idx < 4; subframe_idx++) { unsigned int C72_binomials[PULSE_MAX] = { 72, 2556, 59640, 1028790, 13991544, 156238908, 1473109704, 3379081753 }; unsigned int combined_pulse_pos = fparam->sf[subframe_idx].combined_pulse_pos; int index = 6; if (combined_pulse_pos < C72_binomials[PULSE_MAX - 1]) { if (p->pulse_dec_mode) { int pulse, pulse_idx; pulse = PULSE_MAX - 1; pulse_idx = 71; combined_pulse_pos = fparam->sf[subframe_idx].combined_pulse_pos; /* this part seems to be close to g723.1 gen_fcb_excitation() * RATE_6300 */ /* TODO: what is 7? size of subframe? */ for (i = 0; i < 7; i++) { for (; combined_pulse_pos < dss_sp_combinatorial_table[pulse][pulse_idx]; --pulse_idx) ; combined_pulse_pos -= dss_sp_combinatorial_table[pulse][pulse_idx]; pulse--; fparam->sf[subframe_idx].pulse_pos[i] = pulse_idx; } } } else { p->pulse_dec_mode = 0; /* why do we need this? */ fparam->sf[subframe_idx].pulse_pos[6] = 0; for (i = 71; i >= 0; i--) { if (C72_binomials[index] <= combined_pulse_pos) { combined_pulse_pos -= C72_binomials[index]; fparam->sf[subframe_idx].pulse_pos[6 - index] = i; if (!index) break; --index; } --C72_binomials[0]; if (index) { int a; for (a = 0; a < index; a++) C72_binomials[a + 1] -= C72_binomials[a]; } } } } combined_pitch = get_bits(&gb, 24); fparam->pitch_lag[0] = (combined_pitch % 151) + 36; combined_pitch /= 151; for (i = 1; i < SUBFRAMES; i++) { fparam->pitch_lag[i] = combined_pitch % 48; combined_pitch /= 48; } pitch_lag = fparam->pitch_lag[0]; for (i = 1; i < SUBFRAMES; i++) { if (pitch_lag > 162) { fparam->pitch_lag[i] += 162 - 23; } else { tmp = pitch_lag - 23; if (tmp < 36) tmp = 36; fparam->pitch_lag[i] += tmp; } pitch_lag = fparam->pitch_lag[i]; } }
4,412
FFmpeg
cdf58f0599c39852ee3beafe5f64af7d57d4215b
0
int av_packet_copy_props(AVPacket *dst, const AVPacket *src) { int i; dst->pts = src->pts; dst->dts = src->dts; dst->pos = src->pos; dst->duration = src->duration; dst->convergence_duration = src->convergence_duration; dst->flags = src->flags; dst->stream_index = src->stream_index; dst->side_data_elems = src->side_data_elems; for (i = 0; i < src->side_data_elems; i++) { enum AVPacketSideDataType type = src->side_data[i].type; int size = src->side_data[i].size; uint8_t *src_data = src->side_data[i].data; uint8_t *dst_data = av_packet_new_side_data(dst, type, size); if (!dst_data) { av_packet_free_side_data(dst); return AVERROR(ENOMEM); } memcpy(dst_data, src_data, size); } return 0; }
4,413
qemu
12d4536f7d911b6d87a766ad7300482ea663cea2
1
void configure_icount(const char *option) { vmstate_register(NULL, 0, &vmstate_timers, &timers_state); if (!option) return; #ifdef CONFIG_IOTHREAD vm_clock->warp_timer = qemu_new_timer_ns(rt_clock, icount_warp_rt, NULL); #endif if (strcmp(option, "auto") != 0) { icount_time_shift = strtol(option, NULL, 0); use_icount = 1; return; } use_icount = 2; /* 125MIPS seems a reasonable initial guess at the guest speed. It will be corrected fairly quickly anyway. */ icount_time_shift = 3; /* Have both realtime and virtual time triggers for speed adjustment. The realtime trigger catches emulated time passing too slowly, the virtual time trigger catches emulated time passing too fast. Realtime triggers occur even when idle, so use them less frequently than VM triggers. */ icount_rt_timer = qemu_new_timer_ms(rt_clock, icount_adjust_rt, NULL); qemu_mod_timer(icount_rt_timer, qemu_get_clock_ms(rt_clock) + 1000); icount_vm_timer = qemu_new_timer_ns(vm_clock, icount_adjust_vm, NULL); qemu_mod_timer(icount_vm_timer, qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10); }
4,415
qemu
7f763a5d994bbddb50705d2e50decdf52937521f
1
static int spapr_set_associativity(void *fdt, sPAPREnvironment *spapr) { int ret = 0, offset; CPUPPCState *env; char cpu_model[32]; int smt = kvmppc_smt_threads(); assert(spapr->cpu_model); for (env = first_cpu; env != NULL; env = env->next_cpu) { uint32_t associativity[] = {cpu_to_be32(0x5), cpu_to_be32(0x0), cpu_to_be32(0x0), cpu_to_be32(0x0), cpu_to_be32(env->numa_node), cpu_to_be32(env->cpu_index)}; if ((env->cpu_index % smt) != 0) { continue; } snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model, env->cpu_index); offset = fdt_path_offset(fdt, cpu_model); if (offset < 0) { return offset; } ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity, sizeof(associativity)); if (ret < 0) { return ret; } } return ret; }
4,416
qemu
771b6ed37e3aa188a7485560b949a41c6cf174dc
1
static void virtio_net_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) { VirtIONet *n = VIRTIO_NET(vdev); struct virtio_net_ctrl_hdr ctrl; virtio_net_ctrl_ack status = VIRTIO_NET_ERR; VirtQueueElement elem; size_t s; struct iovec *iov; unsigned int iov_cnt; while (virtqueue_pop(vq, &elem)) { if (iov_size(elem.in_sg, elem.in_num) < sizeof(status) || iov_size(elem.out_sg, elem.out_num) < sizeof(ctrl)) { error_report("virtio-net ctrl missing headers"); exit(1); } iov = elem.out_sg; iov_cnt = elem.out_num; s = iov_to_buf(iov, iov_cnt, 0, &ctrl, sizeof(ctrl)); iov_discard_front(&iov, &iov_cnt, sizeof(ctrl)); if (s != sizeof(ctrl)) { status = VIRTIO_NET_ERR; } else if (ctrl.class == VIRTIO_NET_CTRL_RX) { status = virtio_net_handle_rx_mode(n, ctrl.cmd, iov, iov_cnt); } else if (ctrl.class == VIRTIO_NET_CTRL_MAC) { status = virtio_net_handle_mac(n, ctrl.cmd, iov, iov_cnt); } else if (ctrl.class == VIRTIO_NET_CTRL_VLAN) { status = virtio_net_handle_vlan_table(n, ctrl.cmd, iov, iov_cnt); } else if (ctrl.class == VIRTIO_NET_CTRL_ANNOUNCE) { status = virtio_net_handle_announce(n, ctrl.cmd, iov, iov_cnt); } else if (ctrl.class == VIRTIO_NET_CTRL_MQ) { status = virtio_net_handle_mq(n, ctrl.cmd, iov, iov_cnt); } else if (ctrl.class == VIRTIO_NET_CTRL_GUEST_OFFLOADS) { status = virtio_net_handle_offloads(n, ctrl.cmd, iov, iov_cnt); } s = iov_from_buf(elem.in_sg, elem.in_num, 0, &status, sizeof(status)); assert(s == sizeof(status)); virtqueue_push(vq, &elem, sizeof(status)); virtio_notify(vdev, vq); } }
4,417
qemu
2828a307232ffceeddec9feb6a87ac660b68b693
1
static void *oss_audio_init (void) { OSSConf *conf = g_malloc(sizeof(OSSConf)); *conf = glob_conf; if (access(conf->devpath_in, R_OK | W_OK) < 0 || access(conf->devpath_out, R_OK | W_OK) < 0) { return NULL; } return conf; }
4,418
FFmpeg
d6af26c55c1ea30f85a7d9edbc373f53be1743ee
1
static inline int get_len(LZOContext *c, int x, int mask) { int cnt = x & mask; if (!cnt) { while (!(x = get_byte(c))) cnt += 255; cnt += mask + x; } return cnt; }
4,419
qemu
c9c3c80af71dd2b7813d1ada9b14cb51df584221
1
static void rtas_write_pci_config(sPAPREnvironment *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { uint32_t val, size, addr; PCIDevice *dev = find_dev(spapr, 0, rtas_ld(args, 0)); if (!dev) { rtas_st(rets, 0, -1); return; } val = rtas_ld(args, 2); size = rtas_ld(args, 1); addr = rtas_pci_cfgaddr(rtas_ld(args, 0)); pci_default_write_config(dev, addr, val, size); rtas_st(rets, 0, 0); }
4,420
qemu
97f3ad35517e0d02c0149637d1bb10713c52b057
1
QEMUFile *qemu_fopen(const char *filename, const char *mode) { QEMUFileStdio *s; if (qemu_file_mode_is_not_valid(mode)) { return NULL; } s = g_malloc0(sizeof(QEMUFileStdio)); s->stdio_file = fopen(filename, mode); if (!s->stdio_file) { goto fail; } if (mode[0] == 'w') { s->file = qemu_fopen_ops(s, &stdio_file_write_ops); } else { s->file = qemu_fopen_ops(s, &stdio_file_read_ops); } return s->file; fail: g_free(s); return NULL; }
4,422