input
stringlengths 144
489k
| output
stringlengths 45
339k
| shard
stringclasses 16
values | filename
stringlengths 135
135
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int64 0
2.62k
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|---|---|---|---|---|---|
{"name": "tcg_gen_op1i", "code": "unsigned __int64 __fastcall tcg_gen_op1i ( __int16 @@a1@@ , __int64 @@a2@@ ) { _WORD * v2 ; _QWORD * v3 ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; v2 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v2 = @@a1@@ ; v3 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v3 = @@a2@@ ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 6 | []
|
{"name": "tcg_gen_op2_i32", "code": "unsigned __int64 __fastcall tcg_gen_op2_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 7 | []
|
{"name": "tcg_gen_op2_i64", "code": "unsigned __int64 __fastcall tcg_gen_op2_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 8 | []
|
{"name": "tcg_gen_op2i_i32", "code": "unsigned __int64 __fastcall tcg_gen_op2i_i32 ( __int16 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r16"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 9 | []
|
{"name": "tcg_gen_op2i_i64", "code": "unsigned __int64 __fastcall tcg_gen_op2i_i64 ( __int16 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r16"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 10 | []
|
{"name": "tcg_gen_op3_i32", "code": "unsigned __int64 __fastcall tcg_gen_op3_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r24"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 11 | []
|
{"name": "tcg_gen_op3_i64", "code": "unsigned __int64 __fastcall tcg_gen_op3_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "arg3", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r24"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 12 | []
|
{"name": "tcg_gen_op3i_i64", "code": "unsigned __int64 __fastcall tcg_gen_op3i_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "arg3", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r24"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 13 | []
|
{"name": "tcg_gen_ldst_op_i32", "code": "unsigned __int64 __fastcall tcg_gen_ldst_op_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "base", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "offset", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r24"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "val", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 14 | [
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_ldst_op_i64", "code": "unsigned __int64 __fastcall tcg_gen_ldst_op_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "base", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "offset", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r24"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "val", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 15 | [
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_qemu_ldst_op_i64_i64", "code": "unsigned __int64 __fastcall tcg_gen_qemu_ldst_op_i64_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "addr", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "mem_index", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r24"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "val", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 16 | []
|
{"name": "tcg_gen_op4i_i64", "code": "unsigned __int64 __fastcall tcg_gen_op4i_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , __int64 @@a5@@ ) { _WORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; _QWORD * v8 ; _QWORD * v9 ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; v5 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v5 = @@a1@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a2@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a3@@ ; v8 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v8 = @@a4@@ ; v9 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v9 = @@a5@@ ; return __readfsqword ( Number ) ^ @@v11@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "arg3", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r24"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "arg4", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r72"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 17 | []
|
{"name": "tcg_gen_op4ii_i32", "code": "unsigned __int64 __fastcall tcg_gen_op4ii_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { _WORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; _QWORD * v8 ; _QWORD * v9 ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; v5 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v5 = @@a1@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a2@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a3@@ ; v8 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v8 = @@a4@@ ; v9 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v9 = @@a5@@ ; return __readfsqword ( Number ) ^ @@v11@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "arg3", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r24"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "arg4", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r72"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 18 | []
|
{"name": "tcg_gen_op4ii_i64", "code": "unsigned __int64 __fastcall tcg_gen_op4ii_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { _WORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; _QWORD * v8 ; _QWORD * v9 ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; v5 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v5 = @@a1@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a2@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a3@@ ; v8 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v8 = @@a4@@ ; v9 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v9 = @@a5@@ ; return __readfsqword ( Number ) ^ @@v11@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "arg3", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r24"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "arg4", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r72"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 19 | []
|
{"name": "tcg_gen_op5_i64", "code": "unsigned __int64 __fastcall tcg_gen_op5_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { _WORD * v6 ; _QWORD * v7 ; _QWORD * v8 ; _QWORD * v9 ; _QWORD * v10 ; _QWORD * v11 ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; v6 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v6 = @@a1@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a2@@ ; v8 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v8 = @@a3@@ ; v9 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v9 = @@a4@@ ; v10 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v10 = @@a5@@ ; v11 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v11 = @@a6@@ ; return __readfsqword ( Number ) ^ @@v13@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "int", "s": 4}, "location": "r80"}, {"n": "v13", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "arg3", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r24"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r72"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r80"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 20 | []
|
{"name": "gen_set_label", "code": "unsigned __int64 __fastcall gen_set_label ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "n", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 21 | [
"{\"name\": \"tcg_gen_op1i\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op1i ( __int16 @@a1@@ , __int64 @@a2@@ ) { _WORD * v2 ; _QWORD * v3 ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; v2 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v2 = @@a1@@ ; v3 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v3 = @@a2@@ ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_br", "code": "unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "label", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 22 | [
"{\"name\": \"tcg_gen_op1i\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op1i ( __int16 @@a1@@ , __int64 @@a2@@ ) { _WORD * v2 ; _QWORD * v3 ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; v2 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v2 = @@a1@@ ; v3 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v3 = @@a2@@ ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_mov_i32", "code": "unsigned __int64 __fastcall tcg_gen_mov_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 23 | [
"{\"name\": \"tcg_gen_op2_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op2_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_movi_i32", "code": "unsigned __int64 __fastcall tcg_gen_movi_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 24 | [
"{\"name\": \"tcg_gen_op2i_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op2i_i32 ( __int16 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_helperN", "code": "unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r80"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "sizemask", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r24"}, {"n": "func", "t": {"T": 3, "t": "void"}, "location": "r56"}, {"n": "flags", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "nargs", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "args", "t": {"T": 3, "t": "TCGArg"}, "location": "r80"}, {"n": "fn", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 25 | []
|
{"name": "tcg_gen_ld_i32", "code": "unsigned __int64 __fastcall tcg_gen_ld_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 26 | [
"{\"name\": \"tcg_gen_ldst_op_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ldst_op_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_st16_i32", "code": "unsigned __int64 __fastcall tcg_gen_st16_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 27 | [
"{\"name\": \"tcg_gen_ldst_op_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ldst_op_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_st_i32", "code": "unsigned __int64 __fastcall tcg_gen_st_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 28 | [
"{\"name\": \"tcg_gen_ldst_op_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ldst_op_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_sub_i32", "code": "unsigned __int64 __fastcall tcg_gen_sub_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 29 | [
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_subi_i32", "code": "unsigned __int64 __fastcall tcg_gen_subi_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_sub_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 30 | [
"{\"name\": \"tcg_gen_mov_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_sub_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_sub_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_and_i32", "code": "unsigned __int64 __fastcall tcg_gen_and_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 31 | [
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_mov_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_andi_i32", "code": "unsigned __int64 __fastcall tcg_gen_andi_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a3@@ == Number ) { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } else { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_and_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } } else { tcg_gen_movi_i32 ( @@a1@@ , Number ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 32 | [
"{\"name\": \"tcg_gen_mov_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_and_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_and_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_or_i32", "code": "unsigned __int64 __fastcall tcg_gen_or_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 33 | [
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_mov_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_xor_i32", "code": "unsigned __int64 __fastcall tcg_gen_xor_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_movi_i32 ( @@a1@@ , Number ) ; else tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 34 | [
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_xori_i32", "code": "unsigned __int64 __fastcall tcg_gen_xori_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_xor_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 35 | [
"{\"name\": \"tcg_gen_mov_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_xor_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_xor_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_movi_i32 ( @@a1@@ , Number ) ; else tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_shl_i32", "code": "unsigned __int64 __fastcall tcg_gen_shl_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 36 | [
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_shli_i32", "code": "unsigned __int64 __fastcall tcg_gen_shli_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_shl_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 37 | [
"{\"name\": \"tcg_gen_mov_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shl_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shl_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_shr_i32", "code": "unsigned __int64 __fastcall tcg_gen_shr_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 38 | [
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_shri_i32", "code": "unsigned __int64 __fastcall tcg_gen_shri_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_shr_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 39 | [
"{\"name\": \"tcg_gen_mov_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shr_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shr_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_brcond_i32", "code": "unsigned __int64 __fastcall tcg_gen_brcond_i32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_op4ii_i32 ( Number , @@a2@@ , @@a3@@ , @@a1@@ , @@a4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "label_index", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "cond", "t": {"T": 1, "n": "TCGCond", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 40 | [
"{\"name\": \"tcg_gen_op4ii_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op4ii_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { _WORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; _QWORD * v8 ; _QWORD * v9 ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; v5 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v5 = @@a1@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a2@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a3@@ ; v8 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v8 = @@a4@@ ; v9 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v9 = @@a5@@ ; return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_brcondi_i32", "code": "unsigned __int64 __fastcall tcg_gen_brcondi_i32 ( unsigned int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_brcond_i32 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r16"}, {"n": "label_index", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "cond", "t": {"T": 1, "n": "TCGCond", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 41 | [
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcond_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcond_i32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_op4ii_i32 ( Number , @@a2@@ , @@a3@@ , @@a1@@ , @@a4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_mul_i32", "code": "unsigned __int64 __fastcall tcg_gen_mul_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 42 | [
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_muli_i32", "code": "unsigned __int64 __fastcall tcg_gen_muli_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_mul_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 43 | [
"{\"name\": \"tcg_gen_mul_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mul_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_mov_i64", "code": "unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 44 | [
"{\"name\": \"tcg_gen_op2_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op2_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_movi_i64", "code": "unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 45 | [
"{\"name\": \"tcg_gen_op2i_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op2i_i64 ( __int16 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_ld_i64", "code": "unsigned __int64 __fastcall tcg_gen_ld_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 46 | [
"{\"name\": \"tcg_gen_ldst_op_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ldst_op_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_st_i64", "code": "unsigned __int64 __fastcall tcg_gen_st_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 47 | [
"{\"name\": \"tcg_gen_ldst_op_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ldst_op_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_ld\", \"code\": \"unsigned __int64 __fastcall gen_ld ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , int @@a4@@ , int @@a5@@ , __int16 @@a6@@ ) { __int64 v6 ; __int64 v7 ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned __int64 @@v19@@ ; @@v19@@ = __readfsqword ( Number ) ; if ( @@a4@@ || ( * ( _DWORD * ) ( @@a1@@ + Number ) & Number ) == Number ) { @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a2@@ , @@v13@@ , @@a5@@ , @@a6@@ ) ; if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v6 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v6 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lld ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_ll ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lwu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v15@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v15@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lhu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lbu ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; v7 = pc_relative_pc ( @@a2@@ ) ; tcg_gen_movi_i64 ( @@v14@@ , v7 ) ; gen_op_addr_add ( @@a2@@ , @@v13@@ , @@v13@@ , @@v14@@ ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lw ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v16@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_lwl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v16@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lh ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; op_ld_lb ( @@v13@@ , @@v13@@ , @@a2@@ ) ; gen_store_gpr ( @@v13@@ , @@a4@@ ) ; } else if ( @@a3@@ <= Number ) { if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v18@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldl ( @@v14@@ , @@v14@@ , @@v13@@ , @@v18@@ ) ; tcg_temp_free_i32 ( @@v18@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } else if ( @@a3@@ == Number ) { save_cpu_state ( @@a2@@ , Number ) ; gen_load_gpr ( @@v14@@ , @@a4@@ ) ; @@v17@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a2@@ + Number ) ) ; gen_helper_ldr ( @@v14@@ , @@v14@@ , @@v13@@ , @@v17@@ ) ; tcg_temp_free_i32 ( @@v17@@ ) ; gen_store_gpr ( @@v14@@ , @@a4@@ ) ; } } } } } } } } } } } } } } tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } return __readfsqword ( Number ) ^ @@v19@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r80\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_st\", \"code\": \"unsigned __int64 __fastcall gen_st ( __int64 @@a1@@ , unsigned int @@a2@@ , int @@a3@@ , int @@a4@@ , __int16 @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned __int64 @@v15@@ ; @@v15@@ = __readfsqword ( Number ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; gen_base_offset_addr ( @@a1@@ , @@v9@@ , @@a4@@ , @@a5@@ ) ; gen_load_gpr ( @@v10@@ , @@a3@@ ) ; if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sd ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v11@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swr ( @@v10@@ , @@v9@@ , @@v11@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v12@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdr ( @@v10@@ , @@v9@@ , @@v12@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v13@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_sdl ( @@v10@@ , @@v9@@ , @@v13@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sw ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; @@v14@@ = tcg_const_i32 ( * ( unsigned int * ) ( @@a1@@ + Number ) ) ; gen_helper_swl ( @@v10@@ , @@v9@@ , @@v14@@ ) ; tcg_temp_free_i32 ( @@v14@@ ) ; } else if ( @@a2@@ <= Number ) { if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sb ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } else if ( @@a2@@ == Number ) { save_cpu_state ( @@a1@@ , Number ) ; op_st_sh ( @@v10@@ , @@v9@@ , @@a1@@ ) ; } } } } } } } tcg_temp_free_i64 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; return __readfsqword ( Number ) ^ @@v15@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r72\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_add_i64", "code": "unsigned __int64 __fastcall tcg_gen_add_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 48 | [
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_sub_i64", "code": "unsigned __int64 __fastcall tcg_gen_sub_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 49 | [
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_and_i64", "code": "unsigned __int64 __fastcall tcg_gen_and_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 50 | [
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_andi_i64", "code": "unsigned __int64 __fastcall tcg_gen_andi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_and_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 51 | [
"{\"name\": \"tcg_gen_and_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_and_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_or_i64", "code": "unsigned __int64 __fastcall tcg_gen_or_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 52 | [
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_ori_i64", "code": "unsigned __int64 __fastcall tcg_gen_ori_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_or_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 53 | [
"{\"name\": \"tcg_gen_or_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_or_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_xor_i64", "code": "unsigned __int64 __fastcall tcg_gen_xor_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 54 | [
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_xori_i64", "code": "unsigned __int64 __fastcall tcg_gen_xori_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_xor_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 55 | [
"{\"name\": \"tcg_gen_xor_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_xor_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_movi_i64 ( @@a1@@ , Number L ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_shl_i64", "code": "unsigned __int64 __fastcall tcg_gen_shl_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 56 | [
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_shli_i64", "code": "unsigned __int64 __fastcall tcg_gen_shli_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shl_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 57 | [
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shl_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shl_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_shr_i64", "code": "unsigned __int64 __fastcall tcg_gen_shr_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 58 | [
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_shri_i64", "code": "unsigned __int64 __fastcall tcg_gen_shri_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shr_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 59 | [
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shr_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shr_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_sar_i64", "code": "unsigned __int64 __fastcall tcg_gen_sar_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 60 | [
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_sari_i64", "code": "unsigned __int64 __fastcall tcg_gen_sari_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_sar_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 61 | [
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_sar_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_sar_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_brcond_i64", "code": "unsigned __int64 __fastcall tcg_gen_brcond_i64 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_op4ii_i64 ( Number , @@a2@@ , @@a3@@ , @@a1@@ , @@a4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "label_index", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "cond", "t": {"T": 1, "n": "TCGCond", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 62 | [
"{\"name\": \"tcg_gen_op4ii_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op4ii_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { _WORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; _QWORD * v8 ; _QWORD * v9 ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; v5 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v5 = @@a1@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a2@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a3@@ ; v8 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v8 = @@a4@@ ; v9 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v9 = @@a5@@ ; return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_setcond_i64", "code": "unsigned __int64 __fastcall tcg_gen_setcond_i64 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_op4i_i64 ( Number , @@a2@@ , @@a3@@ , @@a4@@ , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r24"}, {"n": "cond", "t": {"T": 1, "n": "TCGCond", "s": 4}, "location": "r56"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 63 | [
"{\"name\": \"tcg_gen_op4i_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op4i_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , __int64 @@a5@@ ) { _WORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; _QWORD * v8 ; _QWORD * v9 ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; v5 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v5 = @@a1@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a2@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a3@@ ; v8 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v8 = @@a4@@ ; v9 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v9 = @@a5@@ ; return __readfsqword ( Number ) ^ @@v11@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r72\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_mul_i64", "code": "unsigned __int64 __fastcall tcg_gen_mul_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 64 | [
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_div_i64", "code": "unsigned __int64 __fastcall tcg_gen_div_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_sari_i64 ( @@v5@@ , @@a2@@ , Number L ) ; tcg_gen_op5_i64 ( Number , @@a1@@ , @@v5@@ , @@a2@@ , @@v5@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 65 | [
"{\"name\": \"tcg_gen_op5_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op5_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { _WORD * v6 ; _QWORD * v7 ; _QWORD * v8 ; _QWORD * v9 ; _QWORD * v10 ; _QWORD * v11 ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; v6 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v6 = @@a1@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a2@@ ; v8 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v8 = @@a3@@ ; v9 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v9 = @@a4@@ ; v10 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v10 = @@a5@@ ; v11 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v11 = @@a6@@ ; return __readfsqword ( Number ) ^ @@v13@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_sari_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_sari_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_sar_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_rem_i64", "code": "unsigned __int64 __fastcall tcg_gen_rem_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_sari_i64 ( @@v5@@ , @@a2@@ , Number L ) ; tcg_gen_op5_i64 ( Number , @@v5@@ , @@a1@@ , @@a2@@ , @@v5@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 66 | [
"{\"name\": \"tcg_gen_op5_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op5_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { _WORD * v6 ; _QWORD * v7 ; _QWORD * v8 ; _QWORD * v9 ; _QWORD * v10 ; _QWORD * v11 ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; v6 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v6 = @@a1@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a2@@ ; v8 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v8 = @@a3@@ ; v9 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v9 = @@a4@@ ; v10 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v10 = @@a5@@ ; v11 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v11 = @@a6@@ ; return __readfsqword ( Number ) ^ @@v13@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_sari_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_sari_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_sar_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_divu_i64", "code": "unsigned __int64 __fastcall tcg_gen_divu_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_movi_i64 ( @@v5@@ , Number L ) ; tcg_gen_op5_i64 ( Number , @@a1@@ , @@v5@@ , @@a2@@ , @@v5@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 67 | [
"{\"name\": \"tcg_gen_op5_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op5_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { _WORD * v6 ; _QWORD * v7 ; _QWORD * v8 ; _QWORD * v9 ; _QWORD * v10 ; _QWORD * v11 ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; v6 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v6 = @@a1@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a2@@ ; v8 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v8 = @@a3@@ ; v9 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v9 = @@a4@@ ; v10 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v10 = @@a5@@ ; v11 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v11 = @@a6@@ ; return __readfsqword ( Number ) ^ @@v13@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_remu_i64", "code": "unsigned __int64 __fastcall tcg_gen_remu_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_movi_i64 ( @@v5@@ , Number L ) ; tcg_gen_op5_i64 ( Number , @@v5@@ , @@a1@@ , @@a2@@ , @@v5@@ , @@a3@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 68 | [
"{\"name\": \"tcg_gen_op5_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op5_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ , int @@a6@@ ) { _WORD * v6 ; _QWORD * v7 ; _QWORD * v8 ; _QWORD * v9 ; _QWORD * v10 ; _QWORD * v11 ; unsigned __int64 @@v13@@ ; @@v13@@ = __readfsqword ( Number ) ; v6 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v6 = @@a1@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a2@@ ; v8 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v8 = @@a3@@ ; v9 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v9 = @@a4@@ ; v10 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v10 = @@a5@@ ; v11 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v11 = @@a6@@ ; return __readfsqword ( Number ) ^ @@v13@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r80\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_movi_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_movi_i64 ( int @@a1@@ , __int64 @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_addi_i64", "code": "unsigned __int64 __fastcall tcg_gen_addi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_add_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 69 | [
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_add_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_add_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_subi_i64", "code": "unsigned __int64 __fastcall tcg_gen_subi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_sub_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 70 | [
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_sub_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_sub_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_brcondi_i64", "code": "unsigned __int64 __fastcall tcg_gen_brcondi_i64 ( unsigned int @@a1@@ , int @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_brcond_i64 ( @@a1@@ , @@a2@@ , @@v6@@ , @@a4@@ ) ; tcg_temp_free_i64 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r16"}, {"n": "label_index", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "cond", "t": {"T": 1, "n": "TCGCond", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 71 | [
"{\"name\": \"tcg_gen_br\", \"code\": \"unsigned __int64 __fastcall tcg_gen_br ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_brcond_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_brcond_i64 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_op4ii_i64 ( Number , @@a2@@ , @@a3@@ , @@a1@@ , @@a4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_setcondi_i64", "code": "unsigned __int64 __fastcall tcg_gen_setcondi_i64 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { unsigned int @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = tcg_const_i64 ( @@a4@@ ) ; tcg_gen_setcond_i64 ( @@a1@@ , @@a2@@ , @@a3@@ , @@v6@@ ) ; tcg_temp_free_i64 ( @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "arg2", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r24"}, {"n": "cond", "t": {"T": 1, "n": "TCGCond", "s": 4}, "location": "r56"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 72 | [
"{\"name\": \"tcg_gen_setcond_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_setcond_i64 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; tcg_gen_op4i_i64 ( Number , @@a2@@ , @@a3@@ , @@a4@@ , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_ext8s_i64", "code": "unsigned __int64 __fastcall tcg_gen_ext8s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 73 | [
"{\"name\": \"tcg_gen_op2_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op2_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_ext16s_i64", "code": "unsigned __int64 __fastcall tcg_gen_ext16s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 74 | [
"{\"name\": \"tcg_gen_op2_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op2_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_ext32s_i64", "code": "unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 75 | [
"{\"name\": \"tcg_gen_op2_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op2_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_ext8u_i64", "code": "unsigned __int64 __fastcall tcg_gen_ext8u_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 76 | [
"{\"name\": \"tcg_gen_op2_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op2_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_ext16u_i64", "code": "unsigned __int64 __fastcall tcg_gen_ext16u_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 77 | [
"{\"name\": \"tcg_gen_op2_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op2_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_ext32u_i64", "code": "unsigned __int64 __fastcall tcg_gen_ext32u_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 78 | [
"{\"name\": \"tcg_gen_op2_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op2_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_trunc_i64_i32", "code": "unsigned __int64 __fastcall tcg_gen_trunc_i64_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 79 | [
"{\"name\": \"tcg_gen_mov_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_extu_i32_i64", "code": "unsigned __int64 __fastcall tcg_gen_extu_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32u_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 80 | [
"{\"name\": \"tcg_gen_ext32u_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32u_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_ext_i32_i64", "code": "unsigned __int64 __fastcall tcg_gen_ext_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32s_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 81 | [
"{\"name\": \"tcg_gen_ext32s_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32s_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_neg_i64", "code": "unsigned __int64 __fastcall tcg_gen_neg_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 82 | [
"{\"name\": \"tcg_gen_op2_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op2_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_not_i32", "code": "unsigned __int64 __fastcall tcg_gen_not_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 83 | [
"{\"name\": \"tcg_gen_op2_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op2_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_not_i64", "code": "unsigned __int64 __fastcall tcg_gen_not_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 84 | [
"{\"name\": \"tcg_gen_op2_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op2_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ ) { _WORD * v3 ; _QWORD * v4 ; _QWORD * v5 ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v3 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v3 = @@a1@@ ; v4 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v4 = @@a2@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a3@@ ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_concat_i32_i64", "code": "unsigned __int64 __fastcall tcg_gen_concat_i32_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_extu_i32_i64 ( @@v5@@ , @@a3@@ ) ; tcg_gen_shli_i64 ( @@v5@@ , @@v5@@ , Number L ) ; tcg_gen_extu_i32_i64 ( @@a1@@ , @@a2@@ ) ; tcg_gen_or_i64 ( @@a1@@ , @@a1@@ , @@v5@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "high", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "dest", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "low", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 85 | [
"{\"name\": \"tcg_gen_or_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_or_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shli_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shli_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shl_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_extu_i32_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_extu_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32u_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_concat32_i64", "code": "unsigned __int64 __fastcall tcg_gen_concat32_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_ext32u_i64 ( @@a1@@ , @@a2@@ ) ; tcg_gen_shli_i64 ( @@v5@@ , @@a3@@ , Number L ) ; tcg_gen_or_i64 ( @@a1@@ , @@a1@@ , @@v5@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "high", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "dest", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "low", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "tmp", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 86 | [
"{\"name\": \"tcg_gen_or_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_or_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_shli_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_shli_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shl_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_ext32u_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_ext32u_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_andc_i64", "code": "unsigned __int64 __fastcall tcg_gen_andc_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_not_i64 ( @@v5@@ , @@a3@@ ) ; tcg_gen_and_i64 ( @@a1@@ , @@a2@@ , @@v5@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 87 | [
"{\"name\": \"tcg_gen_and_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_and_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_not_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_not_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_nor_i32", "code": "unsigned __int64 __fastcall tcg_gen_nor_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_or_i32 ( @@a1@@ , @@a2@@ , @@a3@@ ) ; tcg_gen_not_i32 ( @@a1@@ , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 88 | [
"{\"name\": \"tcg_gen_or_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_or_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_not_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_not_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_nor_i64", "code": "unsigned __int64 __fastcall tcg_gen_nor_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_or_i64 ( @@a1@@ , @@a2@@ , @@a3@@ ) ; tcg_gen_not_i64 ( @@a1@@ , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 89 | [
"{\"name\": \"tcg_gen_or_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_or_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a2@@ == @@a3@@ ) tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; else tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_not_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_not_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_rotl_i32", "code": "unsigned __int64 __fastcall tcg_gen_rotl_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 90 | [
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_rotl_i64", "code": "unsigned __int64 __fastcall tcg_gen_rotl_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 91 | [
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_rotli_i32", "code": "unsigned __int64 __fastcall tcg_gen_rotli_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_rotl_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 92 | [
"{\"name\": \"tcg_gen_mov_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_rotl_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_rotl_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_rotli_i64", "code": "unsigned __int64 __fastcall tcg_gen_rotli_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_rotl_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "t0", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 93 | [
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_rotl_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_rotl_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_rotr_i32", "code": "unsigned __int64 __fastcall tcg_gen_rotr_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 94 | [
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_rotr_i64", "code": "unsigned __int64 __fastcall tcg_gen_rotr_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 95 | [
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_rotri_i32", "code": "unsigned __int64 __fastcall tcg_gen_rotri_i32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) tcg_gen_rotli_i32 ( @@a1@@ , @@a2@@ , Number - @@a3@@ ) ; else tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 96 | [
"{\"name\": \"tcg_gen_mov_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_rotli_i32\", \"code\": \"unsigned __int64 __fastcall tcg_gen_rotli_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_rotl_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_rotri_i64", "code": "unsigned __int64 __fastcall tcg_gen_rotri_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) tcg_gen_rotli_i64 ( @@a1@@ , @@a2@@ , Number - @@a3@@ ) ; else tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "arg2", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 97 | [
"{\"name\": \"tcg_gen_mov_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_mov_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ != @@a2@@ ) tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_rotli_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_rotli_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_rotl_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_debug_insn_start", "code": "unsigned __int64 __fastcall tcg_gen_debug_insn_start ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "pc", "t": {"T": 1, "n": "uint64_t", "s": 8}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 98 | [
"{\"name\": \"tcg_gen_op1i\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op1i ( __int16 @@a1@@ , __int64 @@a2@@ ) { _WORD * v2 ; _QWORD * v3 ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; v2 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v2 = @@a1@@ ; v3 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v3 = @@a2@@ ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_exit_tb", "code": "unsigned __int64 __fastcall tcg_gen_exit_tb ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "val", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 99 | [
"{\"name\": \"tcg_gen_op1i\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op1i ( __int16 @@a1@@ , __int64 @@a2@@ ) { _WORD * v2 ; _QWORD * v3 ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; v2 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v2 = @@a1@@ ; v3 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v3 = @@a2@@ ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_goto_tb", "code": "unsigned __int64 __fastcall tcg_gen_goto_tb ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_op1i ( Number , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "idx", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 100 | [
"{\"name\": \"tcg_gen_op1i\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op1i ( __int16 @@a1@@ , __int64 @@a2@@ ) { _WORD * v2 ; _QWORD * v3 ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; v2 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v2 = @@a1@@ ; v3 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v3 = @@a2@@ ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_goto_tb\", \"code\": \"unsigned __int64 __fastcall gen_goto_tb ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v5@@ ; _QWORD * @@v6@@ ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ = * ( _QWORD * * ) @@a1@@ ; if ( ( ( @@a3@@ ^ * * ( _QWORD * * ) @@a1@@ ) & Number ) != Number || * ( _DWORD * ) ( @@a1@@ + Number ) ) { gen_save_pc ( @@a3@@ ) ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { save_cpu_state ( @@a1@@ , Number ) ; @@v5@@ = tcg_const_i32 ( Number L ) ; gen_helper_raise_exception ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; } tcg_gen_exit_tb ( Number L ) ; } else { tcg_gen_goto_tb ( @@a2@@ ) ; gen_save_pc ( @@a3@@ ) ; tcg_gen_exit_tb ( ( __int64 ) @@v6@@ + @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 3, \"t\": \"_QWORD\"}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_qemu_ld8u", "code": "unsigned __int64 __fastcall tcg_gen_qemu_ld8u ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "mem_index", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "addr", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 101 | [
"{\"name\": \"tcg_gen_op3i_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3i_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_qemu_ld8s", "code": "unsigned __int64 __fastcall tcg_gen_qemu_ld8s ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "mem_index", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "addr", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 102 | [
"{\"name\": \"tcg_gen_op3i_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3i_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_qemu_ld16u", "code": "unsigned __int64 __fastcall tcg_gen_qemu_ld16u ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "mem_index", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "addr", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 103 | [
"{\"name\": \"tcg_gen_op3i_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3i_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_qemu_ld16s", "code": "unsigned __int64 __fastcall tcg_gen_qemu_ld16s ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "mem_index", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "addr", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 104 | [
"{\"name\": \"tcg_gen_op3i_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3i_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
{"name": "tcg_gen_qemu_ld32u", "code": "unsigned __int64 __fastcall tcg_gen_qemu_ld32u ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3i_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} | [{"n": "mem_index", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r56"}, {"n": "addr", "t": {"T": 1, "n": "TCGv_i64", "s": 4}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "s8"}] | data1/train-shard-10.tar | 18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89_18c831165ef47a13bce3ddb51ccdce8af7852c91017b17504c630da206c5fd89.jsonl | 105 | [
"{\"name\": \"tcg_gen_op3i_i64\", \"code\": \"unsigned __int64 __fastcall tcg_gen_op3i_i64 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
]
|
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