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data2/text/range/0-5000/1000341.txt

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+Ticket Name: TDA2SX: TDA2SXBTQABCRQ1
+
+Query Text:
+Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 1. How many watchdog timers in TDA2SXBTQABCRQ1 and where? 2. The MPU has its own watchdog timer that is different from watchdog timer in the PRCM? 3.IPU and DSP use the watchdog in the PRCM? If so, how to distinguish the error output by watchdog? 4. The following picture is from TDA2 technical reference manual chapter 18.4.6. When T is not within threshold low to threshold high, the output alert maybe do not be asserted to 1, like the blue arrow in the picture. Why? thank you!
+
+Responses:
+1. 2 watchdog timers. 1x system watchdog and 1x MPU watchdog timer. 2. yes. 3. One watchdog timer can only be used by either IPU or DSP. You can also use GP Timer as watchdog timer. 4. Alert (Temp too high) is generated first when the temp goes above the high threshold and the next alert (Temp is safe) is generated only when the temp goes below the low threshold. In between this two events is where you have to do thermal management to lower the temp to avoid thermal shutdown.
+

data2/text/range/0-5000/1000797.txt

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+Ticket Name: TDA2HV: TI support of QEMU for TDA2 APP
+
+Query Text:
+Part Number: TDA2HV Other Parts Discussed in Thread: TDA2 Hi there, 1. Does QEMU support TDA2 APP? I have been searching for some time but in QEMU says that if the TDA2 machine is not listed than is very unlikely to be supported. 2. Is there any emulator support to test app without a board? I need it for testing. The board can be damaged by a quick test. 3. Can I convert my Application Image back to ELF? In my opinion, it is converted to ELF -> Application Image(RPRC) using the following command. ``` out2rprc.exe <App_In_name(elf or coff)> <App_out_name> ``` Please let me know if it supported. Any guidance would be appreciated. Regards,
+
+Responses:
+Hi, 1. No. We don't have QEMU support on TDA2. 2. No. We don't have emulator for TDA2. 3. No. We don't have utility to covert AppImage back to multiple Elf files. Regards, Stanley
+

data2/text/range/0-5000/1001310.txt

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+Ticket Name: TDA2EVM5777: How to use I2C high speed mode?
+
+Query Text:
+Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi expert, We have a requirement to use I2C5 to communicate between TDA2 SOC and MCU. I checked the Source code and found the I2C API path. Would this API support high speed mode and is easy to apply on the vision sdk? If it is not applicable, is there any other sample code? C:\PROCESSOR_SDK_VISION_03_05_00_00\ti_components\drivers\pdk_01_10_01_06\packages\ti\drv\stw_lld\i2clld\src\lld_hsi2c.c
+
+Responses:
+Hi, The supported i2c bus speed is 100Khz and 400Khz for this I2C driver. It doesn't support HS mode. We don't have example i2c driver for HS mode. However, the I2C hardware on TDA2 is capable of running HS mode. Regards, Stanley
+

data2/text/range/0-5000/1001510.txt

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+Ticket Name: TDA2HV: CLANG and LLVM build support
+
+Query Text:
+Part Number: TDA2HV Other Parts Discussed in Thread: TDA2 Hello Does the tda processor support "clang" builds? If applying, where should I edit it?
+
+Responses:
+Hi, Not supported and no plans to add it for TDA2. Note : There is a plan to add support for TDA4 devices in next release Regards Vineet
+

data2/text/range/0-5000/1001590.txt

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+Ticket Name: TDA2PXEVM: Problems with the TIDL library import tool
+
+Query Text:
+Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hello, I am trying to use TIDL library on TDA2PX EVM to run DNNs on EVE and DSP cores. I am using TensorFlow as a framework. I am following the user guide with the title " TI Deep learning Library on TDAx " - November 2019. The user guide states that " TIDL supports slim based tensorflow models ". Does TIDL library supports only slim based TensorFlow models ? Does it mean that I can not import models trained in TensorFlow, not TensorFlow slim? I have tried to import MobileNet V2 from TensorFlow Keras applications using the TIDL library, but I get error mesages saying that "Pad Layer is not supported by TIDL and cannot be merged into any TIDL layer". Moreover, I need to know where I can find the file "optimize_for_inference.py". Thanks, Ahmed Anwar
+
+Responses:
+Hi Ahmed, >> Does it mean that I can not import models trained in TensorFlow, not TensorFlow slim? Yes, TIDL on TDA2 can import only TensorFlow slim models. On TDA4 we support TensorFlow models also. >> but I get error mesages saying that "Pad Layer is not supported by TIDL and cannot be merged into any TIDL layer" This is because of Pad layer is not supported, refer to datasheet for all the supported layers >> I need to know where I can find the file "optimize_for_inference.py" This is available in "tensorflow/python/tools" folder Thanks, Praveen
+
+Hello Praveen, Thank you for your reply. I have a question regarding the TensorFlow slim models. In the user guide, there is an example of a Keras/TensorFlow model which can be found here. This example uses Keras from TensorFlow, not TensorFlow slim, to build a simple CNN, which can be used as an input to the TIDL import tool. Does this mean that I can use Keras from TensorFlow, not TensorFlow slim, to build a CNN and use it as an input to the TIDL import tool ? I just need to understand this point better, as most of my development is already in Keras/TensorFlow, and the example that I mentioned also uses Keras/TensorFlow. However, based on your reply, "TIDL on TDA2 can import only TensorFlow slim models". Would you please illustrate how this example uses Keras/TensorFlow if only TensorFlow slim models are supported on TDA2 ? Thanks, Ahmed Anwar
+
+Yes, We have limited layers support for Tesnsoflow in TDA2, where as most of the layers are supported with Caffe/Tensorflow slim models. Please refer to below comment in the user guide section 3.6.5. " We have developed/defined TIDL library layers based on the layer types Caffe framework. Most of our test cases (Layer level and network level) and demos are based caffe framework. With respect to Tensorflow, we have validated two pre-trained models from tensorflow github (Slim based Mobilenet V1 and Googlenet/inceptionetV1), this covers most of the CNN layers (Convolution, Max Pooling , Average pooling, Batch norm, Fully connected layer, softmax, Relu, Relu6, concate etc). " Thanks, Praveen
+

data2/text/range/0-5000/1002851.txt

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+Ticket Name: TDA2E: Counting an external signal edge
+
+Query Text:
+Part Number: TDA2E Other Parts Discussed in Thread: MMWCAS-DSP-EVM Hello. I need to count the rise or falling edges of an external clock signal which frequency is up to 300 kHz using the TDA2xx on the MMWCAS-DSP-EVM board (I just use the Ethernet peripheral so I can unmount lot of components if necessary). As you can imagine using an interrupt approach is not reliable at such high frequency, so, I intend to use a counter module that directly writes into a register the number of time the specific edge arrives. I took a look into "Timers" chapter inside TRM document (SPRUI29G) but it seams there is no way to increment the counter register using an external source. Could somebody provide me some guide? Which other module can I use to reach my goal? Thanks in advice, Pablo.
+
+Responses:
+Hi, You can refer to TRM Ch 28 PWM which has eCAP to capture input signal. However, you have to check if EVM has exposed any pin which is routed to eCAP. https://software-dl.ti.com/processor-sdk-linux/esd/docs/06_03_00_106/linux/Foundational_Components/Kernel/Kernel_Drivers/Display/PWM.html Regards, Stanley
+

data2/text/range/0-5000/1004827.txt

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+Ticket Name: TDA4VM: Linux OS memory size
+
+Query Text:
+Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hello Jacinto team, My customer is considering TDA4 for its Automotive Vision application, and they are asking me about the size that Linux OS takes on theTDA4 SoC: from previous experience with TDA2, they know Linux took ~1Gb of Flash memory. Do you know what is the memory requirement for Linux OS on TDA4 ? Best regards, Antoine
+
+Responses:
+Hi Antoine, This is the output of free command on our latest 7.3 Linux SDK. So ~1 GB with Linux. ~3GB is free out of total 4GB DDR on board. If no other questions please click verify answer. Best Regards, Keerthy
+

data2/text/range/0-5000/1005296.txt

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+Ticket Name: TDA2SX: how to use Image pyramid algorithm link in vision sdk for tda2
+
+Query Text:
+Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 I want to use Image pyramid algorithm link in vision sdk for tda2, this algorithm link is supported on M4, but the comment for this algorithm link in algorithmLink.h says: "Image pyramid algorithm link. Only valid for TDA3x" typedef enum { ALGORITHM_LINK_IPU_ALG_DMA_SWMS = 0, /**< Alg to DMA based SW Mosaic */ ALGORITHM_LINK_IPU_ALG_OBJECT_DRAW = 1, /**< Alg to draw rectangles on the image (Needed by PD) */ ALGORITHM_LINK_IPU_ALG_ISS_AEWB = 2, /**< AEWB for ISS running on IPU1-0. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_ISS_AEWB1 = 3, /**< AEWB for ISS running on IPU1-0. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_HW_CRC = 4, /**< CRC for checking Frame Freeze Detect on IPU1-0. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_IMG_PYRAMID = 5, /**< Image pyramid algorithm link. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_SCENE_OBSTRUCTION_DETECT = 6, /** < Alg to perform SCENE obstruction detection */ ALGORITHM_LINK_IPU_ALG_DEWARP = 7, /**< Plugin to that supports DeWarpping of images, depends on SIMCOP/TDA3x*/ ALGORITHM_LINK_IPU_ALG_RADAR_PROCESS = 8, /**< Alg to perform radar processing */ ALGORITHM_LINK_IPU_ALG_RVC_DIAGNOSTIC = 9, /**< Plugin to support Robust RVC diagnostics register only for TDA2xx */ ALGORITHM_LINK_IPU_ALG_OPENVX = 10, /**< Pluging to support OpenVX */ ALGORITHM_LINK_IPU_ALG_TIDLPREPROC = 11, /**< Alg to do TIDL Pre Process */ ALGORITHM_LINK_IPU_ALG_VPE_SWMS = 12, /**< Alg to VPE based SW Mosaic */ ALGORITHM_LINK_IPU_ALG_ISS_AEWB2 = 13, /**< AEWB for ISS running on IPU1-0 in SRV demo. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_OPENVX_TIDL = 14, /**< Pluging to support OpenVX TIDL */ ALGORITHM_LINK_IPU_ALG_MAXNUM = 15, /**< Should be the last value of this enumeration. * Will be used by Link/driver for validating the input parameters. */ ALGORITHM_LINK_IPU_ALG_FORCE32BITS = 0x7FFFFFFF /**< This should be the last value after the max enumeration value. * This is to make sure enum size defaults to 32 bits always regardless * of compiler. */ } AlgorithmLink_IpuAlgorithmId; I don't know why this link is not valid for tda2x. If I want to use this LINK for tda2x , how to do ? thanks
+
+Responses:
+This is duplicate of below thread, so closing this thread. https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1005297/tda2sx-how-to-use-image-pyramid-algorithm-link-in-vision-sdk-for-tda2 Regards, Brijesh
+

data2/text/range/0-5000/1005297.txt

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+Ticket Name: TDA2SX: how to use Image pyramid algorithm link in vision sdk for tda2
+
+Query Text:
+Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 I want to use Image pyramid algorithm link in vision sdk for tda2, this algorithm link is supported on M4, but the comment for this algorithm link in algorithmLink.h says: "Image pyramid algorithm link. Only valid for TDA3x" typedef enum { ALGORITHM_LINK_IPU_ALG_DMA_SWMS = 0, /**< Alg to DMA based SW Mosaic */ ALGORITHM_LINK_IPU_ALG_OBJECT_DRAW = 1, /**< Alg to draw rectangles on the image (Needed by PD) */ ALGORITHM_LINK_IPU_ALG_ISS_AEWB = 2, /**< AEWB for ISS running on IPU1-0. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_ISS_AEWB1 = 3, /**< AEWB for ISS running on IPU1-0. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_HW_CRC = 4, /**< CRC for checking Frame Freeze Detect on IPU1-0. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_IMG_PYRAMID = 5, /**< Image pyramid algorithm link. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_SCENE_OBSTRUCTION_DETECT = 6, /** < Alg to perform SCENE obstruction detection */ ALGORITHM_LINK_IPU_ALG_DEWARP = 7, /**< Plugin to that supports DeWarpping of images, depends on SIMCOP/TDA3x*/ ALGORITHM_LINK_IPU_ALG_RADAR_PROCESS = 8, /**< Alg to perform radar processing */ ALGORITHM_LINK_IPU_ALG_RVC_DIAGNOSTIC = 9, /**< Plugin to support Robust RVC diagnostics register only for TDA2xx */ ALGORITHM_LINK_IPU_ALG_OPENVX = 10, /**< Pluging to support OpenVX */ ALGORITHM_LINK_IPU_ALG_TIDLPREPROC = 11, /**< Alg to do TIDL Pre Process */ ALGORITHM_LINK_IPU_ALG_VPE_SWMS = 12, /**< Alg to VPE based SW Mosaic */ ALGORITHM_LINK_IPU_ALG_ISS_AEWB2 = 13, /**< AEWB for ISS running on IPU1-0 in SRV demo. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_OPENVX_TIDL = 14, /**< Pluging to support OpenVX TIDL */ ALGORITHM_LINK_IPU_ALG_MAXNUM = 15, /**< Should be the last value of this enumeration. * Will be used by Link/driver for validating the input parameters. */ ALGORITHM_LINK_IPU_ALG_FORCE32BITS = 0x7FFFFFFF /**< This should be the last value after the max enumeration value. * This is to make sure enum size defaults to 32 bits always regardless * of compiler. */ } AlgorithmLink_IpuAlgorithmId; I don't know why this link is not valid for tda2x. If I want to use this LINK for tda2x , how to do ? thanks
+
+Responses:
+Hi, It was initially implemented using resizer, which is available on TDA3x. But could you please if it internally uses VPE driver? Then it can even be enabled on TDA2x. Regards, Brijesh
+

data2/text/range/0-5000/1006960.txt

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+Ticket Name: TDA2SG: TDA2 LCD2 BT656 signal
+
+Query Text:
+Part Number: TDA2SG Other Parts Discussed in Thread: TDA2 Hi Sir : TDA2 output BT.656 signal, when converted to BT.601 signal. Hsync will output all the time. If Vsync is low and Hsync is low, how do I set it?
+
+Responses:
+Hi, Do you mean, you dont want hsync to be toggling when vsync is low? If this is the case, you could treat DE signal as inverted hsync. DE will toggle only during active video portion. Regards, Brijesh
+
+Hi Brijesh : The hardware only has Hsync and Vsync and PCLK and ATA [7:0] pins, no DE output. The image had the output I wanted.
+
+Hi Pierre Hsieh, hsync will toggle during vsync, this cannot be changed. In this case, you need to use DE line. Regards, Brijesh
+
+Hi Brijesh : I cannot modify the BT656 configuration of TDA2 to output the desired signal?
+
+Hi Pierre Hsieh, Hsync is supposed to toggle even during vsync inactive period.. This behavior cannot be changed. Regards, Brijesh
+
+Hi Brijesh : BT.656 does not have a DE Line specification. How can I convert to BT.601 with DE Line?
+
+Hi Pierre Hsieh, BT656 does not even output hsync and vsync, so we cannot use hsync/vsync signals for BT656. We have to use discrete sync output mode in order to get sync signals. and when we enable discrete sync signals, we will also get DE signal. Regards, Brijesh
+
+Hi Brijesh : This TDA2 hardware configuration, Display Subsystem DPI2 output BT.656, only output Data and PCLK signal lines. Analyze Bt.656, there will still be H Active in V Blanking. TDA2 can output on BT.656, the V Blanking signal is only H Blanking?
+
+Hi Pierre Hsieh, When you say BT656, it is embedded sync output format, and in this format, DSS does not output sync signals, so there will not be any hsync or vsync signals in bt656 output. So can you check if you are configuring DSS for discrete sync output? Regards, Brijesh
+
+Hi Brijesh : BT.605 does not have Hsync and Vsync, so I converted it to BT601 using FPGA. I used FPGA to convert TDA2 output BT.656 signal into BT.601 signal. I found that VBlanking has a HActive signal for BT.601 signal.
+
+Hi Pierre Hsieh, ok, in this case, you need to change FPGA. FPGA should out hsync correctly. This is not DSS question. Regards, Brijesh
+

data2/text/range/0-5000/1008079.txt

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+Ticket Name: TDA2SG: How can output yuv422 format in the display
+
+Query Text:
+Part Number: TDA2SG Hi ,expert: My system has three overlay in the display,like this : 1,VID1: BGRA32_8888 2.VID2: YUV420SP 3.GFX: BGRA32_8888 general, TDA2s use the rgb888 output to display, and my system is work ok,Now I want to use the yuv422( YUYV) to the display, I see the "dssm2mwb" link ,I found this link may need "sync" link and then use buftype of "SYSTEM_BUFFER_TYPE_VIDEO_FRAME_CONTAINER". I have the question as follow: 1,sync need 3 overlay framerate is same,but my system is not satisfy and overlay has different display framesrate, so i think this solution may not very well . 2,Is There other solution to yuv422 display output thanks!
+
+Responses:
+Hi, do you mean yuv422 over embedded sync output interface? Rgds, Brijesh
+
+no, I mean if i use sync link ,if one of queue has no video ,sync will no send cmd to process ,so I think this solution is not suit. Now I want to checkout the problem: 1,VID1: BGRA32_8888 ->YUYV 2.VID2: YUV420SP 3.GFX: BGRA32_8888 ->YUYV overlay like this,the display can work? 2) Is there some usecase of yuv422 output I can refer
+
+hi, #1, in this case, you would require to change sync link to support this feature. Currently it is not supported. sync link does not output if one of the input is not available. #2, do you mean to use 3 video pipelines, each with different data type? yes, display will work with this combination #3, where yuv422 do you require? Is it at the output of capture link or input to the display link? Regards, Brijesh
+
+output in the dispaly link , if i dont want to use "sync",I will do as follow: change RGBA328888 to YUYV format and it will make 3 video pipeline dataformat to 1,VID1: YUYV 2.VID2: YUV420SP 3.GFX: YUYV is the display link support "YUYV" and "YUV420sp" format output.
+
+Yes, display link supports both of these formats. Rgds, Brijesh
+
+I use capture_dsswb link ,and set vout format BT656 and DISPC_VP1_CONTROL.TDMENABLE = 0x1: TDM enabled DISPC_VP1_CONTROL. TDMPARALLELMODE = 0x0: 8-bit parallel output interface selected DISPC_VP1_CONTROL. TDMCYCLEFORMAT = 0x2: 2 cycles for 1 pixel DISPC_DATA1_CYCLE1 = 0x8 DISPC_DATA1_CYCLE2 = 0x8 DISPC_DATA1_CYCLE3 = 0x0 but my capture_dsswb has no video data,so I think writeback pipeline do not well work. how can I use writeback?
+
+Hi, these two things are different and independent. could you help me with what exactly you are trying to enable? - are the three input video pipelines enabled? - why are you enabling TDM for BT656 output? - why are you enabling dss wb path? Regards, Brijesh
+

data2/text/range/0-5000/1011115.txt

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+Ticket Name: TDA4VM: TDA4 RTOS SDK network utilities
+
+Query Text:
+Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi, In TDA4 RTOS SDK, do we have something similar as the TDA2.TDA3's network_rx, network_tx tools ? I saw that we have some ETHFW demo involving Plex media server but I just need a simple client/server example app that is able to save a file on PC over ethernet. regards, Victor
+
+Responses:
+Hi Victor, No simple utility on RTOS of the kind you are looking for. Can you spell out your requirement : Do you want to stream a file from your EVM to your PC ? or do you want to use the CPSW 9G as a switch and connect multiple devices over it ? Regards Vineet
+
+Hi Vineet, I actually implemented the tool since it didn't exist on TDA4. The ticket can be closed. Thanks. regards, Victor
+

data2/text/range/0-5000/1012640.txt

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+Ticket Name: TDA2SX: TDA2SXBU PMIC Selection
+
+Query Text:
+Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi Expert, Could TDA2SXBU PMIC Select TPS659039-O9039A387? If TDA2SXBU PMIC could not select TPS659039-O9039A387,do you have any suggestions? Thanks Daniel
+
+Responses:
+Hi Daniel, Sorry for the delay. Is this issue still open ? Regards Vineet
+
+Hi Vineet Issue is still open. Could you help me? Thanks Daniel
+
+Hi Daniel, Will take a look at this internally and get back. Regards Vineet
+
+Vineet, We recommend the PMIC that is implemented on the TDA2 EVM. Regards, Kyle
+

data2/text/range/0-5000/1013160.txt

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+Ticket Name: TDA2SX: Tda2s SPI slave mode reception problem
+
+Query Text:
+Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hello, expert Tda2s is SPI slave mode. If the master sends a 1MHz clock and sends 140 bytes every 20ms, it will get stuck after receiving several times. If it sends 32 bytes every time, it will not get stuck. If it sends 32 bytes every 10ms, it will still receive several times of data and it will get stuck. dmesg1.txt   146 root      0:00 [kworker/0:1H]
+  148 root      0:00 cat /proc/kmsg
+  149 root      0:00 ps
+root@dra7xx-evm:/app# 
+root@dra7xx-evm:/app# 
+root@dra7xx-evm:/app# 
+root@dra7xx-evm:/app# 
+root@dra7xx-evm:/app# ./spi_rev_tool_32 -D  /dev/spidev1.0  -s 1000000 -b 8
+[   36.808325] spidev spi1.0: setup mode 0, 8 bits/w, 48000000 Hz max --> 0
+[   36.809212] spidev spi1.0: setup mode 0, 8 bits/w, 48000000 Hz max --> 0
+[   36.810092] spidev spi1.0: setup mode 0, 8 bits/w, 1000000 Hz max --> 0
+<7>[   36.808304] spidev spi1.0: setup: speed 48000000, sample leading edge, clk normal
+<4>[   36.808325] spidev spi1.0: setup mode 0, 8 bits/w, 48000000 Hz max --> 0
+<7>[   36.809182] spidev spi1.0: spi mode 0
+<7>[   36.809198] spidev spi1.0: setup: speed 48000000, sample leading edge, clk normal
+<4>[   36.809212] spidev spi1.0: setup mode 0, 8 bits/w, 48000000 Hz max --> 0
+<7>[   36.810065] spidev spi1.0: 8 bits per word
+<7>[   36.810079] spidev spi1.0: setup: speed 1000000, sample leading edge, clk normal
+<4>[   36.810092] spidev spi1.0: setup mode 0, 8 bits/w, 1000000 Hz max --> 0
+<7>[   36.810946] spidev spi1.0:   xfer len 32 rx tx 8bits 0 usec 1000000Hz
+<7>[   36.810973] spidev spi1.0: setup: speed 1000000, sample leading edge, clk normal
+RX | 4D 56 00 00 10 9A 00 00  | MV...?.
+RX | 01 01 00 00 00 00 00 00  | ........
+RX | 00 00 00 00 00 00 00 00  | ........
+RX | 00 00 00 00 00 00 00 00  | ........
+RX | 00 00 00 00 00 00 00 00  | ........
+RX | 00 00 00 00 00 00 00 00  | ........
+RX | 00 00 00 00 00 00 00 00  | ........
+RX | 00 00 00 00 00 00 00 00  | ........
+<7>[   36.826262] spidev spi1.0: setup: speed 48000000, sample leading edge, clk normal
+<7>[   36.826462] spidev spi1.0:   xfer len 32 rx tx 8bits 0 usec 1000000Hz
+<7>[   36.826487] spidev spi1.0: setup: speed 1000000, sample leading edge, clk normal
+<7>[   36.827021] spidev spi1.0: setup: speed 48000000, sample leading edge, clk normal
+<7>[   36.827126] spidev spi1.0:   xfer len 32 rx tx 8bits 0 usec 1000000Hz
+<7>[   36.827149] spidev spi1.0: setup: speed 1000000, sample leading edge, clk normal
+ I add printing when I can't receive hand data, it's stuck in SPI_ transfer_ one_ message()---->master-transfer_ one(). How to find the problem? The problem of the master side has been ruled out, and the measurement SPI CLK CS is normal.
+
+Responses:
+Hi, Our Linux SDK doesn't support SPI slave mode. It has not been validated on TDA2 EVM. Regards, Stanley
+

data2/text/range/0-5000/1013586.txt

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+Ticket Name: TDA2PXEVM: Installing ROS on TDA2PXEVM after building Yocto filesystem
+
+Query Text:
+Part Number: TDA2PXEVM Hello all, I have built Yocto filesystem on my TDA2Px using this guide: https://software-dl.ti.com/infotainment/esd/jacinto6/processor-sdk-linux-automotive/6_00_00_03/exports/wiki/Processor%20SDK%20Linux%20Automotive%20Software%20Developers%20Guide%20-%20Texas%20Instruments%20Wiki.pdf I want to know how can I add ROS layer and build Yocto again with ROS installed and have ROS running on my TDA2Px-EVM. Or in other word how can I customize a ROS layer or is there any guide for that? Thank you, Best Regards, Kirollos Henry
+
+Responses:
+Kirollos, It seems like you have made progress on the ROS image already: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1013431/tda2pxevm-roscore-run-error-on-my-tda2px-evm-due-to-python-version. There is no guide for integrating ROS with TDA2Px - most of our experiments with ROS were experimental and since both TI SDK and ROS were moving quite a bit we didn't snapshot a stable version and document the same. Lets continue discussion on the newer thread. Closing this one for now. Regards Karthik
+

data2/text/range/0-5000/1014661.txt

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+Ticket Name: TDA2SA: Is there a Code Composer Studio(CCS) project existing to build the "VISION SDK/project" on OS (Linux/or windows) Platform ?
+
+Query Text:
+Part Number: TDA2SA Other Parts Discussed in Thread: TDA2 Hi Expert, My platform is TDA2 I want to confirm again. Is there a Code Composer Studio(CCS) project existing to build the "VISION SDK/project" on OS (Linux/or windows) Platform ? Thanks Daniel
+
+Responses:
+Hi Expert Is there any update? Thanks Daniel
+
+Hi, No, we use commend line and makefile to build Vision SDK. CCS build takes longer time than command-line build/makefile build. Regards, Stanley
+

data2/text/range/0-5000/1015551.txt

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+Ticket Name: TDA2SX: pressure test script / software
+
+Query Text:
+Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi At present, we are preparing to do tda2sx ddr3l pressure test,Do you have tda2 ddr3l pressure test script / software? If there is no script, what should I do for stress testing?If we want to develop stress testing software, how to raise the corresponding software requirements? Please help me give some advice. Thank you!
+
+Responses:
+Hi, There is nothing provided outside of what may exist in the SDKs. What operating system does your application use? Thanks, Kevin
+

data2/text/range/0-5000/1015553.txt

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+Ticket Name: TDA2P-ACD: Custom calibration tool for 2D SRV
+
+Query Text:
+Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Hi all, I am trying to make a custom calibration tool for 2D surround view in Python with OpenCV that would match the existing one developed in Matlab. So far, I managed to implement the same workflow and to obtain the parameters of initial perspective metrices for 4 cameras with stitched bird view as shown in the image below. As can be seen, the bird view image is decent. However, when I provide the obtained perspective matrices (scaled to match Q11.20 format that I believe is used in GeometricAlignment and Sythesis algorithms), I get the result which is not even comparable to the one shown above, i.e., everything is distorted. This indicates that matrix parameters are wrong or incorrectly interpreted. To confirm that the perspective matrix coefficients are correct I used the same values in another framework (Octave) and I get nice bird view for each camera (I provide a view for front camera below). The question is what I am doing wrong and why I do not get (at least to some extent) correct bird view on the target? Best regards, Mladen
+
+Responses:
+Just an additional note. I also tried to use perspective matrix generated by the tool for provided sample images in both Python and Octave. All I got is also distorted indicating that the TI tool does not provide the matrix coefficients expected by OpenCV warpPerspective() and Octave imperspectivewarp().
+
+Did you compare bin files from your python with the bin files from TI tool?
+
+Hi Do-Kyoung Kwon, I am not sure what bin files are you referring to. Currently, I am trying to get initial perspective matrices that would be comparable with the one obtained from TI tool. So far I found out that OpenCV and Octave functions returns forward mapped homographies, however, the SV algorithm is based on back-mapping. Therefore, I tried to use inverse matrices, but it seems that it does not work either. Now I suspect it has something with translating the image center to 0 instead of (width/2, height/2).
+
+Oh.. I now realized that you are working on SRV on TDA2. I thought you are working on SRV on TDA4.
+
+Right. It is 2D surround view running on C66.
+
+I think image center could be a reason. There might be no issue with perspective matrices give that you got the right reconstruction for the upper part of SRV. But it seems hard to say without debugging.
+
+Actually, I got the right reconstruction on all 4 views as you can see in the first image (this is an output from Python tool). The issue arises when I provide the obtained matrices to the usecase (GeometricAlignment link) or to the Surroundview.exe tool for further perspective matrices tuning. It seems that those initial matrices are not in the form expected by the current implementation. I will also check for the image centers, but anyway, thank you for your time.
+
+Great to hear that you resolve the issue.
+
+No, the issue is still unresolved. I am chasing the way to adjust the perspective matrices to match the required format.
+
+I figured this out. Image centers are just one side of the coin. Input images relative to output view orientation should be considered as well. Obviously, a rule for feature points (corners selected in reference image and input images) correspondence I used in my custom tool is different from the one in the TI tool, so I had to add some rotations to the input images (and output results) to match them. It is very specific to my case, but it would be informative if you could share somewhere in the documentation how the corners selected in the tool on reference image corresponds to the corners selected on the input images for each camera view.
+
+Great! Thanks for the suggestion, too!
+

data2/text/range/0-5000/1015916.txt

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+Ticket Name: TDA4 capture output YUV420 format
+
+Query Text:
+Other Parts Discussed in Thread: TDA2 We use TDA4 and connect YUV422 camera. TDA2 can set capture input format YUV422 and capture output format YUV420. Can TDA4 set capture input format YUV422 and capture output format YUV420 ?
+
+Responses:
+Hi, No, VIP module in TDA2x can convert YUV422 to YUV420, but CSIRX cannot convert YUV422 to YUV420. You will require to use some other module like LDC or DSS for this conversion. Regards, Brijesh
+

data2/text/range/0-5000/1016368.txt

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+Ticket Name: TDA2HF: About import tool sampleInData
+
+Query Text:
+Part Number: TDA2HF Hello， I have two questions about import configuration parameters: (1).does sampleInData support video input or multiple images ? (2).if sampleInData support,how to set and how to prepare the video and images? and other question about caffe-jacinto quantize test: I test the imagenet_jacintonet11v2_iter_160000.caffemodel and set quantize: true in deploy.prototxt, save the output of pool5, and then remove quantize: true only,save the output of pool5 again, the results are same."quantize: true" doesn't seem to work.So if quantize: true does work,What happens to the output? Thanks, chen poca
+
+Responses:
+Hi Chen poca, 1. You can set "numSampleInData" variable in the import config file and set "numFrames" variable in the infer config file for running multiple images. 2. You can concatenate multiple images to prepare the multiple image input The test results with and without quantize are available here in "caffe_jacinto_models\trained\image_classification\imagenet_jacintonet11v2" folder in the github (https://github.com/tidsp/caffe-jacinto-models), please refer to "run.log" in "test_quantize" and "test" folders. Thanks, Praveen
+
+hello, thank you for your replying. my reason to setting numSampleInData variable >1 is for import process not for inference.if numSampleInData>1,can I set sampleInData to multiple images?
+
+Yes
+
+so how to set multiple image to the sample InData ？using the txt file to list image path？or concatenate multiple images to one .y file？
+
+Concatenate multiple images to one .y file
+
+Sorry for the late reply and thank you for your answer.I have another question,if using multiple images to the sampleInData,would this improve the effect and generalization ability of the quantization?
+
+No
+

data2/text/range/0-5000/1016451.txt

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+Ticket Name: TDA2PXEVM: Connect TDAPx-EVM to the internet
+
+Query Text:
+Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hello all, I have TDAPx-EVM board and I was able to build Yocto file system and boot the board using the built yocto file system. I want to connect it to the internet, after connecting it to an Ethernet cable there is still no internet connection, so I want to know is anything I have to configure or what should I do to have and internet connection on my TDAPx-EVM Thank You, Best regards, Kirollos Henry
+
+Responses:
+Hi, Could you share the log from boot to linux kernel and the log from "ifconfig"? Did you change Linux kernel default config used by TDA2 SDK? Ethernet should be enabled already from the default config. Regards, Stanley
+

data2/text/range/0-5000/1027878.txt

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+Ticket Name: TDA2HG: [Opengl] -- the cube usage in fbo
+
+Query Text:
+Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 hi: I have a question about the usage of cubemap in fbo; the simple code as bellow: { glGenFramebuffers(1, &fboID); glBindFramebuffer(GL_FRAMEBUFFER,fboID); glGenTextures(1, &cubemapID); glBindTexture(GL_TEXTURE_CUBE_MAP, cubemapID); for (unsigned int i = 0; i < 6; ++i) { glTexImage2D(GL_TEXTURE_CUBE_MAP_POSITIVE_X + i, 0, GL_RGB, 256, 256, 0, GL_RGB, GL_UNSIGNED_BYTE, nullptr); } glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_WRAP_S, GL_CLAMP_TO_EDGE); glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_WRAP_T, GL_CLAMP_TO_EDGE); glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_MIN_FILTER, GL_LINEAR); glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_MAG_FILTER, GL_LINEAR); glUniform.. //update the uniform variable glViewport(0, 0, 256, 256); for (unsigned int i = 0; i < 6; ++i) { glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0, GL_TEXTURE_CUBE_MAP_POSITIVE_X + i, cubemapID, 0); if (glCheckFramebufferStatus(GL_FRAMEBUFFER) != GL_FRAMEBUFFER_COMPLETE) { printf("glCheckFramebufferStatus error!\n"); } glClear(GL_COLOR_BUFFER_BIT | GL_DEPTH_BUFFER_BIT); renderCube(); } } when i test the code, it works well on windows, but when i move it to the tda2 platform, the question is comming, sometimes the effiect is black , or is white, or white and black , or other colors, it's change every time. how is this? and how to resolved it? thanks
+
+Responses:
+Hello, Can you try and see if this works:     // Setup texture for cubemap
+    glGenTextures(1, &textureCubeMap);
+    char buffer0[CUBEMAP_TEX_LEN * CUBEMAP_TEX_LEN * 6];
+
+    glBindTexture(GL_TEXTURE_CUBE_MAP, textureCubeMap);
+    memset((void *)buffer0, 0x50, CUBEMAP_TEX_LEN*CUBEMAP_TEX_LEN*6);
+    for(GLuint i = 0; i < 6; i++)
+    {
+            glTexImage2D(
+                            GL_TEXTURE_CUBE_MAP_POSITIVE_X + i,
+                            0, GL_RGBA8, CUBEMAP_TEX_LEN, CUBEMAP_TEX_LEN,
+                            0, GL_RGBA, GL_UNSIGNED_BYTE, (char *)buffer0
+                        );
+    }
+
+    glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_MAG_FILTER, GL_LINEAR);
+    glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
+    glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_WRAP_S, GL_CLAMP_TO_EDGE);
+    glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_WRAP_T, GL_CLAMP_TO_EDGE);
+    glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_WRAP_R, GL_CLAMP_TO_EDGE);
+
+    // Setup Framebuffer for cubemap
+    glGenFramebuffers(1, &fbCubeMap);
+    
+    
+    // Rendering part
+    GLint current_fbo;
+    glGetIntegerv(GL_FRAMEBUFFER_BINDING, &current_fbo);
+    glBindFramebuffer(GL_FRAMEBUFFER, fbCubeMap);
+    
+    // Render to cubemap
+    for (int i = 0; i < 6; i++)
+	{
+        glFramebufferTexture2D(GL_FRAMEBUFFER,
+		    GL_COLOR_ATTACHMENT0,
+		    GL_TEXTURE_CUBE_MAP_POSITIVE_X + i,
+		    textureCubeMap,
+		    0);
+	    glClear(GL_COLOR_BUFFER_BIT|GL_DEPTH_BUFFER_BIT);
+	    //.... draw/render to cube map surface
+	}
+	
+	// Bind the original frame buffer
+	glBindFramebuffer(GL_FRAMEBUFFER, current_fbo);
+	
+	// Use cubemap texture
+	glBindTexture(GL_TEXTURE_CUBE_MAP, textureCubeMap);
+
+    //... draw to the final framebuffer using cubemap
+    // In the shader code, use samplerCube to sample texture
+    // e.g:
+    // uniform samplerCube skybox;
+    // ...
+    // vec4 colorval = texture(skybox, direction);
+    
+
+    
+    
+	    
+
+
+
+    
+
+
+ If it still doesn't work, can you try and use glGetError to check for any errors? Regards Hemant
+

data2/text/range/0-5000/1028256.txt

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+Ticket Name: TDA2PXEVM: Is Reshape/Permute layer supported on TDA2X with CaffeImportTool?
+
+Query Text:
+Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hi ! When convert shufflenetv2 caffemodel to tidl bin/param using REL.TIDL.01.01.03.00, it failed. EEROR LOG: TIDL returned with error code : -1100, refer to interface header file for error code details Error at line: 1578 : in file .\.\src\tidl_tb.c, of function : test_ti_dl_ivison End of config list found ! But I check that reshape layer and permute layer work well in SSD model. So how can I make separate reshape layer and permute layer work ?
+
+Responses:
+Hi, Reshape, Permute layers are supported only in the context of SSD network. They are not supported as standalone layers. Thanks, Praveen
+
+Hi Praveen Thanks for you replay. So currently, channel shuffle can not work on TIDL(both tda2 / 4). These requirements will be supported in the futures?
+
+Hi, It can work on TDA4 TIDL but not in TDA2 TIDL, please note that both are different code bases and TDA4 can support much more netwroks and frame works compare to TIDL on TDA2 , please try with TIDL on TDA4 (https://www.ti.com/tool/download/PROCESSOR-SDK-RTOS-J721E/08.00.00.12). Thanks, Praveen
+

data2/text/range/0-5000/1028549.txt

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+Ticket Name: TDA2PXEVM: Is there a way to build yocto but not thud on TDA2Px-EVM to build python3 Tensorflow-lite
+
+Query Text:
+Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hello all, I Have TDA2Px-EVM board and I was able to build yocto file system on using this guide: http://software-dl.ti.com/processor-sdk-linux/esd/docs/06_00_00_07/linux/Overview_Building_the_SDK.html I was also able to customize the image as i have added some layers like meta-ros, meta-scipy and I was also able to create custom layer to install and build some libraries, packages and package groups. I was installing some python packages and the changes I made to the image allowed me to install most of the needed python3 packages using pip3. I am currently facing a problem in installing tensorflow or tensorflow-lite when I added meta-tensorflow-lite layer https://github.com/NobuoTsukamoto/meta-tensorflow-lite/ and appended to my image recipe IMAGE_INSTALL += " python3-tensorflow-lite " I have got "ERROR: Layer meta-tensorflow-lite is not compatible with the core layer which only supports these series: thud" So I am currently facing a problem as processor sdk 6.x are all based on thud and this distro is not supported in the tensorflow-lite meta layer and When I tried to build a different version of processor SDK there was a toolchain error "ERROR: Failed to parse external Linaro toolchain version from: gcc version 8.3.0 " as probably the other versions of processor SDK doesn't support "dra7xx-evm". My problem shortly is there any way to build yocto file system on TDA2Px-EVM based on another yocto distro rather than thud or is there a way to build and install python3 tensorflow or tensorflow-lite on TDA2Px-EVM using the built and working yocto with this version of processor SDK. Thanks in Advance. Best regards, Kirollos Henry
+
+Responses:
+Hi Kirollos, Apologies for the delay in the response to this. Kirollos Henry said: is there any way to build yocto file system on TDA2Px-EVM based on another yocto distro rather than thud The short answer is no, thud is the last release with a completely validated offering with DRA7/TDA2. You will have to take care of the migration at your end. Kirollos Henry said: is there a way to build and install python3 tensorflow or tensorflow-lite on TDA2Px-EVM using the built and working yocto with this version of processor SDK. I dont think anyone in TI has spent time on this problem, therefore we are unable to provide you with any further instructions. Regards Karthik
+

data2/text/range/0-5000/1030453.txt

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+Ticket Name: TDA2EG-17: Can a thread share works to dual core?
+
+Query Text:
+Part Number: TDA2EG-17 Hello this article: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/692229/linux-tda2-hao-can-i-use-2-a15 said that "You can think as a single A15 core with CPU clock/frequency doubled" for dual core. But this article: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/862271/tda2hg-why-the-a15-usage-just-50-can-not-up-to-90 said one thread can only run in one core. So it means multi-threads will be separated to dual core automatically, but one thread can't. Is it? Thanks. BR, Jeff
+
+Responses:
+Jeff, One thread can be scheduled only on one CPU. - Keerthy
+

data2/text/range/0-5000/1030791.txt

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+Ticket Name: TDA2SX: PROCESSOR_SDK_VISION_03_05 tidl_OD usecase layer limitations ?
+
+Query Text:
+Part Number: TDA2SX Hi I tried to use tidl_model_import.out to get bin file. I used stats_tool_out.bin and trace_dump_0_512x512.y file to check test image detection result. Test image showed model can detect object. test image detection result: But I ran on tdasx, it cannot detect any object. I suspect tdasx cannot run too many layers model. The number of layersGroupId are 157 and number of parameters are 3.5M. Do tdasx have any limitations about layers or parameters count? thanks yumei
+
+Responses:
+Hi Yumei, Below are the SSD limitations listed in the TIDL datasheet : – Only Caffe-Jacinto based SSD network is validated. – Reshape, Permute layers are supported only in the context of SSD network. – “share_location” has to be true – Tested with 4 and 5 heads. – SaveOutputParameter is ignored in TIDL inference. – code_type is only tested with CENTER_SIZE. Please try the suggestions mentioned in the below thread in OD use case to get the detections in the output : https://e2e.ti.com/support/processors-group/processors/f/processors-forum/689617/tda2-how-to-run-ssd-based-tidl-od-use-case-in-vision-sdk-with-pre-trained-model Thanks, Praveen
+
+Hi Praveen I confused about Tested with 4 and 5 heads. Did it mean about 4 and 5 anchor box result? Thanks, yumei
+
+Yes
+

data2/text/range/0-5000/1032151.txt

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+Ticket Name: TDA2PXEVM: How can I extract two CNN output tensors on TIDL (TDA2)
+
+Query Text:
+Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hi sir! My network have two (maybe more) output layers (CxHxW) : Cx56x56 & Cx28x28. How can I get two outputs from TDIL?
+
+Responses:
+Hi IIuo, Sorry for the delay. This is not supported in TIDL on TDA2. Thanks, Praveen
+
+Hi Praveen I proposed a method to solve this problem ： using Transpose Conv and Concat. Step 1. I add a Transposed Conv layer with 4x4 kernel, stride 2 to the small size layer (for upsampling : Cx28x28 -> Cx56x56) Step 2. I fill filter manually to make Transposed Conv layer working as insert 0 between original output elements [e11 e12 -> [ e11 0 e12 0 e21 e22] 0 0 0 0 e21 0 e22 0 0 0 0 0 ] Step 3. I use Concat layer to get my output tensor : 2Cx56x56 So I can simply add stride =1 / 2 to decode different output tensor. Those works have been tested on Caffe. Hope that can help others.
+
+Thanks for sharing.
+

data2/text/range/0-5000/1033681.txt

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+Ticket Name: CCSTUDIO: Using CCS scripting with Lauterbach debugger.
+
+Query Text:
+Part Number: CCSTUDIO Other Parts Discussed in Thread: TDA2 Hi, I have a TDA2XX-EVM on which i'm loading and running few binaries of different cores. Here i'm using Spectrum Digital XDS560V2 STM USB Emulator. Also i'm using scripts to launch ccxml, load and run binaries. But i need to use Lauterbach debugger instead of this spectrum digital debugger. But i could'nt find any example scripts with respect to Lauterbach debugger. Can anyone please tell me or send me a reference links that specifies the use of Lauterbach debugger for my TDA2XX regards, Likhith
+
+Responses:
+-0- Which TDA2 chip are you using? Does it have a single A15 or a dual-A15? I do have TRACE32 CMMs which are converted versions of GELs which I use. Typically these are shared via TI-CDDS. If you have access I could upload there. If you tell exactly which CPU you have I can see about uploading a subset here. -1- Lauterbach on their website (and in their release images) has simplified scripts which allow running code on TDA2 systems. It might be one of these is sufficient for whatever you are trying to run. https://www.lauterbach.com/scripts/hardware/arm~tda2x~vayu_evm/hardware-arm-tda2x-vayu_evm_20200205093516_all_files.zip https://www.lauterbach.com/scripts/hardware/arm~dra72x~j6_eco_evm/hardware-arm-dra72x-j6_eco_evm_20200205093452_all_files.zip https://www.lauterbach.com/scripts/hardware/arm~dra7xx/hardware-arm-dra7xx_20200205093452_all_files.zip Regards, Richard W.
+

data2/text/range/0-5000/1035356.txt

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+Ticket Name: TDA2EXEVM: TDA2 DSP2 XDC ASSERT
+
+Query Text:
+Part Number: TDA2EXEVM Other Parts Discussed in Thread: SYSBIOS We run our algorithm on DSP2. Sometimes DSP2 will have XDC Assert message and then DSP2 will crash. How can we solve it? Log: [DSP2 ] 11173.232111 s: ### XDC ASSERT - ERROR CALLBACK START ### [DSP2 ] 11173.232141 s: [DSP2 ] 11173.232202 s: assertion failure: A_badContext: bad calling context. See GateMutex API doc for details. [DSP2 ] 11173.232233 s: [DSP2 ] 11173.232233 s: ### XDC ASSERT - ERROR CALLBACK END ###
+
+Responses:
+Have any update?
+
+Hi, Please refer to BIOS API doc for GateMutex. Or, you can find the source under ~/bios_6_46_06_00/packages/ti/sysbios/gates/GateMutex.c. You are hitting the below error where GateMutex_enter() is called in HWI or SWI context. /*
+ *  ======== GateMutex_enter ========
+ *  Returns FIRST_ENTER when it gets the gate, returns NESTED_ENTER
+ *  on nested calls.
+ *
+ *  During startup, Task_self returns NULL.  So all calls to the 
+ *  GateMutex_enter look like it is a nested call, so nothing done.
+ *  Then the leave's will do nothing either. 
+ */
+IArg GateMutex_enter(GateMutex_Object *obj)
+{
+    Semaphore_Handle sem;
+
+    /* make sure we're not calling from Hwi or Swi context */
+    Assert_isTrue(((BIOS_getThreadType() == BIOS_ThreadType_Task) ||
+                   (BIOS_getThreadType() == BIOS_ThreadType_Main)),
+                   GateMutex_A_badContext);
+
+    if (obj->owner != Task_self()) {
+        sem = GateMutex_Instance_State_sem(obj);
+        Semaphore_pend(sem, BIOS_WAIT_FOREVER);
+
+        obj->owner = Task_self();
+
+        return (FIRST_ENTER);
+    }
+
+    return (NESTED_ENTER);
+} Regards, Stanley
+

data2/text/range/0-5000/1037669.txt

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+Ticket Name: TDA2HG: tda2 anti-aliasing
+
+Query Text:
+Part Number: TDA2HG hello: usecase: render a model, but the alias is obvious, so i need to use the anti-aliasing. when the egl chooseconfig, i add the EGL_SAMPLE_BUFFERS, 1 and EGL_SAMPLES,4 to the attribs, it works better, but not enough, so i change the EGL_SAMPLES, 8, the result is eglCreateContex failed! it seems doesn't support. do you have other methods? thanks ~
+
+Responses:
+Hello, That is correct. 8 is not supported. 4 is the max value for EGL_SAMPLES. Regards Hemant
+
+how about TDA4, the max value?
+
+Hello, TDA4VMid also supports upto 4 - but of course, you will need to keep overall performance in mind. Regards Hemant
+
+got it, thank you~
+

data2/text/range/0-5000/1038392.txt

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+Ticket Name: TDA2SX: Memory access error when EVE read address more than 512MB DDR
+
+Query Text:
+Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi expert, Customer used 512MB on TDA2 before while they increased DDR3 to 1GB recently. After modified EMIF and DMM configuration in gel file, we could access 0xB5000000 on DSP and ARM in CCS memory watch page. But on EVE, it reported error as below. Could you please suggest what we need to do to make EVE access correct? Thank you.
+
+Responses:
+Hi, You have to update the EVE MMU mapping in GEL file. The max page size per entry in EVE MMU is only 16MB. Regards, Stanley
+

data2/text/range/0-5000/1038804.txt

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+Ticket Name: TDA2EXEVM: How to use remote service on TDA2
+
+Query Text:
+Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 The customer would like to get serializer and deserializer‘s register information in usecase code, but that information is on another core, so he intends to use remote service to get the information which is on another core. The customer would like to know how to use remote service function on TDA2, and could you you please offer an example? Thanks. Best Regards, Cherry Zhou
+
+Responses:
+Hi, The latest update as follows: The customer also would like to have an example about how to use remote service function based on TDA2 SDK. Thanks again! Best Regards, Cherry Zhou
+
+Hi, May I know is there any update? Thanks! Best Regards, Cherry Zhou
+
+Hi Cherry, Could you give some details about the customer system? What OS is used on A15? Which core will have the SerDes driver? Which core does need to get the register info via remote calls? Regards, Stanley
+

data2/text/range/0-5000/1040319.txt

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+Ticket Name: TDA4VM: Does TDA4 ISP support RGB-IR sensor ?
+
+Query Text:
+Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 The TDA2/TDA3 vision SDK 3.8 has the demosaicing function implemented on c66x . Was wondering if the TDA4 ISP is flexible enough to avoid using the DSP for such pixel intensive task. regards, Victor
+
+Responses:
+Hi Victor, There are 2 kinds of RGB-Ir sensors 1. 2x2 CFA : This type is natively supported by TDA4 ISP. Any 2x2 CFA is supported. 2. 4x4 CFA : This requires a pre-processing step similar to what was done on TDA2P and TDA3. Regards, Mayank
+
+Thanks !
+

data2/text/range/0-5000/1041010.txt

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+Ticket Name: TDA2P-ABZ: Does this board support Deep learning accelaration (TIDL)?
+
+Query Text:
+Part Number: TDA2P-ABZ Other Parts Discussed in Thread: TDA2 I'm trying to figure out if our boards will get any speedup from going through the TIDL conversion, on one hand https://training.ti.com/overview-ti-deep-learning-tda2-and-tda3-adas-platforms this link this claim accleration, on the other hand in the TIDL userguide , https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/07_00_00_11/exports/docs/tidl_j7_01_02_00_09/ti_dl/docs/user_guide_html/md_tidl_overview.html, it lists only TD4 as deep learning accelerated. Can anyone shed some info?
+
+Responses:
+Hi Joseph, TDA2 and TDA3 are old generation boards which can do TIDL conversion, but on these boards there is no active TIDL development and limited support. TDA4 is our new generation more capable device with active TIDL development and also supports huge variety of DL networks with different frameworks. We would suggest to evaluate TDA4 for DL acceleration. Thanks, Praveen
+

data2/text/range/0-5000/1042093.txt

@@ -0,0 +1,10 @@
+Ticket Name: TDA2SX: NDK Change static IP configuration
+
+Query Text:
+Part Number: TDA2SX Hi, TI Experts! We use TDA2X custom board with PROCESSOR_SDK_RADAR_03_07_00_00 and set up IP configuration in PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\links_fw\src\rtos\bios_app_common\tda2xx\cfg\NDK_config.cfg Can we change static IP configuration in our application at runtime? Can you advice any examples? Best Regards, Dmitry
+
+Responses:
+Hi, Please refer to the below thread. https://e2e.ti.com/support/microcontrollers/msp-low-power-microcontrollers-group/msp430/f/msp-low-power-microcontroller-forum/681655/ccs-msp432e401y-how-does-the-udpecho-sample-code-configure-static-ip Regards, Stanley
+
+Thanks a lot!
+

data2/text/range/0-5000/1045963.txt

@@ -0,0 +1,20 @@
+Ticket Name: TDA4VM: porting hardware surround view interface to app_srv_camera demo display unexpect
+
+Query Text:
+Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 porting hardware surround view interface to app_srv_camera demo display unexpect Dear expert, I porting my surround view interface into app_srv_camera demo, add my init interface to tivxGlSrvCreate, which need 3 paramters (display, surface, context), replace render_renderFrame with my UpdataApp interface for doing surround view function, in my interface, there are create serval framebuffers use glGenFramebuffer, and when the app run, call glBindFramebuffer bind texture to each framebuffer, then glBindFramebuffer (GL_FRAMEBUFFER, 0) render all the contents to the window provided framebuffer, now on tda4vm linux sdk, because the surface is null, I don't know where the display content store and how to get it when do glBindFramebuffer (GL_FRAMEBUFFER, 0) . In tivxGlSrvProcess, I found appEglBindFramebuffer call glBindFramebuffer bind the display buffer , so I modify my UpdataApp interface , delete all glBindFramebuffer code line, after do that I can see one part of my materials dispaly on screen . my question: 1) if tda4vm can create surface for render, how to do it, I try to call eglCreatePbufferSurface to create it , but it failed 2) if can't create surface, how to modify my interface for dispaly all the materials or how to get the content buffer after render finish. sdk vision: 07_03_00_07 OS: Linux Thanks!
+
+Responses:
+Hello, In case of TI's TDA4 surround view implementation, the display is controlled using R5 and the OpenVX display node abstracts this out. Look at vision_apps/utils/opengl/src/a72/app_gl_egl_utils_linux.c. There is a function to create render surface/texture from a pre-allocated dmabuf - appEglWindowCreateIMG. This function basically takes a dmabuf fd and creates an EGL Image that can be rendered to. This is used as a frame buffer in appEglBindFrameBuffer (in the same file). You can follow the same procedure. What are you trying to do in your use case? Do you need to send your GPU rendered buffer to R5 display? You can also look at a simpler example - vision_apps/apps/basic_demos/app_linux_arm_opengl_mosaic Regards Hemant
+
+Thanks！ Yes， I need to send my GPU rendered buffer to R5 dispaly, but I don't know how to do it, I try to use glReadPixel read my gpu output to output_target_ptr, but it failed and return 0x506 error report. As you discribe I follow app_gl_egl_utils_linux.c , use the same procedure, in my own case which run on tda2 before, which need input 4 camera capture frames and load some other materials, then do surround view function and display the output render buffer.
+
+hi， expert As my described， my function interface have many materials and textures need scale/render to one surface, It's hard for me modify the process flow, so I want to create a surface with pbuffer which can pass to function interface or use a opengl interface like glReadPixel copy the output buffer to display buffer. This problem bothered me for a long time, I need you help. Thanks!
+
+Hello, glReadPixels should work - not sure why you are seeing that error. Can you please review all the arguments and make sure they are okay? But please know that glReadPixels may have a performance hit - but should certainly get you the required data. As I mentioned in my previous post, app_linux_arm_opengl_mosaic shows how to handle GPU to display. Regards Hemant
+
+Thanks for your reply! I am already reference the app_linux_arm_opengl_mosaic demo, I modified my program, replace the function code call glBindFramebuffer (GL_FRAMEBUFFER, 0) to glBindFramebuffer (GL_FRAMEBUFFER, disp_fb), then call glFramebufferTexture2D bind the texture need render to current framebuffer, but there are some errors arised， This is the log ### glCheckFramebufferStatus not completed! status 36054 GL: after eglSwapBuffers() glError (0x506) If I deleted glFramebufferTexture2D , no error log print out, but there is also no display. If I keep call glBindFramebuffer (GL_FRAMEBUFFER, 0) in my app, the glCheckFramebufferStatus also report error, is't means there is no default framebuffer ?
+
+hello: I did some test of that , when glBindFramebuffer(GL_FRAMEBUFFER, 0) glCheckFramebufferStatus return 0x8219 which GL_FRAMEBUFFER_UNDEFINED, so EGL_NO_SURFACE which means no default framebuffer, so I call glBindFramebuffer (GL_FRAMEBUFFER, fboid) and glFramebufferTexture2D , fixed some bugs of my app, glCheckFramebufferStatus return ok, and I can see some color output to my screen（but not correct）, I think this is because my default render flow not suitable the new draw flow。 I know on tda4vm QNX can create a surface with buffer, which can pass to my app, so there is't need modify the render flow. so my question is can I create a surface with a buffer on linux?
+
+resolved! please close it!
+

data2/text/range/0-5000/1046205.txt

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+Ticket Name: TDA2SX: How to change the DDR memory size on the tda2?
+
+Query Text:
+Part Number: TDA2SX Other Parts Discussed in Thread: TDA2, Two DDRs are used in our own tda2 board, each of which is 2GB, with a total of 4GB. It is found that the default memory node in DTS is 1GB. After changing it to 4GB, it is found that the kernel cannot be started. How can I use all 4GB of memory?
+
+Responses:
+Hi, Can you please let me know on how you confirmed on the total of 4GB? Do you have a custom board or you are using standard TI TDA2SX EVM? The max that can be supported can be upto 4GB but I believe on the TI Board it is 2GB DDR. Can you share the links on 4GB DDR? Best Regards, Keerthy
+

data2/text/range/0-5000/1046305.txt

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+Ticket Name: TDA2HF: Set DSS parameter failed when Display_Link was creating
+
+Query Text:
+Part Number: TDA2HF In PROCESSOR_SDK_VISION_03_08_00_00,i builded a chain: capture->vpe->display vpe params was set as below: 
+static Void chains_vipSingleCam_Enc_Dec_SgxDisplay_SetVPEPrms(
+VpeLink_CreateParams *pPrm,
+UInt32 numLvdsCh,
+UInt32 displayWidth,
+UInt32 displayHeight,
+UInt32 inputWidth,
+UInt32 inputHeight
+)
+{
+UInt16 chId;
+
+pPrm->enableOut[0] = TRUE;
+
+for(chId = 0; chId < numLvdsCh; chId++)
+{
+pPrm->chParams[chId].outParams[0].numBufsPerCh =
+VPE_LINK_NUM_BUFS_PER_CH_DEFAULT;
+
+pPrm->chParams[chId].outParams[0].width = displayWidth;
+pPrm->chParams[chId].outParams[0].height = displayHeight;
+pPrm->chParams[chId].outParams[0].dataFormat =SYSTEM_DF_RGB24_888 ;
+
+pPrm->chParams[chId].scCfg.bypass = FALSE;
+pPrm->chParams[chId].scCfg.nonLinear = FALSE;
+pPrm->chParams[chId].scCfg.stripSize = 0;
+
+pPrm->chParams[chId].scCropCfg.cropStartX = 32;
+pPrm->chParams[chId].scCropCfg.cropStartY = 24;
+pPrm->chParams[chId].scCropCfg.cropWidth = inputWidth-32;
+pPrm->chParams[chId].scCropCfg.cropHeight = inputHeight-24;
+}
+}
+ then i got assert as below: [HOST] [IPU1-0]     57.923595 s: CaptureLink_drvAllocAndQueueFrames:1553:FVID2_queue: captureVipHandle=0x9f11b880, frameList.numFrames=6, streamId=0
+ [HOST] [IPU1-0]     57.923961 s:  CAPTURE: Create Done !!!
+ [HOST] [IPU1-0]     57.924388 s:  VPE: Create in progress !!!
+ [HOST] [IPU1-0]     57.925242 s: wwlog:vpe set flag=82176,format=20
+ [HOST] [IPU1-0]     58.164765 s:  VPE: Loading Down-scaling Co-effs
+ [HOST] [IPU1-0]     58.164978 s:  VPE: Co-effs Loading ... DONE !!!
+ [HOST] [IPU1-0]     58.165222 s:  VPE: Create Done !!!
+ [HOST] [IPU1-0]     58.165649 s:  DISPLAY: Create in progress !!!
+ [HOST] [IPU1-0]     58.165954 s:    wwlog: repliEnalbe is false before set!!!!!
+ [HOST] [IPU1-0]     58.166046 s: wwlog: repliEnalbe set true
+ [HOST] [IPU1-0]     58.166107 s: wwlog: display get flag= 82176,format=20
+ [HOST] [IPU1-0]     58.166168 s: wwlog: display will create in SYSTEM_DF_RGB24_888!!!!!
+ [HOST] [IPU1-0]     58.166320 s: hal/src/vpshal_dssDispcVid.c @ Line 1023:
+ [HOST] [IPU1-0]     58.166412 s: Invalid Data format
+ [HOST] [IPU1-0]     58.166595 s: dispdrv/src/vpsdrv_displayCore.c @ Line 304:
+ [HOST] [IPU1-0]     58.166687 s: Set DSS parameter failed
+ [HOST] [IPU1-0]     58.166748 s:  Assertion @ Line: 474 in displayLink_drv.c: status==SYSTEM_LINK_STATUS_SOK : failed !!! But when i use capture->vpe->sgxFmcpy(A15)->display,display_link can run normal in SYSTEM_DF_BGRA16_4444 . I want to know why dispaly_link cant be creanted in SYSTEM_DF_RGB24_888,or how to make display_link run in SYSTEM_DF_RGB24_888 .
+
+Responses:
+Hi, I think DSS does not support RGB24_888 format, ie R in lower byte, followed by G, followed by B. DSS supports BGR24_888 format, So can you try changing it to system_df_BGR24_888 format? Regards, Brijesh
+
+Thanks for your reply. Dont know why ,but display does run normal with BGR24_888,
+
+Because it is only supported in the DSS. The other RGB packed format is not supported.
+

data2/text/range/0-5000/1046872.txt

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+Ticket Name: TDA2SX: TDA2XSBTQABCRQ1 Display output YUV422 hardware schematic review
+
+Query Text:
+Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Dear experts, Our customer want to output YUV422 but not sure whether this connection correct according to TDA2 TRM. Can you help review this?
+
+Responses:
+Hi Dong, It really depends on the output interface that they are going to use. If output interface is going to be BT656, then you could use 10bit output lines, ie D0 to D9 or 8bit output data lines D9 to D2. If output interface is going to be discrete sync (BT601, yuv22 discrete sync), then 8bit data would be on D7-D0 data lines.. Regards, Brijesh
+
+Hi Brijesh, Thanks for your reply. It's very helpful to me. They have another question is how to configure BT656 or BT601 output in the SDK code.
+
+Hi Dong, Unfortunately, EVM does not support BT656 or BT601 output interface, so SDK does not support or have any usease to demonstrate it. Regards, Brijesh
+

data2/text/range/0-5000/1048217.txt

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+Ticket Name: PROCESSOR-SDK-TDAX: "AR12XX: FAULT: BSS CPU fault!!" seen frequently, forcing user to reboot radar
+
+Query Text:
+Part Number: PROCESSOR-SDK-TDAX Other Parts Discussed in Thread: MMWCAS-DSP-EVM, MMWCAS-RF-EVM, AWR2243, AWR1243, TDA2 Hello, I have an MMWCAS-RF-EVM mounted on MMWCAS-DSP-EVM. I'm using PROCESSOR_SDK_RADAR_ 3.08 and often times I'm seeing this error on my terminal window. [IPU1-0] 1300.877569 s: radar_ar12xx/src/bspdrv_ar12xxPriv.c @ Line 541: [IPU1-0] 1300.877691 s: AR12XX: FAULT: BSS CPU fault!! [IPU1-0] 1300.877783 s: radar_ar12xx/src/bspdrv_ar12xxPriv.c @ Line 545: [IPU1-0] 1300.877844 s: AR12XX: FAULT: ESM fault!! [IPU1-0] 1301.117214 s: SyncLink: dropping frame due to time delta(-2084364888ms) too large [IPU1-0] 1301.117336 s: SyncLink: dropping frame due to time delta(-2084364888ms) too large [IPU1-0] 1301.117458 s: SyncLink: dropping frame due to time delta(-2084364888ms) too large [IPU1-0] 1301.150216 s: SyncLink: dropping frame due to time delta(-2084364888ms) too large [IPU1-0] 1301.150369 s: SyncLink: dropping frame due to time delta(-2084364888ms) too large [IPU1-0] 1301.150460 s: SyncLink: dropping frame due to time delta(-2084364888ms) too large I am forced to reboot the radar if I want to continue working with it. The hardware version reported by the serial terminal is ES3.0. I don't seem to have this problem happen this frequently in the ES1.0 hardware that I have. Please tell me how to isolate and fix this problem? Is there a firmware update I'm missing? Thanks Asher
+
+Responses:
+Hi, ES1.0 and ES2.0 have different version of radar firmware. During radar init, it should try to check the revision of radar and download the corresponding firmware. You can check the log to see if the ES version of radar was detected correctly. Regards, Stanley
+
+Hi Stanley, We have 2 Cascade RF boards where both boards have AWR2243 transceivers. However one board has hwMajor of 1 and the other has hwMajor 3. We believe these numbers represent ES1.0 and ES3.0. Since we have 2 AWR FW binary files for AWR1243 and AWR2243, Both cascade boards are downloaded with 2243 FW disregards whether one is an ES1.0 and the other is an ES3.0. That's how we modified the TDA2 bootup code to detect and behave. Please tell us if that assumption is correct. Now back to the BSS and ESM Faults above, we've seen this error showed up very often on the ES3.0 HW version vs the ES1.0 HW version even though both are running with same 2243 FW. So we are wondering if ES3.0 HW version has an updated FW for it to be used that fixes above errors seen? Thank you, --Khai
+
+Hi Khai, I have forwarded this question to our Radar team to comment. In Radar SDK, only AWR1243 ES1.0 and 2.0 firmware have been tested. Regards, Stanley
+
+Hi, Unfortunately, as mentioned by Stanley the Radar Processor SDK demo is not validated with AWR2243. There are some patches available in this forum provided by some forum members but they are not validated by TI We would have to open this question to the forum community for further support thank you Cesar
+
+Hi Khai, If you refer mmWave DFP 2.2.3.1 example, where same code works for both AWR2243 ES1.0 and ES1.1 based on HW version. You need to implement similar logic in your application C:\ti\mmwave_dfp_02_02_03_01\ti\example\mmWaveLink_SingleChip_Example\mmw_example.c retVal = rlDeviceGetMssVersion(deviceMap, &mssFwVer); /* For AWR2243 ES1.0 MSS ROM FW version '2.2.0.3' and ES1.1: '2.2.1.7' */ if ((mssFwVer.fwBuild == 1) && (mssFwVer.fwDebug == 7)) { gMmwaveSensorEs1_1 = AWR2243_ES1_1; } else { gMmwaveSensorEs1_1 = AWR2243_ES1_0; } Similar way you can check first the AWR1243 MSS ROM version which will have some definite value for ES1.0/2.0/3.0 Silicon samples and based on that select the matching FW version to download. Regards, Jitendra
+
+Hi Jiten, So is there a ES3.0 AWR2243 FW you can send us? In the HW detection, what parameters constitute to AWR2243 ES3.0 device? Thanks, --Khai
+
+There is no AWR2243ES 3.0, only ES 1.0 and ES 1.1 There was an AWR1243 ES3.0 Thank you Cesar
+
+Hi Jiten, Thanks for the clarification. So we have 2 FWs built into the AppImage in TDA2. One for 1243 and one for 2243 since we have both Cascade RF board in 1243 and 2243. My questions are: 1. What is the logic to detect AWR models (1243 or 2243)? 2. If it's 1243, would the same 1243 FW be compatible with all ESx version? 3. If it's 2243, would the same 2243 FW be compatible with all ES1.0 or 1.1 version? Thanks, --Khai
+
+The FW release are usually not compatible. The DFP release notes mention the ES supported. Thank you Cesar
+

data2/text/range/0-5000/1049699.txt

@@ -0,0 +1,8 @@
+Ticket Name: DRA756: EMMC linux driver issue
+
+Query Text:
+Part Number: DRA756 Hi. sdk: PROCESSOR_SDK_VISION_03_05_00_00 For the same software, only the SOC of the two boards is different. One uses tda2s and the other uses dra756. Tda2s can use EMMC ddr50 mode.while dra756 cannot use ddr50 mode,Dra756 can use EMMC HS mode dts: &mmc2 { status = "okay"; vmmc-supply = <&evm_3v3_sw>; bus-width = <8>; max-frequency = <192000000>; pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v","ddr50"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_1_8v &mmc2_iodelay_ddr_1_8v_rev11_conf>; pinctrl-3 = <&mmc2_pins_ddr_1_8v &mmc2_iodelay_ddr_1_8v_rev20_conf>; pinctrl-4 = <&mmc2_pins_hs200_1_8v &mmc2_iodelay_hs200_1_8v_rev11_conf>; pinctrl-5 = <&mmc2_pins_hs200_1_8v &mmc2_iodelay_hs200_1_8v_rev20_conf>; }; dr756 emmc ddr50 mode log: [ 1.072168] ldousb: disabling [ 1.073427] omap8250 4806a000.serial: failed to request DMA [ 1.074258] Waiting for root device PARTUUID=dda7f685-03... [ 1.163294] mmc0: host does not support reading read-only switch, assuming write-enable [ 1.168022] mmc0: new ultra high speed DDR50 SDHC card at address aaaa [ 1.169218] mmcblk0: mmc0:aaaa SS08G 7.40 GiB [ 1.174636] mmcblk0: p1 p2 p3 p4 < p5 p6 p7 p8 p9 > [ 1.220299] mmc1: MAN_BKOPS_EN bit is not set [ 1.223227] mmc1: new DDR MMC card at address 0001 [ 1.224159] mmcblk1: mmc1:0001 8GUF4R 7.28 GiB [ 1.224893] mmcblk1boot0: mmc1:0001 8GUF4R partition 1 31.9 MiB [ 1.225796] mmcblk1boot1: mmc1:0001 8GUF4R partition 2 31.9 MiB [ 1.226886] omap_hsmmc 480b4000.mmc: ADMA err: ST_TFR, desc at 0xfe441008 follows the erroneous one [ 1.228069] mmcblk1: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00 [ 1.229261] mmcblk1: retrying using single block read [ 1.229960] mmcblk1: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0 [ 1.231130] blk_update_request: I/O error, dev mmcblk1, sector 0 [ 1.231951] mmcblk1: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0 [ 1.233120] blk_update_request: I/O error, dev mmcblk1, sector 1 [ 1.233945] mmcblk1: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0 [ 1.235114] blk_update_request: I/O error, dev mmcblk1, sector 2 [ 1.235931] mmcblk1: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0 [ 1.237100] blk_update_request: I/O error, dev mmcblk1, sector 3 [ 1.237917] mmcblk1: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0 [ 1.239084] blk_update_request: I/O error, dev mmcblk1, sector 4 [ 1.239903] mmcblk1: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0 [ 1.241072] blk_update_request: I/O error, dev mmcblk1, sector 5 [ 1.241890] mmcblk1: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0 [ 1.243057] blk_update_request: I/O error, dev mmcblk1, sector 6 [ 1.243873] mmcblk1: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0 [ 1.245057] blk_update_request: I/O error, dev mmcblk1, sector 7 [ 1.245822] Buffer I/O error on dev mmcblk1, logical block 0, async page read [ 1.246800] omap_hsmmc 480b4000.mmc: ADMA err: ST_TFR, desc at 0xfe441008 follows the erroneous one [ 1.247980] mmcblk1: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00 [ 1.249170] mmcblk1: retrying using single block read [ 1.249869] mmcblk1: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0 [ 1.251036] blk_update_request: I/O error, dev mmcblk1, sector 0 [ 1.251859] mmcblk1: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0 [ 1.253027] blk_update_request: I/O error, dev mmcblk1, sector 1 [ 1.253845] mmcblk1: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0 [ 1.255082] mmcblk1: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0 [ 1.256310] mmcblk1: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0 [ 1.257532] mmcblk1: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0 [ 1.258760] mmcblk1: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0 [ 1.259982] mmcblk1: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0 [ 1.261153] Buffer I/O error on dev mmcblk1, logical block 0, async page read [ 1.262070] mmcblk1: unable to read partition table [ 1.532364] EXT4-fs (mmcblk0p3): recovery complete
+
+Responses:
+Hi GJ, Is this still an open issue for you or were you able to resolve the issue yourself? regards Suman
+

data2/text/range/0-5000/1049857.txt

@@ -0,0 +1,10 @@
+Ticket Name: PROCESSOR-SDK-TDAX: Is there a way to program the user Programmable LEDs in TIDEP-01017?
+
+Query Text:
+Part Number: PROCESSOR-SDK-TDAX Hi, I'm using MMWCAS_DSP_EVM with Processor SDK Radar 3.08 and according to the User guide of the board, these LEDs(in Table) are user-programmable. I was wondering if I can get guidance on how to program these LEDs from the Radar SDK. I would greatly appreciate it.
+
+Responses:
+Hi, These LEDs are connected to GPIO expander output. The same GPIO expander is also configured in Bsp_boardTda2xxCascadeEnableSdAndEth() under ~\ti_components\drivers\pdk\packages\ti\drv\vps\src\boards\src\bsp_boardTda2xx.c. You can refer to that function to see how to configure the specific output of the GPIO Expander via I2C command. Regards, Stanley
+
+Hi Stanley, Thank you for the response. We were able to run this example located in ~\ti_components\drivers\pdk_01_10_04_05\packages\ti\csl\example\i2c\i2c_led_blink\main.c After modifying the slave address for the correct Port Expander (0x76 instead of 0x20), and were able to blink all those LEDs. Although we had to modify the sample code based on the datasheet(configuring the ports to become output before switching them ON/OFF).
+

data2/text/range/0-5000/1050651.txt

@@ -0,0 +1,8 @@
+Ticket Name: TDA2SX: Video data conversion
+
+Query Text:
+Part Number: TDA2SX Hi TI Expert, 1.HDMI interface: We known HDMI output display video stream in YUV422/YUV420/RGB565/RGB666/RGB888 format from TDA2x datasheet. we do not see HDMI transfer raw data stream, please confirm whether HDMI can not transfer raw data ? or TDA2S video processing engine can not make raw data packets in raw data 8bit/12bit format ? 2.MIPI DSI/MIPI CSI: we want MIPI DSI as video source simulator, what is the difference between MIPI DSI and MIPI CSI ? Are these difference physical layer, data packet protocol, or others? please confirm whether MIPI CSI can receive video source from MIPI DSI ? Thanks
+
+Responses:
+Hi Wang, Please find answers to your questions. Jiacai Wang said: we do not see HDMI transfer raw data stream, please confirm whether HDMI can not transfer raw data ? or TDA2S video processing engine can not make raw data packets in raw data 8bit/12bit format ? No, typically, raw data is not transmitter over HDMI. In fact, DSS, from where HDMI gets its input, does not support raw data.. Jiacai Wang said: 2.MIPI DSI/MIPI CSI: we want MIPI DSI as video source simulator, what is the difference between MIPI DSI and MIPI CSI ? Are these difference physical layer, data packet protocol, or others? please confirm whether MIPI CSI can receive video source from MIPI DSI ? No, Please refer to DSI and CSI specs for more details. Regards, Brijesh
+

data2/text/range/0-5000/1051700.txt

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+Ticket Name: PROCESSOR-SDK-J721E: Migrating sensor support from J6 to J7 SDK
+
+Query Text:
+Part Number: PROCESSOR-SDK-J721E Other Parts Discussed in Thread: TDA2 Hello, My customer would like to use the OV2311 sensor along with TDA4 as he was formerly using it with TDA2 processors. Do we have any plan to support OV2311 or OV2312 in a J7 SDK? If not, what would it take for one to migrate the driver from the J6 SDK to the J7 SDK? Thank you. Best regards, François.
+
+Responses:
+OV231x is not planned in J7 SDK. To add new sensor, please follow the steps at http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/psdk_rtos/docs/user_guide/developer_notes_image_sensor.html
+

data2/text/range/0-5000/1052029.txt

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+Ticket Name: TDA2HF: Program on M4 auto start when i load program by CCS
+
+Query Text:
+Part Number: TDA2HF Processor :TDA2X SDK: VISION_SDK_3.8 According to the <<VisionSDK_UserGuide_TDA2Ex.pdf>> ,i load the progarm : On ARP32_EVE_4, load the binary, “vision_sdk_arp32_4_release.xearp32F”. On ARP32_EVE_3, load the binary, “vision_sdk_arp32_3_release.xearp32F”. On ARP32_EVE_2, load the binary, “vision_sdk_arp32_2_release.xearp32F”. On ARP32_EVE_1, load the binary, “vision_sdk_arp32_1_release.xearp32F”. On C66xx_DSP2, load the binary, “vision_sdk_c66xdsp_2_release.xe66”. On C66xx_DSP1, load the binary, “vision_sdk_c66xdsp_1_release.xe66”. On Cortex_M4_IPU1_C0, load the binary, “vision_sdk_ipu1_0_release.xem4”. On Cortex_M4_IPU1_C1, load the binary, “vision_sdk_ipu1_1_release.xem4”. On CortexA15_0, load the binary, "vision_sdk_a15_0_debug.xa15fg”. But there is something worng. I can see main() on DSP,and do start or set break point.CCS‘s screenshot was shown below: I cant start or set break point on M4,the porgram start automaticly., there is console message: Cortex_M4_IPU1_C0: Can't Run Target CPU: (Error -1268 @ 0x1090001) Device is locked up in Hard Fault or in NMI. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 8.4.0.00006) I want to set break point on M4 ,and start it from main(),what should i do?
+
+Responses:
+Hi, It appears that IPU1_0 M4 has crashed. If you loaded the binaries from your build, there might be something wrong with them. Maybe build configurations were not set correctly. I suggest you to try again with pre-built binary first and see if it works correctly. You can download the binary from SDK download page. Regards, Stanley
+

data2/text/range/0-5000/1054887.txt

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+Ticket Name: TDA4VM-Q1: bootmode for auto select primary boot device
+
+Query Text:
+Part Number: TDA4VM-Q1 Other Parts Discussed in Thread: TDA2 Hi : The TDA2 have the BOOTMODE。for example ,The first device is SD ,the second is EMMC ,it is convenient to use . however .The tda4 , I need to change bootmode every time for different primary boot device .(SD /EMMC ) So does the tda4 have the same bootmode function as the tda2.? and how to set the bootmode
+
+Responses:
+Hi, On TDA4 as well there is a way to select secondary and primary boot mode with a single set of dip switches. So if ROM code is not able to find a valid bootloader from Primary boot media, it will attempt to boot from secondary boot mode. Now that being said, the options for primary boot mode are limited and Section 4.3.2.2 Backup Boot Mode Selection When MCU Only = 0 of the TRM lists them. From the table above, eMMC as backup boot mode is not supported however MMC/SD is. Regards Karan
+
+thanks for your reply. so i understand i can not use a bootmode to achive my idea "the primary boot mode is MMC/SD, the second boot mode is EMMC " it must use a dip switches to change different bootmode . Regards kong
+
+Hi Kong, xiangxu kong said: so i understand i can not use a bootmode to achive my idea "the primary boot mode is MMC/SD, the second boot mode is EMMC " That is correct. The SoC doesn't support booting from a backup boot media of eMMC boot partition. Regards Karan
+

data2/text/range/0-5000/1056057.txt

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+Ticket Name: PROCESSOR-SDK-TDAX: when I debuged the app_tidl(vision_apps/apps/dl_demos/app_tidl), I have some questions
+
+Query Text:
+Part Number: PROCESSOR-SDK-TDAX Other Parts Discussed in Thread: TDA2 question1: In the file of vision_apps/utils/ipc/src/app_ipc_linux_rpmsg_char.c, I found that obj->ipc_notify_handler was a function pointer to the type of app_ipc_notify_handler_f.But,I don't know it pointer to which function when call obj->ipc_notify_handler(app_cpu_id, payload),the function show as below. typedef struct { app_ipc_init_prm_t prm; void *hw_spin_lock_addr; app_ipc_notify_handler_f ipc_notify_handler; int tx_fds[APP_IPC_CPU_MAX]; uint32_t local_endpt[APP_IPC_CPU_MAX]; rpmsg_char_dev_t *rcdev[APP_IPC_CPU_MAX]; pthread_t task; int unblockfd; } app_ipc_obj_t; static void appIpcRpmsgRxHandler(uint32_t app_cpu_id, uint32_t payload) { app_ipc_obj_t *obj = &g_app_ipc_obj; if(app_cpu_id<APP_IPC_CPU_MAX) { #ifdef APP_IPC_DEBUG appLogPrintf("IPC: RX: %s -> %s (port %d) msg = 0x%08x\n", appIpcGetCpuName(app_cpu_id), appIpcGetCpuName(appIpcGetSelfCpuId()), (uint32_t)obj->local_endpt[app_cpu_id], payload); #endif if((payload & 0xFFFF0000) == 0xDEAD0000) { /* echo message dont send to handler */ printf("IPC: RX: %s -> %s (port %d) msg = 0x%08x\n", appIpcGetCpuName(app_cpu_id), appIpcGetCpuName(appIpcGetSelfCpuId()), (uint32_t)obj->prm.tiovx_rpmsg_port_id, payload); } else { if(obj->ipc_notify_handler) { obj->ipc_notify_handler(app_cpu_id, payload); } } } } then I found a suspectable call in the function (void tivxObjDescInit(void)),detail definition showed as below , I can't confirm that,because I added some printf information("======") ,but it didn't show in the terminal. void tivxObjDescInit(void)(tiovx/source/framework/vx_obj_desc.c) { printf("=====================================\n"); tivxPlatformGetObjDescTableInfo(&g_obj_desc_table); tivxIpcRegisterHandler(tivxObjDescIpcHandler); printf("=====================================\n"); } question2: I found that there are four definitions about the function tivxInit(void), in order to determine which tivxInit() function to be called , so I added some printf information(printf("from file : %s ; from function: %s\n", __FILE__, __FUNCTION__);) in every tivxInit() function, before called the tivxInit(void) ,I added printf("++++++++++++++++++++++++++\n"); But there are nothing about from file : %s ; from function: %s\n", __FILE__, __FUNCTION__ ,Only show the "+++++++++++++++++++++++++++" in the terminal. So don't kown why?
+
+Responses:
+Hi, Although there are 4 tivxInit, they are used for different purpose/platform. The one defined in vision_sdk/linux (biod)/tivx_init.c was used on TDA2/3x devices, so you could ignore them. The one defined in pc/common/tivx_init.c is used in PC emulation mode. The one defined in psdk_j7/common/tivx_init.c is actually used on TDA4x.. For the first question, yes, this is where IPC handler is registers. The call flow is tivxIpcHandler -> g_ipc_handler. Regards, Brijesh
+

data2/text/range/0-5000/1056834.txt

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+Ticket Name: TDA2SX: automatically inserts VLAN tags when sending Ethernet packets
+
+Query Text:
+Part Number: TDA2SX Hi TI experts, we use custom board with TDA2x and sending multicast packets, but we can't recieve it. After capturing packets through wireshark we discovered VLAN tags in packets header. We didn't enable VLAN Tagging at code or any configuration file. What's way to disable VLAN tags from Ethernet packets? Some additional information: 1) Device: TDA2x custom board 2) Operation system: TI RTOS 3) SDK version: PROCESSOR_SDK_RADAR_03_07_00_00 4) Ethernet interface: Configured at Eth0
+
+Responses:
+I just add a some new information. When we change destination IP from 239.168.1.50 to 192.168.1.100 VLAN Tagging is gone. I can't understand why is multicast IP add VLAN tag?
+
+Dmitry, there are similar report about the issue. we are investigating the driver. sorry for the extended delays. jian
+
+Jian, Thanks a lot! I will wait for feedback.
+
+Dmitry, I am putting a TI internal link here for internal reference. sorry you will not be able to see the ticket. I will close the ticket for now. If the issue is blocking your project, please reopen. Otherwise it will stay closed till the JIRA is resolved, then an update will be posted here. https://jira.itg.ti.com/browse/LCPD-28065 Jian
+

data2/text/range/0-5000/1060928.txt

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+Ticket Name: TDA2EVM5777: Binaries directory for running TIDL demo semantic segmentation
+
+Query Text:
+Part Number: TDA2EVM5777 Hi Team, Good day! I am posting this in behalf of the customer. Could you please help. As described in the following video for TDA2x-EVM training.ti.com/tda2-evm-series-part-3-0 For illustration of TIDL demo using semantic segmentation, I am unable to find the binaries directory that contains DLNet.bin,DLPRM.bin, Indata, and In header files defined in it. Please share the link for the same, on an urgent basis. Thank you for your support. Best regards, Jonathan
+
+Responses:
+Hi, Myself Nikunj. I only posted this query. Request the team to share the zip folder for all the files required to run TIDL demo as illustrated in TDA2x-EVM tutorial,using Semantic Segmentation on TDA2x-EVM board.
+

data2/text/range/0-5000/1061203.txt

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+Ticket Name: DRA726: 360 degree surround view support
+
+Query Text:
+Part Number: DRA726 Other Parts Discussed in Thread: TDA2E, , TDA2, TDA4VM Hello all, I'm working on an automotive DRA726 based design and I have asked about the possibility of implementing 360º surround view in this processor. I know this is more related with TDA2e than with DRA726 as it is an ADAS function, but I would like to know if there is any HW or SW limitation that makes impossible/hard to implement this function in a DRA726. (IE: no SW native support, HW limitation...) Thank you very much for your time.
+
+Responses:
+Hello, DRA72x has the same GPU as TDA2 and you should be able to support 3D Surround View. You can also consider newer TDA4VM with newer graphics engine. Regards Hemant
+
+Hello Hemant, I have discussed with the customer. Their application is a DRA72x infotainment one built onto the DRA7x Linux SDK 6.0.0.3. They want to add onto it a surround view application from our TDAx Vision SDK 3.8.0.0. Do you expect any compatibility issue there? These 2 SDKs have been released in December 2019 and seem to include the same versions of the software components, but maybe one needs more than just matching versions to use a Vision SDK example in the DRA7x SDK environment. Thank you. Best regards, François.
+